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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
95.92 98.34 94.20 98.61 89.36 97.12 95.81 98.02


Total test records in report: 1100
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T823 /workspace/coverage/default/8.spi_device_read_buffer_direct.2707315439 May 23 01:23:59 PM PDT 24 May 23 01:24:09 PM PDT 24 1609643509 ps
T824 /workspace/coverage/default/37.spi_device_alert_test.1183826474 May 23 01:25:23 PM PDT 24 May 23 01:25:27 PM PDT 24 14772523 ps
T825 /workspace/coverage/default/31.spi_device_csb_read.559940419 May 23 01:25:05 PM PDT 24 May 23 01:25:08 PM PDT 24 65761080 ps
T235 /workspace/coverage/default/5.spi_device_flash_and_tpm_min_idle.449370139 May 23 01:23:49 PM PDT 24 May 23 01:25:58 PM PDT 24 21366522674 ps
T826 /workspace/coverage/default/25.spi_device_alert_test.485404269 May 23 01:25:03 PM PDT 24 May 23 01:25:06 PM PDT 24 14200177 ps
T827 /workspace/coverage/default/33.spi_device_read_buffer_direct.3761436536 May 23 01:25:10 PM PDT 24 May 23 01:25:23 PM PDT 24 747438548 ps
T828 /workspace/coverage/default/7.spi_device_pass_cmd_filtering.3612468643 May 23 01:23:59 PM PDT 24 May 23 01:24:10 PM PDT 24 2590971470 ps
T276 /workspace/coverage/default/24.spi_device_intercept.2958554813 May 23 01:24:49 PM PDT 24 May 23 01:24:57 PM PDT 24 174327141 ps
T829 /workspace/coverage/default/38.spi_device_pass_cmd_filtering.2745174259 May 23 01:25:37 PM PDT 24 May 23 01:25:43 PM PDT 24 449144869 ps
T830 /workspace/coverage/default/24.spi_device_tpm_read_hw_reg.1925550866 May 23 01:24:54 PM PDT 24 May 23 01:25:16 PM PDT 24 20651143802 ps
T831 /workspace/coverage/default/29.spi_device_tpm_read_hw_reg.1529563795 May 23 01:24:53 PM PDT 24 May 23 01:25:16 PM PDT 24 41586556960 ps
T832 /workspace/coverage/default/11.spi_device_pass_cmd_filtering.1017344038 May 23 01:24:11 PM PDT 24 May 23 01:24:21 PM PDT 24 1318580547 ps
T833 /workspace/coverage/default/38.spi_device_flash_and_tpm_min_idle.949799743 May 23 01:25:35 PM PDT 24 May 23 01:26:31 PM PDT 24 4085305692 ps
T834 /workspace/coverage/default/1.spi_device_flash_and_tpm.1615820741 May 23 01:23:32 PM PDT 24 May 23 01:24:09 PM PDT 24 1955572045 ps
T835 /workspace/coverage/default/36.spi_device_csb_read.552227223 May 23 01:25:20 PM PDT 24 May 23 01:25:25 PM PDT 24 19035328 ps
T836 /workspace/coverage/default/17.spi_device_mailbox.371202413 May 23 01:24:23 PM PDT 24 May 23 01:25:05 PM PDT 24 25461569947 ps
T837 /workspace/coverage/default/9.spi_device_pass_cmd_filtering.3933011244 May 23 01:23:59 PM PDT 24 May 23 01:24:16 PM PDT 24 16229804484 ps
T838 /workspace/coverage/default/16.spi_device_flash_and_tpm.4273746283 May 23 01:24:22 PM PDT 24 May 23 01:25:23 PM PDT 24 8951736781 ps
T839 /workspace/coverage/default/42.spi_device_tpm_read_hw_reg.192936436 May 23 01:25:49 PM PDT 24 May 23 01:26:17 PM PDT 24 8520221573 ps
T840 /workspace/coverage/default/27.spi_device_read_buffer_direct.3851010974 May 23 01:24:53 PM PDT 24 May 23 01:25:06 PM PDT 24 778252555 ps
T841 /workspace/coverage/default/38.spi_device_tpm_all.2660878826 May 23 01:25:35 PM PDT 24 May 23 01:26:07 PM PDT 24 6980697029 ps
T842 /workspace/coverage/default/15.spi_device_alert_test.1014373035 May 23 01:24:17 PM PDT 24 May 23 01:24:19 PM PDT 24 15430510 ps
T843 /workspace/coverage/default/17.spi_device_tpm_read_hw_reg.40658505 May 23 01:24:23 PM PDT 24 May 23 01:24:39 PM PDT 24 17804989533 ps
T844 /workspace/coverage/default/6.spi_device_flash_mode.299844337 May 23 01:24:01 PM PDT 24 May 23 01:24:47 PM PDT 24 8558342436 ps
T238 /workspace/coverage/default/26.spi_device_stress_all.3443870189 May 23 01:24:57 PM PDT 24 May 23 01:32:20 PM PDT 24 96286257164 ps
T845 /workspace/coverage/default/21.spi_device_tpm_read_hw_reg.2992504415 May 23 01:24:25 PM PDT 24 May 23 01:24:36 PM PDT 24 5768877487 ps
T846 /workspace/coverage/default/28.spi_device_tpm_sts_read.3929911268 May 23 01:24:58 PM PDT 24 May 23 01:25:02 PM PDT 24 104316271 ps
T847 /workspace/coverage/default/47.spi_device_tpm_rw.736169413 May 23 01:26:03 PM PDT 24 May 23 01:26:06 PM PDT 24 26361097 ps
T848 /workspace/coverage/default/22.spi_device_tpm_sts_read.741623014 May 23 01:24:26 PM PDT 24 May 23 01:24:28 PM PDT 24 28289241 ps
T277 /workspace/coverage/default/30.spi_device_flash_and_tpm_min_idle.1962616132 May 23 01:25:02 PM PDT 24 May 23 01:30:09 PM PDT 24 126152564621 ps
T849 /workspace/coverage/default/37.spi_device_intercept.1785256703 May 23 01:25:19 PM PDT 24 May 23 01:25:24 PM PDT 24 131963337 ps
T850 /workspace/coverage/default/12.spi_device_cfg_cmd.2750770200 May 23 01:24:12 PM PDT 24 May 23 01:24:20 PM PDT 24 1910968180 ps
T851 /workspace/coverage/default/24.spi_device_stress_all.3729858569 May 23 01:24:46 PM PDT 24 May 23 01:24:48 PM PDT 24 84775040 ps
T253 /workspace/coverage/default/3.spi_device_flash_and_tpm.2729286108 May 23 01:23:45 PM PDT 24 May 23 01:24:50 PM PDT 24 9210813467 ps
T852 /workspace/coverage/default/38.spi_device_intercept.1157504609 May 23 01:25:34 PM PDT 24 May 23 01:25:42 PM PDT 24 257763210 ps
T853 /workspace/coverage/default/40.spi_device_flash_and_tpm_min_idle.3525433037 May 23 01:25:35 PM PDT 24 May 23 01:28:01 PM PDT 24 72283913331 ps
T249 /workspace/coverage/default/4.spi_device_flash_and_tpm.2207382351 May 23 01:23:45 PM PDT 24 May 23 01:24:29 PM PDT 24 9316945147 ps
T854 /workspace/coverage/default/6.spi_device_alert_test.3111116891 May 23 01:23:48 PM PDT 24 May 23 01:23:51 PM PDT 24 16570008 ps
T855 /workspace/coverage/default/24.spi_device_csb_read.568099188 May 23 01:24:38 PM PDT 24 May 23 01:24:40 PM PDT 24 59313409 ps
T856 /workspace/coverage/default/11.spi_device_flash_all.531528758 May 23 01:24:06 PM PDT 24 May 23 01:24:40 PM PDT 24 16366614496 ps
T857 /workspace/coverage/default/3.spi_device_tpm_read_hw_reg.375215759 May 23 01:23:44 PM PDT 24 May 23 01:23:50 PM PDT 24 1369884913 ps
T858 /workspace/coverage/default/46.spi_device_upload.3465960985 May 23 01:25:48 PM PDT 24 May 23 01:26:33 PM PDT 24 118689305312 ps
T859 /workspace/coverage/default/11.spi_device_flash_and_tpm.415209467 May 23 01:23:59 PM PDT 24 May 23 01:26:40 PM PDT 24 58301223066 ps
T860 /workspace/coverage/default/4.spi_device_flash_and_tpm_min_idle.2569764643 May 23 01:23:44 PM PDT 24 May 23 01:25:28 PM PDT 24 29964115641 ps
T861 /workspace/coverage/default/31.spi_device_upload.1370987002 May 23 01:25:04 PM PDT 24 May 23 01:25:17 PM PDT 24 1255385294 ps
T862 /workspace/coverage/default/11.spi_device_read_buffer_direct.2263688689 May 23 01:23:59 PM PDT 24 May 23 01:24:10 PM PDT 24 2113153947 ps
T863 /workspace/coverage/default/0.spi_device_flash_mode.3722625804 May 23 01:23:34 PM PDT 24 May 23 01:23:38 PM PDT 24 77133677 ps
T864 /workspace/coverage/default/16.spi_device_tpm_all.4007766137 May 23 01:24:21 PM PDT 24 May 23 01:25:19 PM PDT 24 10735388927 ps
T865 /workspace/coverage/default/2.spi_device_tpm_all.3603455479 May 23 01:23:34 PM PDT 24 May 23 01:23:57 PM PDT 24 1581614933 ps
T251 /workspace/coverage/default/20.spi_device_stress_all.4150617389 May 23 01:24:37 PM PDT 24 May 23 01:34:24 PM PDT 24 57649005076 ps
T866 /workspace/coverage/default/37.spi_device_stress_all.2692313864 May 23 01:25:21 PM PDT 24 May 23 01:31:28 PM PDT 24 75608341928 ps
T867 /workspace/coverage/default/46.spi_device_mailbox.2249900857 May 23 01:25:47 PM PDT 24 May 23 01:26:11 PM PDT 24 1859437605 ps
T868 /workspace/coverage/default/30.spi_device_alert_test.1520264618 May 23 01:25:04 PM PDT 24 May 23 01:25:06 PM PDT 24 15114615 ps
T869 /workspace/coverage/default/39.spi_device_flash_mode.2481966774 May 23 01:25:36 PM PDT 24 May 23 01:25:42 PM PDT 24 604723658 ps
T870 /workspace/coverage/default/3.spi_device_mailbox.2299853798 May 23 01:23:44 PM PDT 24 May 23 01:24:41 PM PDT 24 15524856758 ps
T227 /workspace/coverage/default/8.spi_device_stress_all.179721808 May 23 01:24:01 PM PDT 24 May 23 01:26:53 PM PDT 24 9017539064 ps
T871 /workspace/coverage/default/0.spi_device_csb_read.3261231022 May 23 01:23:30 PM PDT 24 May 23 01:23:32 PM PDT 24 13034207 ps
T872 /workspace/coverage/default/5.spi_device_read_buffer_direct.3401130990 May 23 01:23:52 PM PDT 24 May 23 01:24:06 PM PDT 24 2866913120 ps
T873 /workspace/coverage/default/48.spi_device_cfg_cmd.880028743 May 23 01:26:01 PM PDT 24 May 23 01:26:22 PM PDT 24 2008276620 ps
T874 /workspace/coverage/default/26.spi_device_flash_mode.4166607946 May 23 01:24:57 PM PDT 24 May 23 01:25:11 PM PDT 24 845816835 ps
T875 /workspace/coverage/default/40.spi_device_csb_read.56021017 May 23 01:25:36 PM PDT 24 May 23 01:25:40 PM PDT 24 51570333 ps
T876 /workspace/coverage/default/28.spi_device_flash_all.3761771463 May 23 01:24:54 PM PDT 24 May 23 01:32:01 PM PDT 24 217301107787 ps
T877 /workspace/coverage/default/1.spi_device_pass_addr_payload_swap.2661854864 May 23 01:23:31 PM PDT 24 May 23 01:23:38 PM PDT 24 693408336 ps
T878 /workspace/coverage/default/42.spi_device_tpm_all.3798380494 May 23 01:25:46 PM PDT 24 May 23 01:26:04 PM PDT 24 1593849471 ps
T879 /workspace/coverage/default/6.spi_device_tpm_read_hw_reg.1068326745 May 23 01:23:55 PM PDT 24 May 23 01:24:01 PM PDT 24 3230587686 ps
T880 /workspace/coverage/default/17.spi_device_csb_read.2024021607 May 23 01:24:22 PM PDT 24 May 23 01:24:25 PM PDT 24 48150055 ps
T881 /workspace/coverage/default/33.spi_device_intercept.3202998600 May 23 01:25:10 PM PDT 24 May 23 01:25:23 PM PDT 24 1183800874 ps
T882 /workspace/coverage/default/23.spi_device_read_buffer_direct.976438387 May 23 01:24:51 PM PDT 24 May 23 01:24:59 PM PDT 24 274099751 ps
T883 /workspace/coverage/default/46.spi_device_csb_read.3469386621 May 23 01:25:50 PM PDT 24 May 23 01:25:54 PM PDT 24 29928451 ps
T884 /workspace/coverage/default/23.spi_device_flash_mode.277068358 May 23 01:24:50 PM PDT 24 May 23 01:25:03 PM PDT 24 1481413113 ps
T885 /workspace/coverage/default/0.spi_device_mailbox.1570488949 May 23 01:23:35 PM PDT 24 May 23 01:23:46 PM PDT 24 638275885 ps
T303 /workspace/coverage/default/20.spi_device_flash_mode.3216314888 May 23 01:24:31 PM PDT 24 May 23 01:24:49 PM PDT 24 4628798175 ps
T248 /workspace/coverage/default/41.spi_device_flash_all.3761057674 May 23 01:25:47 PM PDT 24 May 23 01:29:02 PM PDT 24 194584416695 ps
T221 /workspace/coverage/default/41.spi_device_flash_and_tpm_min_idle.2079713285 May 23 01:25:48 PM PDT 24 May 23 01:28:26 PM PDT 24 23027630310 ps
T886 /workspace/coverage/default/48.spi_device_tpm_all.961699277 May 23 01:26:04 PM PDT 24 May 23 01:26:09 PM PDT 24 294182545 ps
T887 /workspace/coverage/default/39.spi_device_tpm_sts_read.2524396137 May 23 01:25:35 PM PDT 24 May 23 01:25:39 PM PDT 24 82889202 ps
T888 /workspace/coverage/default/25.spi_device_csb_read.1590844894 May 23 01:24:44 PM PDT 24 May 23 01:24:46 PM PDT 24 22720208 ps
T889 /workspace/coverage/default/38.spi_device_mailbox.1761407620 May 23 01:25:33 PM PDT 24 May 23 01:26:29 PM PDT 24 11885454864 ps
T890 /workspace/coverage/default/42.spi_device_tpm_rw.3967495267 May 23 01:25:51 PM PDT 24 May 23 01:25:56 PM PDT 24 30810238 ps
T891 /workspace/coverage/default/4.spi_device_intercept.3338315022 May 23 01:23:57 PM PDT 24 May 23 01:24:03 PM PDT 24 411381971 ps
T892 /workspace/coverage/default/48.spi_device_intercept.9079515 May 23 01:26:02 PM PDT 24 May 23 01:26:13 PM PDT 24 4267479103 ps
T893 /workspace/coverage/default/49.spi_device_flash_all.1965246252 May 23 01:26:11 PM PDT 24 May 23 01:27:18 PM PDT 24 53692401927 ps
T894 /workspace/coverage/default/3.spi_device_read_buffer_direct.3550013787 May 23 01:23:44 PM PDT 24 May 23 01:23:50 PM PDT 24 225418706 ps
T895 /workspace/coverage/default/17.spi_device_pass_addr_payload_swap.3386808519 May 23 01:24:23 PM PDT 24 May 23 01:24:27 PM PDT 24 54009233 ps
T896 /workspace/coverage/default/1.spi_device_cfg_cmd.1541075999 May 23 01:23:31 PM PDT 24 May 23 01:23:39 PM PDT 24 1165507882 ps
T897 /workspace/coverage/default/32.spi_device_csb_read.1502978597 May 23 01:25:08 PM PDT 24 May 23 01:25:11 PM PDT 24 16391200 ps
T898 /workspace/coverage/default/12.spi_device_flash_all.2191734378 May 23 01:24:05 PM PDT 24 May 23 01:24:53 PM PDT 24 7659390901 ps
T899 /workspace/coverage/default/37.spi_device_read_buffer_direct.3203071861 May 23 01:25:24 PM PDT 24 May 23 01:25:31 PM PDT 24 113001952 ps
T900 /workspace/coverage/default/47.spi_device_pass_cmd_filtering.1152372936 May 23 01:26:02 PM PDT 24 May 23 01:26:07 PM PDT 24 367903482 ps
T901 /workspace/coverage/default/11.spi_device_mailbox.3317474873 May 23 01:24:11 PM PDT 24 May 23 01:25:00 PM PDT 24 19397026309 ps
T902 /workspace/coverage/default/42.spi_device_flash_and_tpm_min_idle.3480698511 May 23 01:25:52 PM PDT 24 May 23 01:26:55 PM PDT 24 3387094084 ps
T903 /workspace/coverage/default/34.spi_device_pass_addr_payload_swap.1812236614 May 23 01:25:18 PM PDT 24 May 23 01:25:21 PM PDT 24 79349896 ps
T904 /workspace/coverage/default/34.spi_device_tpm_sts_read.918969069 May 23 01:25:18 PM PDT 24 May 23 01:25:21 PM PDT 24 498535144 ps
T905 /workspace/coverage/default/40.spi_device_pass_addr_payload_swap.1984921311 May 23 01:25:34 PM PDT 24 May 23 01:25:43 PM PDT 24 3160400872 ps
T906 /workspace/coverage/default/4.spi_device_cfg_cmd.1552931816 May 23 01:23:42 PM PDT 24 May 23 01:23:45 PM PDT 24 89770287 ps
T907 /workspace/coverage/default/12.spi_device_tpm_rw.2396515552 May 23 01:24:04 PM PDT 24 May 23 01:24:08 PM PDT 24 19194757 ps
T908 /workspace/coverage/default/40.spi_device_tpm_read_hw_reg.2691302149 May 23 01:25:33 PM PDT 24 May 23 01:25:39 PM PDT 24 997722378 ps
T909 /workspace/coverage/default/16.spi_device_csb_read.604464741 May 23 01:24:18 PM PDT 24 May 23 01:24:20 PM PDT 24 25765709 ps
T910 /workspace/coverage/default/25.spi_device_read_buffer_direct.909035637 May 23 01:24:51 PM PDT 24 May 23 01:25:07 PM PDT 24 1457329239 ps
T911 /workspace/coverage/default/47.spi_device_flash_and_tpm_min_idle.3606491521 May 23 01:26:00 PM PDT 24 May 23 01:28:00 PM PDT 24 23707276393 ps
T912 /workspace/coverage/default/34.spi_device_stress_all.3657652494 May 23 01:25:20 PM PDT 24 May 23 01:26:02 PM PDT 24 1530923597 ps
T913 /workspace/coverage/default/48.spi_device_flash_and_tpm.3134545420 May 23 01:26:02 PM PDT 24 May 23 01:39:26 PM PDT 24 342516471090 ps
T914 /workspace/coverage/default/15.spi_device_intercept.2317675935 May 23 01:24:18 PM PDT 24 May 23 01:24:25 PM PDT 24 1961197199 ps
T915 /workspace/coverage/default/24.spi_device_flash_all.3342994455 May 23 01:24:44 PM PDT 24 May 23 01:24:57 PM PDT 24 8593820742 ps
T242 /workspace/coverage/default/14.spi_device_pass_addr_payload_swap.3391830924 May 23 01:24:22 PM PDT 24 May 23 01:24:33 PM PDT 24 921909022 ps
T916 /workspace/coverage/default/15.spi_device_tpm_read_hw_reg.2886890743 May 23 01:24:19 PM PDT 24 May 23 01:24:26 PM PDT 24 5265459142 ps
T917 /workspace/coverage/default/22.spi_device_alert_test.1628345000 May 23 01:24:49 PM PDT 24 May 23 01:24:55 PM PDT 24 14289890 ps
T918 /workspace/coverage/default/14.spi_device_tpm_rw.1099010556 May 23 01:24:11 PM PDT 24 May 23 01:24:18 PM PDT 24 133429182 ps
T919 /workspace/coverage/default/16.spi_device_stress_all.1266378523 May 23 01:24:22 PM PDT 24 May 23 01:41:11 PM PDT 24 421109590784 ps
T920 /workspace/coverage/default/0.spi_device_tpm_all.822252753 May 23 01:23:33 PM PDT 24 May 23 01:23:41 PM PDT 24 3794616974 ps
T921 /workspace/coverage/default/10.spi_device_flash_all.1322546214 May 23 01:24:03 PM PDT 24 May 23 01:26:02 PM PDT 24 12038945576 ps
T922 /workspace/coverage/default/34.spi_device_csb_read.3466005352 May 23 01:25:18 PM PDT 24 May 23 01:25:19 PM PDT 24 54311750 ps
T923 /workspace/coverage/default/21.spi_device_intercept.2948338057 May 23 01:24:32 PM PDT 24 May 23 01:24:40 PM PDT 24 2566219817 ps
T924 /workspace/coverage/default/36.spi_device_flash_and_tpm_min_idle.452227340 May 23 01:25:20 PM PDT 24 May 23 01:26:16 PM PDT 24 14435982584 ps
T925 /workspace/coverage/default/44.spi_device_read_buffer_direct.2358772388 May 23 01:25:53 PM PDT 24 May 23 01:26:09 PM PDT 24 1013339339 ps
T926 /workspace/coverage/default/0.spi_device_read_buffer_direct.2488214575 May 23 01:23:30 PM PDT 24 May 23 01:23:40 PM PDT 24 3959462141 ps
T927 /workspace/coverage/default/48.spi_device_tpm_read_hw_reg.903110785 May 23 01:26:01 PM PDT 24 May 23 01:26:03 PM PDT 24 43699064 ps
T928 /workspace/coverage/default/14.spi_device_flash_all.3119258776 May 23 01:24:17 PM PDT 24 May 23 01:24:19 PM PDT 24 25168644 ps
T929 /workspace/coverage/default/11.spi_device_intercept.4155897259 May 23 01:24:11 PM PDT 24 May 23 01:24:17 PM PDT 24 172658032 ps
T930 /workspace/coverage/default/32.spi_device_flash_all.3764954978 May 23 01:25:10 PM PDT 24 May 23 01:32:07 PM PDT 24 52626844222 ps
T931 /workspace/coverage/default/20.spi_device_tpm_rw.1126572462 May 23 01:24:33 PM PDT 24 May 23 01:24:36 PM PDT 24 142535730 ps
T932 /workspace/coverage/default/40.spi_device_stress_all.3479426837 May 23 01:25:36 PM PDT 24 May 23 01:26:24 PM PDT 24 3549476647 ps
T933 /workspace/coverage/default/17.spi_device_mem_parity.4021068941 May 23 01:24:23 PM PDT 24 May 23 01:24:27 PM PDT 24 237367304 ps
T934 /workspace/coverage/default/13.spi_device_intercept.3011908990 May 23 01:24:20 PM PDT 24 May 23 01:24:31 PM PDT 24 2184567083 ps
T935 /workspace/coverage/default/35.spi_device_pass_addr_payload_swap.1037451990 May 23 01:25:24 PM PDT 24 May 23 01:25:40 PM PDT 24 16357361972 ps
T936 /workspace/coverage/default/43.spi_device_read_buffer_direct.123605265 May 23 01:25:47 PM PDT 24 May 23 01:25:53 PM PDT 24 258507827 ps
T937 /workspace/coverage/default/17.spi_device_tpm_all.2343295114 May 23 01:24:24 PM PDT 24 May 23 01:24:54 PM PDT 24 5098701225 ps
T938 /workspace/coverage/default/31.spi_device_tpm_all.1814102358 May 23 01:25:06 PM PDT 24 May 23 01:25:43 PM PDT 24 24713342661 ps
T939 /workspace/coverage/default/12.spi_device_flash_and_tpm.4196084332 May 23 01:24:05 PM PDT 24 May 23 01:24:21 PM PDT 24 3212303454 ps
T940 /workspace/coverage/default/34.spi_device_mailbox.820456049 May 23 01:25:21 PM PDT 24 May 23 01:25:37 PM PDT 24 1021760908 ps
T941 /workspace/coverage/default/48.spi_device_flash_mode.1340242791 May 23 01:26:02 PM PDT 24 May 23 01:26:09 PM PDT 24 310422456 ps
T942 /workspace/coverage/default/32.spi_device_tpm_rw.3439906388 May 23 01:25:06 PM PDT 24 May 23 01:25:09 PM PDT 24 20476625 ps
T943 /workspace/coverage/default/41.spi_device_alert_test.1604575762 May 23 01:25:49 PM PDT 24 May 23 01:25:53 PM PDT 24 24267017 ps
T48 /workspace/coverage/default/45.spi_device_flash_and_tpm.3044341340 May 23 01:25:52 PM PDT 24 May 23 01:35:18 PM PDT 24 60500328273 ps
T944 /workspace/coverage/default/23.spi_device_mailbox.4029860787 May 23 01:24:49 PM PDT 24 May 23 01:25:04 PM PDT 24 1054079440 ps
T945 /workspace/coverage/default/24.spi_device_pass_addr_payload_swap.927977487 May 23 01:24:38 PM PDT 24 May 23 01:24:55 PM PDT 24 16365031351 ps
T946 /workspace/coverage/default/25.spi_device_upload.3160824587 May 23 01:24:51 PM PDT 24 May 23 01:25:00 PM PDT 24 817337662 ps
T947 /workspace/coverage/default/40.spi_device_upload.3631398711 May 23 01:25:37 PM PDT 24 May 23 01:26:01 PM PDT 24 50114516900 ps
T948 /workspace/coverage/default/42.spi_device_flash_and_tpm.1647544810 May 23 01:25:49 PM PDT 24 May 23 01:34:56 PM PDT 24 398144228825 ps
T949 /workspace/coverage/default/14.spi_device_tpm_read_hw_reg.3408126955 May 23 01:24:11 PM PDT 24 May 23 01:24:26 PM PDT 24 54686244288 ps
T950 /workspace/coverage/default/5.spi_device_pass_addr_payload_swap.814453924 May 23 01:23:51 PM PDT 24 May 23 01:23:57 PM PDT 24 758599698 ps
T951 /workspace/coverage/default/4.spi_device_flash_all.612117982 May 23 01:23:47 PM PDT 24 May 23 01:23:49 PM PDT 24 22943001 ps
T952 /workspace/coverage/default/36.spi_device_stress_all.590528754 May 23 01:25:18 PM PDT 24 May 23 01:25:21 PM PDT 24 45053639 ps
T953 /workspace/coverage/default/30.spi_device_mailbox.2847756303 May 23 01:25:06 PM PDT 24 May 23 01:26:02 PM PDT 24 22880100795 ps
T954 /workspace/coverage/default/6.spi_device_pass_cmd_filtering.3652911757 May 23 01:23:54 PM PDT 24 May 23 01:24:00 PM PDT 24 223457485 ps
T955 /workspace/coverage/default/23.spi_device_stress_all.335152385 May 23 01:24:48 PM PDT 24 May 23 01:32:25 PM PDT 24 179818724717 ps
T956 /workspace/coverage/default/21.spi_device_flash_mode.2805913418 May 23 01:24:25 PM PDT 24 May 23 01:24:33 PM PDT 24 340842060 ps
T957 /workspace/coverage/default/5.spi_device_upload.2410762142 May 23 01:23:56 PM PDT 24 May 23 01:24:06 PM PDT 24 14478541560 ps
T958 /workspace/coverage/default/32.spi_device_cfg_cmd.1228031132 May 23 01:25:05 PM PDT 24 May 23 01:25:12 PM PDT 24 843014249 ps
T959 /workspace/coverage/default/10.spi_device_flash_and_tpm.2530601130 May 23 01:24:07 PM PDT 24 May 23 01:27:00 PM PDT 24 38375198865 ps
T240 /workspace/coverage/default/13.spi_device_flash_and_tpm.2821332062 May 23 01:24:09 PM PDT 24 May 23 01:31:49 PM PDT 24 47061215168 ps
T960 /workspace/coverage/default/18.spi_device_flash_and_tpm.2830384311 May 23 01:24:19 PM PDT 24 May 23 01:25:11 PM PDT 24 5100292182 ps
T961 /workspace/coverage/default/21.spi_device_stress_all.2558731556 May 23 01:24:31 PM PDT 24 May 23 01:29:25 PM PDT 24 640364735253 ps
T962 /workspace/coverage/default/15.spi_device_flash_and_tpm_min_idle.3207472667 May 23 01:24:12 PM PDT 24 May 23 01:26:12 PM PDT 24 37930385071 ps
T963 /workspace/coverage/default/31.spi_device_pass_cmd_filtering.1933356904 May 23 01:25:04 PM PDT 24 May 23 01:25:11 PM PDT 24 2871188536 ps
T964 /workspace/coverage/default/21.spi_device_mailbox.1709787702 May 23 01:24:36 PM PDT 24 May 23 01:25:26 PM PDT 24 4123253841 ps
T965 /workspace/coverage/default/31.spi_device_tpm_read_hw_reg.1165342176 May 23 01:25:06 PM PDT 24 May 23 01:25:35 PM PDT 24 9839903294 ps
T966 /workspace/coverage/default/47.spi_device_alert_test.132261489 May 23 01:26:02 PM PDT 24 May 23 01:26:04 PM PDT 24 50739049 ps
T967 /workspace/coverage/default/22.spi_device_pass_addr_payload_swap.3314054383 May 23 01:24:43 PM PDT 24 May 23 01:24:51 PM PDT 24 7073414659 ps
T968 /workspace/coverage/default/5.spi_device_cfg_cmd.2546640972 May 23 01:23:48 PM PDT 24 May 23 01:23:53 PM PDT 24 45018867 ps
T969 /workspace/coverage/default/35.spi_device_cfg_cmd.1208581175 May 23 01:25:24 PM PDT 24 May 23 01:25:36 PM PDT 24 735581916 ps
T304 /workspace/coverage/default/22.spi_device_flash_mode.120063772 May 23 01:24:38 PM PDT 24 May 23 01:24:50 PM PDT 24 1877529758 ps
T970 /workspace/coverage/default/33.spi_device_pass_cmd_filtering.67083619 May 23 01:25:07 PM PDT 24 May 23 01:25:14 PM PDT 24 814198958 ps
T971 /workspace/coverage/default/30.spi_device_stress_all.4187895592 May 23 01:25:08 PM PDT 24 May 23 01:25:33 PM PDT 24 990219240 ps
T972 /workspace/coverage/default/31.spi_device_stress_all.1368878880 May 23 01:25:08 PM PDT 24 May 23 01:25:55 PM PDT 24 15434037279 ps
T973 /workspace/coverage/default/48.spi_device_alert_test.1146915741 May 23 01:26:07 PM PDT 24 May 23 01:26:09 PM PDT 24 130820518 ps
T974 /workspace/coverage/default/9.spi_device_csb_read.288035598 May 23 01:24:03 PM PDT 24 May 23 01:24:06 PM PDT 24 16018796 ps
T975 /workspace/coverage/default/15.spi_device_pass_cmd_filtering.4182599669 May 23 01:24:23 PM PDT 24 May 23 01:24:38 PM PDT 24 1780662474 ps
T976 /workspace/coverage/default/32.spi_device_pass_cmd_filtering.2582846929 May 23 01:25:05 PM PDT 24 May 23 01:25:22 PM PDT 24 8942437568 ps
T977 /workspace/coverage/default/47.spi_device_cfg_cmd.3156204206 May 23 01:26:08 PM PDT 24 May 23 01:26:12 PM PDT 24 89821963 ps
T978 /workspace/coverage/default/40.spi_device_flash_and_tpm.3869818667 May 23 01:25:36 PM PDT 24 May 23 01:30:43 PM PDT 24 69481621865 ps
T979 /workspace/coverage/default/16.spi_device_read_buffer_direct.3696265540 May 23 01:24:21 PM PDT 24 May 23 01:24:28 PM PDT 24 222717004 ps
T980 /workspace/coverage/default/43.spi_device_pass_cmd_filtering.4189512459 May 23 01:25:48 PM PDT 24 May 23 01:25:53 PM PDT 24 2023585911 ps
T981 /workspace/coverage/default/6.spi_device_cfg_cmd.1630743096 May 23 01:23:49 PM PDT 24 May 23 01:23:54 PM PDT 24 38748162 ps
T982 /workspace/coverage/default/21.spi_device_alert_test.3880313046 May 23 01:24:40 PM PDT 24 May 23 01:24:42 PM PDT 24 15670909 ps
T135 /workspace/coverage/cover_reg_top/8.spi_device_same_csr_outstanding.4004883443 May 23 01:19:30 PM PDT 24 May 23 01:19:35 PM PDT 24 84824184 ps
T85 /workspace/coverage/cover_reg_top/5.spi_device_csr_mem_rw_with_rand_reset.2226387300 May 23 01:19:29 PM PDT 24 May 23 01:19:33 PM PDT 24 224714739 ps
T86 /workspace/coverage/cover_reg_top/7.spi_device_csr_mem_rw_with_rand_reset.3382670278 May 23 01:19:41 PM PDT 24 May 23 01:19:47 PM PDT 24 143451729 ps
T983 /workspace/coverage/cover_reg_top/29.spi_device_intr_test.3852356549 May 23 01:20:01 PM PDT 24 May 23 01:20:05 PM PDT 24 41900050 ps
T87 /workspace/coverage/cover_reg_top/19.spi_device_tl_errors.2830521907 May 23 01:19:43 PM PDT 24 May 23 01:19:48 PM PDT 24 629737546 ps
T136 /workspace/coverage/cover_reg_top/3.spi_device_same_csr_outstanding.3567424464 May 23 01:19:29 PM PDT 24 May 23 01:19:32 PM PDT 24 30879273 ps
T984 /workspace/coverage/cover_reg_top/0.spi_device_csr_bit_bash.3156324768 May 23 01:19:23 PM PDT 24 May 23 01:19:36 PM PDT 24 716110005 ps
T106 /workspace/coverage/cover_reg_top/18.spi_device_csr_mem_rw_with_rand_reset.2494994335 May 23 01:19:32 PM PDT 24 May 23 01:19:38 PM PDT 24 131460781 ps
T985 /workspace/coverage/cover_reg_top/21.spi_device_intr_test.529748708 May 23 01:19:46 PM PDT 24 May 23 01:19:48 PM PDT 24 34800699 ps
T137 /workspace/coverage/cover_reg_top/15.spi_device_same_csr_outstanding.319592752 May 23 01:19:35 PM PDT 24 May 23 01:19:40 PM PDT 24 251777805 ps
T138 /workspace/coverage/cover_reg_top/12.spi_device_csr_rw.187991072 May 23 01:19:31 PM PDT 24 May 23 01:19:37 PM PDT 24 488121956 ps
T111 /workspace/coverage/cover_reg_top/6.spi_device_csr_rw.2246461479 May 23 01:19:47 PM PDT 24 May 23 01:19:50 PM PDT 24 64516299 ps
T107 /workspace/coverage/cover_reg_top/16.spi_device_csr_mem_rw_with_rand_reset.3850716672 May 23 01:19:36 PM PDT 24 May 23 01:19:41 PM PDT 24 211102034 ps
T986 /workspace/coverage/cover_reg_top/5.spi_device_csr_rw.634244072 May 23 01:19:22 PM PDT 24 May 23 01:19:25 PM PDT 24 58243041 ps
T987 /workspace/coverage/cover_reg_top/1.spi_device_mem_walk.2022486523 May 23 01:19:31 PM PDT 24 May 23 01:19:34 PM PDT 24 18589353 ps
T988 /workspace/coverage/cover_reg_top/49.spi_device_intr_test.2573184123 May 23 01:20:07 PM PDT 24 May 23 01:20:10 PM PDT 24 15876153 ps
T989 /workspace/coverage/cover_reg_top/13.spi_device_intr_test.3466250649 May 23 01:19:42 PM PDT 24 May 23 01:19:44 PM PDT 24 23523521 ps
T88 /workspace/coverage/cover_reg_top/17.spi_device_tl_intg_err.3247997891 May 23 01:19:33 PM PDT 24 May 23 01:19:57 PM PDT 24 3151346299 ps
T89 /workspace/coverage/cover_reg_top/16.spi_device_tl_intg_err.1872505831 May 23 01:19:38 PM PDT 24 May 23 01:19:49 PM PDT 24 290236674 ps
T112 /workspace/coverage/cover_reg_top/3.spi_device_csr_rw.2601178754 May 23 01:19:28 PM PDT 24 May 23 01:19:31 PM PDT 24 70507756 ps
T91 /workspace/coverage/cover_reg_top/17.spi_device_csr_mem_rw_with_rand_reset.306897449 May 23 01:19:50 PM PDT 24 May 23 01:19:56 PM PDT 24 58858667 ps
T113 /workspace/coverage/cover_reg_top/2.spi_device_csr_rw.985134776 May 23 01:19:32 PM PDT 24 May 23 01:19:37 PM PDT 24 126264528 ps
T990 /workspace/coverage/cover_reg_top/0.spi_device_mem_walk.653784737 May 23 01:19:34 PM PDT 24 May 23 01:19:38 PM PDT 24 36440318 ps
T991 /workspace/coverage/cover_reg_top/14.spi_device_intr_test.3736988823 May 23 01:19:33 PM PDT 24 May 23 01:19:37 PM PDT 24 107591181 ps
T142 /workspace/coverage/cover_reg_top/16.spi_device_same_csr_outstanding.3597773434 May 23 01:19:36 PM PDT 24 May 23 01:19:41 PM PDT 24 73159389 ps
T992 /workspace/coverage/cover_reg_top/5.spi_device_intr_test.3384941826 May 23 01:19:29 PM PDT 24 May 23 01:19:31 PM PDT 24 59224554 ps
T92 /workspace/coverage/cover_reg_top/12.spi_device_csr_mem_rw_with_rand_reset.3297879881 May 23 01:19:42 PM PDT 24 May 23 01:19:45 PM PDT 24 128705779 ps
T90 /workspace/coverage/cover_reg_top/14.spi_device_tl_intg_err.433570258 May 23 01:19:34 PM PDT 24 May 23 01:19:53 PM PDT 24 543960447 ps
T114 /workspace/coverage/cover_reg_top/14.spi_device_csr_rw.2222333603 May 23 01:19:42 PM PDT 24 May 23 01:19:46 PM PDT 24 374520444 ps
T108 /workspace/coverage/cover_reg_top/0.spi_device_tl_intg_err.4245770932 May 23 01:19:30 PM PDT 24 May 23 01:19:51 PM PDT 24 294059000 ps
T93 /workspace/coverage/cover_reg_top/18.spi_device_tl_errors.2389450719 May 23 01:19:34 PM PDT 24 May 23 01:19:41 PM PDT 24 130802145 ps
T993 /workspace/coverage/cover_reg_top/15.spi_device_csr_rw.2137804636 May 23 01:19:39 PM PDT 24 May 23 01:19:43 PM PDT 24 109441448 ps
T262 /workspace/coverage/cover_reg_top/3.spi_device_tl_intg_err.3755644540 May 23 01:19:26 PM PDT 24 May 23 01:19:48 PM PDT 24 834434173 ps
T994 /workspace/coverage/cover_reg_top/6.spi_device_same_csr_outstanding.1176548211 May 23 01:19:29 PM PDT 24 May 23 01:19:36 PM PDT 24 631932367 ps
T104 /workspace/coverage/cover_reg_top/4.spi_device_csr_mem_rw_with_rand_reset.341636261 May 23 01:19:34 PM PDT 24 May 23 01:19:41 PM PDT 24 188056430 ps
T995 /workspace/coverage/cover_reg_top/39.spi_device_intr_test.3807093187 May 23 01:20:01 PM PDT 24 May 23 01:20:05 PM PDT 24 50184405 ps
T72 /workspace/coverage/cover_reg_top/1.spi_device_csr_hw_reset.1834541186 May 23 01:19:27 PM PDT 24 May 23 01:19:29 PM PDT 24 89265232 ps
T996 /workspace/coverage/cover_reg_top/3.spi_device_mem_walk.2005727031 May 23 01:19:34 PM PDT 24 May 23 01:19:38 PM PDT 24 33213439 ps
T997 /workspace/coverage/cover_reg_top/0.spi_device_csr_aliasing.2450474492 May 23 01:19:39 PM PDT 24 May 23 01:19:49 PM PDT 24 116332489 ps
T115 /workspace/coverage/cover_reg_top/16.spi_device_csr_rw.2183049091 May 23 01:19:45 PM PDT 24 May 23 01:19:49 PM PDT 24 487216248 ps
T143 /workspace/coverage/cover_reg_top/4.spi_device_same_csr_outstanding.3063637981 May 23 01:19:35 PM PDT 24 May 23 01:19:40 PM PDT 24 74158161 ps
T998 /workspace/coverage/cover_reg_top/2.spi_device_mem_walk.3291541327 May 23 01:19:30 PM PDT 24 May 23 01:19:33 PM PDT 24 10390998 ps
T144 /workspace/coverage/cover_reg_top/0.spi_device_same_csr_outstanding.2314548745 May 23 01:19:32 PM PDT 24 May 23 01:19:37 PM PDT 24 262052864 ps
T105 /workspace/coverage/cover_reg_top/14.spi_device_csr_mem_rw_with_rand_reset.71400792 May 23 01:19:49 PM PDT 24 May 23 01:19:54 PM PDT 24 222097421 ps
T999 /workspace/coverage/cover_reg_top/4.spi_device_mem_walk.596105287 May 23 01:19:35 PM PDT 24 May 23 01:19:39 PM PDT 24 20986292 ps
T269 /workspace/coverage/cover_reg_top/1.spi_device_tl_intg_err.1988126605 May 23 01:19:31 PM PDT 24 May 23 01:19:57 PM PDT 24 3347976925 ps
T1000 /workspace/coverage/cover_reg_top/30.spi_device_intr_test.4247832806 May 23 01:20:06 PM PDT 24 May 23 01:20:09 PM PDT 24 17667575 ps
T1001 /workspace/coverage/cover_reg_top/27.spi_device_intr_test.1143041 May 23 01:19:43 PM PDT 24 May 23 01:19:45 PM PDT 24 51093614 ps
T145 /workspace/coverage/cover_reg_top/1.spi_device_same_csr_outstanding.2608287031 May 23 01:19:30 PM PDT 24 May 23 01:19:35 PM PDT 24 286579342 ps
T1002 /workspace/coverage/cover_reg_top/34.spi_device_intr_test.899833976 May 23 01:20:12 PM PDT 24 May 23 01:20:14 PM PDT 24 14774391 ps
T1003 /workspace/coverage/cover_reg_top/37.spi_device_intr_test.3205394321 May 23 01:19:49 PM PDT 24 May 23 01:19:57 PM PDT 24 14821351 ps
T1004 /workspace/coverage/cover_reg_top/0.spi_device_intr_test.907742542 May 23 01:19:28 PM PDT 24 May 23 01:19:30 PM PDT 24 43040319 ps
T101 /workspace/coverage/cover_reg_top/11.spi_device_tl_errors.4139151216 May 23 01:19:40 PM PDT 24 May 23 01:19:46 PM PDT 24 353372240 ps
T1005 /workspace/coverage/cover_reg_top/35.spi_device_intr_test.3837797334 May 23 01:19:57 PM PDT 24 May 23 01:20:05 PM PDT 24 14691450 ps
T146 /workspace/coverage/cover_reg_top/9.spi_device_csr_mem_rw_with_rand_reset.3479176128 May 23 01:19:34 PM PDT 24 May 23 01:19:40 PM PDT 24 93944429 ps
T99 /workspace/coverage/cover_reg_top/12.spi_device_tl_errors.2026752443 May 23 01:19:33 PM PDT 24 May 23 01:19:37 PM PDT 24 27600408 ps
T1006 /workspace/coverage/cover_reg_top/19.spi_device_intr_test.3878016965 May 23 01:19:55 PM PDT 24 May 23 01:19:58 PM PDT 24 60720647 ps
T1007 /workspace/coverage/cover_reg_top/1.spi_device_csr_rw.319500622 May 23 01:19:31 PM PDT 24 May 23 01:19:36 PM PDT 24 284005160 ps
T266 /workspace/coverage/cover_reg_top/15.spi_device_tl_intg_err.1106806155 May 23 01:19:36 PM PDT 24 May 23 01:19:58 PM PDT 24 292592467 ps
T1008 /workspace/coverage/cover_reg_top/3.spi_device_intr_test.1064247981 May 23 01:19:22 PM PDT 24 May 23 01:19:24 PM PDT 24 113413375 ps
T100 /workspace/coverage/cover_reg_top/6.spi_device_tl_errors.2952345042 May 23 01:19:30 PM PDT 24 May 23 01:19:34 PM PDT 24 109234368 ps
T1009 /workspace/coverage/cover_reg_top/23.spi_device_intr_test.570681394 May 23 01:19:52 PM PDT 24 May 23 01:19:54 PM PDT 24 47845814 ps
T116 /workspace/coverage/cover_reg_top/2.spi_device_csr_aliasing.1772791781 May 23 01:19:33 PM PDT 24 May 23 01:19:58 PM PDT 24 1664902639 ps
T1010 /workspace/coverage/cover_reg_top/2.spi_device_csr_bit_bash.2619610199 May 23 01:19:32 PM PDT 24 May 23 01:20:12 PM PDT 24 1814717567 ps
T96 /workspace/coverage/cover_reg_top/13.spi_device_tl_errors.2276128847 May 23 01:19:48 PM PDT 24 May 23 01:19:53 PM PDT 24 189914771 ps
T97 /workspace/coverage/cover_reg_top/10.spi_device_tl_errors.4142788717 May 23 01:19:35 PM PDT 24 May 23 01:19:42 PM PDT 24 1366310127 ps
T1011 /workspace/coverage/cover_reg_top/17.spi_device_intr_test.113217068 May 23 01:19:33 PM PDT 24 May 23 01:19:37 PM PDT 24 69313011 ps
T1012 /workspace/coverage/cover_reg_top/1.spi_device_intr_test.74937061 May 23 01:19:31 PM PDT 24 May 23 01:19:34 PM PDT 24 147932109 ps
T1013 /workspace/coverage/cover_reg_top/11.spi_device_intr_test.1856711679 May 23 01:19:32 PM PDT 24 May 23 01:19:36 PM PDT 24 31244178 ps
T147 /workspace/coverage/cover_reg_top/5.spi_device_tl_intg_err.2872124150 May 23 01:19:33 PM PDT 24 May 23 01:19:52 PM PDT 24 692539276 ps
T1014 /workspace/coverage/cover_reg_top/0.spi_device_csr_rw.204580281 May 23 01:19:21 PM PDT 24 May 23 01:19:23 PM PDT 24 153086358 ps
T102 /workspace/coverage/cover_reg_top/5.spi_device_tl_errors.2992713901 May 23 01:19:32 PM PDT 24 May 23 01:19:38 PM PDT 24 159986639 ps
T1015 /workspace/coverage/cover_reg_top/25.spi_device_intr_test.122387695 May 23 01:19:39 PM PDT 24 May 23 01:19:42 PM PDT 24 39244629 ps
T1016 /workspace/coverage/cover_reg_top/20.spi_device_intr_test.3111892548 May 23 01:19:57 PM PDT 24 May 23 01:20:00 PM PDT 24 46944064 ps
T1017 /workspace/coverage/cover_reg_top/0.spi_device_csr_mem_rw_with_rand_reset.3278821326 May 23 01:19:25 PM PDT 24 May 23 01:19:28 PM PDT 24 29794948 ps
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