T816 |
/workspace/coverage/default/29.spi_device_tpm_sts_read.3713404041 |
|
|
May 26 02:40:57 PM PDT 24 |
May 26 02:41:00 PM PDT 24 |
160192914 ps |
T817 |
/workspace/coverage/default/13.spi_device_stress_all.2145153196 |
|
|
May 26 02:39:48 PM PDT 24 |
May 26 02:40:04 PM PDT 24 |
1121580493 ps |
T818 |
/workspace/coverage/default/39.spi_device_upload.784731388 |
|
|
May 26 02:41:32 PM PDT 24 |
May 26 02:41:41 PM PDT 24 |
6170773612 ps |
T819 |
/workspace/coverage/default/35.spi_device_tpm_rw.2042909657 |
|
|
May 26 02:41:15 PM PDT 24 |
May 26 02:41:20 PM PDT 24 |
129801650 ps |
T820 |
/workspace/coverage/default/44.spi_device_tpm_sts_read.2100769387 |
|
|
May 26 02:41:48 PM PDT 24 |
May 26 02:41:50 PM PDT 24 |
29036915 ps |
T821 |
/workspace/coverage/default/18.spi_device_tpm_all.3828341419 |
|
|
May 26 02:40:12 PM PDT 24 |
May 26 02:40:23 PM PDT 24 |
6248648589 ps |
T822 |
/workspace/coverage/default/0.spi_device_tpm_all.3119419417 |
|
|
May 26 02:38:59 PM PDT 24 |
May 26 02:39:23 PM PDT 24 |
1609500508 ps |
T823 |
/workspace/coverage/default/23.spi_device_pass_cmd_filtering.1499829188 |
|
|
May 26 02:40:33 PM PDT 24 |
May 26 02:40:37 PM PDT 24 |
59912792 ps |
T78 |
/workspace/coverage/default/4.spi_device_sec_cm.1079399287 |
|
|
May 26 02:39:21 PM PDT 24 |
May 26 02:39:23 PM PDT 24 |
297361373 ps |
T824 |
/workspace/coverage/default/41.spi_device_tpm_rw.1352309267 |
|
|
May 26 02:41:37 PM PDT 24 |
May 26 02:41:39 PM PDT 24 |
72664139 ps |
T825 |
/workspace/coverage/default/37.spi_device_pass_cmd_filtering.4261731060 |
|
|
May 26 02:41:22 PM PDT 24 |
May 26 02:41:45 PM PDT 24 |
33132898291 ps |
T826 |
/workspace/coverage/default/1.spi_device_cfg_cmd.4264017917 |
|
|
May 26 02:39:07 PM PDT 24 |
May 26 02:39:13 PM PDT 24 |
379234769 ps |
T827 |
/workspace/coverage/default/24.spi_device_cfg_cmd.2232286463 |
|
|
May 26 02:40:38 PM PDT 24 |
May 26 02:40:42 PM PDT 24 |
124548165 ps |
T828 |
/workspace/coverage/default/11.spi_device_csb_read.3267161330 |
|
|
May 26 02:39:42 PM PDT 24 |
May 26 02:39:44 PM PDT 24 |
19148804 ps |
T829 |
/workspace/coverage/default/1.spi_device_tpm_rw.2453073651 |
|
|
May 26 02:39:06 PM PDT 24 |
May 26 02:39:09 PM PDT 24 |
28412566 ps |
T830 |
/workspace/coverage/default/37.spi_device_flash_and_tpm.2215901496 |
|
|
May 26 02:41:24 PM PDT 24 |
May 26 02:42:04 PM PDT 24 |
23477820821 ps |
T831 |
/workspace/coverage/default/8.spi_device_tpm_read_hw_reg.797986149 |
|
|
May 26 02:39:33 PM PDT 24 |
May 26 02:39:37 PM PDT 24 |
663622926 ps |
T832 |
/workspace/coverage/default/37.spi_device_cfg_cmd.3211260808 |
|
|
May 26 02:41:23 PM PDT 24 |
May 26 02:41:30 PM PDT 24 |
1031906527 ps |
T833 |
/workspace/coverage/default/11.spi_device_cfg_cmd.368769436 |
|
|
May 26 02:39:39 PM PDT 24 |
May 26 02:39:46 PM PDT 24 |
305912288 ps |
T834 |
/workspace/coverage/default/43.spi_device_upload.494417901 |
|
|
May 26 02:41:50 PM PDT 24 |
May 26 02:41:56 PM PDT 24 |
137792843 ps |
T74 |
/workspace/coverage/default/0.spi_device_ram_cfg.811579967 |
|
|
May 26 02:39:00 PM PDT 24 |
May 26 02:39:01 PM PDT 24 |
39900305 ps |
T835 |
/workspace/coverage/default/18.spi_device_flash_all.2566495687 |
|
|
May 26 02:40:12 PM PDT 24 |
May 26 02:40:53 PM PDT 24 |
2105910243 ps |
T836 |
/workspace/coverage/default/2.spi_device_upload.3483337040 |
|
|
May 26 02:39:05 PM PDT 24 |
May 26 02:39:17 PM PDT 24 |
5853517232 ps |
T837 |
/workspace/coverage/default/36.spi_device_tpm_rw.416421135 |
|
|
May 26 02:41:20 PM PDT 24 |
May 26 02:41:24 PM PDT 24 |
22956790 ps |
T838 |
/workspace/coverage/default/39.spi_device_mailbox.1901976864 |
|
|
May 26 02:41:28 PM PDT 24 |
May 26 02:41:45 PM PDT 24 |
2798467288 ps |
T839 |
/workspace/coverage/default/26.spi_device_tpm_read_hw_reg.2315374849 |
|
|
May 26 02:40:40 PM PDT 24 |
May 26 02:40:49 PM PDT 24 |
19933477514 ps |
T840 |
/workspace/coverage/default/45.spi_device_tpm_rw.3166185056 |
|
|
May 26 02:41:51 PM PDT 24 |
May 26 02:41:55 PM PDT 24 |
178525748 ps |
T841 |
/workspace/coverage/default/39.spi_device_pass_cmd_filtering.1926000633 |
|
|
May 26 02:41:44 PM PDT 24 |
May 26 02:41:50 PM PDT 24 |
520191313 ps |
T245 |
/workspace/coverage/default/22.spi_device_stress_all.3739849024 |
|
|
May 26 02:40:27 PM PDT 24 |
May 26 02:49:15 PM PDT 24 |
65368835154 ps |
T842 |
/workspace/coverage/default/33.spi_device_tpm_all.4190870105 |
|
|
May 26 02:41:14 PM PDT 24 |
May 26 02:42:01 PM PDT 24 |
12256904216 ps |
T234 |
/workspace/coverage/default/23.spi_device_stress_all.1414223791 |
|
|
May 26 02:40:36 PM PDT 24 |
May 26 02:46:23 PM PDT 24 |
127514314343 ps |
T843 |
/workspace/coverage/default/4.spi_device_read_buffer_direct.3633036045 |
|
|
May 26 02:39:23 PM PDT 24 |
May 26 02:39:45 PM PDT 24 |
2721911134 ps |
T230 |
/workspace/coverage/default/31.spi_device_flash_all.2567267284 |
|
|
May 26 02:41:03 PM PDT 24 |
May 26 02:42:03 PM PDT 24 |
4746692659 ps |
T844 |
/workspace/coverage/default/37.spi_device_intercept.382346241 |
|
|
May 26 02:41:19 PM PDT 24 |
May 26 02:41:25 PM PDT 24 |
34429454 ps |
T266 |
/workspace/coverage/default/43.spi_device_flash_all.739295240 |
|
|
May 26 02:41:49 PM PDT 24 |
May 26 02:47:24 PM PDT 24 |
42047688641 ps |
T845 |
/workspace/coverage/default/26.spi_device_alert_test.479441227 |
|
|
May 26 02:40:47 PM PDT 24 |
May 26 02:40:49 PM PDT 24 |
37395377 ps |
T286 |
/workspace/coverage/default/26.spi_device_upload.2174294870 |
|
|
May 26 02:40:47 PM PDT 24 |
May 26 02:40:50 PM PDT 24 |
238036628 ps |
T846 |
/workspace/coverage/default/0.spi_device_pass_cmd_filtering.2148638629 |
|
|
May 26 02:38:58 PM PDT 24 |
May 26 02:39:02 PM PDT 24 |
169449871 ps |
T231 |
/workspace/coverage/default/20.spi_device_flash_and_tpm.1798209439 |
|
|
May 26 02:40:25 PM PDT 24 |
May 26 02:42:09 PM PDT 24 |
5325040262 ps |
T847 |
/workspace/coverage/default/7.spi_device_read_buffer_direct.332144612 |
|
|
May 26 02:39:32 PM PDT 24 |
May 26 02:39:37 PM PDT 24 |
312323075 ps |
T848 |
/workspace/coverage/default/5.spi_device_tpm_all.2142365586 |
|
|
May 26 02:39:26 PM PDT 24 |
May 26 02:40:20 PM PDT 24 |
10160967755 ps |
T849 |
/workspace/coverage/default/32.spi_device_tpm_sts_read.1271690270 |
|
|
May 26 02:41:03 PM PDT 24 |
May 26 02:41:05 PM PDT 24 |
171298783 ps |
T850 |
/workspace/coverage/default/44.spi_device_mailbox.2449138701 |
|
|
May 26 02:41:45 PM PDT 24 |
May 26 02:42:00 PM PDT 24 |
948536723 ps |
T851 |
/workspace/coverage/default/38.spi_device_tpm_rw.1821830898 |
|
|
May 26 02:41:20 PM PDT 24 |
May 26 02:41:24 PM PDT 24 |
37796030 ps |
T852 |
/workspace/coverage/default/28.spi_device_mailbox.3613729211 |
|
|
May 26 02:40:46 PM PDT 24 |
May 26 02:40:54 PM PDT 24 |
978181761 ps |
T853 |
/workspace/coverage/default/14.spi_device_mem_parity.1090805578 |
|
|
May 26 02:39:56 PM PDT 24 |
May 26 02:39:59 PM PDT 24 |
28229733 ps |
T854 |
/workspace/coverage/default/18.spi_device_pass_cmd_filtering.3939651865 |
|
|
May 26 02:40:10 PM PDT 24 |
May 26 02:40:20 PM PDT 24 |
909131818 ps |
T855 |
/workspace/coverage/default/15.spi_device_pass_addr_payload_swap.2677982927 |
|
|
May 26 02:39:56 PM PDT 24 |
May 26 02:40:00 PM PDT 24 |
30625724 ps |
T856 |
/workspace/coverage/default/21.spi_device_pass_cmd_filtering.943655309 |
|
|
May 26 02:40:25 PM PDT 24 |
May 26 02:40:30 PM PDT 24 |
928608009 ps |
T857 |
/workspace/coverage/default/28.spi_device_tpm_all.1253684128 |
|
|
May 26 02:40:47 PM PDT 24 |
May 26 02:41:17 PM PDT 24 |
3304563761 ps |
T858 |
/workspace/coverage/default/12.spi_device_upload.3556453627 |
|
|
May 26 02:39:47 PM PDT 24 |
May 26 02:39:53 PM PDT 24 |
1644334886 ps |
T859 |
/workspace/coverage/default/7.spi_device_flash_and_tpm_min_idle.1007014977 |
|
|
May 26 02:39:33 PM PDT 24 |
May 26 02:40:07 PM PDT 24 |
10731683728 ps |
T860 |
/workspace/coverage/default/29.spi_device_tpm_rw.2818904615 |
|
|
May 26 02:40:55 PM PDT 24 |
May 26 02:40:58 PM PDT 24 |
119748824 ps |
T861 |
/workspace/coverage/default/23.spi_device_mailbox.1831157383 |
|
|
May 26 02:40:31 PM PDT 24 |
May 26 02:41:00 PM PDT 24 |
2252160016 ps |
T862 |
/workspace/coverage/default/35.spi_device_alert_test.805369945 |
|
|
May 26 02:41:18 PM PDT 24 |
May 26 02:41:21 PM PDT 24 |
13304741 ps |
T863 |
/workspace/coverage/default/26.spi_device_intercept.2406631178 |
|
|
May 26 02:40:37 PM PDT 24 |
May 26 02:40:44 PM PDT 24 |
311670403 ps |
T864 |
/workspace/coverage/default/21.spi_device_upload.2018688742 |
|
|
May 26 02:40:28 PM PDT 24 |
May 26 02:40:54 PM PDT 24 |
6711347327 ps |
T865 |
/workspace/coverage/default/44.spi_device_pass_addr_payload_swap.3906768078 |
|
|
May 26 02:41:47 PM PDT 24 |
May 26 02:41:54 PM PDT 24 |
895809306 ps |
T866 |
/workspace/coverage/default/7.spi_device_tpm_sts_read.2775213113 |
|
|
May 26 02:39:35 PM PDT 24 |
May 26 02:39:38 PM PDT 24 |
134128274 ps |
T867 |
/workspace/coverage/default/4.spi_device_mem_parity.3879780827 |
|
|
May 26 02:39:12 PM PDT 24 |
May 26 02:39:15 PM PDT 24 |
33747042 ps |
T262 |
/workspace/coverage/default/4.spi_device_flash_and_tpm.2584270642 |
|
|
May 26 02:39:22 PM PDT 24 |
May 26 02:41:01 PM PDT 24 |
17442174924 ps |
T238 |
/workspace/coverage/default/29.spi_device_stress_all.2012822382 |
|
|
May 26 02:40:57 PM PDT 24 |
May 26 02:42:56 PM PDT 24 |
16310883010 ps |
T868 |
/workspace/coverage/default/16.spi_device_tpm_all.1001309064 |
|
|
May 26 02:40:03 PM PDT 24 |
May 26 02:40:12 PM PDT 24 |
1603834618 ps |
T869 |
/workspace/coverage/default/18.spi_device_mailbox.1794843015 |
|
|
May 26 02:40:10 PM PDT 24 |
May 26 02:40:20 PM PDT 24 |
594897509 ps |
T870 |
/workspace/coverage/default/0.spi_device_mem_parity.3842866890 |
|
|
May 26 02:38:58 PM PDT 24 |
May 26 02:39:00 PM PDT 24 |
90132669 ps |
T871 |
/workspace/coverage/default/35.spi_device_flash_and_tpm.1452195221 |
|
|
May 26 02:41:20 PM PDT 24 |
May 26 02:43:48 PM PDT 24 |
263745622223 ps |
T872 |
/workspace/coverage/default/16.spi_device_mailbox.3691775363 |
|
|
May 26 02:40:02 PM PDT 24 |
May 26 02:40:42 PM PDT 24 |
4587185983 ps |
T873 |
/workspace/coverage/default/19.spi_device_flash_mode.1761560535 |
|
|
May 26 02:40:19 PM PDT 24 |
May 26 02:40:28 PM PDT 24 |
1252714064 ps |
T874 |
/workspace/coverage/default/24.spi_device_read_buffer_direct.1248313415 |
|
|
May 26 02:40:35 PM PDT 24 |
May 26 02:40:40 PM PDT 24 |
106717212 ps |
T875 |
/workspace/coverage/default/27.spi_device_intercept.1514948504 |
|
|
May 26 02:40:47 PM PDT 24 |
May 26 02:40:51 PM PDT 24 |
91121085 ps |
T876 |
/workspace/coverage/default/34.spi_device_tpm_sts_read.242122293 |
|
|
May 26 02:41:12 PM PDT 24 |
May 26 02:41:14 PM PDT 24 |
53630554 ps |
T877 |
/workspace/coverage/default/40.spi_device_tpm_read_hw_reg.1631947837 |
|
|
May 26 02:41:30 PM PDT 24 |
May 26 02:41:35 PM PDT 24 |
1706287695 ps |
T878 |
/workspace/coverage/default/46.spi_device_flash_mode.3285227765 |
|
|
May 26 02:41:58 PM PDT 24 |
May 26 02:42:18 PM PDT 24 |
4350107040 ps |
T879 |
/workspace/coverage/default/35.spi_device_tpm_read_hw_reg.1389741136 |
|
|
May 26 02:41:13 PM PDT 24 |
May 26 02:41:26 PM PDT 24 |
8873671454 ps |
T880 |
/workspace/coverage/default/6.spi_device_alert_test.2556097290 |
|
|
May 26 02:39:36 PM PDT 24 |
May 26 02:39:38 PM PDT 24 |
13575003 ps |
T881 |
/workspace/coverage/default/9.spi_device_intercept.2121017482 |
|
|
May 26 02:39:32 PM PDT 24 |
May 26 02:39:50 PM PDT 24 |
2907958913 ps |
T882 |
/workspace/coverage/default/23.spi_device_alert_test.4068543991 |
|
|
May 26 02:40:36 PM PDT 24 |
May 26 02:40:39 PM PDT 24 |
36060457 ps |
T883 |
/workspace/coverage/default/33.spi_device_tpm_read_hw_reg.3643761116 |
|
|
May 26 02:41:14 PM PDT 24 |
May 26 02:41:21 PM PDT 24 |
2701546931 ps |
T884 |
/workspace/coverage/default/16.spi_device_flash_all.2999003854 |
|
|
May 26 02:40:02 PM PDT 24 |
May 26 02:41:27 PM PDT 24 |
42508561888 ps |
T235 |
/workspace/coverage/default/33.spi_device_flash_and_tpm.4187923925 |
|
|
May 26 02:41:12 PM PDT 24 |
May 26 02:44:11 PM PDT 24 |
38098088860 ps |
T885 |
/workspace/coverage/default/5.spi_device_tpm_sts_read.3883582045 |
|
|
May 26 02:39:22 PM PDT 24 |
May 26 02:39:25 PM PDT 24 |
114071631 ps |
T886 |
/workspace/coverage/default/42.spi_device_alert_test.3008225885 |
|
|
May 26 02:41:41 PM PDT 24 |
May 26 02:41:43 PM PDT 24 |
21722314 ps |
T887 |
/workspace/coverage/default/47.spi_device_cfg_cmd.3624843556 |
|
|
May 26 02:41:55 PM PDT 24 |
May 26 02:42:02 PM PDT 24 |
1783333890 ps |
T888 |
/workspace/coverage/default/7.spi_device_mem_parity.1763325908 |
|
|
May 26 02:39:32 PM PDT 24 |
May 26 02:39:34 PM PDT 24 |
55848639 ps |
T889 |
/workspace/coverage/default/31.spi_device_tpm_sts_read.2791371158 |
|
|
May 26 02:41:03 PM PDT 24 |
May 26 02:41:05 PM PDT 24 |
202935200 ps |
T267 |
/workspace/coverage/default/32.spi_device_stress_all.2727024037 |
|
|
May 26 02:41:05 PM PDT 24 |
May 26 02:42:17 PM PDT 24 |
3558517838 ps |
T890 |
/workspace/coverage/default/31.spi_device_flash_mode.436018908 |
|
|
May 26 02:41:03 PM PDT 24 |
May 26 02:41:28 PM PDT 24 |
1688994963 ps |
T891 |
/workspace/coverage/default/26.spi_device_flash_all.2778745929 |
|
|
May 26 02:40:47 PM PDT 24 |
May 26 02:43:31 PM PDT 24 |
342667416416 ps |
T892 |
/workspace/coverage/default/35.spi_device_tpm_sts_read.2347877719 |
|
|
May 26 02:41:13 PM PDT 24 |
May 26 02:41:17 PM PDT 24 |
177998362 ps |
T263 |
/workspace/coverage/default/33.spi_device_stress_all.314532062 |
|
|
May 26 02:41:11 PM PDT 24 |
May 26 02:43:13 PM PDT 24 |
7656097539 ps |
T893 |
/workspace/coverage/default/17.spi_device_pass_cmd_filtering.3173115075 |
|
|
May 26 02:40:03 PM PDT 24 |
May 26 02:40:07 PM PDT 24 |
1106449918 ps |
T894 |
/workspace/coverage/default/24.spi_device_csb_read.512595646 |
|
|
May 26 02:40:37 PM PDT 24 |
May 26 02:40:40 PM PDT 24 |
33318684 ps |
T895 |
/workspace/coverage/default/1.spi_device_tpm_read_hw_reg.433468460 |
|
|
May 26 02:39:08 PM PDT 24 |
May 26 02:39:19 PM PDT 24 |
10591850793 ps |
T896 |
/workspace/coverage/default/41.spi_device_mailbox.2058055279 |
|
|
May 26 02:41:43 PM PDT 24 |
May 26 02:42:47 PM PDT 24 |
31429482270 ps |
T897 |
/workspace/coverage/default/21.spi_device_intercept.704515788 |
|
|
May 26 02:40:18 PM PDT 24 |
May 26 02:40:29 PM PDT 24 |
2705465481 ps |
T898 |
/workspace/coverage/default/11.spi_device_flash_and_tpm.1697847261 |
|
|
May 26 02:39:40 PM PDT 24 |
May 26 02:40:08 PM PDT 24 |
5108196257 ps |
T899 |
/workspace/coverage/default/27.spi_device_flash_and_tpm_min_idle.3102070531 |
|
|
May 26 02:40:50 PM PDT 24 |
May 26 02:43:29 PM PDT 24 |
13400158382 ps |
T900 |
/workspace/coverage/default/42.spi_device_flash_and_tpm_min_idle.1579496701 |
|
|
May 26 02:41:48 PM PDT 24 |
May 26 02:51:32 PM PDT 24 |
261624748139 ps |
T901 |
/workspace/coverage/default/30.spi_device_flash_all.923182069 |
|
|
May 26 02:40:57 PM PDT 24 |
May 26 02:44:16 PM PDT 24 |
27358203431 ps |
T902 |
/workspace/coverage/default/4.spi_device_flash_mode.23401613 |
|
|
May 26 02:39:20 PM PDT 24 |
May 26 02:39:24 PM PDT 24 |
181099621 ps |
T903 |
/workspace/coverage/default/36.spi_device_flash_mode.6739080 |
|
|
May 26 02:41:20 PM PDT 24 |
May 26 02:41:31 PM PDT 24 |
835017469 ps |
T904 |
/workspace/coverage/default/25.spi_device_cfg_cmd.1896002883 |
|
|
May 26 02:40:38 PM PDT 24 |
May 26 02:40:44 PM PDT 24 |
600625610 ps |
T256 |
/workspace/coverage/default/44.spi_device_stress_all.428355604 |
|
|
May 26 02:41:48 PM PDT 24 |
May 26 02:43:30 PM PDT 24 |
16981279231 ps |
T905 |
/workspace/coverage/default/41.spi_device_flash_all.4019369725 |
|
|
May 26 02:41:37 PM PDT 24 |
May 26 02:42:28 PM PDT 24 |
3920878855 ps |
T55 |
/workspace/coverage/default/19.spi_device_flash_and_tpm.700497199 |
|
|
May 26 02:40:18 PM PDT 24 |
May 26 02:43:40 PM PDT 24 |
84776224611 ps |
T906 |
/workspace/coverage/default/45.spi_device_pass_cmd_filtering.2613274762 |
|
|
May 26 02:41:50 PM PDT 24 |
May 26 02:42:03 PM PDT 24 |
12309764761 ps |
T907 |
/workspace/coverage/default/7.spi_device_flash_all.1806255908 |
|
|
May 26 02:39:33 PM PDT 24 |
May 26 02:42:04 PM PDT 24 |
22874459826 ps |
T908 |
/workspace/coverage/default/32.spi_device_tpm_read_hw_reg.2806624303 |
|
|
May 26 02:41:11 PM PDT 24 |
May 26 02:41:15 PM PDT 24 |
537482712 ps |
T909 |
/workspace/coverage/default/16.spi_device_csb_read.2089813824 |
|
|
May 26 02:40:06 PM PDT 24 |
May 26 02:40:07 PM PDT 24 |
31594368 ps |
T910 |
/workspace/coverage/default/5.spi_device_pass_cmd_filtering.2885511592 |
|
|
May 26 02:39:24 PM PDT 24 |
May 26 02:39:46 PM PDT 24 |
5743942617 ps |
T911 |
/workspace/coverage/default/17.spi_device_pass_addr_payload_swap.4153192403 |
|
|
May 26 02:40:03 PM PDT 24 |
May 26 02:40:09 PM PDT 24 |
493039410 ps |
T912 |
/workspace/coverage/default/33.spi_device_csb_read.2036125424 |
|
|
May 26 02:41:14 PM PDT 24 |
May 26 02:41:17 PM PDT 24 |
139386621 ps |
T913 |
/workspace/coverage/default/46.spi_device_intercept.3310176790 |
|
|
May 26 02:41:55 PM PDT 24 |
May 26 02:41:59 PM PDT 24 |
191985741 ps |
T914 |
/workspace/coverage/default/6.spi_device_flash_mode.2474769948 |
|
|
May 26 02:39:35 PM PDT 24 |
May 26 02:40:22 PM PDT 24 |
29703709482 ps |
T915 |
/workspace/coverage/default/47.spi_device_flash_all.51489241 |
|
|
May 26 02:41:56 PM PDT 24 |
May 26 02:48:26 PM PDT 24 |
427797218229 ps |
T916 |
/workspace/coverage/default/43.spi_device_pass_cmd_filtering.3783966292 |
|
|
May 26 02:41:47 PM PDT 24 |
May 26 02:41:50 PM PDT 24 |
1134101533 ps |
T917 |
/workspace/coverage/default/21.spi_device_tpm_read_hw_reg.640664425 |
|
|
May 26 02:40:21 PM PDT 24 |
May 26 02:40:24 PM PDT 24 |
159823129 ps |
T918 |
/workspace/coverage/default/29.spi_device_flash_all.1804287055 |
|
|
May 26 02:40:56 PM PDT 24 |
May 26 02:42:19 PM PDT 24 |
19554893871 ps |
T919 |
/workspace/coverage/default/35.spi_device_upload.4011953000 |
|
|
May 26 02:41:12 PM PDT 24 |
May 26 02:41:20 PM PDT 24 |
1953962971 ps |
T920 |
/workspace/coverage/default/1.spi_device_flash_all.3488078030 |
|
|
May 26 02:39:06 PM PDT 24 |
May 26 02:39:26 PM PDT 24 |
13109341712 ps |
T921 |
/workspace/coverage/default/22.spi_device_tpm_sts_read.3138843082 |
|
|
May 26 02:40:30 PM PDT 24 |
May 26 02:40:32 PM PDT 24 |
48733942 ps |
T922 |
/workspace/coverage/default/29.spi_device_pass_cmd_filtering.721511629 |
|
|
May 26 02:41:03 PM PDT 24 |
May 26 02:41:17 PM PDT 24 |
17918930576 ps |
T923 |
/workspace/coverage/default/6.spi_device_upload.2019370373 |
|
|
May 26 02:39:33 PM PDT 24 |
May 26 02:39:46 PM PDT 24 |
13597170003 ps |
T924 |
/workspace/coverage/default/22.spi_device_flash_mode.2019284364 |
|
|
May 26 02:40:29 PM PDT 24 |
May 26 02:40:58 PM PDT 24 |
2041460383 ps |
T56 |
/workspace/coverage/default/17.spi_device_flash_and_tpm.2388720963 |
|
|
May 26 02:40:03 PM PDT 24 |
May 26 02:42:24 PM PDT 24 |
32836028571 ps |
T925 |
/workspace/coverage/default/29.spi_device_csb_read.3539260734 |
|
|
May 26 02:41:03 PM PDT 24 |
May 26 02:41:05 PM PDT 24 |
27060874 ps |
T926 |
/workspace/coverage/default/29.spi_device_intercept.1147646993 |
|
|
May 26 02:40:57 PM PDT 24 |
May 26 02:41:10 PM PDT 24 |
2387120996 ps |
T927 |
/workspace/coverage/default/39.spi_device_tpm_read_hw_reg.1848648058 |
|
|
May 26 02:41:29 PM PDT 24 |
May 26 02:41:38 PM PDT 24 |
1306957375 ps |
T928 |
/workspace/coverage/default/36.spi_device_flash_all.3973959614 |
|
|
May 26 02:41:21 PM PDT 24 |
May 26 02:44:58 PM PDT 24 |
32783233627 ps |
T929 |
/workspace/coverage/default/0.spi_device_csb_read.2308523116 |
|
|
May 26 02:38:57 PM PDT 24 |
May 26 02:38:58 PM PDT 24 |
30161291 ps |
T930 |
/workspace/coverage/default/4.spi_device_mailbox.2288612329 |
|
|
May 26 02:39:24 PM PDT 24 |
May 26 02:40:03 PM PDT 24 |
7394520758 ps |
T931 |
/workspace/coverage/default/38.spi_device_flash_mode.3977488589 |
|
|
May 26 02:41:25 PM PDT 24 |
May 26 02:41:40 PM PDT 24 |
2050482398 ps |
T932 |
/workspace/coverage/default/46.spi_device_mailbox.3799528787 |
|
|
May 26 02:42:02 PM PDT 24 |
May 26 02:42:05 PM PDT 24 |
75155906 ps |
T933 |
/workspace/coverage/default/10.spi_device_tpm_sts_read.2502074609 |
|
|
May 26 02:39:36 PM PDT 24 |
May 26 02:39:39 PM PDT 24 |
75113746 ps |
T934 |
/workspace/coverage/default/2.spi_device_intercept.2420458590 |
|
|
May 26 02:39:05 PM PDT 24 |
May 26 02:39:09 PM PDT 24 |
49717253 ps |
T935 |
/workspace/coverage/default/6.spi_device_flash_and_tpm_min_idle.311777745 |
|
|
May 26 02:39:33 PM PDT 24 |
May 26 02:42:08 PM PDT 24 |
32081631134 ps |
T936 |
/workspace/coverage/default/30.spi_device_flash_and_tpm.38602945 |
|
|
May 26 02:40:55 PM PDT 24 |
May 26 02:42:54 PM PDT 24 |
41035263834 ps |
T937 |
/workspace/coverage/default/4.spi_device_csb_read.456273971 |
|
|
May 26 02:39:13 PM PDT 24 |
May 26 02:39:15 PM PDT 24 |
15542906 ps |
T938 |
/workspace/coverage/default/42.spi_device_flash_all.2694849849 |
|
|
May 26 02:41:43 PM PDT 24 |
May 26 02:45:53 PM PDT 24 |
69670186439 ps |
T939 |
/workspace/coverage/default/13.spi_device_tpm_sts_read.2537718559 |
|
|
May 26 02:39:51 PM PDT 24 |
May 26 02:39:53 PM PDT 24 |
25983690 ps |
T940 |
/workspace/coverage/default/29.spi_device_flash_mode.4132989297 |
|
|
May 26 02:40:56 PM PDT 24 |
May 26 02:41:02 PM PDT 24 |
1421036664 ps |
T941 |
/workspace/coverage/default/2.spi_device_flash_mode.4155423568 |
|
|
May 26 02:39:06 PM PDT 24 |
May 26 02:39:23 PM PDT 24 |
3516900239 ps |
T942 |
/workspace/coverage/default/34.spi_device_stress_all.908298694 |
|
|
May 26 02:41:13 PM PDT 24 |
May 26 02:41:16 PM PDT 24 |
44101521 ps |
T943 |
/workspace/coverage/default/25.spi_device_upload.1949909182 |
|
|
May 26 02:40:36 PM PDT 24 |
May 26 02:40:44 PM PDT 24 |
335837605 ps |
T944 |
/workspace/coverage/default/30.spi_device_pass_cmd_filtering.1488507109 |
|
|
May 26 02:41:04 PM PDT 24 |
May 26 02:41:07 PM PDT 24 |
107622993 ps |
T945 |
/workspace/coverage/default/45.spi_device_read_buffer_direct.372146953 |
|
|
May 26 02:41:56 PM PDT 24 |
May 26 02:42:05 PM PDT 24 |
1533079594 ps |
T946 |
/workspace/coverage/default/28.spi_device_flash_all.2674408731 |
|
|
May 26 02:40:54 PM PDT 24 |
May 26 02:41:08 PM PDT 24 |
7118239262 ps |
T947 |
/workspace/coverage/default/13.spi_device_alert_test.3357063990 |
|
|
May 26 02:39:52 PM PDT 24 |
May 26 02:39:54 PM PDT 24 |
11233552 ps |
T948 |
/workspace/coverage/default/15.spi_device_tpm_read_hw_reg.2473180250 |
|
|
May 26 02:40:04 PM PDT 24 |
May 26 02:40:07 PM PDT 24 |
241725163 ps |
T949 |
/workspace/coverage/default/8.spi_device_flash_all.710777817 |
|
|
May 26 02:39:36 PM PDT 24 |
May 26 02:40:51 PM PDT 24 |
19686472749 ps |
T950 |
/workspace/coverage/default/4.spi_device_alert_test.1356195960 |
|
|
May 26 02:39:23 PM PDT 24 |
May 26 02:39:26 PM PDT 24 |
20530126 ps |
T951 |
/workspace/coverage/default/34.spi_device_cfg_cmd.2093450035 |
|
|
May 26 02:41:13 PM PDT 24 |
May 26 02:41:21 PM PDT 24 |
4186907217 ps |
T952 |
/workspace/coverage/default/22.spi_device_cfg_cmd.1292690773 |
|
|
May 26 02:40:27 PM PDT 24 |
May 26 02:40:31 PM PDT 24 |
193837962 ps |
T258 |
/workspace/coverage/default/4.spi_device_flash_and_tpm_min_idle.3999798821 |
|
|
May 26 02:39:22 PM PDT 24 |
May 26 02:49:26 PM PDT 24 |
63798529224 ps |
T953 |
/workspace/coverage/default/18.spi_device_csb_read.3635129482 |
|
|
May 26 02:40:12 PM PDT 24 |
May 26 02:40:14 PM PDT 24 |
62716233 ps |
T954 |
/workspace/coverage/default/49.spi_device_csb_read.1751232148 |
|
|
May 26 02:42:06 PM PDT 24 |
May 26 02:42:08 PM PDT 24 |
56549683 ps |
T955 |
/workspace/coverage/default/37.spi_device_read_buffer_direct.288230250 |
|
|
May 26 02:41:20 PM PDT 24 |
May 26 02:41:28 PM PDT 24 |
2848119334 ps |
T956 |
/workspace/coverage/default/8.spi_device_csb_read.2710834950 |
|
|
May 26 02:39:35 PM PDT 24 |
May 26 02:39:37 PM PDT 24 |
16087475 ps |
T253 |
/workspace/coverage/default/48.spi_device_flash_and_tpm.2868596943 |
|
|
May 26 02:42:03 PM PDT 24 |
May 26 02:45:16 PM PDT 24 |
77480174086 ps |
T957 |
/workspace/coverage/default/31.spi_device_tpm_read_hw_reg.4167814207 |
|
|
May 26 02:40:57 PM PDT 24 |
May 26 02:41:05 PM PDT 24 |
7216787667 ps |
T958 |
/workspace/coverage/default/9.spi_device_pass_cmd_filtering.4165488657 |
|
|
May 26 02:39:34 PM PDT 24 |
May 26 02:39:39 PM PDT 24 |
1535813480 ps |
T959 |
/workspace/coverage/default/0.spi_device_intercept.354317230 |
|
|
May 26 02:39:00 PM PDT 24 |
May 26 02:39:12 PM PDT 24 |
4318783638 ps |
T960 |
/workspace/coverage/default/31.spi_device_flash_and_tpm_min_idle.3482315683 |
|
|
May 26 02:41:07 PM PDT 24 |
May 26 02:41:49 PM PDT 24 |
17720139267 ps |
T961 |
/workspace/coverage/default/16.spi_device_cfg_cmd.1079612950 |
|
|
May 26 02:40:03 PM PDT 24 |
May 26 02:40:07 PM PDT 24 |
123279569 ps |
T135 |
/workspace/coverage/default/43.spi_device_stress_all.4198561851 |
|
|
May 26 02:41:46 PM PDT 24 |
May 26 02:45:17 PM PDT 24 |
32412264629 ps |
T962 |
/workspace/coverage/default/38.spi_device_alert_test.3573127908 |
|
|
May 26 02:41:29 PM PDT 24 |
May 26 02:41:31 PM PDT 24 |
11923031 ps |
T963 |
/workspace/coverage/default/6.spi_device_pass_cmd_filtering.1739688481 |
|
|
May 26 02:39:22 PM PDT 24 |
May 26 02:39:26 PM PDT 24 |
110643346 ps |
T964 |
/workspace/coverage/default/42.spi_device_csb_read.1429227362 |
|
|
May 26 02:41:43 PM PDT 24 |
May 26 02:41:44 PM PDT 24 |
20838453 ps |
T965 |
/workspace/coverage/default/23.spi_device_tpm_rw.1049554576 |
|
|
May 26 02:40:29 PM PDT 24 |
May 26 02:40:32 PM PDT 24 |
92215037 ps |
T966 |
/workspace/coverage/default/1.spi_device_mailbox.553785315 |
|
|
May 26 02:39:05 PM PDT 24 |
May 26 02:39:14 PM PDT 24 |
583310610 ps |
T967 |
/workspace/coverage/default/31.spi_device_tpm_all.1639110801 |
|
|
May 26 02:40:58 PM PDT 24 |
May 26 02:41:11 PM PDT 24 |
8499784105 ps |
T968 |
/workspace/coverage/default/14.spi_device_tpm_read_hw_reg.493653988 |
|
|
May 26 02:40:04 PM PDT 24 |
May 26 02:40:16 PM PDT 24 |
2504122692 ps |
T969 |
/workspace/coverage/default/41.spi_device_alert_test.2706213717 |
|
|
May 26 02:41:39 PM PDT 24 |
May 26 02:41:41 PM PDT 24 |
14452188 ps |
T970 |
/workspace/coverage/default/38.spi_device_csb_read.1966455222 |
|
|
May 26 02:41:23 PM PDT 24 |
May 26 02:41:27 PM PDT 24 |
68510898 ps |
T971 |
/workspace/coverage/default/26.spi_device_tpm_rw.3334495871 |
|
|
May 26 02:40:38 PM PDT 24 |
May 26 02:40:41 PM PDT 24 |
10788273 ps |
T972 |
/workspace/coverage/default/30.spi_device_stress_all.1600286303 |
|
|
May 26 02:40:56 PM PDT 24 |
May 26 02:44:28 PM PDT 24 |
26221521958 ps |
T99 |
/workspace/coverage/cover_reg_top/9.spi_device_tl_intg_err.1186559546 |
|
|
May 26 01:01:48 PM PDT 24 |
May 26 01:02:02 PM PDT 24 |
1571714355 ps |
T136 |
/workspace/coverage/cover_reg_top/6.spi_device_csr_rw.3126610985 |
|
|
May 26 01:01:54 PM PDT 24 |
May 26 01:01:57 PM PDT 24 |
42690294 ps |
T973 |
/workspace/coverage/cover_reg_top/49.spi_device_intr_test.3788400262 |
|
|
May 26 01:02:04 PM PDT 24 |
May 26 01:02:08 PM PDT 24 |
63521826 ps |
T974 |
/workspace/coverage/cover_reg_top/15.spi_device_intr_test.2312978818 |
|
|
May 26 01:01:51 PM PDT 24 |
May 26 01:01:53 PM PDT 24 |
59540029 ps |
T114 |
/workspace/coverage/cover_reg_top/2.spi_device_csr_rw.2235891124 |
|
|
May 26 01:01:40 PM PDT 24 |
May 26 01:01:43 PM PDT 24 |
143044036 ps |
T975 |
/workspace/coverage/cover_reg_top/4.spi_device_intr_test.1248429320 |
|
|
May 26 01:01:58 PM PDT 24 |
May 26 01:02:01 PM PDT 24 |
25120946 ps |
T115 |
/workspace/coverage/cover_reg_top/1.spi_device_mem_partial_access.852603415 |
|
|
May 26 01:01:40 PM PDT 24 |
May 26 01:01:43 PM PDT 24 |
23004671 ps |
T100 |
/workspace/coverage/cover_reg_top/18.spi_device_tl_errors.1321302660 |
|
|
May 26 01:02:00 PM PDT 24 |
May 26 01:02:06 PM PDT 24 |
58026038 ps |
T976 |
/workspace/coverage/cover_reg_top/14.spi_device_intr_test.3153257804 |
|
|
May 26 01:01:55 PM PDT 24 |
May 26 01:01:57 PM PDT 24 |
37577008 ps |
T101 |
/workspace/coverage/cover_reg_top/15.spi_device_csr_mem_rw_with_rand_reset.3101088344 |
|
|
May 26 01:01:51 PM PDT 24 |
May 26 01:01:55 PM PDT 24 |
156172780 ps |
T103 |
/workspace/coverage/cover_reg_top/12.spi_device_tl_intg_err.1359707686 |
|
|
May 26 01:01:52 PM PDT 24 |
May 26 01:02:07 PM PDT 24 |
2795119497 ps |
T977 |
/workspace/coverage/cover_reg_top/11.spi_device_intr_test.2197756446 |
|
|
May 26 01:01:52 PM PDT 24 |
May 26 01:01:54 PM PDT 24 |
14861992 ps |
T102 |
/workspace/coverage/cover_reg_top/7.spi_device_tl_errors.3270968657 |
|
|
May 26 01:01:55 PM PDT 24 |
May 26 01:02:00 PM PDT 24 |
302590618 ps |
T105 |
/workspace/coverage/cover_reg_top/14.spi_device_tl_errors.236141200 |
|
|
May 26 01:01:54 PM PDT 24 |
May 26 01:01:59 PM PDT 24 |
94463120 ps |
T978 |
/workspace/coverage/cover_reg_top/6.spi_device_intr_test.3572639540 |
|
|
May 26 01:01:56 PM PDT 24 |
May 26 01:01:58 PM PDT 24 |
59080879 ps |
T979 |
/workspace/coverage/cover_reg_top/20.spi_device_intr_test.1740068112 |
|
|
May 26 01:02:01 PM PDT 24 |
May 26 01:02:05 PM PDT 24 |
111057656 ps |
T111 |
/workspace/coverage/cover_reg_top/13.spi_device_csr_mem_rw_with_rand_reset.3394143983 |
|
|
May 26 01:01:58 PM PDT 24 |
May 26 01:02:02 PM PDT 24 |
390069961 ps |
T104 |
/workspace/coverage/cover_reg_top/19.spi_device_tl_intg_err.4133340207 |
|
|
May 26 01:01:57 PM PDT 24 |
May 26 01:02:07 PM PDT 24 |
729972333 ps |
T980 |
/workspace/coverage/cover_reg_top/29.spi_device_intr_test.3517574355 |
|
|
May 26 01:02:03 PM PDT 24 |
May 26 01:02:07 PM PDT 24 |
16044098 ps |
T981 |
/workspace/coverage/cover_reg_top/23.spi_device_intr_test.2903443078 |
|
|
May 26 01:02:05 PM PDT 24 |
May 26 01:02:09 PM PDT 24 |
45939014 ps |
T88 |
/workspace/coverage/cover_reg_top/3.spi_device_csr_hw_reset.2527585842 |
|
|
May 26 01:01:38 PM PDT 24 |
May 26 01:01:40 PM PDT 24 |
117858278 ps |
T982 |
/workspace/coverage/cover_reg_top/13.spi_device_intr_test.1597401404 |
|
|
May 26 01:01:54 PM PDT 24 |
May 26 01:01:57 PM PDT 24 |
14528971 ps |
T106 |
/workspace/coverage/cover_reg_top/3.spi_device_tl_errors.40260047 |
|
|
May 26 01:01:39 PM PDT 24 |
May 26 01:01:42 PM PDT 24 |
114223549 ps |
T983 |
/workspace/coverage/cover_reg_top/46.spi_device_intr_test.2157866169 |
|
|
May 26 01:02:04 PM PDT 24 |
May 26 01:02:08 PM PDT 24 |
15156944 ps |
T89 |
/workspace/coverage/cover_reg_top/1.spi_device_csr_hw_reset.786632758 |
|
|
May 26 01:01:39 PM PDT 24 |
May 26 01:01:41 PM PDT 24 |
42244302 ps |
T108 |
/workspace/coverage/cover_reg_top/15.spi_device_tl_errors.432178593 |
|
|
May 26 01:01:54 PM PDT 24 |
May 26 01:01:58 PM PDT 24 |
73785638 ps |
T984 |
/workspace/coverage/cover_reg_top/41.spi_device_intr_test.1484348488 |
|
|
May 26 01:01:58 PM PDT 24 |
May 26 01:02:01 PM PDT 24 |
15818393 ps |
T137 |
/workspace/coverage/cover_reg_top/12.spi_device_same_csr_outstanding.3891583843 |
|
|
May 26 01:01:56 PM PDT 24 |
May 26 01:02:00 PM PDT 24 |
397332612 ps |
T985 |
/workspace/coverage/cover_reg_top/21.spi_device_intr_test.2471766388 |
|
|
May 26 01:02:00 PM PDT 24 |
May 26 01:02:04 PM PDT 24 |
25330077 ps |
T116 |
/workspace/coverage/cover_reg_top/9.spi_device_csr_rw.2326159990 |
|
|
May 26 01:01:57 PM PDT 24 |
May 26 01:02:01 PM PDT 24 |
39709413 ps |
T138 |
/workspace/coverage/cover_reg_top/0.spi_device_same_csr_outstanding.3967663229 |
|
|
May 26 01:01:40 PM PDT 24 |
May 26 01:01:43 PM PDT 24 |
234208864 ps |
T110 |
/workspace/coverage/cover_reg_top/16.spi_device_tl_errors.2998396112 |
|
|
May 26 01:01:51 PM PDT 24 |
May 26 01:01:54 PM PDT 24 |
47912054 ps |
T113 |
/workspace/coverage/cover_reg_top/13.spi_device_tl_intg_err.2047278696 |
|
|
May 26 01:01:54 PM PDT 24 |
May 26 01:02:05 PM PDT 24 |
1984486201 ps |
T986 |
/workspace/coverage/cover_reg_top/48.spi_device_intr_test.3291286807 |
|
|
May 26 01:01:58 PM PDT 24 |
May 26 01:02:01 PM PDT 24 |
34604383 ps |
T112 |
/workspace/coverage/cover_reg_top/15.spi_device_tl_intg_err.2396337791 |
|
|
May 26 01:01:53 PM PDT 24 |
May 26 01:02:15 PM PDT 24 |
1738587000 ps |
T987 |
/workspace/coverage/cover_reg_top/3.spi_device_mem_walk.2580439450 |
|
|
May 26 01:01:40 PM PDT 24 |
May 26 01:01:42 PM PDT 24 |
17763411 ps |
T988 |
/workspace/coverage/cover_reg_top/2.spi_device_intr_test.842091085 |
|
|
May 26 01:01:40 PM PDT 24 |
May 26 01:01:42 PM PDT 24 |
32142042 ps |
T139 |
/workspace/coverage/cover_reg_top/3.spi_device_csr_rw.1365430171 |
|
|
May 26 01:01:44 PM PDT 24 |
May 26 01:01:46 PM PDT 24 |
92649459 ps |
T117 |
/workspace/coverage/cover_reg_top/3.spi_device_mem_partial_access.727859028 |
|
|
May 26 01:01:39 PM PDT 24 |
May 26 01:01:41 PM PDT 24 |
182516972 ps |
T989 |
/workspace/coverage/cover_reg_top/9.spi_device_csr_mem_rw_with_rand_reset.3499753384 |
|
|
May 26 01:01:51 PM PDT 24 |
May 26 01:01:54 PM PDT 24 |
83013077 ps |
T990 |
/workspace/coverage/cover_reg_top/0.spi_device_mem_partial_access.1201798624 |
|
|
May 26 01:01:37 PM PDT 24 |
May 26 01:01:39 PM PDT 24 |
118503829 ps |
T118 |
/workspace/coverage/cover_reg_top/1.spi_device_csr_rw.3819629282 |
|
|
May 26 01:01:38 PM PDT 24 |
May 26 01:01:41 PM PDT 24 |
434228232 ps |
T991 |
/workspace/coverage/cover_reg_top/28.spi_device_intr_test.844349774 |
|
|
May 26 01:02:02 PM PDT 24 |
May 26 01:02:05 PM PDT 24 |
54327691 ps |
T119 |
/workspace/coverage/cover_reg_top/4.spi_device_mem_partial_access.2226586522 |
|
|
May 26 01:01:50 PM PDT 24 |
May 26 01:01:52 PM PDT 24 |
51283683 ps |
T165 |
/workspace/coverage/cover_reg_top/0.spi_device_tl_intg_err.1285948619 |
|
|
May 26 01:01:29 PM PDT 24 |
May 26 01:01:51 PM PDT 24 |
2035541839 ps |
T146 |
/workspace/coverage/cover_reg_top/16.spi_device_tl_intg_err.1535742393 |
|
|
May 26 01:01:55 PM PDT 24 |
May 26 01:02:13 PM PDT 24 |
736518459 ps |
T120 |
/workspace/coverage/cover_reg_top/4.spi_device_csr_rw.4077549237 |
|
|
May 26 01:01:55 PM PDT 24 |
May 26 01:01:58 PM PDT 24 |
93060628 ps |
T992 |
/workspace/coverage/cover_reg_top/1.spi_device_intr_test.243516826 |
|
|
May 26 01:01:39 PM PDT 24 |
May 26 01:01:41 PM PDT 24 |
45051594 ps |
T271 |
/workspace/coverage/cover_reg_top/7.spi_device_tl_intg_err.69149291 |
|
|
May 26 01:01:57 PM PDT 24 |
May 26 01:02:18 PM PDT 24 |
1369264779 ps |
T993 |
/workspace/coverage/cover_reg_top/9.spi_device_same_csr_outstanding.1208939455 |
|
|
May 26 01:01:52 PM PDT 24 |
May 26 01:01:55 PM PDT 24 |
226903556 ps |
T147 |
/workspace/coverage/cover_reg_top/18.spi_device_same_csr_outstanding.2220329945 |
|
|
May 26 01:01:59 PM PDT 24 |
May 26 01:02:05 PM PDT 24 |
144704137 ps |
T148 |
/workspace/coverage/cover_reg_top/14.spi_device_same_csr_outstanding.2150046008 |
|
|
May 26 01:01:51 PM PDT 24 |
May 26 01:01:55 PM PDT 24 |
151813821 ps |
T994 |
/workspace/coverage/cover_reg_top/1.spi_device_same_csr_outstanding.3307939591 |
|
|
May 26 01:01:36 PM PDT 24 |
May 26 01:01:38 PM PDT 24 |
28600560 ps |
T90 |
/workspace/coverage/cover_reg_top/0.spi_device_csr_hw_reset.2445607874 |
|
|
May 26 01:01:37 PM PDT 24 |
May 26 01:01:39 PM PDT 24 |
80688204 ps |
T995 |
/workspace/coverage/cover_reg_top/7.spi_device_same_csr_outstanding.1270864992 |
|
|
May 26 01:01:55 PM PDT 24 |
May 26 01:02:00 PM PDT 24 |
301506766 ps |
T149 |
/workspace/coverage/cover_reg_top/12.spi_device_csr_mem_rw_with_rand_reset.55260643 |
|
|
May 26 01:01:54 PM PDT 24 |
May 26 01:02:00 PM PDT 24 |
150668957 ps |
T996 |
/workspace/coverage/cover_reg_top/8.spi_device_tl_errors.3966959312 |
|
|
May 26 01:01:51 PM PDT 24 |
May 26 01:01:54 PM PDT 24 |
135090436 ps |
T150 |
/workspace/coverage/cover_reg_top/14.spi_device_tl_intg_err.2314734629 |
|
|
May 26 01:01:59 PM PDT 24 |
May 26 01:02:09 PM PDT 24 |
1411201800 ps |
T997 |
/workspace/coverage/cover_reg_top/15.spi_device_csr_rw.3023942967 |
|
|
May 26 01:01:50 PM PDT 24 |
May 26 01:01:52 PM PDT 24 |
46300219 ps |
T998 |
/workspace/coverage/cover_reg_top/7.spi_device_intr_test.1241554277 |
|
|
May 26 01:01:56 PM PDT 24 |
May 26 01:01:58 PM PDT 24 |
42020247 ps |
T999 |
/workspace/coverage/cover_reg_top/4.spi_device_mem_walk.3370356472 |
|
|
May 26 01:01:48 PM PDT 24 |
May 26 01:01:49 PM PDT 24 |
21939414 ps |
T1000 |
/workspace/coverage/cover_reg_top/7.spi_device_csr_mem_rw_with_rand_reset.891978916 |
|
|
May 26 01:01:53 PM PDT 24 |
May 26 01:01:57 PM PDT 24 |
88340860 ps |
T1001 |
/workspace/coverage/cover_reg_top/37.spi_device_intr_test.3377629035 |
|
|
May 26 01:01:59 PM PDT 24 |
May 26 01:02:02 PM PDT 24 |
41381250 ps |
T1002 |
/workspace/coverage/cover_reg_top/18.spi_device_csr_mem_rw_with_rand_reset.197852550 |
|
|
May 26 01:01:57 PM PDT 24 |
May 26 01:02:00 PM PDT 24 |
82327346 ps |
T1003 |
/workspace/coverage/cover_reg_top/32.spi_device_intr_test.1679157546 |
|
|
May 26 01:01:58 PM PDT 24 |
May 26 01:02:02 PM PDT 24 |
45067208 ps |
T1004 |
/workspace/coverage/cover_reg_top/12.spi_device_intr_test.3035792174 |
|
|
May 26 01:02:01 PM PDT 24 |
May 26 01:02:04 PM PDT 24 |
160418536 ps |
T1005 |
/workspace/coverage/cover_reg_top/31.spi_device_intr_test.2169474342 |
|
|
May 26 01:02:03 PM PDT 24 |
May 26 01:02:06 PM PDT 24 |
105944587 ps |
T272 |
/workspace/coverage/cover_reg_top/18.spi_device_tl_intg_err.3936982117 |
|
|
May 26 01:01:58 PM PDT 24 |
May 26 01:02:15 PM PDT 24 |
2190123190 ps |
T107 |
/workspace/coverage/cover_reg_top/11.spi_device_tl_errors.1255148759 |
|
|
May 26 01:01:56 PM PDT 24 |
May 26 01:02:01 PM PDT 24 |
56855057 ps |
T109 |
/workspace/coverage/cover_reg_top/19.spi_device_tl_errors.3682896388 |
|
|
May 26 01:01:59 PM PDT 24 |
May 26 01:02:06 PM PDT 24 |
59989468 ps |
T1006 |
/workspace/coverage/cover_reg_top/17.spi_device_intr_test.3835028376 |
|
|
May 26 01:02:02 PM PDT 24 |
May 26 01:02:06 PM PDT 24 |
34198655 ps |
T1007 |
/workspace/coverage/cover_reg_top/45.spi_device_intr_test.3207508134 |
|
|
May 26 01:01:57 PM PDT 24 |
May 26 01:01:59 PM PDT 24 |
19057461 ps |
T1008 |
/workspace/coverage/cover_reg_top/30.spi_device_intr_test.1990870838 |
|
|
May 26 01:02:01 PM PDT 24 |
May 26 01:02:04 PM PDT 24 |
59639980 ps |
T1009 |
/workspace/coverage/cover_reg_top/1.spi_device_tl_errors.2970199048 |
|
|
May 26 01:01:44 PM PDT 24 |
May 26 01:01:48 PM PDT 24 |
611675955 ps |