Assert Coverage for Module :
spi_device_csr_assert_fpv
Assertion Details
TlulOOBAddrErr_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
402870186 |
3001 |
0 |
0 |
T87 |
3861 |
10 |
0 |
0 |
T89 |
56836 |
2 |
0 |
0 |
T90 |
27448 |
1 |
0 |
0 |
T91 |
9311 |
127 |
0 |
0 |
T92 |
5302 |
2 |
0 |
0 |
T93 |
16651 |
221 |
0 |
0 |
T94 |
10497 |
87 |
0 |
0 |
T104 |
18985 |
3 |
0 |
0 |
T105 |
29734 |
2 |
0 |
0 |
T106 |
19990 |
3 |
0 |
0 |
addr_swap_data_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
402870186 |
1559 |
0 |
0 |
T108 |
62103 |
24 |
0 |
0 |
T109 |
3369 |
2 |
0 |
0 |
T113 |
102415 |
390 |
0 |
0 |
T118 |
4532 |
9 |
0 |
0 |
T142 |
10897 |
12 |
0 |
0 |
T143 |
7453 |
11 |
0 |
0 |
T144 |
32675 |
16 |
0 |
0 |
T145 |
34396 |
26 |
0 |
0 |
T146 |
10598 |
12 |
0 |
0 |
T147 |
20437 |
77 |
0 |
0 |
addr_swap_mask_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
402870186 |
1575 |
0 |
0 |
T108 |
62103 |
36 |
0 |
0 |
T113 |
102415 |
415 |
0 |
0 |
T118 |
4532 |
17 |
0 |
0 |
T142 |
10897 |
17 |
0 |
0 |
T143 |
7453 |
5 |
0 |
0 |
T144 |
32675 |
14 |
0 |
0 |
T145 |
34396 |
34 |
0 |
0 |
T146 |
10598 |
16 |
0 |
0 |
T147 |
20437 |
38 |
0 |
0 |
T148 |
6422 |
15 |
0 |
0 |
cfg_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
402870186 |
1872 |
0 |
0 |
T108 |
62103 |
83 |
0 |
0 |
T113 |
102415 |
398 |
0 |
0 |
T118 |
4532 |
9 |
0 |
0 |
T142 |
10897 |
23 |
0 |
0 |
T143 |
7453 |
29 |
0 |
0 |
T144 |
32675 |
29 |
0 |
0 |
T145 |
34396 |
90 |
0 |
0 |
T146 |
10598 |
14 |
0 |
0 |
T147 |
20437 |
81 |
0 |
0 |
T148 |
6422 |
2 |
0 |
0 |
cmd_filter_0_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
402870186 |
6569 |
0 |
0 |
T108 |
62103 |
700 |
0 |
0 |
T109 |
3369 |
8 |
0 |
0 |
T113 |
102415 |
430 |
0 |
0 |
T118 |
4532 |
8 |
0 |
0 |
T142 |
10897 |
13 |
0 |
0 |
T143 |
7453 |
48 |
0 |
0 |
T144 |
32675 |
548 |
0 |
0 |
T145 |
34396 |
673 |
0 |
0 |
T146 |
10598 |
158 |
0 |
0 |
T147 |
20437 |
61 |
0 |
0 |
cmd_filter_1_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
402870186 |
6316 |
0 |
0 |
T108 |
62103 |
660 |
0 |
0 |
T113 |
102415 |
365 |
0 |
0 |
T118 |
4532 |
1 |
0 |
0 |
T142 |
10897 |
253 |
0 |
0 |
T143 |
7453 |
15 |
0 |
0 |
T144 |
32675 |
409 |
0 |
0 |
T145 |
34396 |
155 |
0 |
0 |
T146 |
10598 |
152 |
0 |
0 |
T147 |
20437 |
92 |
0 |
0 |
T148 |
6422 |
13 |
0 |
0 |
cmd_filter_2_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
402870186 |
7018 |
0 |
0 |
T108 |
62103 |
572 |
0 |
0 |
T113 |
102415 |
449 |
0 |
0 |
T118 |
4532 |
11 |
0 |
0 |
T142 |
10897 |
246 |
0 |
0 |
T143 |
7453 |
38 |
0 |
0 |
T144 |
32675 |
561 |
0 |
0 |
T145 |
34396 |
733 |
0 |
0 |
T146 |
10598 |
261 |
0 |
0 |
T147 |
20437 |
36 |
0 |
0 |
T148 |
6422 |
19 |
0 |
0 |
cmd_filter_3_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
402870186 |
7120 |
0 |
0 |
T108 |
62103 |
673 |
0 |
0 |
T109 |
3369 |
123 |
0 |
0 |
T113 |
102415 |
415 |
0 |
0 |
T118 |
4532 |
16 |
0 |
0 |
T142 |
10897 |
305 |
0 |
0 |
T143 |
7453 |
1 |
0 |
0 |
T144 |
32675 |
288 |
0 |
0 |
T145 |
34396 |
721 |
0 |
0 |
T146 |
10598 |
24 |
0 |
0 |
T147 |
20437 |
87 |
0 |
0 |
cmd_filter_4_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
402870186 |
6591 |
0 |
0 |
T108 |
62103 |
409 |
0 |
0 |
T109 |
3369 |
6 |
0 |
0 |
T113 |
102415 |
480 |
0 |
0 |
T118 |
4532 |
3 |
0 |
0 |
T142 |
10897 |
123 |
0 |
0 |
T143 |
7453 |
10 |
0 |
0 |
T144 |
32675 |
284 |
0 |
0 |
T145 |
34396 |
409 |
0 |
0 |
T146 |
10598 |
157 |
0 |
0 |
T147 |
20437 |
36 |
0 |
0 |
cmd_filter_5_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
402870186 |
6056 |
0 |
0 |
T108 |
62103 |
363 |
0 |
0 |
T113 |
102415 |
421 |
0 |
0 |
T118 |
4532 |
11 |
0 |
0 |
T142 |
10897 |
412 |
0 |
0 |
T143 |
7453 |
28 |
0 |
0 |
T144 |
32675 |
536 |
0 |
0 |
T145 |
34396 |
563 |
0 |
0 |
T146 |
10598 |
10 |
0 |
0 |
T147 |
20437 |
118 |
0 |
0 |
T148 |
6422 |
1 |
0 |
0 |
cmd_filter_6_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
402870186 |
7037 |
0 |
0 |
T108 |
62103 |
701 |
0 |
0 |
T109 |
3369 |
5 |
0 |
0 |
T113 |
102415 |
429 |
0 |
0 |
T118 |
4532 |
15 |
0 |
0 |
T142 |
10897 |
119 |
0 |
0 |
T143 |
7453 |
16 |
0 |
0 |
T144 |
32675 |
324 |
0 |
0 |
T145 |
34396 |
882 |
0 |
0 |
T146 |
10598 |
152 |
0 |
0 |
T147 |
20437 |
62 |
0 |
0 |
cmd_filter_7_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
402870186 |
6110 |
0 |
0 |
T108 |
62103 |
554 |
0 |
0 |
T109 |
3369 |
7 |
0 |
0 |
T113 |
102415 |
396 |
0 |
0 |
T118 |
4532 |
3 |
0 |
0 |
T142 |
10897 |
137 |
0 |
0 |
T143 |
7453 |
21 |
0 |
0 |
T144 |
32675 |
351 |
0 |
0 |
T145 |
34396 |
485 |
0 |
0 |
T146 |
10598 |
2 |
0 |
0 |
T147 |
20437 |
52 |
0 |
0 |
cmd_info_0_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
402870186 |
3335 |
0 |
0 |
T108 |
62103 |
172 |
0 |
0 |
T109 |
3369 |
8 |
0 |
0 |
T113 |
102415 |
392 |
0 |
0 |
T118 |
4532 |
7 |
0 |
0 |
T142 |
10897 |
79 |
0 |
0 |
T143 |
7453 |
18 |
0 |
0 |
T144 |
32675 |
155 |
0 |
0 |
T145 |
34396 |
203 |
0 |
0 |
T146 |
10598 |
22 |
0 |
0 |
T147 |
20437 |
111 |
0 |
0 |
cmd_info_10_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
402870186 |
3295 |
0 |
0 |
T108 |
62103 |
160 |
0 |
0 |
T109 |
3369 |
6 |
0 |
0 |
T113 |
102415 |
402 |
0 |
0 |
T118 |
4532 |
9 |
0 |
0 |
T142 |
10897 |
10 |
0 |
0 |
T143 |
7453 |
10 |
0 |
0 |
T144 |
32675 |
101 |
0 |
0 |
T145 |
34396 |
307 |
0 |
0 |
T146 |
10598 |
21 |
0 |
0 |
T147 |
20437 |
54 |
0 |
0 |
cmd_info_11_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
402870186 |
3779 |
0 |
0 |
T108 |
62103 |
395 |
0 |
0 |
T109 |
3369 |
36 |
0 |
0 |
T113 |
102415 |
469 |
0 |
0 |
T118 |
4532 |
20 |
0 |
0 |
T142 |
10897 |
13 |
0 |
0 |
T143 |
7453 |
34 |
0 |
0 |
T144 |
32675 |
94 |
0 |
0 |
T145 |
34396 |
381 |
0 |
0 |
T146 |
10598 |
111 |
0 |
0 |
T147 |
20437 |
32 |
0 |
0 |
cmd_info_12_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
402870186 |
3420 |
0 |
0 |
T108 |
62103 |
306 |
0 |
0 |
T113 |
102415 |
434 |
0 |
0 |
T118 |
4532 |
13 |
0 |
0 |
T142 |
10897 |
55 |
0 |
0 |
T143 |
7453 |
27 |
0 |
0 |
T144 |
32675 |
216 |
0 |
0 |
T145 |
34396 |
159 |
0 |
0 |
T146 |
10598 |
46 |
0 |
0 |
T147 |
20437 |
62 |
0 |
0 |
T148 |
6422 |
9 |
0 |
0 |
cmd_info_13_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
402870186 |
3713 |
0 |
0 |
T108 |
62103 |
339 |
0 |
0 |
T113 |
102415 |
385 |
0 |
0 |
T118 |
4532 |
8 |
0 |
0 |
T142 |
10897 |
122 |
0 |
0 |
T143 |
7453 |
17 |
0 |
0 |
T144 |
32675 |
162 |
0 |
0 |
T145 |
34396 |
278 |
0 |
0 |
T146 |
10598 |
107 |
0 |
0 |
T147 |
20437 |
106 |
0 |
0 |
T148 |
6422 |
10 |
0 |
0 |
cmd_info_14_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
402870186 |
3363 |
0 |
0 |
T108 |
62103 |
252 |
0 |
0 |
T113 |
102415 |
424 |
0 |
0 |
T118 |
4532 |
11 |
0 |
0 |
T142 |
10897 |
52 |
0 |
0 |
T143 |
7453 |
43 |
0 |
0 |
T144 |
32675 |
169 |
0 |
0 |
T145 |
34396 |
338 |
0 |
0 |
T146 |
10598 |
53 |
0 |
0 |
T147 |
20437 |
69 |
0 |
0 |
T148 |
6422 |
4 |
0 |
0 |
cmd_info_15_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
402870186 |
3838 |
0 |
0 |
T108 |
62103 |
295 |
0 |
0 |
T109 |
3369 |
50 |
0 |
0 |
T113 |
102415 |
436 |
0 |
0 |
T118 |
4532 |
12 |
0 |
0 |
T142 |
10897 |
93 |
0 |
0 |
T143 |
7453 |
41 |
0 |
0 |
T144 |
32675 |
95 |
0 |
0 |
T145 |
34396 |
184 |
0 |
0 |
T146 |
10598 |
60 |
0 |
0 |
T147 |
20437 |
57 |
0 |
0 |
cmd_info_16_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
402870186 |
3373 |
0 |
0 |
T108 |
62103 |
272 |
0 |
0 |
T109 |
3369 |
7 |
0 |
0 |
T113 |
102415 |
360 |
0 |
0 |
T118 |
4532 |
11 |
0 |
0 |
T142 |
10897 |
7 |
0 |
0 |
T143 |
7453 |
16 |
0 |
0 |
T144 |
32675 |
203 |
0 |
0 |
T145 |
34396 |
263 |
0 |
0 |
T146 |
10598 |
26 |
0 |
0 |
T147 |
20437 |
118 |
0 |
0 |
cmd_info_17_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
402870186 |
3719 |
0 |
0 |
T108 |
62103 |
373 |
0 |
0 |
T109 |
3369 |
41 |
0 |
0 |
T113 |
102415 |
428 |
0 |
0 |
T118 |
4532 |
15 |
0 |
0 |
T142 |
10897 |
88 |
0 |
0 |
T143 |
7453 |
17 |
0 |
0 |
T144 |
32675 |
159 |
0 |
0 |
T145 |
34396 |
241 |
0 |
0 |
T146 |
10598 |
57 |
0 |
0 |
T147 |
20437 |
75 |
0 |
0 |
cmd_info_18_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
402870186 |
3360 |
0 |
0 |
T91 |
9311 |
5 |
0 |
0 |
T108 |
62103 |
307 |
0 |
0 |
T109 |
3369 |
49 |
0 |
0 |
T113 |
102415 |
410 |
0 |
0 |
T118 |
4532 |
8 |
0 |
0 |
T142 |
10897 |
102 |
0 |
0 |
T143 |
7453 |
36 |
0 |
0 |
T144 |
32675 |
51 |
0 |
0 |
T145 |
34396 |
204 |
0 |
0 |
T146 |
10598 |
62 |
0 |
0 |
cmd_info_19_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
402870186 |
3573 |
0 |
0 |
T108 |
62103 |
310 |
0 |
0 |
T109 |
3369 |
1 |
0 |
0 |
T113 |
102415 |
459 |
0 |
0 |
T118 |
4532 |
7 |
0 |
0 |
T142 |
10897 |
88 |
0 |
0 |
T143 |
7453 |
16 |
0 |
0 |
T144 |
32675 |
157 |
0 |
0 |
T145 |
34396 |
302 |
0 |
0 |
T146 |
10598 |
45 |
0 |
0 |
T147 |
20437 |
56 |
0 |
0 |
cmd_info_1_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
402870186 |
3470 |
0 |
0 |
T108 |
62103 |
285 |
0 |
0 |
T109 |
3369 |
41 |
0 |
0 |
T113 |
102415 |
408 |
0 |
0 |
T118 |
4532 |
4 |
0 |
0 |
T142 |
10897 |
107 |
0 |
0 |
T143 |
7453 |
5 |
0 |
0 |
T144 |
32675 |
145 |
0 |
0 |
T145 |
34396 |
202 |
0 |
0 |
T146 |
10598 |
55 |
0 |
0 |
T147 |
20437 |
62 |
0 |
0 |
cmd_info_20_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
402870186 |
3626 |
0 |
0 |
T108 |
62103 |
281 |
0 |
0 |
T109 |
3369 |
1 |
0 |
0 |
T113 |
102415 |
451 |
0 |
0 |
T118 |
4532 |
13 |
0 |
0 |
T142 |
10897 |
133 |
0 |
0 |
T143 |
7453 |
52 |
0 |
0 |
T144 |
32675 |
171 |
0 |
0 |
T145 |
34396 |
307 |
0 |
0 |
T146 |
10598 |
123 |
0 |
0 |
T147 |
20437 |
44 |
0 |
0 |
cmd_info_21_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
402870186 |
3799 |
0 |
0 |
T108 |
62103 |
266 |
0 |
0 |
T109 |
3369 |
6 |
0 |
0 |
T113 |
102415 |
380 |
0 |
0 |
T118 |
4532 |
4 |
0 |
0 |
T142 |
10897 |
113 |
0 |
0 |
T143 |
7453 |
10 |
0 |
0 |
T144 |
32675 |
136 |
0 |
0 |
T145 |
34396 |
463 |
0 |
0 |
T146 |
10598 |
104 |
0 |
0 |
T147 |
20437 |
69 |
0 |
0 |
cmd_info_22_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
402870186 |
3401 |
0 |
0 |
T108 |
62103 |
350 |
0 |
0 |
T109 |
3369 |
35 |
0 |
0 |
T113 |
102415 |
418 |
0 |
0 |
T118 |
4532 |
12 |
0 |
0 |
T142 |
10897 |
51 |
0 |
0 |
T143 |
7453 |
17 |
0 |
0 |
T144 |
32675 |
114 |
0 |
0 |
T145 |
34396 |
227 |
0 |
0 |
T146 |
10598 |
12 |
0 |
0 |
T147 |
20437 |
75 |
0 |
0 |
cmd_info_23_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
402870186 |
3184 |
0 |
0 |
T108 |
62103 |
291 |
0 |
0 |
T109 |
3369 |
2 |
0 |
0 |
T113 |
102415 |
389 |
0 |
0 |
T118 |
4532 |
3 |
0 |
0 |
T142 |
10897 |
70 |
0 |
0 |
T143 |
7453 |
27 |
0 |
0 |
T144 |
32675 |
142 |
0 |
0 |
T145 |
34396 |
151 |
0 |
0 |
T146 |
10598 |
20 |
0 |
0 |
T147 |
20437 |
59 |
0 |
0 |
cmd_info_2_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
402870186 |
3787 |
0 |
0 |
T108 |
62103 |
351 |
0 |
0 |
T109 |
3369 |
3 |
0 |
0 |
T113 |
102415 |
432 |
0 |
0 |
T118 |
4532 |
8 |
0 |
0 |
T142 |
10897 |
120 |
0 |
0 |
T143 |
7453 |
37 |
0 |
0 |
T144 |
32675 |
85 |
0 |
0 |
T145 |
34396 |
335 |
0 |
0 |
T146 |
10598 |
60 |
0 |
0 |
T147 |
20437 |
94 |
0 |
0 |
cmd_info_3_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
402870186 |
3717 |
0 |
0 |
T108 |
62103 |
354 |
0 |
0 |
T113 |
102415 |
449 |
0 |
0 |
T118 |
4532 |
11 |
0 |
0 |
T142 |
10897 |
63 |
0 |
0 |
T143 |
7453 |
22 |
0 |
0 |
T144 |
32675 |
102 |
0 |
0 |
T145 |
34396 |
266 |
0 |
0 |
T146 |
10598 |
76 |
0 |
0 |
T147 |
20437 |
75 |
0 |
0 |
T148 |
6422 |
11 |
0 |
0 |
cmd_info_4_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
402870186 |
3022 |
0 |
0 |
T108 |
62103 |
211 |
0 |
0 |
T109 |
3369 |
31 |
0 |
0 |
T113 |
102415 |
365 |
0 |
0 |
T118 |
4532 |
15 |
0 |
0 |
T142 |
10897 |
75 |
0 |
0 |
T143 |
7453 |
21 |
0 |
0 |
T144 |
32675 |
77 |
0 |
0 |
T145 |
34396 |
173 |
0 |
0 |
T146 |
10598 |
73 |
0 |
0 |
T147 |
20437 |
56 |
0 |
0 |
cmd_info_5_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
402870186 |
2836 |
0 |
0 |
T108 |
62103 |
192 |
0 |
0 |
T109 |
3369 |
9 |
0 |
0 |
T113 |
102415 |
407 |
0 |
0 |
T118 |
4532 |
1 |
0 |
0 |
T142 |
10897 |
12 |
0 |
0 |
T143 |
7453 |
39 |
0 |
0 |
T144 |
32675 |
68 |
0 |
0 |
T145 |
34396 |
112 |
0 |
0 |
T146 |
10598 |
13 |
0 |
0 |
T147 |
20437 |
63 |
0 |
0 |
cmd_info_6_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
402870186 |
3428 |
0 |
0 |
T108 |
62103 |
264 |
0 |
0 |
T109 |
3369 |
4 |
0 |
0 |
T113 |
102415 |
430 |
0 |
0 |
T118 |
4532 |
18 |
0 |
0 |
T142 |
10897 |
127 |
0 |
0 |
T143 |
7453 |
10 |
0 |
0 |
T144 |
32675 |
108 |
0 |
0 |
T145 |
34396 |
295 |
0 |
0 |
T146 |
10598 |
96 |
0 |
0 |
T147 |
20437 |
76 |
0 |
0 |
cmd_info_7_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
402870186 |
3864 |
0 |
0 |
T108 |
62103 |
312 |
0 |
0 |
T109 |
3369 |
47 |
0 |
0 |
T113 |
102415 |
447 |
0 |
0 |
T118 |
4532 |
6 |
0 |
0 |
T142 |
10897 |
112 |
0 |
0 |
T143 |
7453 |
26 |
0 |
0 |
T144 |
32675 |
183 |
0 |
0 |
T145 |
34396 |
167 |
0 |
0 |
T146 |
10598 |
102 |
0 |
0 |
T147 |
20437 |
50 |
0 |
0 |
cmd_info_8_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
402870186 |
3369 |
0 |
0 |
T108 |
62103 |
270 |
0 |
0 |
T109 |
3369 |
7 |
0 |
0 |
T113 |
102415 |
410 |
0 |
0 |
T118 |
4532 |
15 |
0 |
0 |
T142 |
10897 |
97 |
0 |
0 |
T143 |
7453 |
34 |
0 |
0 |
T144 |
32675 |
109 |
0 |
0 |
T145 |
34396 |
277 |
0 |
0 |
T146 |
10598 |
14 |
0 |
0 |
T147 |
20437 |
64 |
0 |
0 |
cmd_info_9_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
402870186 |
3348 |
0 |
0 |
T91 |
9311 |
1 |
0 |
0 |
T108 |
62103 |
228 |
0 |
0 |
T109 |
3369 |
52 |
0 |
0 |
T113 |
102415 |
409 |
0 |
0 |
T118 |
4532 |
9 |
0 |
0 |
T142 |
10897 |
154 |
0 |
0 |
T143 |
7453 |
27 |
0 |
0 |
T144 |
32675 |
106 |
0 |
0 |
T145 |
34396 |
282 |
0 |
0 |
T146 |
10598 |
75 |
0 |
0 |
cmd_info_en4b_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
402870186 |
1677 |
0 |
0 |
T108 |
62103 |
43 |
0 |
0 |
T113 |
102415 |
387 |
0 |
0 |
T118 |
4532 |
8 |
0 |
0 |
T142 |
10897 |
20 |
0 |
0 |
T143 |
7453 |
34 |
0 |
0 |
T144 |
32675 |
22 |
0 |
0 |
T145 |
34396 |
74 |
0 |
0 |
T146 |
10598 |
17 |
0 |
0 |
T147 |
20437 |
64 |
0 |
0 |
T148 |
6422 |
13 |
0 |
0 |
cmd_info_ex4b_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
402870186 |
1768 |
0 |
0 |
T108 |
62103 |
66 |
0 |
0 |
T109 |
3369 |
2 |
0 |
0 |
T113 |
102415 |
464 |
0 |
0 |
T118 |
4532 |
7 |
0 |
0 |
T142 |
10897 |
6 |
0 |
0 |
T143 |
7453 |
10 |
0 |
0 |
T144 |
32675 |
29 |
0 |
0 |
T145 |
34396 |
52 |
0 |
0 |
T146 |
10598 |
27 |
0 |
0 |
T147 |
20437 |
27 |
0 |
0 |
cmd_info_wrdi_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
402870186 |
1759 |
0 |
0 |
T108 |
62103 |
41 |
0 |
0 |
T109 |
3369 |
10 |
0 |
0 |
T113 |
102415 |
440 |
0 |
0 |
T118 |
4532 |
9 |
0 |
0 |
T142 |
10897 |
19 |
0 |
0 |
T143 |
7453 |
30 |
0 |
0 |
T144 |
32675 |
15 |
0 |
0 |
T145 |
34396 |
97 |
0 |
0 |
T146 |
10598 |
17 |
0 |
0 |
T147 |
20437 |
3 |
0 |
0 |
cmd_info_wren_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
402870186 |
1758 |
0 |
0 |
T108 |
62103 |
69 |
0 |
0 |
T109 |
3369 |
5 |
0 |
0 |
T113 |
102415 |
453 |
0 |
0 |
T118 |
4532 |
13 |
0 |
0 |
T142 |
10897 |
23 |
0 |
0 |
T143 |
7453 |
19 |
0 |
0 |
T144 |
32675 |
24 |
0 |
0 |
T145 |
34396 |
61 |
0 |
0 |
T146 |
10598 |
26 |
0 |
0 |
T147 |
20437 |
25 |
0 |
0 |
intercept_en_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
402870186 |
2021 |
0 |
0 |
T108 |
62103 |
110 |
0 |
0 |
T109 |
3369 |
20 |
0 |
0 |
T113 |
102415 |
384 |
0 |
0 |
T118 |
4532 |
2 |
0 |
0 |
T142 |
10897 |
42 |
0 |
0 |
T143 |
7453 |
17 |
0 |
0 |
T144 |
32675 |
38 |
0 |
0 |
T145 |
34396 |
67 |
0 |
0 |
T146 |
10598 |
21 |
0 |
0 |
T147 |
20437 |
67 |
0 |
0 |
intr_enable_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
402870186 |
3619 |
0 |
0 |
T37 |
0 |
39 |
0 |
0 |
T55 |
455147 |
46 |
0 |
0 |
T56 |
0 |
68 |
0 |
0 |
T64 |
0 |
106 |
0 |
0 |
T149 |
0 |
16 |
0 |
0 |
T150 |
0 |
39 |
0 |
0 |
T151 |
0 |
21 |
0 |
0 |
T152 |
0 |
58 |
0 |
0 |
T153 |
0 |
20 |
0 |
0 |
T154 |
0 |
1 |
0 |
0 |
T155 |
7070 |
0 |
0 |
0 |
T156 |
64655 |
0 |
0 |
0 |
T157 |
120319 |
0 |
0 |
0 |
T158 |
165544 |
0 |
0 |
0 |
T159 |
1392 |
0 |
0 |
0 |
T160 |
769265 |
0 |
0 |
0 |
T161 |
52287 |
0 |
0 |
0 |
T162 |
11368 |
0 |
0 |
0 |
T163 |
1829 |
0 |
0 |
0 |
jedec_cc_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
402870186 |
1691 |
0 |
0 |
T108 |
62103 |
40 |
0 |
0 |
T109 |
3369 |
4 |
0 |
0 |
T113 |
102415 |
364 |
0 |
0 |
T118 |
4532 |
11 |
0 |
0 |
T142 |
10897 |
8 |
0 |
0 |
T143 |
7453 |
22 |
0 |
0 |
T144 |
32675 |
16 |
0 |
0 |
T145 |
34396 |
53 |
0 |
0 |
T146 |
10598 |
30 |
0 |
0 |
T147 |
20437 |
74 |
0 |
0 |
jedec_id_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
402870186 |
1612 |
0 |
0 |
T108 |
62103 |
57 |
0 |
0 |
T109 |
3369 |
8 |
0 |
0 |
T113 |
102415 |
356 |
0 |
0 |
T118 |
4532 |
2 |
0 |
0 |
T142 |
10897 |
13 |
0 |
0 |
T143 |
7453 |
39 |
0 |
0 |
T144 |
32675 |
20 |
0 |
0 |
T145 |
34396 |
36 |
0 |
0 |
T146 |
10598 |
31 |
0 |
0 |
T147 |
20437 |
24 |
0 |
0 |
mailbox_addr_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
402870186 |
1662 |
0 |
0 |
T108 |
62103 |
48 |
0 |
0 |
T109 |
3369 |
7 |
0 |
0 |
T113 |
102415 |
416 |
0 |
0 |
T118 |
4532 |
11 |
0 |
0 |
T142 |
10897 |
21 |
0 |
0 |
T143 |
7453 |
9 |
0 |
0 |
T144 |
32675 |
21 |
0 |
0 |
T145 |
34396 |
37 |
0 |
0 |
T146 |
10598 |
17 |
0 |
0 |
T147 |
20437 |
62 |
0 |
0 |
payload_swap_data_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
402870186 |
1666 |
0 |
0 |
T108 |
62103 |
40 |
0 |
0 |
T109 |
3369 |
5 |
0 |
0 |
T113 |
102415 |
401 |
0 |
0 |
T118 |
4532 |
12 |
0 |
0 |
T142 |
10897 |
14 |
0 |
0 |
T143 |
7453 |
37 |
0 |
0 |
T144 |
32675 |
17 |
0 |
0 |
T145 |
34396 |
43 |
0 |
0 |
T146 |
10598 |
22 |
0 |
0 |
T147 |
20437 |
53 |
0 |
0 |
payload_swap_mask_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
402870186 |
1695 |
0 |
0 |
T108 |
62103 |
53 |
0 |
0 |
T109 |
3369 |
6 |
0 |
0 |
T113 |
102415 |
462 |
0 |
0 |
T118 |
4532 |
8 |
0 |
0 |
T142 |
10897 |
5 |
0 |
0 |
T143 |
7453 |
4 |
0 |
0 |
T144 |
32675 |
29 |
0 |
0 |
T145 |
34396 |
51 |
0 |
0 |
T146 |
10598 |
19 |
0 |
0 |
T147 |
20437 |
112 |
0 |
0 |
read_threshold_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
402870186 |
1687 |
0 |
0 |
T108 |
62103 |
63 |
0 |
0 |
T109 |
3369 |
5 |
0 |
0 |
T113 |
102415 |
403 |
0 |
0 |
T118 |
4532 |
11 |
0 |
0 |
T142 |
10897 |
12 |
0 |
0 |
T143 |
7453 |
7 |
0 |
0 |
T144 |
32675 |
19 |
0 |
0 |
T145 |
34396 |
40 |
0 |
0 |
T146 |
10598 |
17 |
0 |
0 |
T147 |
20437 |
84 |
0 |
0 |
tpm_access_0_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
402870186 |
2132 |
0 |
0 |
T108 |
62103 |
111 |
0 |
0 |
T109 |
3369 |
9 |
0 |
0 |
T113 |
102415 |
434 |
0 |
0 |
T118 |
4532 |
8 |
0 |
0 |
T142 |
10897 |
20 |
0 |
0 |
T143 |
7453 |
21 |
0 |
0 |
T144 |
32675 |
36 |
0 |
0 |
T145 |
34396 |
79 |
0 |
0 |
T146 |
10598 |
27 |
0 |
0 |
T147 |
20437 |
52 |
0 |
0 |
tpm_access_1_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
402870186 |
1569 |
0 |
0 |
T108 |
62103 |
47 |
0 |
0 |
T109 |
3369 |
6 |
0 |
0 |
T113 |
102415 |
518 |
0 |
0 |
T118 |
4532 |
2 |
0 |
0 |
T142 |
10897 |
6 |
0 |
0 |
T143 |
7453 |
10 |
0 |
0 |
T144 |
32675 |
17 |
0 |
0 |
T145 |
34396 |
36 |
0 |
0 |
T146 |
10598 |
24 |
0 |
0 |
T147 |
20437 |
42 |
0 |
0 |
tpm_cfg_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
402870186 |
2253 |
0 |
0 |
T108 |
62103 |
76 |
0 |
0 |
T109 |
3369 |
35 |
0 |
0 |
T113 |
102415 |
483 |
0 |
0 |
T118 |
4532 |
18 |
0 |
0 |
T142 |
10897 |
48 |
0 |
0 |
T143 |
7453 |
24 |
0 |
0 |
T144 |
32675 |
42 |
0 |
0 |
T145 |
34396 |
108 |
0 |
0 |
T146 |
10598 |
39 |
0 |
0 |
T147 |
20437 |
60 |
0 |
0 |
tpm_did_vid_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
402870186 |
1733 |
0 |
0 |
T108 |
62103 |
58 |
0 |
0 |
T113 |
102415 |
406 |
0 |
0 |
T118 |
4532 |
14 |
0 |
0 |
T142 |
10897 |
22 |
0 |
0 |
T144 |
32675 |
45 |
0 |
0 |
T145 |
34396 |
47 |
0 |
0 |
T146 |
10598 |
21 |
0 |
0 |
T147 |
20437 |
39 |
0 |
0 |
T148 |
6422 |
30 |
0 |
0 |
T164 |
270393 |
681 |
0 |
0 |
tpm_int_enable_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
402870186 |
1672 |
0 |
0 |
T108 |
62103 |
55 |
0 |
0 |
T109 |
3369 |
6 |
0 |
0 |
T113 |
102415 |
396 |
0 |
0 |
T118 |
4532 |
13 |
0 |
0 |
T142 |
10897 |
8 |
0 |
0 |
T143 |
7453 |
27 |
0 |
0 |
T144 |
32675 |
27 |
0 |
0 |
T145 |
34396 |
51 |
0 |
0 |
T146 |
10598 |
14 |
0 |
0 |
T147 |
20437 |
85 |
0 |
0 |
tpm_int_status_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
402870186 |
1579 |
0 |
0 |
T108 |
62103 |
20 |
0 |
0 |
T109 |
3369 |
5 |
0 |
0 |
T113 |
102415 |
323 |
0 |
0 |
T118 |
4532 |
12 |
0 |
0 |
T142 |
10897 |
4 |
0 |
0 |
T143 |
7453 |
16 |
0 |
0 |
T144 |
32675 |
38 |
0 |
0 |
T145 |
34396 |
29 |
0 |
0 |
T146 |
10598 |
18 |
0 |
0 |
T147 |
20437 |
15 |
0 |
0 |
tpm_int_vector_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
402870186 |
1620 |
0 |
0 |
T108 |
62103 |
20 |
0 |
0 |
T109 |
3369 |
1 |
0 |
0 |
T113 |
102415 |
419 |
0 |
0 |
T118 |
4532 |
13 |
0 |
0 |
T142 |
10897 |
10 |
0 |
0 |
T143 |
7453 |
5 |
0 |
0 |
T144 |
32675 |
21 |
0 |
0 |
T145 |
34396 |
49 |
0 |
0 |
T146 |
10598 |
15 |
0 |
0 |
T147 |
20437 |
96 |
0 |
0 |
tpm_intf_capability_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
402870186 |
1547 |
0 |
0 |
T108 |
62103 |
42 |
0 |
0 |
T109 |
3369 |
1 |
0 |
0 |
T113 |
102415 |
407 |
0 |
0 |
T118 |
4532 |
10 |
0 |
0 |
T142 |
10897 |
11 |
0 |
0 |
T143 |
7453 |
39 |
0 |
0 |
T144 |
32675 |
18 |
0 |
0 |
T145 |
34396 |
40 |
0 |
0 |
T146 |
10598 |
32 |
0 |
0 |
T147 |
20437 |
50 |
0 |
0 |
tpm_rid_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
402870186 |
1674 |
0 |
0 |
T108 |
62103 |
37 |
0 |
0 |
T113 |
102415 |
482 |
0 |
0 |
T118 |
4532 |
11 |
0 |
0 |
T142 |
10897 |
6 |
0 |
0 |
T143 |
7453 |
21 |
0 |
0 |
T144 |
32675 |
7 |
0 |
0 |
T145 |
34396 |
39 |
0 |
0 |
T146 |
10598 |
20 |
0 |
0 |
T147 |
20437 |
82 |
0 |
0 |
T164 |
270393 |
676 |
0 |
0 |
tpm_sts_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
402870186 |
1604 |
0 |
0 |
T108 |
62103 |
39 |
0 |
0 |
T109 |
3369 |
2 |
0 |
0 |
T113 |
102415 |
437 |
0 |
0 |
T118 |
4532 |
7 |
0 |
0 |
T142 |
10897 |
12 |
0 |
0 |
T143 |
7453 |
21 |
0 |
0 |
T144 |
32675 |
33 |
0 |
0 |
T145 |
34396 |
36 |
0 |
0 |
T146 |
10598 |
14 |
0 |
0 |
T147 |
20437 |
72 |
0 |
0 |