| T815 |
/workspace/coverage/default/23.spi_device_mailbox.2720849892 |
|
|
May 28 02:45:07 PM PDT 24 |
May 28 02:45:43 PM PDT 24 |
2433805126 ps |
| T816 |
/workspace/coverage/default/14.spi_device_flash_and_tpm_min_idle.3537138458 |
|
|
May 28 02:44:54 PM PDT 24 |
May 28 02:45:38 PM PDT 24 |
2484061530 ps |
| T817 |
/workspace/coverage/default/46.spi_device_alert_test.3413739448 |
|
|
May 28 02:46:31 PM PDT 24 |
May 28 02:46:49 PM PDT 24 |
23141098 ps |
| T818 |
/workspace/coverage/default/16.spi_device_tpm_all.922975840 |
|
|
May 28 02:44:48 PM PDT 24 |
May 28 02:45:00 PM PDT 24 |
2544630546 ps |
| T819 |
/workspace/coverage/default/12.spi_device_pass_addr_payload_swap.2123110546 |
|
|
May 28 02:44:29 PM PDT 24 |
May 28 02:45:05 PM PDT 24 |
24044719847 ps |
| T820 |
/workspace/coverage/default/29.spi_device_tpm_rw.259476968 |
|
|
May 28 02:45:41 PM PDT 24 |
May 28 02:45:50 PM PDT 24 |
41682092 ps |
| T821 |
/workspace/coverage/default/39.spi_device_csb_read.1409764522 |
|
|
May 28 02:45:57 PM PDT 24 |
May 28 02:46:05 PM PDT 24 |
32551713 ps |
| T822 |
/workspace/coverage/default/33.spi_device_cfg_cmd.2449042447 |
|
|
May 28 02:45:40 PM PDT 24 |
May 28 02:45:52 PM PDT 24 |
193169317 ps |
| T823 |
/workspace/coverage/default/3.spi_device_flash_all.1271277891 |
|
|
May 28 02:44:16 PM PDT 24 |
May 28 02:52:54 PM PDT 24 |
72452886582 ps |
| T60 |
/workspace/coverage/default/2.spi_device_sec_cm.2137756752 |
|
|
May 28 02:44:20 PM PDT 24 |
May 28 02:44:24 PM PDT 24 |
217502637 ps |
| T824 |
/workspace/coverage/default/0.spi_device_cfg_cmd.688971105 |
|
|
May 28 02:44:12 PM PDT 24 |
May 28 02:44:20 PM PDT 24 |
703500817 ps |
| T825 |
/workspace/coverage/default/14.spi_device_intercept.1138811263 |
|
|
May 28 02:44:55 PM PDT 24 |
May 28 02:45:29 PM PDT 24 |
18497876988 ps |
| T826 |
/workspace/coverage/default/0.spi_device_tpm_all.2149307841 |
|
|
May 28 02:43:59 PM PDT 24 |
May 28 02:44:16 PM PDT 24 |
8392132971 ps |
| T827 |
/workspace/coverage/default/37.spi_device_tpm_read_hw_reg.3839970234 |
|
|
May 28 02:45:54 PM PDT 24 |
May 28 02:46:02 PM PDT 24 |
13317688 ps |
| T828 |
/workspace/coverage/default/12.spi_device_flash_mode.1453664167 |
|
|
May 28 02:44:35 PM PDT 24 |
May 28 02:45:08 PM PDT 24 |
4315373460 ps |
| T829 |
/workspace/coverage/default/47.spi_device_intercept.4195559515 |
|
|
May 28 02:46:17 PM PDT 24 |
May 28 02:46:30 PM PDT 24 |
471669217 ps |
| T830 |
/workspace/coverage/default/47.spi_device_flash_mode.934670221 |
|
|
May 28 02:46:27 PM PDT 24 |
May 28 02:46:46 PM PDT 24 |
961955750 ps |
| T831 |
/workspace/coverage/default/31.spi_device_flash_and_tpm.1122985334 |
|
|
May 28 02:45:42 PM PDT 24 |
May 28 02:48:55 PM PDT 24 |
427960718476 ps |
| T832 |
/workspace/coverage/default/30.spi_device_tpm_rw.448398656 |
|
|
May 28 02:45:41 PM PDT 24 |
May 28 02:45:51 PM PDT 24 |
31373076 ps |
| T833 |
/workspace/coverage/default/49.spi_device_flash_and_tpm.437119938 |
|
|
May 28 02:46:22 PM PDT 24 |
May 28 02:47:29 PM PDT 24 |
2226389695 ps |
| T834 |
/workspace/coverage/default/43.spi_device_tpm_read_hw_reg.1434714994 |
|
|
May 28 02:46:13 PM PDT 24 |
May 28 02:46:26 PM PDT 24 |
2408618908 ps |
| T835 |
/workspace/coverage/default/3.spi_device_pass_addr_payload_swap.3321661245 |
|
|
May 28 02:44:25 PM PDT 24 |
May 28 02:44:44 PM PDT 24 |
16352103235 ps |
| T836 |
/workspace/coverage/default/8.spi_device_mailbox.3792206611 |
|
|
May 28 02:44:29 PM PDT 24 |
May 28 02:45:38 PM PDT 24 |
6609201045 ps |
| T837 |
/workspace/coverage/default/22.spi_device_flash_all.154290964 |
|
|
May 28 02:45:02 PM PDT 24 |
May 28 02:46:02 PM PDT 24 |
25609363612 ps |
| T838 |
/workspace/coverage/default/8.spi_device_tpm_all.2379947468 |
|
|
May 28 02:44:25 PM PDT 24 |
May 28 02:45:20 PM PDT 24 |
9320044265 ps |
| T839 |
/workspace/coverage/default/12.spi_device_flash_all.2928204890 |
|
|
May 28 02:44:35 PM PDT 24 |
May 28 02:45:37 PM PDT 24 |
4902208446 ps |
| T840 |
/workspace/coverage/default/29.spi_device_tpm_read_hw_reg.3751664420 |
|
|
May 28 02:45:40 PM PDT 24 |
May 28 02:45:48 PM PDT 24 |
274300512 ps |
| T841 |
/workspace/coverage/default/40.spi_device_tpm_read_hw_reg.4041530047 |
|
|
May 28 02:45:57 PM PDT 24 |
May 28 02:46:12 PM PDT 24 |
2694208000 ps |
| T842 |
/workspace/coverage/default/19.spi_device_pass_addr_payload_swap.4212178258 |
|
|
May 28 02:45:08 PM PDT 24 |
May 28 02:45:17 PM PDT 24 |
292543333 ps |
| T843 |
/workspace/coverage/default/26.spi_device_tpm_read_hw_reg.2107241313 |
|
|
May 28 02:45:18 PM PDT 24 |
May 28 02:45:26 PM PDT 24 |
1911552536 ps |
| T844 |
/workspace/coverage/default/28.spi_device_upload.2473091784 |
|
|
May 28 02:45:39 PM PDT 24 |
May 28 02:45:49 PM PDT 24 |
4320180294 ps |
| T845 |
/workspace/coverage/default/28.spi_device_mailbox.1481858664 |
|
|
May 28 02:45:40 PM PDT 24 |
May 28 02:45:50 PM PDT 24 |
117549707 ps |
| T846 |
/workspace/coverage/default/49.spi_device_tpm_sts_read.528263551 |
|
|
May 28 02:46:26 PM PDT 24 |
May 28 02:46:42 PM PDT 24 |
100915346 ps |
| T847 |
/workspace/coverage/default/3.spi_device_tpm_read_hw_reg.867451435 |
|
|
May 28 02:44:17 PM PDT 24 |
May 28 02:44:23 PM PDT 24 |
385335248 ps |
| T848 |
/workspace/coverage/default/37.spi_device_tpm_all.1705159028 |
|
|
May 28 02:45:51 PM PDT 24 |
May 28 02:46:26 PM PDT 24 |
4426281700 ps |
| T849 |
/workspace/coverage/default/32.spi_device_tpm_read_hw_reg.3476365851 |
|
|
May 28 02:45:42 PM PDT 24 |
May 28 02:45:57 PM PDT 24 |
7694348805 ps |
| T850 |
/workspace/coverage/default/20.spi_device_mailbox.2869227466 |
|
|
May 28 02:45:05 PM PDT 24 |
May 28 02:45:19 PM PDT 24 |
348384370 ps |
| T851 |
/workspace/coverage/default/41.spi_device_pass_cmd_filtering.3434793139 |
|
|
May 28 02:45:58 PM PDT 24 |
May 28 02:46:10 PM PDT 24 |
12580527271 ps |
| T852 |
/workspace/coverage/default/35.spi_device_stress_all.757698202 |
|
|
May 28 02:45:56 PM PDT 24 |
May 28 02:46:05 PM PDT 24 |
196660244 ps |
| T853 |
/workspace/coverage/default/27.spi_device_intercept.213821521 |
|
|
May 28 02:45:24 PM PDT 24 |
May 28 02:45:32 PM PDT 24 |
381088229 ps |
| T854 |
/workspace/coverage/default/11.spi_device_cfg_cmd.4089185889 |
|
|
May 28 02:44:29 PM PDT 24 |
May 28 02:44:44 PM PDT 24 |
329137413 ps |
| T855 |
/workspace/coverage/default/8.spi_device_tpm_read_hw_reg.1651585844 |
|
|
May 28 02:44:26 PM PDT 24 |
May 28 02:44:41 PM PDT 24 |
6726002097 ps |
| T856 |
/workspace/coverage/default/46.spi_device_tpm_rw.3217737175 |
|
|
May 28 02:46:13 PM PDT 24 |
May 28 02:46:20 PM PDT 24 |
13006436 ps |
| T857 |
/workspace/coverage/default/27.spi_device_tpm_rw.1309737294 |
|
|
May 28 02:45:21 PM PDT 24 |
May 28 02:45:27 PM PDT 24 |
202699058 ps |
| T858 |
/workspace/coverage/default/32.spi_device_intercept.2553294560 |
|
|
May 28 02:45:45 PM PDT 24 |
May 28 02:45:58 PM PDT 24 |
136393097 ps |
| T859 |
/workspace/coverage/default/28.spi_device_tpm_read_hw_reg.1326604411 |
|
|
May 28 02:45:19 PM PDT 24 |
May 28 02:45:24 PM PDT 24 |
603422338 ps |
| T860 |
/workspace/coverage/default/23.spi_device_pass_cmd_filtering.2858354512 |
|
|
May 28 02:45:05 PM PDT 24 |
May 28 02:45:25 PM PDT 24 |
9615870445 ps |
| T205 |
/workspace/coverage/default/5.spi_device_flash_and_tpm_min_idle.261889115 |
|
|
May 28 02:44:26 PM PDT 24 |
May 28 02:51:32 PM PDT 24 |
142466821277 ps |
| T861 |
/workspace/coverage/default/17.spi_device_tpm_sts_read.3091398826 |
|
|
May 28 02:44:58 PM PDT 24 |
May 28 02:45:04 PM PDT 24 |
18779783 ps |
| T862 |
/workspace/coverage/default/15.spi_device_tpm_rw.2743065149 |
|
|
May 28 02:44:43 PM PDT 24 |
May 28 02:44:55 PM PDT 24 |
31299873 ps |
| T863 |
/workspace/coverage/default/22.spi_device_pass_addr_payload_swap.171072658 |
|
|
May 28 02:45:04 PM PDT 24 |
May 28 02:45:32 PM PDT 24 |
26823858258 ps |
| T864 |
/workspace/coverage/default/30.spi_device_tpm_sts_read.3560063366 |
|
|
May 28 02:45:41 PM PDT 24 |
May 28 02:45:50 PM PDT 24 |
200319675 ps |
| T39 |
/workspace/coverage/default/21.spi_device_stress_all.3942913789 |
|
|
May 28 02:45:01 PM PDT 24 |
May 28 02:50:35 PM PDT 24 |
39834082808 ps |
| T865 |
/workspace/coverage/default/12.spi_device_read_buffer_direct.2637481368 |
|
|
May 28 02:44:30 PM PDT 24 |
May 28 02:44:52 PM PDT 24 |
5218566490 ps |
| T866 |
/workspace/coverage/default/41.spi_device_flash_all.353472940 |
|
|
May 28 02:46:06 PM PDT 24 |
May 28 02:46:55 PM PDT 24 |
4327977341 ps |
| T867 |
/workspace/coverage/default/33.spi_device_tpm_all.1474365996 |
|
|
May 28 02:45:45 PM PDT 24 |
May 28 02:46:10 PM PDT 24 |
2772741185 ps |
| T868 |
/workspace/coverage/default/28.spi_device_read_buffer_direct.3738990259 |
|
|
May 28 02:45:37 PM PDT 24 |
May 28 02:45:52 PM PDT 24 |
13097412510 ps |
| T869 |
/workspace/coverage/default/12.spi_device_mailbox.2015803407 |
|
|
May 28 02:44:34 PM PDT 24 |
May 28 02:46:09 PM PDT 24 |
15284605726 ps |
| T870 |
/workspace/coverage/default/32.spi_device_csb_read.571255559 |
|
|
May 28 02:45:42 PM PDT 24 |
May 28 02:45:51 PM PDT 24 |
44772470 ps |
| T871 |
/workspace/coverage/default/40.spi_device_mailbox.924864725 |
|
|
May 28 02:45:51 PM PDT 24 |
May 28 02:46:21 PM PDT 24 |
7868110842 ps |
| T872 |
/workspace/coverage/default/4.spi_device_mem_parity.3981962824 |
|
|
May 28 02:44:16 PM PDT 24 |
May 28 02:44:21 PM PDT 24 |
17506591 ps |
| T873 |
/workspace/coverage/default/6.spi_device_flash_and_tpm.3403052105 |
|
|
May 28 02:44:12 PM PDT 24 |
May 28 02:50:18 PM PDT 24 |
38140782487 ps |
| T874 |
/workspace/coverage/default/14.spi_device_cfg_cmd.3254699763 |
|
|
May 28 02:44:57 PM PDT 24 |
May 28 02:45:06 PM PDT 24 |
1040336092 ps |
| T875 |
/workspace/coverage/default/38.spi_device_flash_and_tpm.2738852899 |
|
|
May 28 02:45:57 PM PDT 24 |
May 28 02:47:37 PM PDT 24 |
73991037025 ps |
| T876 |
/workspace/coverage/default/30.spi_device_stress_all.205025012 |
|
|
May 28 02:45:41 PM PDT 24 |
May 28 02:45:50 PM PDT 24 |
42670628 ps |
| T877 |
/workspace/coverage/default/47.spi_device_tpm_read_hw_reg.993291525 |
|
|
May 28 02:46:32 PM PDT 24 |
May 28 02:46:55 PM PDT 24 |
1172966328 ps |
| T878 |
/workspace/coverage/default/30.spi_device_mailbox.1813579240 |
|
|
May 28 02:45:40 PM PDT 24 |
May 28 02:46:06 PM PDT 24 |
17229113556 ps |
| T879 |
/workspace/coverage/default/36.spi_device_pass_cmd_filtering.2860744627 |
|
|
May 28 02:45:57 PM PDT 24 |
May 28 02:46:16 PM PDT 24 |
5289296957 ps |
| T880 |
/workspace/coverage/default/39.spi_device_tpm_all.837451593 |
|
|
May 28 02:46:01 PM PDT 24 |
May 28 02:46:17 PM PDT 24 |
1034956030 ps |
| T881 |
/workspace/coverage/default/0.spi_device_flash_all.1466702095 |
|
|
May 28 02:43:59 PM PDT 24 |
May 28 02:44:56 PM PDT 24 |
8434423262 ps |
| T882 |
/workspace/coverage/default/31.spi_device_flash_mode.1416139221 |
|
|
May 28 02:45:42 PM PDT 24 |
May 28 02:45:56 PM PDT 24 |
96242151 ps |
| T883 |
/workspace/coverage/default/46.spi_device_mailbox.2194919061 |
|
|
May 28 02:46:31 PM PDT 24 |
May 28 02:46:52 PM PDT 24 |
648849846 ps |
| T884 |
/workspace/coverage/default/15.spi_device_intercept.2643571620 |
|
|
May 28 02:44:45 PM PDT 24 |
May 28 02:44:57 PM PDT 24 |
125034241 ps |
| T279 |
/workspace/coverage/default/32.spi_device_flash_and_tpm.1692934760 |
|
|
May 28 02:45:45 PM PDT 24 |
May 28 02:47:32 PM PDT 24 |
15709015510 ps |
| T285 |
/workspace/coverage/default/46.spi_device_pass_addr_payload_swap.3293539738 |
|
|
May 28 02:46:13 PM PDT 24 |
May 28 02:46:33 PM PDT 24 |
90641302162 ps |
| T283 |
/workspace/coverage/default/22.spi_device_stress_all.2064064042 |
|
|
May 28 02:44:52 PM PDT 24 |
May 28 02:46:59 PM PDT 24 |
52578624258 ps |
| T885 |
/workspace/coverage/default/3.spi_device_mem_parity.1407776529 |
|
|
May 28 02:44:26 PM PDT 24 |
May 28 02:44:37 PM PDT 24 |
26914466 ps |
| T886 |
/workspace/coverage/default/41.spi_device_alert_test.1966835452 |
|
|
May 28 02:46:11 PM PDT 24 |
May 28 02:46:18 PM PDT 24 |
23114063 ps |
| T887 |
/workspace/coverage/default/15.spi_device_flash_all.1960045901 |
|
|
May 28 02:44:43 PM PDT 24 |
May 28 02:46:25 PM PDT 24 |
10225441282 ps |
| T888 |
/workspace/coverage/default/5.spi_device_mailbox.3194071799 |
|
|
May 28 02:44:28 PM PDT 24 |
May 28 02:44:59 PM PDT 24 |
1416684386 ps |
| T286 |
/workspace/coverage/default/29.spi_device_pass_addr_payload_swap.2100360687 |
|
|
May 28 02:45:40 PM PDT 24 |
May 28 02:46:01 PM PDT 24 |
17345254696 ps |
| T889 |
/workspace/coverage/default/16.spi_device_intercept.2152801355 |
|
|
May 28 02:44:46 PM PDT 24 |
May 28 02:45:05 PM PDT 24 |
786628779 ps |
| T890 |
/workspace/coverage/default/32.spi_device_alert_test.2604319509 |
|
|
May 28 02:45:40 PM PDT 24 |
May 28 02:45:49 PM PDT 24 |
20813790 ps |
| T891 |
/workspace/coverage/default/22.spi_device_tpm_rw.1445841196 |
|
|
May 28 02:44:58 PM PDT 24 |
May 28 02:45:06 PM PDT 24 |
69181664 ps |
| T892 |
/workspace/coverage/default/38.spi_device_flash_mode.2444771525 |
|
|
May 28 02:46:01 PM PDT 24 |
May 28 02:46:21 PM PDT 24 |
1565645848 ps |
| T893 |
/workspace/coverage/default/6.spi_device_alert_test.3480008296 |
|
|
May 28 02:44:23 PM PDT 24 |
May 28 02:44:30 PM PDT 24 |
12404047 ps |
| T894 |
/workspace/coverage/default/27.spi_device_stress_all.1011911033 |
|
|
May 28 02:45:23 PM PDT 24 |
May 28 02:45:28 PM PDT 24 |
87861093 ps |
| T895 |
/workspace/coverage/default/23.spi_device_flash_mode.1301392522 |
|
|
May 28 02:45:07 PM PDT 24 |
May 28 02:45:14 PM PDT 24 |
29503708 ps |
| T896 |
/workspace/coverage/default/22.spi_device_csb_read.3169098410 |
|
|
May 28 02:45:11 PM PDT 24 |
May 28 02:45:15 PM PDT 24 |
100238336 ps |
| T897 |
/workspace/coverage/default/11.spi_device_flash_mode.2763122267 |
|
|
May 28 02:44:28 PM PDT 24 |
May 28 02:44:46 PM PDT 24 |
1097153357 ps |
| T898 |
/workspace/coverage/default/31.spi_device_flash_all.275272232 |
|
|
May 28 02:45:42 PM PDT 24 |
May 28 02:47:04 PM PDT 24 |
56139012523 ps |
| T899 |
/workspace/coverage/default/34.spi_device_read_buffer_direct.2697485925 |
|
|
May 28 02:45:42 PM PDT 24 |
May 28 02:45:59 PM PDT 24 |
1060436406 ps |
| T900 |
/workspace/coverage/default/22.spi_device_flash_mode.216644301 |
|
|
May 28 02:45:04 PM PDT 24 |
May 28 02:45:11 PM PDT 24 |
214964177 ps |
| T901 |
/workspace/coverage/default/29.spi_device_cfg_cmd.3312346732 |
|
|
May 28 02:45:39 PM PDT 24 |
May 28 02:45:46 PM PDT 24 |
80234746 ps |
| T902 |
/workspace/coverage/default/3.spi_device_tpm_sts_read.1779286054 |
|
|
May 28 02:44:22 PM PDT 24 |
May 28 02:44:26 PM PDT 24 |
123218619 ps |
| T903 |
/workspace/coverage/default/10.spi_device_flash_and_tpm.2225977604 |
|
|
May 28 02:44:32 PM PDT 24 |
May 28 02:47:19 PM PDT 24 |
20088915932 ps |
| T904 |
/workspace/coverage/default/20.spi_device_flash_and_tpm.3491943845 |
|
|
May 28 02:44:52 PM PDT 24 |
May 28 02:47:17 PM PDT 24 |
18276123382 ps |
| T905 |
/workspace/coverage/default/35.spi_device_flash_and_tpm.744514012 |
|
|
May 28 02:45:53 PM PDT 24 |
May 28 02:47:30 PM PDT 24 |
7195504101 ps |
| T906 |
/workspace/coverage/default/13.spi_device_upload.3851537548 |
|
|
May 28 02:44:37 PM PDT 24 |
May 28 02:44:55 PM PDT 24 |
262352378 ps |
| T907 |
/workspace/coverage/default/9.spi_device_flash_and_tpm.1826245461 |
|
|
May 28 02:44:33 PM PDT 24 |
May 28 02:45:56 PM PDT 24 |
9266020593 ps |
| T61 |
/workspace/coverage/default/0.spi_device_sec_cm.2598880204 |
|
|
May 28 02:43:58 PM PDT 24 |
May 28 02:44:01 PM PDT 24 |
163521651 ps |
| T908 |
/workspace/coverage/default/9.spi_device_mailbox.3434423668 |
|
|
May 28 02:44:26 PM PDT 24 |
May 28 02:45:18 PM PDT 24 |
21561302286 ps |
| T909 |
/workspace/coverage/default/17.spi_device_mem_parity.3199248131 |
|
|
May 28 02:44:42 PM PDT 24 |
May 28 02:44:54 PM PDT 24 |
45585592 ps |
| T910 |
/workspace/coverage/default/47.spi_device_mailbox.3453077155 |
|
|
May 28 02:46:31 PM PDT 24 |
May 28 02:47:19 PM PDT 24 |
41719406314 ps |
| T911 |
/workspace/coverage/default/30.spi_device_flash_mode.369375110 |
|
|
May 28 02:45:39 PM PDT 24 |
May 28 02:46:37 PM PDT 24 |
4637008329 ps |
| T912 |
/workspace/coverage/default/29.spi_device_pass_cmd_filtering.1895414001 |
|
|
May 28 02:45:37 PM PDT 24 |
May 28 02:45:44 PM PDT 24 |
2007523541 ps |
| T913 |
/workspace/coverage/default/27.spi_device_pass_cmd_filtering.1485033736 |
|
|
May 28 02:45:20 PM PDT 24 |
May 28 02:45:25 PM PDT 24 |
157129986 ps |
| T914 |
/workspace/coverage/default/45.spi_device_mailbox.3905279184 |
|
|
May 28 02:46:16 PM PDT 24 |
May 28 02:46:42 PM PDT 24 |
5197532630 ps |
| T915 |
/workspace/coverage/default/4.spi_device_alert_test.879704400 |
|
|
May 28 02:44:20 PM PDT 24 |
May 28 02:44:24 PM PDT 24 |
15936605 ps |
| T916 |
/workspace/coverage/default/31.spi_device_intercept.967948758 |
|
|
May 28 02:45:40 PM PDT 24 |
May 28 02:45:49 PM PDT 24 |
293780017 ps |
| T917 |
/workspace/coverage/default/2.spi_device_mem_parity.935979506 |
|
|
May 28 02:44:15 PM PDT 24 |
May 28 02:44:19 PM PDT 24 |
40113145 ps |
| T918 |
/workspace/coverage/default/39.spi_device_cfg_cmd.1096284867 |
|
|
May 28 02:46:00 PM PDT 24 |
May 28 02:46:11 PM PDT 24 |
442281487 ps |
| T919 |
/workspace/coverage/default/13.spi_device_tpm_all.2826647741 |
|
|
May 28 02:44:33 PM PDT 24 |
May 28 02:45:00 PM PDT 24 |
9002338479 ps |
| T920 |
/workspace/coverage/default/9.spi_device_csb_read.1307705654 |
|
|
May 28 02:44:31 PM PDT 24 |
May 28 02:44:43 PM PDT 24 |
14591207 ps |
| T921 |
/workspace/coverage/default/17.spi_device_intercept.2160326111 |
|
|
May 28 02:45:00 PM PDT 24 |
May 28 02:45:14 PM PDT 24 |
1883400510 ps |
| T922 |
/workspace/coverage/default/30.spi_device_flash_all.3045224974 |
|
|
May 28 02:45:40 PM PDT 24 |
May 28 02:46:07 PM PDT 24 |
2453234180 ps |
| T923 |
/workspace/coverage/default/29.spi_device_mailbox.3781519320 |
|
|
May 28 02:45:37 PM PDT 24 |
May 28 02:45:56 PM PDT 24 |
8212604397 ps |
| T924 |
/workspace/coverage/default/43.spi_device_stress_all.490485312 |
|
|
May 28 02:46:09 PM PDT 24 |
May 28 02:48:05 PM PDT 24 |
19096910483 ps |
| T925 |
/workspace/coverage/default/10.spi_device_pass_cmd_filtering.394525029 |
|
|
May 28 02:44:30 PM PDT 24 |
May 28 02:44:45 PM PDT 24 |
515245879 ps |
| T296 |
/workspace/coverage/default/47.spi_device_flash_and_tpm.4187229268 |
|
|
May 28 02:46:31 PM PDT 24 |
May 28 02:51:01 PM PDT 24 |
27832690812 ps |
| T926 |
/workspace/coverage/default/37.spi_device_cfg_cmd.4182614039 |
|
|
May 28 02:46:00 PM PDT 24 |
May 28 02:46:13 PM PDT 24 |
469465141 ps |
| T927 |
/workspace/coverage/default/18.spi_device_flash_all.3369340572 |
|
|
May 28 02:44:46 PM PDT 24 |
May 28 02:47:23 PM PDT 24 |
122318984630 ps |
| T928 |
/workspace/coverage/default/17.spi_device_alert_test.2484662933 |
|
|
May 28 02:44:58 PM PDT 24 |
May 28 02:45:04 PM PDT 24 |
33011966 ps |
| T929 |
/workspace/coverage/default/41.spi_device_intercept.2746506810 |
|
|
May 28 02:45:55 PM PDT 24 |
May 28 02:46:17 PM PDT 24 |
3053854699 ps |
| T930 |
/workspace/coverage/default/17.spi_device_mailbox.2427635178 |
|
|
May 28 02:44:50 PM PDT 24 |
May 28 02:45:02 PM PDT 24 |
197648569 ps |
| T931 |
/workspace/coverage/default/39.spi_device_pass_cmd_filtering.694477273 |
|
|
May 28 02:45:53 PM PDT 24 |
May 28 02:46:09 PM PDT 24 |
1296205845 ps |
| T932 |
/workspace/coverage/default/9.spi_device_alert_test.3516190463 |
|
|
May 28 02:44:30 PM PDT 24 |
May 28 02:44:43 PM PDT 24 |
45564110 ps |
| T933 |
/workspace/coverage/default/21.spi_device_tpm_sts_read.2581768443 |
|
|
May 28 02:45:00 PM PDT 24 |
May 28 02:45:06 PM PDT 24 |
71342681 ps |
| T934 |
/workspace/coverage/default/27.spi_device_upload.2268927818 |
|
|
May 28 02:45:23 PM PDT 24 |
May 28 02:45:34 PM PDT 24 |
400317907 ps |
| T62 |
/workspace/coverage/default/1.spi_device_sec_cm.702909386 |
|
|
May 28 02:44:26 PM PDT 24 |
May 28 02:44:37 PM PDT 24 |
68622549 ps |
| T935 |
/workspace/coverage/default/21.spi_device_pass_addr_payload_swap.2000780874 |
|
|
May 28 02:44:50 PM PDT 24 |
May 28 02:45:03 PM PDT 24 |
6036690647 ps |
| T936 |
/workspace/coverage/default/7.spi_device_intercept.1929064583 |
|
|
May 28 02:44:25 PM PDT 24 |
May 28 02:44:38 PM PDT 24 |
524870169 ps |
| T937 |
/workspace/coverage/default/13.spi_device_csb_read.2376735323 |
|
|
May 28 02:44:38 PM PDT 24 |
May 28 02:44:52 PM PDT 24 |
39883188 ps |
| T938 |
/workspace/coverage/default/48.spi_device_cfg_cmd.2286789794 |
|
|
May 28 02:46:31 PM PDT 24 |
May 28 02:46:53 PM PDT 24 |
321303667 ps |
| T939 |
/workspace/coverage/default/44.spi_device_read_buffer_direct.176077763 |
|
|
May 28 02:46:09 PM PDT 24 |
May 28 02:46:19 PM PDT 24 |
659167262 ps |
| T940 |
/workspace/coverage/default/8.spi_device_stress_all.499326446 |
|
|
May 28 02:44:29 PM PDT 24 |
May 28 02:51:31 PM PDT 24 |
141301111827 ps |
| T941 |
/workspace/coverage/default/35.spi_device_read_buffer_direct.3461298776 |
|
|
May 28 02:45:55 PM PDT 24 |
May 28 02:46:18 PM PDT 24 |
1274831725 ps |
| T942 |
/workspace/coverage/default/15.spi_device_cfg_cmd.3493594541 |
|
|
May 28 02:44:54 PM PDT 24 |
May 28 02:45:02 PM PDT 24 |
1276972206 ps |
| T943 |
/workspace/coverage/default/20.spi_device_tpm_sts_read.4124718300 |
|
|
May 28 02:45:03 PM PDT 24 |
May 28 02:45:09 PM PDT 24 |
171174609 ps |
| T291 |
/workspace/coverage/default/29.spi_device_flash_and_tpm.2910240748 |
|
|
May 28 02:45:40 PM PDT 24 |
May 28 02:57:45 PM PDT 24 |
71789642142 ps |
| T284 |
/workspace/coverage/default/31.spi_device_flash_and_tpm_min_idle.686942671 |
|
|
May 28 02:45:43 PM PDT 24 |
May 28 02:48:55 PM PDT 24 |
19142753498 ps |
| T944 |
/workspace/coverage/default/36.spi_device_tpm_sts_read.3491505758 |
|
|
May 28 02:45:52 PM PDT 24 |
May 28 02:46:01 PM PDT 24 |
26547564 ps |
| T945 |
/workspace/coverage/default/22.spi_device_cfg_cmd.3193256020 |
|
|
May 28 02:44:51 PM PDT 24 |
May 28 02:45:00 PM PDT 24 |
296343907 ps |
| T298 |
/workspace/coverage/default/4.spi_device_stress_all.1264901550 |
|
|
May 28 02:44:23 PM PDT 24 |
May 28 02:50:47 PM PDT 24 |
20789565468 ps |
| T946 |
/workspace/coverage/default/47.spi_device_stress_all.1305541533 |
|
|
May 28 02:46:17 PM PDT 24 |
May 28 02:50:38 PM PDT 24 |
38537866486 ps |
| T947 |
/workspace/coverage/default/4.spi_device_csb_read.1473760334 |
|
|
May 28 02:44:15 PM PDT 24 |
May 28 02:44:19 PM PDT 24 |
71781015 ps |
| T948 |
/workspace/coverage/default/12.spi_device_intercept.189296180 |
|
|
May 28 02:44:37 PM PDT 24 |
May 28 02:44:55 PM PDT 24 |
320262139 ps |
| T949 |
/workspace/coverage/default/28.spi_device_cfg_cmd.675966821 |
|
|
May 28 02:45:39 PM PDT 24 |
May 28 02:45:56 PM PDT 24 |
6029876323 ps |
| T950 |
/workspace/coverage/default/16.spi_device_pass_cmd_filtering.1501990333 |
|
|
May 28 02:44:38 PM PDT 24 |
May 28 02:45:03 PM PDT 24 |
5343935336 ps |
| T951 |
/workspace/coverage/default/26.spi_device_cfg_cmd.2335684119 |
|
|
May 28 02:45:20 PM PDT 24 |
May 28 02:45:25 PM PDT 24 |
125776932 ps |
| T952 |
/workspace/coverage/default/12.spi_device_alert_test.1639086997 |
|
|
May 28 02:44:38 PM PDT 24 |
May 28 02:44:51 PM PDT 24 |
13372023 ps |
| T953 |
/workspace/coverage/default/46.spi_device_read_buffer_direct.3316519794 |
|
|
May 28 02:46:24 PM PDT 24 |
May 28 02:46:47 PM PDT 24 |
920153535 ps |
| T954 |
/workspace/coverage/default/24.spi_device_stress_all.3713747951 |
|
|
May 28 02:45:05 PM PDT 24 |
May 28 02:48:18 PM PDT 24 |
9902591732 ps |
| T955 |
/workspace/coverage/default/25.spi_device_cfg_cmd.1263629680 |
|
|
May 28 02:45:05 PM PDT 24 |
May 28 02:45:14 PM PDT 24 |
682637993 ps |
| T956 |
/workspace/coverage/default/17.spi_device_flash_and_tpm_min_idle.1272719216 |
|
|
May 28 02:44:50 PM PDT 24 |
May 28 02:45:28 PM PDT 24 |
2060428407 ps |
| T957 |
/workspace/coverage/default/8.spi_device_flash_and_tpm_min_idle.2729599748 |
|
|
May 28 02:44:25 PM PDT 24 |
May 28 02:46:19 PM PDT 24 |
10083840724 ps |
| T958 |
/workspace/coverage/default/43.spi_device_upload.1570310554 |
|
|
May 28 02:46:12 PM PDT 24 |
May 28 02:46:22 PM PDT 24 |
102308919 ps |
| T959 |
/workspace/coverage/default/36.spi_device_tpm_read_hw_reg.324770639 |
|
|
May 28 02:45:53 PM PDT 24 |
May 28 02:46:14 PM PDT 24 |
13868829950 ps |
| T960 |
/workspace/coverage/default/9.spi_device_intercept.2922526675 |
|
|
May 28 02:44:31 PM PDT 24 |
May 28 02:44:58 PM PDT 24 |
3300793790 ps |
| T40 |
/workspace/coverage/default/44.spi_device_flash_and_tpm.3090799884 |
|
|
May 28 02:46:13 PM PDT 24 |
May 28 02:51:52 PM PDT 24 |
36930036654 ps |
| T961 |
/workspace/coverage/default/15.spi_device_tpm_all.491846462 |
|
|
May 28 02:44:41 PM PDT 24 |
May 28 02:44:56 PM PDT 24 |
610156855 ps |
| T962 |
/workspace/coverage/default/6.spi_device_flash_mode.374627878 |
|
|
May 28 02:44:25 PM PDT 24 |
May 28 02:44:48 PM PDT 24 |
618590353 ps |
| T963 |
/workspace/coverage/default/33.spi_device_mailbox.1463219138 |
|
|
May 28 02:45:41 PM PDT 24 |
May 28 02:46:11 PM PDT 24 |
3206751400 ps |
| T964 |
/workspace/coverage/default/11.spi_device_pass_cmd_filtering.3546419420 |
|
|
May 28 02:44:27 PM PDT 24 |
May 28 02:44:43 PM PDT 24 |
682227600 ps |
| T965 |
/workspace/coverage/default/40.spi_device_read_buffer_direct.2131879120 |
|
|
May 28 02:45:57 PM PDT 24 |
May 28 02:46:09 PM PDT 24 |
452975385 ps |
| T966 |
/workspace/coverage/default/30.spi_device_alert_test.457701830 |
|
|
May 28 02:45:39 PM PDT 24 |
May 28 02:45:46 PM PDT 24 |
26088527 ps |
| T967 |
/workspace/coverage/default/40.spi_device_alert_test.1033868019 |
|
|
May 28 02:45:55 PM PDT 24 |
May 28 02:46:04 PM PDT 24 |
12774161 ps |
| T968 |
/workspace/coverage/default/34.spi_device_flash_mode.1314399405 |
|
|
May 28 02:45:43 PM PDT 24 |
May 28 02:46:14 PM PDT 24 |
5438031309 ps |
| T969 |
/workspace/coverage/default/1.spi_device_pass_cmd_filtering.3630297543 |
|
|
May 28 02:44:08 PM PDT 24 |
May 28 02:44:11 PM PDT 24 |
99754069 ps |
| T970 |
/workspace/coverage/default/24.spi_device_intercept.2872373590 |
|
|
May 28 02:45:08 PM PDT 24 |
May 28 02:45:21 PM PDT 24 |
2925345526 ps |
| T971 |
/workspace/coverage/default/10.spi_device_tpm_all.4293467625 |
|
|
May 28 02:44:32 PM PDT 24 |
May 28 02:44:50 PM PDT 24 |
736963841 ps |
| T281 |
/workspace/coverage/default/23.spi_device_flash_and_tpm_min_idle.1027200066 |
|
|
May 28 02:45:05 PM PDT 24 |
May 28 02:49:50 PM PDT 24 |
158027170576 ps |
| T972 |
/workspace/coverage/default/18.spi_device_tpm_all.257128112 |
|
|
May 28 02:45:02 PM PDT 24 |
May 28 02:45:21 PM PDT 24 |
48149063607 ps |
| T973 |
/workspace/coverage/default/3.spi_device_flash_and_tpm.741810651 |
|
|
May 28 02:44:12 PM PDT 24 |
May 28 02:44:20 PM PDT 24 |
350112717 ps |
| T974 |
/workspace/coverage/default/33.spi_device_tpm_rw.637373871 |
|
|
May 28 02:45:41 PM PDT 24 |
May 28 02:45:49 PM PDT 24 |
38189632 ps |
| T975 |
/workspace/coverage/default/17.spi_device_flash_mode.12541155 |
|
|
May 28 02:44:57 PM PDT 24 |
May 28 02:45:28 PM PDT 24 |
5825704863 ps |
| T87 |
/workspace/coverage/cover_reg_top/0.spi_device_csr_mem_rw_with_rand_reset.3711303799 |
|
|
May 28 01:35:39 PM PDT 24 |
May 28 01:35:46 PM PDT 24 |
257500656 ps |
| T976 |
/workspace/coverage/cover_reg_top/34.spi_device_intr_test.2672534458 |
|
|
May 28 01:36:29 PM PDT 24 |
May 28 01:36:34 PM PDT 24 |
32724491 ps |
| T977 |
/workspace/coverage/cover_reg_top/41.spi_device_intr_test.945316152 |
|
|
May 28 01:36:30 PM PDT 24 |
May 28 01:36:35 PM PDT 24 |
30252710 ps |
| T109 |
/workspace/coverage/cover_reg_top/18.spi_device_csr_rw.2625270156 |
|
|
May 28 01:36:26 PM PDT 24 |
May 28 01:36:28 PM PDT 24 |
34401100 ps |
| T133 |
/workspace/coverage/cover_reg_top/1.spi_device_same_csr_outstanding.1801335137 |
|
|
May 28 01:35:37 PM PDT 24 |
May 28 01:35:43 PM PDT 24 |
37769304 ps |
| T978 |
/workspace/coverage/cover_reg_top/38.spi_device_intr_test.2200817753 |
|
|
May 28 01:36:28 PM PDT 24 |
May 28 01:36:32 PM PDT 24 |
27686335 ps |
| T134 |
/workspace/coverage/cover_reg_top/1.spi_device_csr_rw.3407184399 |
|
|
May 28 01:35:37 PM PDT 24 |
May 28 01:35:42 PM PDT 24 |
66081184 ps |
| T88 |
/workspace/coverage/cover_reg_top/15.spi_device_tl_intg_err.3596942333 |
|
|
May 28 01:36:14 PM PDT 24 |
May 28 01:36:25 PM PDT 24 |
303972087 ps |
| T979 |
/workspace/coverage/cover_reg_top/22.spi_device_intr_test.2820266724 |
|
|
May 28 01:36:31 PM PDT 24 |
May 28 01:36:36 PM PDT 24 |
13967922 ps |
| T89 |
/workspace/coverage/cover_reg_top/3.spi_device_tl_intg_err.1360584520 |
|
|
May 28 01:35:37 PM PDT 24 |
May 28 01:35:54 PM PDT 24 |
579977396 ps |
| T90 |
/workspace/coverage/cover_reg_top/12.spi_device_tl_intg_err.3190032159 |
|
|
May 28 01:36:00 PM PDT 24 |
May 28 01:36:11 PM PDT 24 |
1143784149 ps |
| T980 |
/workspace/coverage/cover_reg_top/45.spi_device_intr_test.4054427697 |
|
|
May 28 01:36:29 PM PDT 24 |
May 28 01:36:33 PM PDT 24 |
143682471 ps |
| T981 |
/workspace/coverage/cover_reg_top/10.spi_device_same_csr_outstanding.2007429034 |
|
|
May 28 01:36:02 PM PDT 24 |
May 28 01:36:06 PM PDT 24 |
112998070 ps |
| T982 |
/workspace/coverage/cover_reg_top/10.spi_device_csr_rw.3936468227 |
|
|
May 28 01:36:00 PM PDT 24 |
May 28 01:36:04 PM PDT 24 |
63506522 ps |
| T91 |
/workspace/coverage/cover_reg_top/2.spi_device_tl_errors.1895062067 |
|
|
May 28 01:35:40 PM PDT 24 |
May 28 01:35:46 PM PDT 24 |
97020982 ps |
| T983 |
/workspace/coverage/cover_reg_top/16.spi_device_same_csr_outstanding.4144332609 |
|
|
May 28 01:36:14 PM PDT 24 |
May 28 01:36:18 PM PDT 24 |
58949544 ps |
| T984 |
/workspace/coverage/cover_reg_top/0.spi_device_mem_walk.1418909527 |
|
|
May 28 01:35:36 PM PDT 24 |
May 28 01:35:40 PM PDT 24 |
30719705 ps |
| T92 |
/workspace/coverage/cover_reg_top/3.spi_device_csr_mem_rw_with_rand_reset.1220139263 |
|
|
May 28 01:35:50 PM PDT 24 |
May 28 01:35:53 PM PDT 24 |
54122992 ps |
| T110 |
/workspace/coverage/cover_reg_top/11.spi_device_csr_rw.3759087529 |
|
|
May 28 01:36:00 PM PDT 24 |
May 28 01:36:05 PM PDT 24 |
106175973 ps |
| T93 |
/workspace/coverage/cover_reg_top/19.spi_device_tl_errors.1846369299 |
|
|
May 28 01:36:27 PM PDT 24 |
May 28 01:36:34 PM PDT 24 |
876459887 ps |
| T985 |
/workspace/coverage/cover_reg_top/17.spi_device_same_csr_outstanding.3259690759 |
|
|
May 28 01:36:14 PM PDT 24 |
May 28 01:36:19 PM PDT 24 |
941656879 ps |
| T986 |
/workspace/coverage/cover_reg_top/37.spi_device_intr_test.1925595239 |
|
|
May 28 01:36:26 PM PDT 24 |
May 28 01:36:27 PM PDT 24 |
42290361 ps |
| T104 |
/workspace/coverage/cover_reg_top/8.spi_device_tl_intg_err.3532353840 |
|
|
May 28 01:35:50 PM PDT 24 |
May 28 01:36:04 PM PDT 24 |
499647661 ps |
| T142 |
/workspace/coverage/cover_reg_top/5.spi_device_csr_rw.4108904282 |
|
|
May 28 01:35:48 PM PDT 24 |
May 28 01:35:52 PM PDT 24 |
113540679 ps |
| T987 |
/workspace/coverage/cover_reg_top/19.spi_device_intr_test.571603769 |
|
|
May 28 01:36:30 PM PDT 24 |
May 28 01:36:35 PM PDT 24 |
76259277 ps |
| T988 |
/workspace/coverage/cover_reg_top/32.spi_device_intr_test.3901398123 |
|
|
May 28 01:36:29 PM PDT 24 |
May 28 01:36:33 PM PDT 24 |
23682660 ps |
| T989 |
/workspace/coverage/cover_reg_top/5.spi_device_intr_test.1028036701 |
|
|
May 28 01:35:51 PM PDT 24 |
May 28 01:35:53 PM PDT 24 |
32480242 ps |
| T990 |
/workspace/coverage/cover_reg_top/40.spi_device_intr_test.3093875033 |
|
|
May 28 01:36:28 PM PDT 24 |
May 28 01:36:33 PM PDT 24 |
18169609 ps |
| T991 |
/workspace/coverage/cover_reg_top/27.spi_device_intr_test.2296847198 |
|
|
May 28 01:36:31 PM PDT 24 |
May 28 01:36:36 PM PDT 24 |
47768353 ps |
| T111 |
/workspace/coverage/cover_reg_top/0.spi_device_csr_rw.2454388281 |
|
|
May 28 01:35:39 PM PDT 24 |
May 28 01:35:46 PM PDT 24 |
70960225 ps |
| T112 |
/workspace/coverage/cover_reg_top/14.spi_device_csr_rw.2833910948 |
|
|
May 28 01:36:14 PM PDT 24 |
May 28 01:36:18 PM PDT 24 |
27608866 ps |
| T992 |
/workspace/coverage/cover_reg_top/44.spi_device_intr_test.3517941245 |
|
|
May 28 01:36:29 PM PDT 24 |
May 28 01:36:33 PM PDT 24 |
53420873 ps |
| T993 |
/workspace/coverage/cover_reg_top/8.spi_device_intr_test.1423186919 |
|
|
May 28 01:35:50 PM PDT 24 |
May 28 01:35:52 PM PDT 24 |
19064414 ps |
| T105 |
/workspace/coverage/cover_reg_top/10.spi_device_tl_intg_err.3882866759 |
|
|
May 28 01:36:01 PM PDT 24 |
May 28 01:36:24 PM PDT 24 |
1061940198 ps |
| T113 |
/workspace/coverage/cover_reg_top/0.spi_device_csr_aliasing.1834808327 |
|
|
May 28 01:35:36 PM PDT 24 |
May 28 01:36:01 PM PDT 24 |
20483473025 ps |
| T994 |
/workspace/coverage/cover_reg_top/36.spi_device_intr_test.1102296552 |
|
|
May 28 01:36:28 PM PDT 24 |
May 28 01:36:32 PM PDT 24 |
24253464 ps |
| T995 |
/workspace/coverage/cover_reg_top/10.spi_device_intr_test.108180108 |
|
|
May 28 01:36:00 PM PDT 24 |
May 28 01:36:02 PM PDT 24 |
14415539 ps |
| T106 |
/workspace/coverage/cover_reg_top/7.spi_device_tl_intg_err.2649017003 |
|
|
May 28 01:35:50 PM PDT 24 |
May 28 01:36:04 PM PDT 24 |
416464260 ps |
| T996 |
/workspace/coverage/cover_reg_top/1.spi_device_intr_test.3263776571 |
|
|
May 28 01:35:40 PM PDT 24 |
May 28 01:35:44 PM PDT 24 |
21478921 ps |
| T76 |
/workspace/coverage/cover_reg_top/2.spi_device_csr_hw_reset.3356183494 |
|
|
May 28 01:35:38 PM PDT 24 |
May 28 01:35:43 PM PDT 24 |
22905649 ps |
| T143 |
/workspace/coverage/cover_reg_top/5.spi_device_same_csr_outstanding.1050995160 |
|
|
May 28 01:35:52 PM PDT 24 |
May 28 01:35:56 PM PDT 24 |
155288996 ps |
| T997 |
/workspace/coverage/cover_reg_top/11.spi_device_intr_test.866705392 |
|
|
May 28 01:36:02 PM PDT 24 |
May 28 01:36:05 PM PDT 24 |
13798004 ps |
| T114 |
/workspace/coverage/cover_reg_top/4.spi_device_csr_rw.2140234051 |
|
|
May 28 01:35:49 PM PDT 24 |
May 28 01:35:53 PM PDT 24 |
325465574 ps |
| T998 |
/workspace/coverage/cover_reg_top/39.spi_device_intr_test.1528624708 |
|
|
May 28 01:36:30 PM PDT 24 |
May 28 01:36:35 PM PDT 24 |
16401046 ps |
| T77 |
/workspace/coverage/cover_reg_top/1.spi_device_csr_hw_reset.553962943 |
|
|
May 28 01:35:37 PM PDT 24 |
May 28 01:35:42 PM PDT 24 |
53050995 ps |
| T999 |
/workspace/coverage/cover_reg_top/13.spi_device_csr_rw.2367912582 |
|
|
May 28 01:36:01 PM PDT 24 |
May 28 01:36:06 PM PDT 24 |
329857364 ps |
| T115 |
/workspace/coverage/cover_reg_top/4.spi_device_mem_partial_access.2564669311 |
|
|
May 28 01:35:48 PM PDT 24 |
May 28 01:35:51 PM PDT 24 |
329859967 ps |
| T116 |
/workspace/coverage/cover_reg_top/2.spi_device_csr_aliasing.2819134626 |
|
|
May 28 01:35:37 PM PDT 24 |
May 28 01:35:49 PM PDT 24 |
317333392 ps |
| T94 |
/workspace/coverage/cover_reg_top/5.spi_device_tl_errors.2819727179 |
|
|
May 28 01:35:55 PM PDT 24 |
May 28 01:36:00 PM PDT 24 |
437465143 ps |
| T1000 |
/workspace/coverage/cover_reg_top/8.spi_device_same_csr_outstanding.162079424 |
|
|
May 28 01:35:52 PM PDT 24 |
May 28 01:35:56 PM PDT 24 |
25717151 ps |
| T119 |
/workspace/coverage/cover_reg_top/0.spi_device_mem_partial_access.2334387601 |
|
|
May 28 01:35:38 PM PDT 24 |
May 28 01:35:44 PM PDT 24 |
28883859 ps |
| T107 |
/workspace/coverage/cover_reg_top/6.spi_device_tl_errors.415174857 |
|
|
May 28 01:35:56 PM PDT 24 |
May 28 01:35:59 PM PDT 24 |
22871797 ps |
| T99 |
/workspace/coverage/cover_reg_top/1.spi_device_tl_errors.882834357 |
|
|
May 28 01:35:38 PM PDT 24 |
May 28 01:35:45 PM PDT 24 |
159430847 ps |
| T108 |
/workspace/coverage/cover_reg_top/14.spi_device_tl_intg_err.1341577063 |
|
|
May 28 01:36:13 PM PDT 24 |
May 28 01:36:29 PM PDT 24 |
621063830 ps |
| T170 |
/workspace/coverage/cover_reg_top/11.spi_device_tl_intg_err.1488755915 |
|
|
May 28 01:36:00 PM PDT 24 |
May 28 01:36:16 PM PDT 24 |
203044305 ps |
| T1001 |
/workspace/coverage/cover_reg_top/12.spi_device_csr_rw.2246519369 |
|
|
May 28 01:36:01 PM PDT 24 |
May 28 01:36:05 PM PDT 24 |
136986481 ps |
| T117 |
/workspace/coverage/cover_reg_top/17.spi_device_csr_rw.2709229749 |
|
|
May 28 01:36:14 PM PDT 24 |
May 28 01:36:16 PM PDT 24 |
19114058 ps |
| T1002 |
/workspace/coverage/cover_reg_top/4.spi_device_tl_intg_err.95824248 |
|
|
May 28 01:35:49 PM PDT 24 |
May 28 01:35:57 PM PDT 24 |
116837632 ps |
| T118 |
/workspace/coverage/cover_reg_top/3.spi_device_csr_hw_reset.1799753331 |
|
|
May 28 01:35:41 PM PDT 24 |
May 28 01:35:45 PM PDT 24 |
45799193 ps |
| T1003 |
/workspace/coverage/cover_reg_top/33.spi_device_intr_test.1344569654 |
|
|
May 28 01:36:27 PM PDT 24 |
May 28 01:36:29 PM PDT 24 |
23904319 ps |
| T1004 |
/workspace/coverage/cover_reg_top/0.spi_device_intr_test.1781888705 |
|
|
May 28 01:35:36 PM PDT 24 |
May 28 01:35:39 PM PDT 24 |
55019125 ps |
| T1005 |
/workspace/coverage/cover_reg_top/10.spi_device_csr_mem_rw_with_rand_reset.1316495490 |
|
|
May 28 01:35:59 PM PDT 24 |
May 28 01:36:02 PM PDT 24 |
26791603 ps |
| T100 |
/workspace/coverage/cover_reg_top/17.spi_device_tl_errors.4258789402 |
|
|
May 28 01:36:15 PM PDT 24 |
May 28 01:36:19 PM PDT 24 |
27971357 ps |
| T102 |
/workspace/coverage/cover_reg_top/16.spi_device_csr_mem_rw_with_rand_reset.3554262793 |
|
|
May 28 01:36:15 PM PDT 24 |
May 28 01:36:19 PM PDT 24 |
199249668 ps |
| T144 |
/workspace/coverage/cover_reg_top/5.spi_device_tl_intg_err.3168091757 |
|
|
May 28 01:35:53 PM PDT 24 |
May 28 01:36:02 PM PDT 24 |
336870020 ps |
| T1006 |
/workspace/coverage/cover_reg_top/2.spi_device_mem_walk.3111713217 |
|
|
May 28 01:35:37 PM PDT 24 |
May 28 01:35:41 PM PDT 24 |
12955254 ps |
| T1007 |
/workspace/coverage/cover_reg_top/4.spi_device_same_csr_outstanding.3876806607 |
|
|
May 28 01:35:58 PM PDT 24 |
May 28 01:36:03 PM PDT 24 |
56633452 ps |
| T145 |
/workspace/coverage/cover_reg_top/13.spi_device_tl_intg_err.1987941282 |
|
|
May 28 01:36:04 PM PDT 24 |
May 28 01:36:14 PM PDT 24 |
1637965308 ps |
| T1008 |
/workspace/coverage/cover_reg_top/4.spi_device_csr_aliasing.735910638 |
|
|
May 28 01:35:51 PM PDT 24 |
May 28 01:36:15 PM PDT 24 |
1256576340 ps |
| T1009 |
/workspace/coverage/cover_reg_top/7.spi_device_csr_rw.233605470 |
|
|
May 28 01:35:52 PM PDT 24 |
May 28 01:35:56 PM PDT 24 |
716357709 ps |
| T146 |
/workspace/coverage/cover_reg_top/11.spi_device_csr_mem_rw_with_rand_reset.2090773917 |
|
|
May 28 01:36:04 PM PDT 24 |
May 28 01:36:09 PM PDT 24 |
378565237 ps |
| T1010 |
/workspace/coverage/cover_reg_top/1.spi_device_csr_aliasing.785556932 |
|
|
May 28 01:35:39 PM PDT 24 |
May 28 01:35:51 PM PDT 24 |
113071951 ps |
| T1011 |
/workspace/coverage/cover_reg_top/24.spi_device_intr_test.1000833655 |
|
|
May 28 01:36:26 PM PDT 24 |
May 28 01:36:28 PM PDT 24 |
14243737 ps |
| T96 |
/workspace/coverage/cover_reg_top/12.spi_device_tl_errors.1143835101 |
|
|
May 28 01:36:01 PM PDT 24 |
May 28 01:36:07 PM PDT 24 |
460935759 ps |