Assert Coverage for Module :
spi_device_csr_assert_fpv
Assertion Details
TlulOOBAddrErr_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
389149085 |
3041 |
0 |
0 |
T93 |
6591 |
116 |
0 |
0 |
T94 |
5323 |
20 |
0 |
0 |
T95 |
11326 |
12 |
0 |
0 |
T96 |
3129 |
43 |
0 |
0 |
T98 |
68302 |
2 |
0 |
0 |
T99 |
81102 |
4 |
0 |
0 |
T100 |
6401 |
222 |
0 |
0 |
T110 |
3397 |
84 |
0 |
0 |
T115 |
5128 |
11 |
0 |
0 |
T116 |
8200 |
5 |
0 |
0 |
addr_swap_data_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
389149085 |
1597 |
0 |
0 |
T98 |
68302 |
81 |
0 |
0 |
T117 |
34085 |
37 |
0 |
0 |
T119 |
7262 |
2 |
0 |
0 |
T127 |
74695 |
538 |
0 |
0 |
T128 |
10746 |
15 |
0 |
0 |
T141 |
7884 |
9 |
0 |
0 |
T147 |
39079 |
291 |
0 |
0 |
T148 |
4111 |
6 |
0 |
0 |
T149 |
36883 |
41 |
0 |
0 |
T150 |
6605 |
3 |
0 |
0 |
addr_swap_mask_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
389149085 |
1578 |
0 |
0 |
T81 |
2961 |
9 |
0 |
0 |
T98 |
68302 |
69 |
0 |
0 |
T117 |
34085 |
21 |
0 |
0 |
T119 |
7262 |
11 |
0 |
0 |
T127 |
74695 |
488 |
0 |
0 |
T128 |
10746 |
19 |
0 |
0 |
T141 |
7884 |
34 |
0 |
0 |
T147 |
39079 |
228 |
0 |
0 |
T148 |
4111 |
3 |
0 |
0 |
T149 |
36883 |
31 |
0 |
0 |
cfg_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
389149085 |
1808 |
0 |
0 |
T98 |
68302 |
114 |
0 |
0 |
T109 |
12949 |
4 |
0 |
0 |
T117 |
34085 |
85 |
0 |
0 |
T119 |
7262 |
19 |
0 |
0 |
T120 |
8123 |
10 |
0 |
0 |
T127 |
74695 |
450 |
0 |
0 |
T128 |
10746 |
22 |
0 |
0 |
T141 |
7884 |
14 |
0 |
0 |
T147 |
39079 |
263 |
0 |
0 |
T148 |
4111 |
4 |
0 |
0 |
cmd_filter_0_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
389149085 |
6892 |
0 |
0 |
T98 |
68302 |
1007 |
0 |
0 |
T117 |
34085 |
888 |
0 |
0 |
T119 |
7262 |
3 |
0 |
0 |
T120 |
8123 |
119 |
0 |
0 |
T127 |
74695 |
503 |
0 |
0 |
T128 |
10746 |
132 |
0 |
0 |
T141 |
7884 |
20 |
0 |
0 |
T147 |
39079 |
259 |
0 |
0 |
T148 |
4111 |
109 |
0 |
0 |
T149 |
36883 |
707 |
0 |
0 |
cmd_filter_1_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
389149085 |
7304 |
0 |
0 |
T98 |
68302 |
1325 |
0 |
0 |
T117 |
34085 |
608 |
0 |
0 |
T119 |
7262 |
6 |
0 |
0 |
T120 |
8123 |
151 |
0 |
0 |
T127 |
74695 |
467 |
0 |
0 |
T128 |
10746 |
286 |
0 |
0 |
T141 |
7884 |
18 |
0 |
0 |
T147 |
39079 |
267 |
0 |
0 |
T148 |
4111 |
2 |
0 |
0 |
T149 |
36883 |
929 |
0 |
0 |
cmd_filter_2_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
389149085 |
5975 |
0 |
0 |
T98 |
68302 |
984 |
0 |
0 |
T117 |
34085 |
493 |
0 |
0 |
T119 |
7262 |
97 |
0 |
0 |
T120 |
8123 |
76 |
0 |
0 |
T127 |
74695 |
555 |
0 |
0 |
T128 |
10746 |
119 |
0 |
0 |
T147 |
39079 |
247 |
0 |
0 |
T148 |
4111 |
129 |
0 |
0 |
T149 |
36883 |
648 |
0 |
0 |
T151 |
4976 |
8 |
0 |
0 |
cmd_filter_3_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
389149085 |
6724 |
0 |
0 |
T98 |
68302 |
1199 |
0 |
0 |
T117 |
34085 |
373 |
0 |
0 |
T119 |
7262 |
253 |
0 |
0 |
T120 |
8123 |
75 |
0 |
0 |
T127 |
74695 |
470 |
0 |
0 |
T128 |
10746 |
105 |
0 |
0 |
T141 |
7884 |
23 |
0 |
0 |
T147 |
39079 |
277 |
0 |
0 |
T148 |
4111 |
6 |
0 |
0 |
T149 |
36883 |
739 |
0 |
0 |
cmd_filter_4_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
389149085 |
6924 |
0 |
0 |
T98 |
68302 |
1184 |
0 |
0 |
T106 |
18350 |
1 |
0 |
0 |
T117 |
34085 |
885 |
0 |
0 |
T119 |
7262 |
236 |
0 |
0 |
T120 |
8123 |
62 |
0 |
0 |
T127 |
74695 |
532 |
0 |
0 |
T128 |
10746 |
271 |
0 |
0 |
T141 |
7884 |
15 |
0 |
0 |
T147 |
39079 |
231 |
0 |
0 |
T148 |
4111 |
131 |
0 |
0 |
cmd_filter_5_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
389149085 |
6161 |
0 |
0 |
T98 |
68302 |
889 |
0 |
0 |
T117 |
34085 |
756 |
0 |
0 |
T119 |
7262 |
168 |
0 |
0 |
T120 |
8123 |
133 |
0 |
0 |
T127 |
74695 |
489 |
0 |
0 |
T128 |
10746 |
105 |
0 |
0 |
T141 |
7884 |
37 |
0 |
0 |
T147 |
39079 |
251 |
0 |
0 |
T148 |
4111 |
6 |
0 |
0 |
T149 |
36883 |
655 |
0 |
0 |
cmd_filter_6_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
389149085 |
6280 |
0 |
0 |
T98 |
68302 |
1300 |
0 |
0 |
T117 |
34085 |
555 |
0 |
0 |
T119 |
7262 |
17 |
0 |
0 |
T120 |
8123 |
78 |
0 |
0 |
T127 |
74695 |
505 |
0 |
0 |
T128 |
10746 |
17 |
0 |
0 |
T141 |
7884 |
54 |
0 |
0 |
T147 |
39079 |
268 |
0 |
0 |
T148 |
4111 |
133 |
0 |
0 |
T149 |
36883 |
722 |
0 |
0 |
cmd_filter_7_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
389149085 |
5838 |
0 |
0 |
T98 |
68302 |
967 |
0 |
0 |
T117 |
34085 |
815 |
0 |
0 |
T119 |
7262 |
7 |
0 |
0 |
T120 |
8123 |
110 |
0 |
0 |
T127 |
74695 |
491 |
0 |
0 |
T128 |
10746 |
9 |
0 |
0 |
T141 |
7884 |
36 |
0 |
0 |
T147 |
39079 |
292 |
0 |
0 |
T149 |
36883 |
528 |
0 |
0 |
T151 |
4976 |
1 |
0 |
0 |
cmd_info_0_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
389149085 |
3599 |
0 |
0 |
T98 |
68302 |
508 |
0 |
0 |
T117 |
34085 |
293 |
0 |
0 |
T119 |
7262 |
55 |
0 |
0 |
T120 |
8123 |
58 |
0 |
0 |
T127 |
74695 |
502 |
0 |
0 |
T128 |
10746 |
8 |
0 |
0 |
T141 |
7884 |
39 |
0 |
0 |
T147 |
39079 |
307 |
0 |
0 |
T148 |
4111 |
50 |
0 |
0 |
T149 |
36883 |
221 |
0 |
0 |
cmd_info_10_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
389149085 |
3305 |
0 |
0 |
T98 |
68302 |
373 |
0 |
0 |
T117 |
34085 |
252 |
0 |
0 |
T119 |
7262 |
90 |
0 |
0 |
T120 |
8123 |
59 |
0 |
0 |
T127 |
74695 |
541 |
0 |
0 |
T128 |
10746 |
83 |
0 |
0 |
T141 |
7884 |
7 |
0 |
0 |
T147 |
39079 |
254 |
0 |
0 |
T149 |
36883 |
274 |
0 |
0 |
T150 |
6605 |
55 |
0 |
0 |
cmd_info_11_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
389149085 |
3504 |
0 |
0 |
T98 |
68302 |
545 |
0 |
0 |
T117 |
34085 |
250 |
0 |
0 |
T119 |
7262 |
52 |
0 |
0 |
T120 |
8123 |
18 |
0 |
0 |
T127 |
74695 |
485 |
0 |
0 |
T128 |
10746 |
99 |
0 |
0 |
T141 |
7884 |
18 |
0 |
0 |
T147 |
39079 |
283 |
0 |
0 |
T148 |
4111 |
78 |
0 |
0 |
T149 |
36883 |
389 |
0 |
0 |
cmd_info_12_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
389149085 |
3604 |
0 |
0 |
T98 |
68302 |
633 |
0 |
0 |
T117 |
34085 |
188 |
0 |
0 |
T119 |
7262 |
70 |
0 |
0 |
T120 |
8123 |
44 |
0 |
0 |
T127 |
74695 |
509 |
0 |
0 |
T128 |
10746 |
153 |
0 |
0 |
T141 |
7884 |
49 |
0 |
0 |
T147 |
39079 |
258 |
0 |
0 |
T148 |
4111 |
7 |
0 |
0 |
T149 |
36883 |
216 |
0 |
0 |
cmd_info_13_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
389149085 |
3733 |
0 |
0 |
T98 |
68302 |
635 |
0 |
0 |
T117 |
34085 |
239 |
0 |
0 |
T119 |
7262 |
44 |
0 |
0 |
T120 |
8123 |
31 |
0 |
0 |
T127 |
74695 |
545 |
0 |
0 |
T128 |
10746 |
119 |
0 |
0 |
T141 |
7884 |
3 |
0 |
0 |
T147 |
39079 |
248 |
0 |
0 |
T148 |
4111 |
47 |
0 |
0 |
T149 |
36883 |
242 |
0 |
0 |
cmd_info_14_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
389149085 |
3541 |
0 |
0 |
T81 |
2961 |
7 |
0 |
0 |
T98 |
68302 |
504 |
0 |
0 |
T117 |
34085 |
310 |
0 |
0 |
T119 |
7262 |
97 |
0 |
0 |
T120 |
8123 |
50 |
0 |
0 |
T127 |
74695 |
456 |
0 |
0 |
T128 |
10746 |
108 |
0 |
0 |
T141 |
7884 |
12 |
0 |
0 |
T147 |
39079 |
287 |
0 |
0 |
T149 |
36883 |
268 |
0 |
0 |
cmd_info_15_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
389149085 |
3359 |
0 |
0 |
T98 |
68302 |
401 |
0 |
0 |
T117 |
34085 |
358 |
0 |
0 |
T119 |
7262 |
54 |
0 |
0 |
T120 |
8123 |
48 |
0 |
0 |
T127 |
74695 |
507 |
0 |
0 |
T128 |
10746 |
104 |
0 |
0 |
T141 |
7884 |
39 |
0 |
0 |
T147 |
39079 |
269 |
0 |
0 |
T148 |
4111 |
66 |
0 |
0 |
T149 |
36883 |
222 |
0 |
0 |
cmd_info_16_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
389149085 |
3879 |
0 |
0 |
T98 |
68302 |
565 |
0 |
0 |
T117 |
34085 |
396 |
0 |
0 |
T119 |
7262 |
42 |
0 |
0 |
T120 |
8123 |
19 |
0 |
0 |
T127 |
74695 |
504 |
0 |
0 |
T128 |
10746 |
94 |
0 |
0 |
T141 |
7884 |
33 |
0 |
0 |
T147 |
39079 |
295 |
0 |
0 |
T148 |
4111 |
9 |
0 |
0 |
T149 |
36883 |
249 |
0 |
0 |
cmd_info_17_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
389149085 |
3445 |
0 |
0 |
T98 |
68302 |
557 |
0 |
0 |
T109 |
12949 |
8 |
0 |
0 |
T117 |
34085 |
145 |
0 |
0 |
T119 |
7262 |
44 |
0 |
0 |
T120 |
8123 |
6 |
0 |
0 |
T127 |
74695 |
508 |
0 |
0 |
T128 |
10746 |
45 |
0 |
0 |
T141 |
7884 |
4 |
0 |
0 |
T147 |
39079 |
256 |
0 |
0 |
T148 |
4111 |
2 |
0 |
0 |
cmd_info_18_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
389149085 |
3672 |
0 |
0 |
T98 |
68302 |
490 |
0 |
0 |
T117 |
34085 |
230 |
0 |
0 |
T119 |
7262 |
49 |
0 |
0 |
T120 |
8123 |
56 |
0 |
0 |
T127 |
74695 |
566 |
0 |
0 |
T128 |
10746 |
81 |
0 |
0 |
T141 |
7884 |
29 |
0 |
0 |
T147 |
39079 |
225 |
0 |
0 |
T148 |
4111 |
42 |
0 |
0 |
T149 |
36883 |
263 |
0 |
0 |
cmd_info_19_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
389149085 |
3672 |
0 |
0 |
T98 |
68302 |
584 |
0 |
0 |
T117 |
34085 |
253 |
0 |
0 |
T119 |
7262 |
45 |
0 |
0 |
T120 |
8123 |
61 |
0 |
0 |
T127 |
74695 |
531 |
0 |
0 |
T128 |
10746 |
100 |
0 |
0 |
T141 |
7884 |
13 |
0 |
0 |
T147 |
39079 |
288 |
0 |
0 |
T148 |
4111 |
68 |
0 |
0 |
T149 |
36883 |
320 |
0 |
0 |
cmd_info_1_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
389149085 |
4081 |
0 |
0 |
T98 |
68302 |
702 |
0 |
0 |
T117 |
34085 |
291 |
0 |
0 |
T119 |
7262 |
45 |
0 |
0 |
T120 |
8123 |
26 |
0 |
0 |
T127 |
74695 |
591 |
0 |
0 |
T128 |
10746 |
116 |
0 |
0 |
T141 |
7884 |
43 |
0 |
0 |
T147 |
39079 |
292 |
0 |
0 |
T148 |
4111 |
50 |
0 |
0 |
T149 |
36883 |
310 |
0 |
0 |
cmd_info_20_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
389149085 |
3948 |
0 |
0 |
T98 |
68302 |
481 |
0 |
0 |
T117 |
34085 |
327 |
0 |
0 |
T119 |
7262 |
8 |
0 |
0 |
T120 |
8123 |
47 |
0 |
0 |
T127 |
74695 |
476 |
0 |
0 |
T128 |
10746 |
94 |
0 |
0 |
T141 |
7884 |
34 |
0 |
0 |
T147 |
39079 |
262 |
0 |
0 |
T148 |
4111 |
7 |
0 |
0 |
T149 |
36883 |
258 |
0 |
0 |
cmd_info_21_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
389149085 |
3483 |
0 |
0 |
T98 |
68302 |
333 |
0 |
0 |
T117 |
34085 |
238 |
0 |
0 |
T119 |
7262 |
96 |
0 |
0 |
T120 |
8123 |
37 |
0 |
0 |
T127 |
74695 |
491 |
0 |
0 |
T128 |
10746 |
175 |
0 |
0 |
T141 |
7884 |
20 |
0 |
0 |
T147 |
39079 |
280 |
0 |
0 |
T148 |
4111 |
61 |
0 |
0 |
T149 |
36883 |
290 |
0 |
0 |
cmd_info_22_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
389149085 |
3428 |
0 |
0 |
T98 |
68302 |
444 |
0 |
0 |
T106 |
18350 |
1 |
0 |
0 |
T117 |
34085 |
356 |
0 |
0 |
T119 |
7262 |
60 |
0 |
0 |
T120 |
8123 |
29 |
0 |
0 |
T127 |
74695 |
474 |
0 |
0 |
T128 |
10746 |
70 |
0 |
0 |
T141 |
7884 |
42 |
0 |
0 |
T147 |
39079 |
255 |
0 |
0 |
T148 |
4111 |
5 |
0 |
0 |
cmd_info_23_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
389149085 |
3478 |
0 |
0 |
T98 |
68302 |
520 |
0 |
0 |
T117 |
34085 |
224 |
0 |
0 |
T119 |
7262 |
58 |
0 |
0 |
T120 |
8123 |
33 |
0 |
0 |
T127 |
74695 |
493 |
0 |
0 |
T128 |
10746 |
60 |
0 |
0 |
T141 |
7884 |
12 |
0 |
0 |
T147 |
39079 |
254 |
0 |
0 |
T148 |
4111 |
4 |
0 |
0 |
T149 |
36883 |
270 |
0 |
0 |
cmd_info_2_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
389149085 |
3914 |
0 |
0 |
T98 |
68302 |
678 |
0 |
0 |
T117 |
34085 |
243 |
0 |
0 |
T119 |
7262 |
12 |
0 |
0 |
T120 |
8123 |
41 |
0 |
0 |
T127 |
74695 |
506 |
0 |
0 |
T128 |
10746 |
132 |
0 |
0 |
T141 |
7884 |
14 |
0 |
0 |
T147 |
39079 |
265 |
0 |
0 |
T148 |
4111 |
6 |
0 |
0 |
T149 |
36883 |
186 |
0 |
0 |
cmd_info_3_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
389149085 |
3699 |
0 |
0 |
T98 |
68302 |
350 |
0 |
0 |
T117 |
34085 |
463 |
0 |
0 |
T119 |
7262 |
59 |
0 |
0 |
T120 |
8123 |
26 |
0 |
0 |
T127 |
74695 |
510 |
0 |
0 |
T128 |
10746 |
108 |
0 |
0 |
T141 |
7884 |
20 |
0 |
0 |
T147 |
39079 |
286 |
0 |
0 |
T148 |
4111 |
49 |
0 |
0 |
T149 |
36883 |
341 |
0 |
0 |
cmd_info_4_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
389149085 |
3369 |
0 |
0 |
T98 |
68302 |
563 |
0 |
0 |
T117 |
34085 |
257 |
0 |
0 |
T119 |
7262 |
47 |
0 |
0 |
T120 |
8123 |
10 |
0 |
0 |
T127 |
74695 |
403 |
0 |
0 |
T128 |
10746 |
81 |
0 |
0 |
T141 |
7884 |
33 |
0 |
0 |
T147 |
39079 |
272 |
0 |
0 |
T148 |
4111 |
57 |
0 |
0 |
T149 |
36883 |
204 |
0 |
0 |
cmd_info_5_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
389149085 |
3457 |
0 |
0 |
T98 |
68302 |
389 |
0 |
0 |
T117 |
34085 |
368 |
0 |
0 |
T119 |
7262 |
4 |
0 |
0 |
T120 |
8123 |
10 |
0 |
0 |
T127 |
74695 |
532 |
0 |
0 |
T128 |
10746 |
172 |
0 |
0 |
T141 |
7884 |
40 |
0 |
0 |
T147 |
39079 |
244 |
0 |
0 |
T148 |
4111 |
69 |
0 |
0 |
T149 |
36883 |
270 |
0 |
0 |
cmd_info_6_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
389149085 |
3263 |
0 |
0 |
T98 |
68302 |
481 |
0 |
0 |
T117 |
34085 |
229 |
0 |
0 |
T119 |
7262 |
43 |
0 |
0 |
T120 |
8123 |
38 |
0 |
0 |
T127 |
74695 |
531 |
0 |
0 |
T128 |
10746 |
99 |
0 |
0 |
T141 |
7884 |
8 |
0 |
0 |
T147 |
39079 |
272 |
0 |
0 |
T148 |
4111 |
3 |
0 |
0 |
T149 |
36883 |
55 |
0 |
0 |
cmd_info_7_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
389149085 |
3605 |
0 |
0 |
T98 |
68302 |
579 |
0 |
0 |
T117 |
34085 |
160 |
0 |
0 |
T119 |
7262 |
65 |
0 |
0 |
T120 |
8123 |
38 |
0 |
0 |
T127 |
74695 |
526 |
0 |
0 |
T128 |
10746 |
132 |
0 |
0 |
T141 |
7884 |
13 |
0 |
0 |
T147 |
39079 |
235 |
0 |
0 |
T148 |
4111 |
64 |
0 |
0 |
T149 |
36883 |
366 |
0 |
0 |
cmd_info_8_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
389149085 |
3082 |
0 |
0 |
T98 |
68302 |
368 |
0 |
0 |
T117 |
34085 |
221 |
0 |
0 |
T119 |
7262 |
37 |
0 |
0 |
T120 |
8123 |
45 |
0 |
0 |
T127 |
74695 |
489 |
0 |
0 |
T128 |
10746 |
126 |
0 |
0 |
T141 |
7884 |
12 |
0 |
0 |
T147 |
39079 |
275 |
0 |
0 |
T148 |
4111 |
1 |
0 |
0 |
T149 |
36883 |
226 |
0 |
0 |
cmd_info_9_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
389149085 |
3490 |
0 |
0 |
T98 |
68302 |
693 |
0 |
0 |
T117 |
34085 |
149 |
0 |
0 |
T119 |
7262 |
2 |
0 |
0 |
T120 |
8123 |
19 |
0 |
0 |
T127 |
74695 |
492 |
0 |
0 |
T128 |
10746 |
58 |
0 |
0 |
T141 |
7884 |
14 |
0 |
0 |
T147 |
39079 |
291 |
0 |
0 |
T148 |
4111 |
8 |
0 |
0 |
T149 |
36883 |
210 |
0 |
0 |
cmd_info_en4b_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
389149085 |
1685 |
0 |
0 |
T98 |
68302 |
126 |
0 |
0 |
T117 |
34085 |
62 |
0 |
0 |
T119 |
7262 |
2 |
0 |
0 |
T120 |
8123 |
8 |
0 |
0 |
T127 |
74695 |
464 |
0 |
0 |
T128 |
10746 |
8 |
0 |
0 |
T147 |
39079 |
275 |
0 |
0 |
T148 |
4111 |
5 |
0 |
0 |
T149 |
36883 |
64 |
0 |
0 |
T151 |
4976 |
7 |
0 |
0 |
cmd_info_ex4b_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
389149085 |
1711 |
0 |
0 |
T98 |
68302 |
107 |
0 |
0 |
T117 |
34085 |
39 |
0 |
0 |
T119 |
7262 |
22 |
0 |
0 |
T120 |
8123 |
5 |
0 |
0 |
T127 |
74695 |
488 |
0 |
0 |
T128 |
10746 |
20 |
0 |
0 |
T141 |
7884 |
30 |
0 |
0 |
T147 |
39079 |
202 |
0 |
0 |
T148 |
4111 |
8 |
0 |
0 |
T149 |
36883 |
65 |
0 |
0 |
cmd_info_wrdi_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
389149085 |
1833 |
0 |
0 |
T98 |
68302 |
85 |
0 |
0 |
T117 |
34085 |
51 |
0 |
0 |
T119 |
7262 |
20 |
0 |
0 |
T120 |
8123 |
9 |
0 |
0 |
T127 |
74695 |
558 |
0 |
0 |
T128 |
10746 |
26 |
0 |
0 |
T141 |
7884 |
41 |
0 |
0 |
T147 |
39079 |
286 |
0 |
0 |
T148 |
4111 |
1 |
0 |
0 |
T149 |
36883 |
49 |
0 |
0 |
cmd_info_wren_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
389149085 |
1716 |
0 |
0 |
T81 |
2961 |
6 |
0 |
0 |
T98 |
68302 |
107 |
0 |
0 |
T117 |
34085 |
53 |
0 |
0 |
T119 |
7262 |
12 |
0 |
0 |
T120 |
8123 |
6 |
0 |
0 |
T127 |
74695 |
468 |
0 |
0 |
T128 |
10746 |
20 |
0 |
0 |
T147 |
39079 |
290 |
0 |
0 |
T148 |
4111 |
3 |
0 |
0 |
T149 |
36883 |
48 |
0 |
0 |
intercept_en_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
389149085 |
2109 |
0 |
0 |
T98 |
68302 |
225 |
0 |
0 |
T117 |
34085 |
80 |
0 |
0 |
T119 |
7262 |
25 |
0 |
0 |
T120 |
8123 |
15 |
0 |
0 |
T127 |
74695 |
514 |
0 |
0 |
T128 |
10746 |
40 |
0 |
0 |
T141 |
7884 |
35 |
0 |
0 |
T147 |
39079 |
231 |
0 |
0 |
T148 |
4111 |
6 |
0 |
0 |
T149 |
36883 |
82 |
0 |
0 |
intr_enable_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
389149085 |
3310 |
0 |
0 |
T65 |
4834 |
7 |
0 |
0 |
T133 |
228972 |
0 |
0 |
0 |
T134 |
795779 |
0 |
0 |
0 |
T135 |
13604 |
0 |
0 |
0 |
T136 |
503086 |
0 |
0 |
0 |
T137 |
303396 |
0 |
0 |
0 |
T138 |
950 |
0 |
0 |
0 |
T139 |
873 |
0 |
0 |
0 |
T152 |
0 |
8 |
0 |
0 |
T153 |
0 |
17 |
0 |
0 |
T154 |
0 |
22 |
0 |
0 |
T155 |
0 |
31 |
0 |
0 |
T156 |
0 |
7 |
0 |
0 |
T157 |
0 |
6 |
0 |
0 |
T158 |
0 |
17 |
0 |
0 |
T159 |
0 |
36 |
0 |
0 |
T160 |
0 |
30 |
0 |
0 |
T161 |
32698 |
0 |
0 |
0 |
T162 |
69941 |
0 |
0 |
0 |
jedec_cc_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
389149085 |
1743 |
0 |
0 |
T98 |
68302 |
104 |
0 |
0 |
T117 |
34085 |
71 |
0 |
0 |
T119 |
7262 |
9 |
0 |
0 |
T120 |
8123 |
1 |
0 |
0 |
T127 |
74695 |
486 |
0 |
0 |
T128 |
10746 |
9 |
0 |
0 |
T141 |
7884 |
26 |
0 |
0 |
T147 |
39079 |
274 |
0 |
0 |
T148 |
4111 |
10 |
0 |
0 |
T149 |
36883 |
60 |
0 |
0 |
jedec_id_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
389149085 |
1791 |
0 |
0 |
T98 |
68302 |
96 |
0 |
0 |
T117 |
34085 |
73 |
0 |
0 |
T119 |
7262 |
14 |
0 |
0 |
T120 |
8123 |
2 |
0 |
0 |
T127 |
74695 |
502 |
0 |
0 |
T128 |
10746 |
12 |
0 |
0 |
T141 |
7884 |
42 |
0 |
0 |
T147 |
39079 |
311 |
0 |
0 |
T148 |
4111 |
1 |
0 |
0 |
T149 |
36883 |
50 |
0 |
0 |
mailbox_addr_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
389149085 |
1547 |
0 |
0 |
T98 |
68302 |
94 |
0 |
0 |
T117 |
34085 |
33 |
0 |
0 |
T119 |
7262 |
11 |
0 |
0 |
T120 |
8123 |
5 |
0 |
0 |
T127 |
74695 |
511 |
0 |
0 |
T128 |
10746 |
11 |
0 |
0 |
T141 |
7884 |
3 |
0 |
0 |
T147 |
39079 |
255 |
0 |
0 |
T148 |
4111 |
5 |
0 |
0 |
T149 |
36883 |
26 |
0 |
0 |
payload_swap_data_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
389149085 |
1628 |
0 |
0 |
T98 |
68302 |
86 |
0 |
0 |
T117 |
34085 |
46 |
0 |
0 |
T119 |
7262 |
8 |
0 |
0 |
T120 |
8123 |
1 |
0 |
0 |
T127 |
74695 |
463 |
0 |
0 |
T128 |
10746 |
2 |
0 |
0 |
T141 |
7884 |
22 |
0 |
0 |
T147 |
39079 |
302 |
0 |
0 |
T148 |
4111 |
8 |
0 |
0 |
T149 |
36883 |
30 |
0 |
0 |
payload_swap_mask_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
389149085 |
1624 |
0 |
0 |
T98 |
68302 |
72 |
0 |
0 |
T117 |
34085 |
45 |
0 |
0 |
T119 |
7262 |
8 |
0 |
0 |
T120 |
8123 |
7 |
0 |
0 |
T127 |
74695 |
512 |
0 |
0 |
T128 |
10746 |
21 |
0 |
0 |
T141 |
7884 |
22 |
0 |
0 |
T147 |
39079 |
296 |
0 |
0 |
T148 |
4111 |
6 |
0 |
0 |
T149 |
36883 |
38 |
0 |
0 |
read_threshold_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
389149085 |
1569 |
0 |
0 |
T81 |
2961 |
15 |
0 |
0 |
T98 |
68302 |
56 |
0 |
0 |
T117 |
34085 |
38 |
0 |
0 |
T119 |
7262 |
3 |
0 |
0 |
T120 |
8123 |
3 |
0 |
0 |
T127 |
74695 |
515 |
0 |
0 |
T128 |
10746 |
17 |
0 |
0 |
T141 |
7884 |
34 |
0 |
0 |
T147 |
39079 |
293 |
0 |
0 |
T149 |
36883 |
29 |
0 |
0 |
tpm_access_0_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
389149085 |
1934 |
0 |
0 |
T98 |
68302 |
182 |
0 |
0 |
T109 |
12949 |
8 |
0 |
0 |
T117 |
34085 |
104 |
0 |
0 |
T119 |
7262 |
12 |
0 |
0 |
T120 |
8123 |
21 |
0 |
0 |
T127 |
74695 |
478 |
0 |
0 |
T128 |
10746 |
25 |
0 |
0 |
T141 |
7884 |
20 |
0 |
0 |
T147 |
39079 |
241 |
0 |
0 |
T148 |
4111 |
17 |
0 |
0 |
tpm_access_1_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
389149085 |
1485 |
0 |
0 |
T98 |
68302 |
73 |
0 |
0 |
T117 |
34085 |
28 |
0 |
0 |
T119 |
7262 |
11 |
0 |
0 |
T120 |
8123 |
7 |
0 |
0 |
T127 |
74695 |
491 |
0 |
0 |
T128 |
10746 |
5 |
0 |
0 |
T141 |
7884 |
13 |
0 |
0 |
T147 |
39079 |
283 |
0 |
0 |
T148 |
4111 |
6 |
0 |
0 |
T149 |
36883 |
20 |
0 |
0 |
tpm_cfg_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
389149085 |
2280 |
0 |
0 |
T98 |
68302 |
286 |
0 |
0 |
T117 |
34085 |
128 |
0 |
0 |
T119 |
7262 |
26 |
0 |
0 |
T120 |
8123 |
3 |
0 |
0 |
T127 |
74695 |
455 |
0 |
0 |
T128 |
10746 |
29 |
0 |
0 |
T147 |
39079 |
275 |
0 |
0 |
T148 |
4111 |
3 |
0 |
0 |
T149 |
36883 |
100 |
0 |
0 |
T150 |
6605 |
7 |
0 |
0 |
tpm_did_vid_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
389149085 |
1780 |
0 |
0 |
T98 |
68302 |
110 |
0 |
0 |
T117 |
34085 |
44 |
0 |
0 |
T119 |
7262 |
7 |
0 |
0 |
T120 |
8123 |
4 |
0 |
0 |
T127 |
74695 |
481 |
0 |
0 |
T128 |
10746 |
11 |
0 |
0 |
T141 |
7884 |
66 |
0 |
0 |
T147 |
39079 |
235 |
0 |
0 |
T148 |
4111 |
10 |
0 |
0 |
T149 |
36883 |
48 |
0 |
0 |
tpm_int_enable_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
389149085 |
1449 |
0 |
0 |
T98 |
68302 |
81 |
0 |
0 |
T117 |
34085 |
37 |
0 |
0 |
T119 |
7262 |
13 |
0 |
0 |
T120 |
8123 |
11 |
0 |
0 |
T127 |
74695 |
454 |
0 |
0 |
T128 |
10746 |
20 |
0 |
0 |
T141 |
7884 |
22 |
0 |
0 |
T147 |
39079 |
251 |
0 |
0 |
T148 |
4111 |
5 |
0 |
0 |
T149 |
36883 |
51 |
0 |
0 |
tpm_int_status_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
389149085 |
1588 |
0 |
0 |
T98 |
68302 |
95 |
0 |
0 |
T117 |
34085 |
10 |
0 |
0 |
T119 |
7262 |
6 |
0 |
0 |
T120 |
8123 |
2 |
0 |
0 |
T127 |
74695 |
507 |
0 |
0 |
T128 |
10746 |
9 |
0 |
0 |
T141 |
7884 |
15 |
0 |
0 |
T147 |
39079 |
242 |
0 |
0 |
T148 |
4111 |
8 |
0 |
0 |
T149 |
36883 |
55 |
0 |
0 |
tpm_int_vector_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
389149085 |
1609 |
0 |
0 |
T98 |
68302 |
57 |
0 |
0 |
T117 |
34085 |
33 |
0 |
0 |
T119 |
7262 |
10 |
0 |
0 |
T120 |
8123 |
12 |
0 |
0 |
T127 |
74695 |
483 |
0 |
0 |
T128 |
10746 |
15 |
0 |
0 |
T141 |
7884 |
27 |
0 |
0 |
T147 |
39079 |
264 |
0 |
0 |
T148 |
4111 |
9 |
0 |
0 |
T149 |
36883 |
32 |
0 |
0 |
tpm_intf_capability_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
389149085 |
1610 |
0 |
0 |
T98 |
68302 |
77 |
0 |
0 |
T117 |
34085 |
47 |
0 |
0 |
T119 |
7262 |
1 |
0 |
0 |
T120 |
8123 |
12 |
0 |
0 |
T127 |
74695 |
471 |
0 |
0 |
T128 |
10746 |
7 |
0 |
0 |
T141 |
7884 |
16 |
0 |
0 |
T147 |
39079 |
280 |
0 |
0 |
T148 |
4111 |
2 |
0 |
0 |
T149 |
36883 |
50 |
0 |
0 |
tpm_rid_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
389149085 |
1529 |
0 |
0 |
T98 |
68302 |
63 |
0 |
0 |
T117 |
34085 |
45 |
0 |
0 |
T119 |
7262 |
8 |
0 |
0 |
T120 |
8123 |
7 |
0 |
0 |
T127 |
74695 |
477 |
0 |
0 |
T128 |
10746 |
12 |
0 |
0 |
T141 |
7884 |
36 |
0 |
0 |
T147 |
39079 |
259 |
0 |
0 |
T148 |
4111 |
4 |
0 |
0 |
T149 |
36883 |
28 |
0 |
0 |
tpm_sts_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
389149085 |
1539 |
0 |
0 |
T98 |
68302 |
97 |
0 |
0 |
T117 |
34085 |
33 |
0 |
0 |
T119 |
7262 |
5 |
0 |
0 |
T120 |
8123 |
5 |
0 |
0 |
T127 |
74695 |
524 |
0 |
0 |
T128 |
10746 |
7 |
0 |
0 |
T141 |
7884 |
18 |
0 |
0 |
T147 |
39079 |
275 |
0 |
0 |
T148 |
4111 |
7 |
0 |
0 |
T149 |
36883 |
23 |
0 |
0 |