Assert Coverage for Module :
spi_device_csr_assert_fpv
Assertion Details
TlulOOBAddrErr_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
375573454 |
3763 |
0 |
0 |
T96 |
55849 |
3 |
0 |
0 |
T97 |
5132 |
67 |
0 |
0 |
T98 |
19740 |
1 |
0 |
0 |
T99 |
10626 |
183 |
0 |
0 |
T100 |
2671 |
1 |
0 |
0 |
T102 |
13596 |
222 |
0 |
0 |
T103 |
64451 |
3 |
0 |
0 |
T110 |
10667 |
196 |
0 |
0 |
T116 |
14672 |
2 |
0 |
0 |
T117 |
4144 |
13 |
0 |
0 |
addr_swap_data_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
375573454 |
3517 |
0 |
0 |
T86 |
4112 |
14 |
0 |
0 |
T103 |
64451 |
65 |
0 |
0 |
T116 |
14672 |
13 |
0 |
0 |
T121 |
3149 |
3 |
0 |
0 |
T122 |
6420 |
6 |
0 |
0 |
T127 |
269334 |
681 |
0 |
0 |
T129 |
8523 |
10 |
0 |
0 |
T149 |
96926 |
133 |
0 |
0 |
T150 |
5440 |
9 |
0 |
0 |
T151 |
20276 |
58 |
0 |
0 |
addr_swap_mask_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
375573454 |
3493 |
0 |
0 |
T86 |
4112 |
14 |
0 |
0 |
T103 |
64451 |
72 |
0 |
0 |
T116 |
14672 |
24 |
0 |
0 |
T121 |
3149 |
6 |
0 |
0 |
T122 |
6420 |
6 |
0 |
0 |
T127 |
269334 |
670 |
0 |
0 |
T129 |
8523 |
8 |
0 |
0 |
T149 |
96926 |
137 |
0 |
0 |
T150 |
5440 |
8 |
0 |
0 |
T151 |
20276 |
68 |
0 |
0 |
cfg_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
375573454 |
4423 |
0 |
0 |
T86 |
4112 |
5 |
0 |
0 |
T103 |
64451 |
169 |
0 |
0 |
T116 |
14672 |
16 |
0 |
0 |
T122 |
6420 |
5 |
0 |
0 |
T127 |
269334 |
720 |
0 |
0 |
T129 |
8523 |
9 |
0 |
0 |
T130 |
107435 |
377 |
0 |
0 |
T149 |
96926 |
251 |
0 |
0 |
T150 |
5440 |
2 |
0 |
0 |
T151 |
20276 |
104 |
0 |
0 |
cmd_filter_0_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
375573454 |
15502 |
0 |
0 |
T86 |
4112 |
19 |
0 |
0 |
T103 |
64451 |
1559 |
0 |
0 |
T116 |
14672 |
262 |
0 |
0 |
T121 |
3149 |
49 |
0 |
0 |
T122 |
6420 |
4 |
0 |
0 |
T127 |
269334 |
669 |
0 |
0 |
T129 |
8523 |
243 |
0 |
0 |
T149 |
96926 |
1542 |
0 |
0 |
T150 |
5440 |
10 |
0 |
0 |
T151 |
20276 |
60 |
0 |
0 |
cmd_filter_1_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
375573454 |
15407 |
0 |
0 |
T86 |
4112 |
10 |
0 |
0 |
T103 |
64451 |
1599 |
0 |
0 |
T116 |
14672 |
144 |
0 |
0 |
T121 |
3149 |
50 |
0 |
0 |
T122 |
6420 |
3 |
0 |
0 |
T127 |
269334 |
714 |
0 |
0 |
T129 |
8523 |
225 |
0 |
0 |
T149 |
96926 |
1570 |
0 |
0 |
T150 |
5440 |
110 |
0 |
0 |
T151 |
20276 |
65 |
0 |
0 |
cmd_filter_2_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
375573454 |
16187 |
0 |
0 |
T86 |
4112 |
10 |
0 |
0 |
T103 |
64451 |
1010 |
0 |
0 |
T116 |
14672 |
279 |
0 |
0 |
T121 |
3149 |
3 |
0 |
0 |
T122 |
6420 |
58 |
0 |
0 |
T127 |
269334 |
682 |
0 |
0 |
T129 |
8523 |
103 |
0 |
0 |
T149 |
96926 |
1824 |
0 |
0 |
T150 |
5440 |
11 |
0 |
0 |
T151 |
20276 |
118 |
0 |
0 |
cmd_filter_3_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
375573454 |
14694 |
0 |
0 |
T86 |
4112 |
5 |
0 |
0 |
T103 |
64451 |
878 |
0 |
0 |
T116 |
14672 |
261 |
0 |
0 |
T121 |
3149 |
49 |
0 |
0 |
T122 |
6420 |
101 |
0 |
0 |
T127 |
269334 |
638 |
0 |
0 |
T129 |
8523 |
157 |
0 |
0 |
T149 |
96926 |
2121 |
0 |
0 |
T150 |
5440 |
109 |
0 |
0 |
T151 |
20276 |
41 |
0 |
0 |
cmd_filter_4_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
375573454 |
14658 |
0 |
0 |
T86 |
4112 |
5 |
0 |
0 |
T103 |
64451 |
1024 |
0 |
0 |
T116 |
14672 |
29 |
0 |
0 |
T122 |
6420 |
7 |
0 |
0 |
T127 |
269334 |
620 |
0 |
0 |
T129 |
8523 |
117 |
0 |
0 |
T130 |
107435 |
434 |
0 |
0 |
T149 |
96926 |
1665 |
0 |
0 |
T150 |
5440 |
99 |
0 |
0 |
T151 |
20276 |
47 |
0 |
0 |
cmd_filter_5_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
375573454 |
15499 |
0 |
0 |
T86 |
4112 |
9 |
0 |
0 |
T103 |
64451 |
1397 |
0 |
0 |
T116 |
14672 |
15 |
0 |
0 |
T121 |
3149 |
3 |
0 |
0 |
T122 |
6420 |
120 |
0 |
0 |
T127 |
269334 |
696 |
0 |
0 |
T129 |
8523 |
134 |
0 |
0 |
T149 |
96926 |
2227 |
0 |
0 |
T150 |
5440 |
107 |
0 |
0 |
T151 |
20276 |
37 |
0 |
0 |
cmd_filter_6_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
375573454 |
15892 |
0 |
0 |
T86 |
4112 |
4 |
0 |
0 |
T103 |
64451 |
1293 |
0 |
0 |
T116 |
14672 |
136 |
0 |
0 |
T121 |
3149 |
2 |
0 |
0 |
T122 |
6420 |
129 |
0 |
0 |
T127 |
269334 |
683 |
0 |
0 |
T129 |
8523 |
119 |
0 |
0 |
T149 |
96926 |
1610 |
0 |
0 |
T150 |
5440 |
8 |
0 |
0 |
T151 |
20276 |
72 |
0 |
0 |
cmd_filter_7_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
375573454 |
14544 |
0 |
0 |
T86 |
4112 |
9 |
0 |
0 |
T103 |
64451 |
575 |
0 |
0 |
T116 |
14672 |
310 |
0 |
0 |
T121 |
3149 |
2 |
0 |
0 |
T122 |
6420 |
2 |
0 |
0 |
T127 |
269334 |
670 |
0 |
0 |
T129 |
8523 |
103 |
0 |
0 |
T149 |
96926 |
1224 |
0 |
0 |
T150 |
5440 |
5 |
0 |
0 |
T151 |
20276 |
81 |
0 |
0 |
cmd_info_0_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
375573454 |
8648 |
0 |
0 |
T86 |
4112 |
6 |
0 |
0 |
T103 |
64451 |
624 |
0 |
0 |
T116 |
14672 |
72 |
0 |
0 |
T122 |
6420 |
52 |
0 |
0 |
T127 |
269334 |
685 |
0 |
0 |
T129 |
8523 |
10 |
0 |
0 |
T130 |
107435 |
384 |
0 |
0 |
T149 |
96926 |
851 |
0 |
0 |
T150 |
5440 |
40 |
0 |
0 |
T151 |
20276 |
56 |
0 |
0 |
cmd_info_10_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
375573454 |
8044 |
0 |
0 |
T86 |
4112 |
15 |
0 |
0 |
T103 |
64451 |
507 |
0 |
0 |
T116 |
14672 |
65 |
0 |
0 |
T121 |
3149 |
19 |
0 |
0 |
T122 |
6420 |
28 |
0 |
0 |
T127 |
269334 |
671 |
0 |
0 |
T129 |
8523 |
77 |
0 |
0 |
T149 |
96926 |
700 |
0 |
0 |
T150 |
5440 |
47 |
0 |
0 |
T151 |
20276 |
105 |
0 |
0 |
cmd_info_11_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
375573454 |
8206 |
0 |
0 |
T86 |
4112 |
10 |
0 |
0 |
T103 |
64451 |
633 |
0 |
0 |
T116 |
14672 |
21 |
0 |
0 |
T122 |
6420 |
24 |
0 |
0 |
T127 |
269334 |
658 |
0 |
0 |
T129 |
8523 |
34 |
0 |
0 |
T130 |
107435 |
431 |
0 |
0 |
T149 |
96926 |
722 |
0 |
0 |
T150 |
5440 |
7 |
0 |
0 |
T151 |
20276 |
63 |
0 |
0 |
cmd_info_12_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
375573454 |
8134 |
0 |
0 |
T86 |
4112 |
3 |
0 |
0 |
T103 |
64451 |
400 |
0 |
0 |
T104 |
12527 |
3 |
0 |
0 |
T116 |
14672 |
141 |
0 |
0 |
T122 |
6420 |
45 |
0 |
0 |
T127 |
269334 |
741 |
0 |
0 |
T129 |
8523 |
42 |
0 |
0 |
T149 |
96926 |
1048 |
0 |
0 |
T150 |
5440 |
52 |
0 |
0 |
T151 |
20276 |
53 |
0 |
0 |
cmd_info_13_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
375573454 |
8121 |
0 |
0 |
T86 |
4112 |
11 |
0 |
0 |
T103 |
64451 |
687 |
0 |
0 |
T116 |
14672 |
86 |
0 |
0 |
T121 |
3149 |
1 |
0 |
0 |
T122 |
6420 |
26 |
0 |
0 |
T127 |
269334 |
610 |
0 |
0 |
T129 |
8523 |
108 |
0 |
0 |
T149 |
96926 |
578 |
0 |
0 |
T150 |
5440 |
10 |
0 |
0 |
T151 |
20276 |
115 |
0 |
0 |
cmd_info_14_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
375573454 |
8257 |
0 |
0 |
T86 |
4112 |
20 |
0 |
0 |
T103 |
64451 |
346 |
0 |
0 |
T116 |
14672 |
53 |
0 |
0 |
T121 |
3149 |
10 |
0 |
0 |
T122 |
6420 |
73 |
0 |
0 |
T127 |
269334 |
626 |
0 |
0 |
T129 |
8523 |
116 |
0 |
0 |
T149 |
96926 |
598 |
0 |
0 |
T150 |
5440 |
14 |
0 |
0 |
T151 |
20276 |
34 |
0 |
0 |
cmd_info_15_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
375573454 |
8301 |
0 |
0 |
T86 |
4112 |
2 |
0 |
0 |
T103 |
64451 |
252 |
0 |
0 |
T116 |
14672 |
69 |
0 |
0 |
T122 |
6420 |
13 |
0 |
0 |
T127 |
269334 |
670 |
0 |
0 |
T129 |
8523 |
44 |
0 |
0 |
T130 |
107435 |
427 |
0 |
0 |
T149 |
96926 |
905 |
0 |
0 |
T150 |
5440 |
42 |
0 |
0 |
T151 |
20276 |
83 |
0 |
0 |
cmd_info_16_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
375573454 |
8079 |
0 |
0 |
T86 |
4112 |
13 |
0 |
0 |
T103 |
64451 |
622 |
0 |
0 |
T116 |
14672 |
71 |
0 |
0 |
T121 |
3149 |
7 |
0 |
0 |
T122 |
6420 |
19 |
0 |
0 |
T127 |
269334 |
709 |
0 |
0 |
T129 |
8523 |
85 |
0 |
0 |
T149 |
96926 |
818 |
0 |
0 |
T150 |
5440 |
42 |
0 |
0 |
T151 |
20276 |
51 |
0 |
0 |
cmd_info_17_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
375573454 |
7986 |
0 |
0 |
T86 |
4112 |
18 |
0 |
0 |
T103 |
64451 |
431 |
0 |
0 |
T116 |
14672 |
22 |
0 |
0 |
T122 |
6420 |
34 |
0 |
0 |
T127 |
269334 |
688 |
0 |
0 |
T129 |
8523 |
98 |
0 |
0 |
T130 |
107435 |
393 |
0 |
0 |
T149 |
96926 |
701 |
0 |
0 |
T150 |
5440 |
1 |
0 |
0 |
T151 |
20276 |
126 |
0 |
0 |
cmd_info_18_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
375573454 |
8564 |
0 |
0 |
T86 |
4112 |
6 |
0 |
0 |
T103 |
64451 |
660 |
0 |
0 |
T116 |
14672 |
131 |
0 |
0 |
T122 |
6420 |
19 |
0 |
0 |
T127 |
269334 |
628 |
0 |
0 |
T129 |
8523 |
61 |
0 |
0 |
T130 |
107435 |
411 |
0 |
0 |
T149 |
96926 |
933 |
0 |
0 |
T150 |
5440 |
37 |
0 |
0 |
T151 |
20276 |
44 |
0 |
0 |
cmd_info_19_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
375573454 |
8258 |
0 |
0 |
T86 |
4112 |
15 |
0 |
0 |
T103 |
64451 |
484 |
0 |
0 |
T116 |
14672 |
84 |
0 |
0 |
T121 |
3149 |
16 |
0 |
0 |
T122 |
6420 |
31 |
0 |
0 |
T127 |
269334 |
647 |
0 |
0 |
T129 |
8523 |
39 |
0 |
0 |
T149 |
96926 |
837 |
0 |
0 |
T150 |
5440 |
43 |
0 |
0 |
T151 |
20276 |
85 |
0 |
0 |
cmd_info_1_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
375573454 |
8205 |
0 |
0 |
T86 |
4112 |
17 |
0 |
0 |
T103 |
64451 |
431 |
0 |
0 |
T116 |
14672 |
88 |
0 |
0 |
T121 |
3149 |
18 |
0 |
0 |
T122 |
6420 |
34 |
0 |
0 |
T127 |
269334 |
696 |
0 |
0 |
T129 |
8523 |
9 |
0 |
0 |
T149 |
96926 |
738 |
0 |
0 |
T150 |
5440 |
7 |
0 |
0 |
T151 |
20276 |
44 |
0 |
0 |
cmd_info_20_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
375573454 |
8417 |
0 |
0 |
T86 |
4112 |
10 |
0 |
0 |
T103 |
64451 |
545 |
0 |
0 |
T116 |
14672 |
58 |
0 |
0 |
T121 |
3149 |
3 |
0 |
0 |
T122 |
6420 |
34 |
0 |
0 |
T127 |
269334 |
604 |
0 |
0 |
T129 |
8523 |
127 |
0 |
0 |
T149 |
96926 |
950 |
0 |
0 |
T150 |
5440 |
13 |
0 |
0 |
T151 |
20276 |
31 |
0 |
0 |
cmd_info_21_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
375573454 |
7760 |
0 |
0 |
T86 |
4112 |
14 |
0 |
0 |
T103 |
64451 |
600 |
0 |
0 |
T116 |
14672 |
71 |
0 |
0 |
T122 |
6420 |
69 |
0 |
0 |
T127 |
269334 |
650 |
0 |
0 |
T129 |
8523 |
52 |
0 |
0 |
T130 |
107435 |
362 |
0 |
0 |
T149 |
96926 |
758 |
0 |
0 |
T150 |
5440 |
55 |
0 |
0 |
T151 |
20276 |
47 |
0 |
0 |
cmd_info_22_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
375573454 |
8355 |
0 |
0 |
T86 |
4112 |
9 |
0 |
0 |
T103 |
64451 |
640 |
0 |
0 |
T116 |
14672 |
168 |
0 |
0 |
T121 |
3149 |
32 |
0 |
0 |
T122 |
6420 |
21 |
0 |
0 |
T127 |
269334 |
679 |
0 |
0 |
T129 |
8523 |
50 |
0 |
0 |
T149 |
96926 |
813 |
0 |
0 |
T150 |
5440 |
30 |
0 |
0 |
T151 |
20276 |
54 |
0 |
0 |
cmd_info_23_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
375573454 |
7998 |
0 |
0 |
T86 |
4112 |
10 |
0 |
0 |
T103 |
64451 |
312 |
0 |
0 |
T116 |
14672 |
110 |
0 |
0 |
T121 |
3149 |
3 |
0 |
0 |
T122 |
6420 |
8 |
0 |
0 |
T127 |
269334 |
667 |
0 |
0 |
T129 |
8523 |
128 |
0 |
0 |
T149 |
96926 |
1003 |
0 |
0 |
T150 |
5440 |
12 |
0 |
0 |
T151 |
20276 |
78 |
0 |
0 |
cmd_info_2_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
375573454 |
8159 |
0 |
0 |
T86 |
4112 |
10 |
0 |
0 |
T103 |
64451 |
551 |
0 |
0 |
T116 |
14672 |
47 |
0 |
0 |
T122 |
6420 |
78 |
0 |
0 |
T127 |
269334 |
710 |
0 |
0 |
T129 |
8523 |
78 |
0 |
0 |
T130 |
107435 |
366 |
0 |
0 |
T149 |
96926 |
810 |
0 |
0 |
T150 |
5440 |
48 |
0 |
0 |
T151 |
20276 |
83 |
0 |
0 |
cmd_info_3_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
375573454 |
8374 |
0 |
0 |
T86 |
4112 |
11 |
0 |
0 |
T103 |
64451 |
508 |
0 |
0 |
T116 |
14672 |
95 |
0 |
0 |
T121 |
3149 |
5 |
0 |
0 |
T122 |
6420 |
27 |
0 |
0 |
T127 |
269334 |
710 |
0 |
0 |
T129 |
8523 |
42 |
0 |
0 |
T130 |
107435 |
430 |
0 |
0 |
T149 |
96926 |
774 |
0 |
0 |
T151 |
20276 |
43 |
0 |
0 |
cmd_info_4_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
375573454 |
8173 |
0 |
0 |
T86 |
4112 |
13 |
0 |
0 |
T103 |
64451 |
377 |
0 |
0 |
T116 |
14672 |
70 |
0 |
0 |
T121 |
3149 |
39 |
0 |
0 |
T122 |
6420 |
1 |
0 |
0 |
T127 |
269334 |
604 |
0 |
0 |
T129 |
8523 |
54 |
0 |
0 |
T149 |
96926 |
701 |
0 |
0 |
T150 |
5440 |
36 |
0 |
0 |
T151 |
20276 |
68 |
0 |
0 |
cmd_info_5_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
375573454 |
8040 |
0 |
0 |
T86 |
4112 |
16 |
0 |
0 |
T103 |
64451 |
525 |
0 |
0 |
T116 |
14672 |
16 |
0 |
0 |
T121 |
3149 |
29 |
0 |
0 |
T122 |
6420 |
35 |
0 |
0 |
T127 |
269334 |
704 |
0 |
0 |
T129 |
8523 |
31 |
0 |
0 |
T149 |
96926 |
745 |
0 |
0 |
T150 |
5440 |
29 |
0 |
0 |
T151 |
20276 |
48 |
0 |
0 |
cmd_info_6_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
375573454 |
8244 |
0 |
0 |
T86 |
4112 |
9 |
0 |
0 |
T103 |
64451 |
549 |
0 |
0 |
T116 |
14672 |
99 |
0 |
0 |
T121 |
3149 |
32 |
0 |
0 |
T122 |
6420 |
12 |
0 |
0 |
T127 |
269334 |
698 |
0 |
0 |
T129 |
8523 |
48 |
0 |
0 |
T149 |
96926 |
907 |
0 |
0 |
T150 |
5440 |
53 |
0 |
0 |
T151 |
20276 |
74 |
0 |
0 |
cmd_info_7_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
375573454 |
7858 |
0 |
0 |
T86 |
4112 |
15 |
0 |
0 |
T103 |
64451 |
503 |
0 |
0 |
T116 |
14672 |
66 |
0 |
0 |
T121 |
3149 |
11 |
0 |
0 |
T122 |
6420 |
26 |
0 |
0 |
T127 |
269334 |
673 |
0 |
0 |
T129 |
8523 |
12 |
0 |
0 |
T149 |
96926 |
721 |
0 |
0 |
T150 |
5440 |
4 |
0 |
0 |
T151 |
20276 |
64 |
0 |
0 |
cmd_info_8_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
375573454 |
9014 |
0 |
0 |
T86 |
4112 |
10 |
0 |
0 |
T103 |
64451 |
517 |
0 |
0 |
T116 |
14672 |
68 |
0 |
0 |
T121 |
3149 |
30 |
0 |
0 |
T122 |
6420 |
24 |
0 |
0 |
T127 |
269334 |
605 |
0 |
0 |
T129 |
8523 |
6 |
0 |
0 |
T149 |
96926 |
949 |
0 |
0 |
T150 |
5440 |
6 |
0 |
0 |
T151 |
20276 |
81 |
0 |
0 |
cmd_info_9_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
375573454 |
8333 |
0 |
0 |
T86 |
4112 |
16 |
0 |
0 |
T103 |
64451 |
447 |
0 |
0 |
T116 |
14672 |
113 |
0 |
0 |
T122 |
6420 |
64 |
0 |
0 |
T127 |
269334 |
664 |
0 |
0 |
T129 |
8523 |
9 |
0 |
0 |
T130 |
107435 |
367 |
0 |
0 |
T149 |
96926 |
696 |
0 |
0 |
T150 |
5440 |
43 |
0 |
0 |
T151 |
20276 |
78 |
0 |
0 |
cmd_info_en4b_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
375573454 |
3858 |
0 |
0 |
T86 |
4112 |
14 |
0 |
0 |
T103 |
64451 |
96 |
0 |
0 |
T116 |
14672 |
23 |
0 |
0 |
T121 |
3149 |
9 |
0 |
0 |
T127 |
269334 |
635 |
0 |
0 |
T129 |
8523 |
13 |
0 |
0 |
T130 |
107435 |
474 |
0 |
0 |
T149 |
96926 |
177 |
0 |
0 |
T150 |
5440 |
5 |
0 |
0 |
T151 |
20276 |
47 |
0 |
0 |
cmd_info_ex4b_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
375573454 |
3867 |
0 |
0 |
T86 |
4112 |
12 |
0 |
0 |
T103 |
64451 |
133 |
0 |
0 |
T116 |
14672 |
10 |
0 |
0 |
T121 |
3149 |
3 |
0 |
0 |
T122 |
6420 |
9 |
0 |
0 |
T127 |
269334 |
656 |
0 |
0 |
T129 |
8523 |
6 |
0 |
0 |
T149 |
96926 |
155 |
0 |
0 |
T150 |
5440 |
7 |
0 |
0 |
T151 |
20276 |
33 |
0 |
0 |
cmd_info_wrdi_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
375573454 |
3882 |
0 |
0 |
T86 |
4112 |
9 |
0 |
0 |
T103 |
64451 |
121 |
0 |
0 |
T104 |
12527 |
4 |
0 |
0 |
T116 |
14672 |
45 |
0 |
0 |
T122 |
6420 |
13 |
0 |
0 |
T127 |
269334 |
685 |
0 |
0 |
T129 |
8523 |
8 |
0 |
0 |
T149 |
96926 |
161 |
0 |
0 |
T150 |
5440 |
4 |
0 |
0 |
T151 |
20276 |
106 |
0 |
0 |
cmd_info_wren_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
375573454 |
4096 |
0 |
0 |
T86 |
4112 |
13 |
0 |
0 |
T103 |
64451 |
121 |
0 |
0 |
T116 |
14672 |
19 |
0 |
0 |
T121 |
3149 |
4 |
0 |
0 |
T122 |
6420 |
9 |
0 |
0 |
T127 |
269334 |
699 |
0 |
0 |
T129 |
8523 |
11 |
0 |
0 |
T149 |
96926 |
228 |
0 |
0 |
T150 |
5440 |
2 |
0 |
0 |
T151 |
20276 |
75 |
0 |
0 |
intercept_en_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
375573454 |
4481 |
0 |
0 |
T86 |
4112 |
16 |
0 |
0 |
T103 |
64451 |
253 |
0 |
0 |
T116 |
14672 |
22 |
0 |
0 |
T122 |
6420 |
6 |
0 |
0 |
T127 |
269334 |
616 |
0 |
0 |
T129 |
8523 |
36 |
0 |
0 |
T130 |
107435 |
390 |
0 |
0 |
T149 |
96926 |
240 |
0 |
0 |
T150 |
5440 |
9 |
0 |
0 |
T151 |
20276 |
47 |
0 |
0 |
intr_enable_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
375573454 |
7213 |
0 |
0 |
T49 |
0 |
9 |
0 |
0 |
T56 |
191864 |
28 |
0 |
0 |
T57 |
1083 |
0 |
0 |
0 |
T58 |
126528 |
0 |
0 |
0 |
T67 |
620470 |
0 |
0 |
0 |
T94 |
27356 |
0 |
0 |
0 |
T140 |
0 |
18 |
0 |
0 |
T152 |
0 |
10 |
0 |
0 |
T153 |
0 |
32 |
0 |
0 |
T154 |
0 |
61 |
0 |
0 |
T155 |
0 |
20 |
0 |
0 |
T156 |
0 |
16 |
0 |
0 |
T157 |
0 |
21 |
0 |
0 |
T158 |
0 |
25 |
0 |
0 |
T159 |
27208 |
0 |
0 |
0 |
T160 |
420013 |
0 |
0 |
0 |
T161 |
38779 |
0 |
0 |
0 |
T162 |
200764 |
0 |
0 |
0 |
T163 |
71968 |
0 |
0 |
0 |
jedec_cc_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
375573454 |
3746 |
0 |
0 |
T86 |
4112 |
11 |
0 |
0 |
T103 |
64451 |
118 |
0 |
0 |
T116 |
14672 |
42 |
0 |
0 |
T121 |
3149 |
5 |
0 |
0 |
T122 |
6420 |
6 |
0 |
0 |
T127 |
269334 |
651 |
0 |
0 |
T129 |
8523 |
3 |
0 |
0 |
T149 |
96926 |
171 |
0 |
0 |
T150 |
5440 |
9 |
0 |
0 |
T151 |
20276 |
88 |
0 |
0 |
jedec_id_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
375573454 |
3860 |
0 |
0 |
T86 |
4112 |
15 |
0 |
0 |
T103 |
64451 |
125 |
0 |
0 |
T116 |
14672 |
33 |
0 |
0 |
T122 |
6420 |
14 |
0 |
0 |
T127 |
269334 |
734 |
0 |
0 |
T129 |
8523 |
9 |
0 |
0 |
T130 |
107435 |
356 |
0 |
0 |
T149 |
96926 |
135 |
0 |
0 |
T150 |
5440 |
9 |
0 |
0 |
T151 |
20276 |
42 |
0 |
0 |
mailbox_addr_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
375573454 |
3272 |
0 |
0 |
T86 |
4112 |
15 |
0 |
0 |
T103 |
64451 |
65 |
0 |
0 |
T116 |
14672 |
19 |
0 |
0 |
T122 |
6420 |
16 |
0 |
0 |
T127 |
269334 |
665 |
0 |
0 |
T129 |
8523 |
7 |
0 |
0 |
T130 |
107435 |
397 |
0 |
0 |
T149 |
96926 |
112 |
0 |
0 |
T150 |
5440 |
6 |
0 |
0 |
T151 |
20276 |
71 |
0 |
0 |
payload_swap_data_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
375573454 |
3495 |
0 |
0 |
T86 |
4112 |
4 |
0 |
0 |
T103 |
64451 |
82 |
0 |
0 |
T116 |
14672 |
16 |
0 |
0 |
T122 |
6420 |
6 |
0 |
0 |
T127 |
269334 |
662 |
0 |
0 |
T129 |
8523 |
4 |
0 |
0 |
T130 |
107435 |
373 |
0 |
0 |
T149 |
96926 |
118 |
0 |
0 |
T150 |
5440 |
2 |
0 |
0 |
T151 |
20276 |
31 |
0 |
0 |
payload_swap_mask_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
375573454 |
3571 |
0 |
0 |
T86 |
4112 |
8 |
0 |
0 |
T103 |
64451 |
64 |
0 |
0 |
T116 |
14672 |
17 |
0 |
0 |
T122 |
6420 |
1 |
0 |
0 |
T127 |
269334 |
637 |
0 |
0 |
T129 |
8523 |
10 |
0 |
0 |
T130 |
107435 |
444 |
0 |
0 |
T149 |
96926 |
134 |
0 |
0 |
T150 |
5440 |
10 |
0 |
0 |
T151 |
20276 |
96 |
0 |
0 |
read_threshold_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
375573454 |
3475 |
0 |
0 |
T86 |
4112 |
13 |
0 |
0 |
T97 |
5132 |
9 |
0 |
0 |
T103 |
64451 |
79 |
0 |
0 |
T116 |
14672 |
27 |
0 |
0 |
T122 |
6420 |
5 |
0 |
0 |
T127 |
269334 |
681 |
0 |
0 |
T129 |
8523 |
9 |
0 |
0 |
T149 |
96926 |
126 |
0 |
0 |
T150 |
5440 |
11 |
0 |
0 |
T151 |
20276 |
109 |
0 |
0 |
tpm_access_0_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
375573454 |
4656 |
0 |
0 |
T86 |
4112 |
13 |
0 |
0 |
T103 |
64451 |
172 |
0 |
0 |
T116 |
14672 |
12 |
0 |
0 |
T121 |
3149 |
2 |
0 |
0 |
T122 |
6420 |
14 |
0 |
0 |
T127 |
269334 |
690 |
0 |
0 |
T129 |
8523 |
20 |
0 |
0 |
T149 |
96926 |
335 |
0 |
0 |
T150 |
5440 |
8 |
0 |
0 |
T151 |
20276 |
57 |
0 |
0 |
tpm_access_1_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
375573454 |
3447 |
0 |
0 |
T86 |
4112 |
12 |
0 |
0 |
T103 |
64451 |
76 |
0 |
0 |
T116 |
14672 |
14 |
0 |
0 |
T121 |
3149 |
2 |
0 |
0 |
T122 |
6420 |
9 |
0 |
0 |
T127 |
269334 |
676 |
0 |
0 |
T129 |
8523 |
9 |
0 |
0 |
T130 |
107435 |
422 |
0 |
0 |
T149 |
96926 |
135 |
0 |
0 |
T151 |
20276 |
32 |
0 |
0 |
tpm_cfg_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
375573454 |
5001 |
0 |
0 |
T86 |
4112 |
18 |
0 |
0 |
T103 |
64451 |
205 |
0 |
0 |
T116 |
14672 |
21 |
0 |
0 |
T121 |
3149 |
6 |
0 |
0 |
T122 |
6420 |
27 |
0 |
0 |
T127 |
269334 |
692 |
0 |
0 |
T129 |
8523 |
37 |
0 |
0 |
T149 |
96926 |
399 |
0 |
0 |
T150 |
5440 |
3 |
0 |
0 |
T151 |
20276 |
70 |
0 |
0 |
tpm_did_vid_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
375573454 |
3888 |
0 |
0 |
T86 |
4112 |
13 |
0 |
0 |
T103 |
64451 |
124 |
0 |
0 |
T116 |
14672 |
21 |
0 |
0 |
T121 |
3149 |
1 |
0 |
0 |
T127 |
269334 |
650 |
0 |
0 |
T129 |
8523 |
5 |
0 |
0 |
T130 |
107435 |
466 |
0 |
0 |
T149 |
96926 |
143 |
0 |
0 |
T150 |
5440 |
6 |
0 |
0 |
T151 |
20276 |
67 |
0 |
0 |
tpm_int_enable_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
375573454 |
3540 |
0 |
0 |
T86 |
4112 |
8 |
0 |
0 |
T103 |
64451 |
80 |
0 |
0 |
T116 |
14672 |
13 |
0 |
0 |
T121 |
3149 |
4 |
0 |
0 |
T122 |
6420 |
7 |
0 |
0 |
T127 |
269334 |
656 |
0 |
0 |
T129 |
8523 |
6 |
0 |
0 |
T149 |
96926 |
115 |
0 |
0 |
T150 |
5440 |
2 |
0 |
0 |
T151 |
20276 |
76 |
0 |
0 |
tpm_int_status_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
375573454 |
3480 |
0 |
0 |
T86 |
4112 |
6 |
0 |
0 |
T103 |
64451 |
56 |
0 |
0 |
T116 |
14672 |
17 |
0 |
0 |
T122 |
6420 |
1 |
0 |
0 |
T127 |
269334 |
620 |
0 |
0 |
T129 |
8523 |
15 |
0 |
0 |
T130 |
107435 |
486 |
0 |
0 |
T149 |
96926 |
111 |
0 |
0 |
T150 |
5440 |
7 |
0 |
0 |
T151 |
20276 |
121 |
0 |
0 |
tpm_int_vector_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
375573454 |
3500 |
0 |
0 |
T86 |
4112 |
11 |
0 |
0 |
T103 |
64451 |
82 |
0 |
0 |
T116 |
14672 |
24 |
0 |
0 |
T122 |
6420 |
10 |
0 |
0 |
T127 |
269334 |
629 |
0 |
0 |
T129 |
8523 |
9 |
0 |
0 |
T130 |
107435 |
415 |
0 |
0 |
T149 |
96926 |
115 |
0 |
0 |
T150 |
5440 |
5 |
0 |
0 |
T151 |
20276 |
40 |
0 |
0 |
tpm_intf_capability_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
375573454 |
3477 |
0 |
0 |
T86 |
4112 |
5 |
0 |
0 |
T103 |
64451 |
105 |
0 |
0 |
T116 |
14672 |
30 |
0 |
0 |
T121 |
3149 |
3 |
0 |
0 |
T127 |
269334 |
759 |
0 |
0 |
T129 |
8523 |
3 |
0 |
0 |
T130 |
107435 |
337 |
0 |
0 |
T149 |
96926 |
106 |
0 |
0 |
T150 |
5440 |
3 |
0 |
0 |
T151 |
20276 |
43 |
0 |
0 |
tpm_rid_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
375573454 |
3439 |
0 |
0 |
T86 |
4112 |
16 |
0 |
0 |
T97 |
5132 |
5 |
0 |
0 |
T103 |
64451 |
68 |
0 |
0 |
T116 |
14672 |
18 |
0 |
0 |
T122 |
6420 |
9 |
0 |
0 |
T127 |
269334 |
638 |
0 |
0 |
T129 |
8523 |
6 |
0 |
0 |
T149 |
96926 |
123 |
0 |
0 |
T150 |
5440 |
8 |
0 |
0 |
T151 |
20276 |
66 |
0 |
0 |
tpm_sts_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
375573454 |
3479 |
0 |
0 |
T86 |
4112 |
19 |
0 |
0 |
T103 |
64451 |
77 |
0 |
0 |
T116 |
14672 |
29 |
0 |
0 |
T122 |
6420 |
3 |
0 |
0 |
T127 |
269334 |
611 |
0 |
0 |
T129 |
8523 |
6 |
0 |
0 |
T130 |
107435 |
388 |
0 |
0 |
T149 |
96926 |
117 |
0 |
0 |
T150 |
5440 |
11 |
0 |
0 |
T151 |
20276 |
115 |
0 |
0 |