T818 |
/workspace/coverage/default/43.spi_device_tpm_sts_read.2269809760 |
|
|
Jun 02 01:51:00 PM PDT 24 |
Jun 02 01:51:01 PM PDT 24 |
65927326 ps |
T190 |
/workspace/coverage/default/13.spi_device_mailbox.1294911239 |
|
|
Jun 02 01:49:15 PM PDT 24 |
Jun 02 01:49:51 PM PDT 24 |
9128896527 ps |
T819 |
/workspace/coverage/default/22.spi_device_csb_read.1645268071 |
|
|
Jun 02 01:49:43 PM PDT 24 |
Jun 02 01:49:45 PM PDT 24 |
16522890 ps |
T820 |
/workspace/coverage/default/45.spi_device_flash_mode.3232090671 |
|
|
Jun 02 01:51:09 PM PDT 24 |
Jun 02 01:51:20 PM PDT 24 |
2690104630 ps |
T821 |
/workspace/coverage/default/5.spi_device_tpm_sts_read.1017712806 |
|
|
Jun 02 01:48:49 PM PDT 24 |
Jun 02 01:48:50 PM PDT 24 |
84777751 ps |
T822 |
/workspace/coverage/default/15.spi_device_tpm_all.2583409120 |
|
|
Jun 02 01:49:27 PM PDT 24 |
Jun 02 01:49:49 PM PDT 24 |
4730971580 ps |
T823 |
/workspace/coverage/default/48.spi_device_mailbox.619850918 |
|
|
Jun 02 01:51:21 PM PDT 24 |
Jun 02 01:52:00 PM PDT 24 |
28941661837 ps |
T824 |
/workspace/coverage/default/0.spi_device_flash_and_tpm_min_idle.960165010 |
|
|
Jun 02 01:48:37 PM PDT 24 |
Jun 02 01:50:04 PM PDT 24 |
12022260062 ps |
T825 |
/workspace/coverage/default/20.spi_device_csb_read.2371821930 |
|
|
Jun 02 01:49:40 PM PDT 24 |
Jun 02 01:49:41 PM PDT 24 |
34883116 ps |
T826 |
/workspace/coverage/default/28.spi_device_flash_mode.3682652483 |
|
|
Jun 02 01:50:08 PM PDT 24 |
Jun 02 01:50:11 PM PDT 24 |
64126817 ps |
T827 |
/workspace/coverage/default/40.spi_device_flash_and_tpm.3854249371 |
|
|
Jun 02 01:50:53 PM PDT 24 |
Jun 02 01:52:20 PM PDT 24 |
24064285712 ps |
T828 |
/workspace/coverage/default/34.spi_device_pass_cmd_filtering.4098007533 |
|
|
Jun 02 01:50:29 PM PDT 24 |
Jun 02 01:50:32 PM PDT 24 |
97153284 ps |
T829 |
/workspace/coverage/default/7.spi_device_tpm_rw.1660369724 |
|
|
Jun 02 01:48:59 PM PDT 24 |
Jun 02 01:49:04 PM PDT 24 |
86468123 ps |
T830 |
/workspace/coverage/default/38.spi_device_mailbox.2262633792 |
|
|
Jun 02 01:50:43 PM PDT 24 |
Jun 02 01:50:48 PM PDT 24 |
538873824 ps |
T143 |
/workspace/coverage/default/17.spi_device_flash_and_tpm.886878007 |
|
|
Jun 02 01:49:30 PM PDT 24 |
Jun 02 01:50:33 PM PDT 24 |
4413901320 ps |
T831 |
/workspace/coverage/default/14.spi_device_csb_read.4014571174 |
|
|
Jun 02 01:49:23 PM PDT 24 |
Jun 02 01:49:24 PM PDT 24 |
100574817 ps |
T832 |
/workspace/coverage/default/16.spi_device_csb_read.1482758436 |
|
|
Jun 02 01:49:27 PM PDT 24 |
Jun 02 01:49:29 PM PDT 24 |
63266636 ps |
T833 |
/workspace/coverage/default/30.spi_device_upload.3783805490 |
|
|
Jun 02 01:50:11 PM PDT 24 |
Jun 02 01:50:15 PM PDT 24 |
681089472 ps |
T834 |
/workspace/coverage/default/10.spi_device_upload.2379163047 |
|
|
Jun 02 01:49:15 PM PDT 24 |
Jun 02 01:49:21 PM PDT 24 |
9549553568 ps |
T835 |
/workspace/coverage/default/45.spi_device_tpm_all.3698568176 |
|
|
Jun 02 01:51:10 PM PDT 24 |
Jun 02 01:51:26 PM PDT 24 |
1071753553 ps |
T836 |
/workspace/coverage/default/44.spi_device_intercept.2252213887 |
|
|
Jun 02 01:51:08 PM PDT 24 |
Jun 02 01:51:11 PM PDT 24 |
311060692 ps |
T837 |
/workspace/coverage/default/19.spi_device_alert_test.784494929 |
|
|
Jun 02 01:49:42 PM PDT 24 |
Jun 02 01:49:43 PM PDT 24 |
12788925 ps |
T838 |
/workspace/coverage/default/20.spi_device_flash_mode.3656912914 |
|
|
Jun 02 01:49:38 PM PDT 24 |
Jun 02 01:49:48 PM PDT 24 |
309979177 ps |
T839 |
/workspace/coverage/default/41.spi_device_mailbox.860464961 |
|
|
Jun 02 01:50:54 PM PDT 24 |
Jun 02 01:51:07 PM PDT 24 |
1186354123 ps |
T840 |
/workspace/coverage/default/11.spi_device_tpm_sts_read.1178523190 |
|
|
Jun 02 01:49:14 PM PDT 24 |
Jun 02 01:49:15 PM PDT 24 |
87360657 ps |
T841 |
/workspace/coverage/default/21.spi_device_tpm_read_hw_reg.652581520 |
|
|
Jun 02 01:49:41 PM PDT 24 |
Jun 02 01:49:59 PM PDT 24 |
43976702402 ps |
T842 |
/workspace/coverage/default/25.spi_device_cfg_cmd.1133160688 |
|
|
Jun 02 01:50:01 PM PDT 24 |
Jun 02 01:50:05 PM PDT 24 |
259122381 ps |
T843 |
/workspace/coverage/default/48.spi_device_alert_test.102552098 |
|
|
Jun 02 01:51:26 PM PDT 24 |
Jun 02 01:51:27 PM PDT 24 |
30239701 ps |
T296 |
/workspace/coverage/default/24.spi_device_flash_all.1389602586 |
|
|
Jun 02 01:49:54 PM PDT 24 |
Jun 02 01:55:02 PM PDT 24 |
734973056036 ps |
T844 |
/workspace/coverage/default/28.spi_device_tpm_read_hw_reg.1573124919 |
|
|
Jun 02 01:50:08 PM PDT 24 |
Jun 02 01:50:14 PM PDT 24 |
2307105662 ps |
T845 |
/workspace/coverage/default/11.spi_device_flash_and_tpm_min_idle.174271136 |
|
|
Jun 02 01:49:15 PM PDT 24 |
Jun 02 01:51:51 PM PDT 24 |
52422997900 ps |
T846 |
/workspace/coverage/default/34.spi_device_upload.2778155913 |
|
|
Jun 02 01:50:29 PM PDT 24 |
Jun 02 01:50:37 PM PDT 24 |
561763613 ps |
T847 |
/workspace/coverage/default/34.spi_device_tpm_sts_read.2143312560 |
|
|
Jun 02 01:50:29 PM PDT 24 |
Jun 02 01:50:31 PM PDT 24 |
86115451 ps |
T848 |
/workspace/coverage/default/26.spi_device_mailbox.1244680943 |
|
|
Jun 02 01:50:02 PM PDT 24 |
Jun 02 01:50:31 PM PDT 24 |
15160657033 ps |
T849 |
/workspace/coverage/default/36.spi_device_read_buffer_direct.1837730318 |
|
|
Jun 02 01:50:37 PM PDT 24 |
Jun 02 01:50:44 PM PDT 24 |
5091571760 ps |
T850 |
/workspace/coverage/default/42.spi_device_tpm_read_hw_reg.1515347409 |
|
|
Jun 02 01:50:56 PM PDT 24 |
Jun 02 01:51:05 PM PDT 24 |
3080653783 ps |
T851 |
/workspace/coverage/default/47.spi_device_pass_cmd_filtering.960106561 |
|
|
Jun 02 01:51:20 PM PDT 24 |
Jun 02 01:51:28 PM PDT 24 |
5254244647 ps |
T852 |
/workspace/coverage/default/28.spi_device_tpm_all.1651610672 |
|
|
Jun 02 01:50:07 PM PDT 24 |
Jun 02 01:50:50 PM PDT 24 |
7613033518 ps |
T853 |
/workspace/coverage/default/14.spi_device_tpm_sts_read.2752238386 |
|
|
Jun 02 01:49:23 PM PDT 24 |
Jun 02 01:49:24 PM PDT 24 |
147762300 ps |
T854 |
/workspace/coverage/default/40.spi_device_tpm_read_hw_reg.2991175600 |
|
|
Jun 02 01:50:46 PM PDT 24 |
Jun 02 01:50:51 PM PDT 24 |
1747170440 ps |
T855 |
/workspace/coverage/default/24.spi_device_mailbox.3040368222 |
|
|
Jun 02 01:49:56 PM PDT 24 |
Jun 02 01:50:05 PM PDT 24 |
510522747 ps |
T856 |
/workspace/coverage/default/40.spi_device_tpm_rw.1749812361 |
|
|
Jun 02 01:50:54 PM PDT 24 |
Jun 02 01:50:57 PM PDT 24 |
113348586 ps |
T319 |
/workspace/coverage/default/26.spi_device_stress_all.23560531 |
|
|
Jun 02 01:50:02 PM PDT 24 |
Jun 02 01:50:37 PM PDT 24 |
2561313748 ps |
T857 |
/workspace/coverage/default/18.spi_device_flash_and_tpm_min_idle.582978820 |
|
|
Jun 02 01:49:35 PM PDT 24 |
Jun 02 01:50:42 PM PDT 24 |
17208063255 ps |
T73 |
/workspace/coverage/default/0.spi_device_sec_cm.708772344 |
|
|
Jun 02 01:48:38 PM PDT 24 |
Jun 02 01:48:39 PM PDT 24 |
174054856 ps |
T323 |
/workspace/coverage/default/45.spi_device_flash_all.2394084703 |
|
|
Jun 02 01:51:10 PM PDT 24 |
Jun 02 01:55:11 PM PDT 24 |
150831814863 ps |
T858 |
/workspace/coverage/default/41.spi_device_tpm_read_hw_reg.1232252553 |
|
|
Jun 02 01:50:55 PM PDT 24 |
Jun 02 01:50:58 PM PDT 24 |
3783474023 ps |
T859 |
/workspace/coverage/default/14.spi_device_mem_parity.342847095 |
|
|
Jun 02 01:49:22 PM PDT 24 |
Jun 02 01:49:24 PM PDT 24 |
28180492 ps |
T23 |
/workspace/coverage/default/42.spi_device_flash_and_tpm.1667188129 |
|
|
Jun 02 01:51:01 PM PDT 24 |
Jun 02 01:53:09 PM PDT 24 |
49647361417 ps |
T860 |
/workspace/coverage/default/49.spi_device_tpm_all.216390449 |
|
|
Jun 02 01:51:25 PM PDT 24 |
Jun 02 01:51:43 PM PDT 24 |
22770439568 ps |
T861 |
/workspace/coverage/default/1.spi_device_pass_addr_payload_swap.3156372645 |
|
|
Jun 02 01:48:47 PM PDT 24 |
Jun 02 01:48:54 PM PDT 24 |
1500603969 ps |
T295 |
/workspace/coverage/default/4.spi_device_flash_and_tpm.1817084940 |
|
|
Jun 02 01:48:49 PM PDT 24 |
Jun 02 01:50:04 PM PDT 24 |
13537433157 ps |
T305 |
/workspace/coverage/default/29.spi_device_flash_all.3581357351 |
|
|
Jun 02 01:50:14 PM PDT 24 |
Jun 02 01:55:12 PM PDT 24 |
189819327964 ps |
T862 |
/workspace/coverage/default/16.spi_device_pass_addr_payload_swap.3753326553 |
|
|
Jun 02 01:49:31 PM PDT 24 |
Jun 02 01:49:57 PM PDT 24 |
8653829914 ps |
T863 |
/workspace/coverage/default/23.spi_device_pass_addr_payload_swap.265930661 |
|
|
Jun 02 01:49:50 PM PDT 24 |
Jun 02 01:49:54 PM PDT 24 |
284839319 ps |
T864 |
/workspace/coverage/default/34.spi_device_pass_addr_payload_swap.199675880 |
|
|
Jun 02 01:50:30 PM PDT 24 |
Jun 02 01:50:43 PM PDT 24 |
4051203008 ps |
T865 |
/workspace/coverage/default/18.spi_device_tpm_sts_read.162168535 |
|
|
Jun 02 01:49:39 PM PDT 24 |
Jun 02 01:49:40 PM PDT 24 |
27698707 ps |
T866 |
/workspace/coverage/default/29.spi_device_tpm_sts_read.1555695182 |
|
|
Jun 02 01:50:15 PM PDT 24 |
Jun 02 01:50:16 PM PDT 24 |
42417412 ps |
T867 |
/workspace/coverage/default/7.spi_device_intercept.1717127754 |
|
|
Jun 02 01:48:57 PM PDT 24 |
Jun 02 01:49:02 PM PDT 24 |
168815166 ps |
T868 |
/workspace/coverage/default/48.spi_device_pass_cmd_filtering.3585840938 |
|
|
Jun 02 01:51:28 PM PDT 24 |
Jun 02 01:51:34 PM PDT 24 |
366804272 ps |
T869 |
/workspace/coverage/default/22.spi_device_pass_addr_payload_swap.355752657 |
|
|
Jun 02 01:49:48 PM PDT 24 |
Jun 02 01:50:09 PM PDT 24 |
32532838156 ps |
T870 |
/workspace/coverage/default/21.spi_device_tpm_sts_read.3515269072 |
|
|
Jun 02 01:49:37 PM PDT 24 |
Jun 02 01:49:38 PM PDT 24 |
57821497 ps |
T871 |
/workspace/coverage/default/27.spi_device_mailbox.1376868059 |
|
|
Jun 02 01:50:13 PM PDT 24 |
Jun 02 01:50:48 PM PDT 24 |
6183706623 ps |
T872 |
/workspace/coverage/default/13.spi_device_cfg_cmd.1150917609 |
|
|
Jun 02 01:49:18 PM PDT 24 |
Jun 02 01:49:31 PM PDT 24 |
984925372 ps |
T873 |
/workspace/coverage/default/44.spi_device_flash_and_tpm.1355063903 |
|
|
Jun 02 01:51:07 PM PDT 24 |
Jun 02 01:52:12 PM PDT 24 |
17177767792 ps |
T874 |
/workspace/coverage/default/13.spi_device_pass_cmd_filtering.2231920620 |
|
|
Jun 02 01:49:20 PM PDT 24 |
Jun 02 01:49:37 PM PDT 24 |
8632729680 ps |
T875 |
/workspace/coverage/default/46.spi_device_read_buffer_direct.2820061770 |
|
|
Jun 02 01:51:15 PM PDT 24 |
Jun 02 01:51:35 PM PDT 24 |
6400760080 ps |
T876 |
/workspace/coverage/default/2.spi_device_cfg_cmd.2368488982 |
|
|
Jun 02 01:48:46 PM PDT 24 |
Jun 02 01:48:48 PM PDT 24 |
32113696 ps |
T877 |
/workspace/coverage/default/3.spi_device_stress_all.1786820778 |
|
|
Jun 02 01:48:48 PM PDT 24 |
Jun 02 01:48:50 PM PDT 24 |
214016707 ps |
T878 |
/workspace/coverage/default/8.spi_device_mem_parity.73311895 |
|
|
Jun 02 01:49:01 PM PDT 24 |
Jun 02 01:49:03 PM PDT 24 |
15955759 ps |
T879 |
/workspace/coverage/default/45.spi_device_tpm_rw.823453438 |
|
|
Jun 02 01:51:09 PM PDT 24 |
Jun 02 01:51:11 PM PDT 24 |
10638754 ps |
T880 |
/workspace/coverage/default/12.spi_device_tpm_rw.554820106 |
|
|
Jun 02 01:49:19 PM PDT 24 |
Jun 02 01:49:21 PM PDT 24 |
70884164 ps |
T304 |
/workspace/coverage/default/14.spi_device_flash_all.1148195374 |
|
|
Jun 02 01:49:22 PM PDT 24 |
Jun 02 01:50:53 PM PDT 24 |
10334423693 ps |
T881 |
/workspace/coverage/default/30.spi_device_stress_all.736275211 |
|
|
Jun 02 01:50:21 PM PDT 24 |
Jun 02 01:50:23 PM PDT 24 |
182191970 ps |
T332 |
/workspace/coverage/default/0.spi_device_flash_mode.3603540911 |
|
|
Jun 02 01:48:48 PM PDT 24 |
Jun 02 01:48:54 PM PDT 24 |
158810326 ps |
T882 |
/workspace/coverage/default/13.spi_device_flash_mode.400781717 |
|
|
Jun 02 01:49:20 PM PDT 24 |
Jun 02 01:49:23 PM PDT 24 |
185254104 ps |
T883 |
/workspace/coverage/default/10.spi_device_tpm_read_hw_reg.1508344784 |
|
|
Jun 02 01:49:08 PM PDT 24 |
Jun 02 01:49:12 PM PDT 24 |
24232224556 ps |
T884 |
/workspace/coverage/default/39.spi_device_tpm_read_hw_reg.3351562163 |
|
|
Jun 02 01:50:45 PM PDT 24 |
Jun 02 01:50:52 PM PDT 24 |
6776598242 ps |
T885 |
/workspace/coverage/default/31.spi_device_alert_test.3866940461 |
|
|
Jun 02 01:50:22 PM PDT 24 |
Jun 02 01:50:24 PM PDT 24 |
13218034 ps |
T310 |
/workspace/coverage/default/48.spi_device_flash_all.1222119566 |
|
|
Jun 02 01:51:22 PM PDT 24 |
Jun 02 01:56:20 PM PDT 24 |
252209719331 ps |
T886 |
/workspace/coverage/default/5.spi_device_alert_test.3442521688 |
|
|
Jun 02 01:48:50 PM PDT 24 |
Jun 02 01:48:52 PM PDT 24 |
49039782 ps |
T887 |
/workspace/coverage/default/10.spi_device_read_buffer_direct.3587300323 |
|
|
Jun 02 01:49:15 PM PDT 24 |
Jun 02 01:49:25 PM PDT 24 |
824568878 ps |
T888 |
/workspace/coverage/default/38.spi_device_tpm_all.3611465883 |
|
|
Jun 02 01:50:42 PM PDT 24 |
Jun 02 01:51:32 PM PDT 24 |
82824662077 ps |
T889 |
/workspace/coverage/default/23.spi_device_tpm_rw.1695611502 |
|
|
Jun 02 01:49:51 PM PDT 24 |
Jun 02 01:49:53 PM PDT 24 |
288909943 ps |
T890 |
/workspace/coverage/default/2.spi_device_flash_and_tpm_min_idle.530892815 |
|
|
Jun 02 01:48:54 PM PDT 24 |
Jun 02 01:49:30 PM PDT 24 |
6319884420 ps |
T891 |
/workspace/coverage/default/31.spi_device_tpm_all.3562140409 |
|
|
Jun 02 01:50:22 PM PDT 24 |
Jun 02 01:50:47 PM PDT 24 |
32821809389 ps |
T892 |
/workspace/coverage/default/14.spi_device_flash_and_tpm.3006907570 |
|
|
Jun 02 01:49:23 PM PDT 24 |
Jun 02 01:50:16 PM PDT 24 |
6782225412 ps |
T303 |
/workspace/coverage/default/42.spi_device_stress_all.3035959980 |
|
|
Jun 02 01:50:56 PM PDT 24 |
Jun 02 01:59:14 PM PDT 24 |
175355180428 ps |
T893 |
/workspace/coverage/default/27.spi_device_intercept.1335898456 |
|
|
Jun 02 01:50:06 PM PDT 24 |
Jun 02 01:50:13 PM PDT 24 |
5242267023 ps |
T894 |
/workspace/coverage/default/29.spi_device_pass_cmd_filtering.3102265080 |
|
|
Jun 02 01:50:15 PM PDT 24 |
Jun 02 01:50:18 PM PDT 24 |
134206684 ps |
T895 |
/workspace/coverage/default/46.spi_device_cfg_cmd.1797687457 |
|
|
Jun 02 01:51:14 PM PDT 24 |
Jun 02 01:51:17 PM PDT 24 |
146639356 ps |
T896 |
/workspace/coverage/default/25.spi_device_tpm_rw.2036174104 |
|
|
Jun 02 01:49:58 PM PDT 24 |
Jun 02 01:50:01 PM PDT 24 |
1559415029 ps |
T897 |
/workspace/coverage/default/22.spi_device_mailbox.1073467439 |
|
|
Jun 02 01:49:43 PM PDT 24 |
Jun 02 01:49:53 PM PDT 24 |
2236520422 ps |
T898 |
/workspace/coverage/default/5.spi_device_read_buffer_direct.3628122487 |
|
|
Jun 02 01:48:50 PM PDT 24 |
Jun 02 01:48:57 PM PDT 24 |
642872957 ps |
T899 |
/workspace/coverage/default/21.spi_device_flash_all.3302105693 |
|
|
Jun 02 01:49:43 PM PDT 24 |
Jun 02 01:50:46 PM PDT 24 |
4696378040 ps |
T900 |
/workspace/coverage/default/16.spi_device_upload.1603681538 |
|
|
Jun 02 01:49:30 PM PDT 24 |
Jun 02 01:49:42 PM PDT 24 |
3368476040 ps |
T901 |
/workspace/coverage/default/8.spi_device_read_buffer_direct.1118057578 |
|
|
Jun 02 01:49:11 PM PDT 24 |
Jun 02 01:49:20 PM PDT 24 |
1054468424 ps |
T902 |
/workspace/coverage/default/37.spi_device_csb_read.975876073 |
|
|
Jun 02 01:50:37 PM PDT 24 |
Jun 02 01:50:38 PM PDT 24 |
126423917 ps |
T903 |
/workspace/coverage/default/7.spi_device_read_buffer_direct.9478590 |
|
|
Jun 02 01:48:58 PM PDT 24 |
Jun 02 01:49:02 PM PDT 24 |
336855834 ps |
T904 |
/workspace/coverage/default/27.spi_device_alert_test.2178613096 |
|
|
Jun 02 01:50:08 PM PDT 24 |
Jun 02 01:50:09 PM PDT 24 |
13494898 ps |
T905 |
/workspace/coverage/default/3.spi_device_flash_and_tpm.2474885608 |
|
|
Jun 02 01:48:52 PM PDT 24 |
Jun 02 01:51:43 PM PDT 24 |
12492403040 ps |
T906 |
/workspace/coverage/default/23.spi_device_tpm_sts_read.3632390721 |
|
|
Jun 02 01:49:52 PM PDT 24 |
Jun 02 01:49:53 PM PDT 24 |
25446258 ps |
T907 |
/workspace/coverage/default/8.spi_device_csb_read.4099074702 |
|
|
Jun 02 01:49:02 PM PDT 24 |
Jun 02 01:49:03 PM PDT 24 |
25138214 ps |
T311 |
/workspace/coverage/default/23.spi_device_stress_all.2471402867 |
|
|
Jun 02 01:49:50 PM PDT 24 |
Jun 02 01:53:03 PM PDT 24 |
75110657756 ps |
T908 |
/workspace/coverage/default/0.spi_device_mailbox.767851218 |
|
|
Jun 02 01:48:37 PM PDT 24 |
Jun 02 01:48:55 PM PDT 24 |
2068090426 ps |
T909 |
/workspace/coverage/default/0.spi_device_upload.2512834762 |
|
|
Jun 02 01:48:47 PM PDT 24 |
Jun 02 01:48:50 PM PDT 24 |
167778731 ps |
T910 |
/workspace/coverage/default/45.spi_device_read_buffer_direct.3351831342 |
|
|
Jun 02 01:51:07 PM PDT 24 |
Jun 02 01:51:13 PM PDT 24 |
1578885581 ps |
T911 |
/workspace/coverage/default/18.spi_device_tpm_rw.3672973601 |
|
|
Jun 02 01:49:30 PM PDT 24 |
Jun 02 01:49:32 PM PDT 24 |
18440456 ps |
T912 |
/workspace/coverage/default/47.spi_device_upload.2421373572 |
|
|
Jun 02 01:51:20 PM PDT 24 |
Jun 02 01:51:29 PM PDT 24 |
509706972 ps |
T913 |
/workspace/coverage/default/15.spi_device_mem_parity.4175209108 |
|
|
Jun 02 01:49:28 PM PDT 24 |
Jun 02 01:49:29 PM PDT 24 |
34478348 ps |
T914 |
/workspace/coverage/default/32.spi_device_tpm_rw.727077757 |
|
|
Jun 02 01:50:22 PM PDT 24 |
Jun 02 01:50:24 PM PDT 24 |
90611375 ps |
T915 |
/workspace/coverage/default/9.spi_device_mem_parity.1587825304 |
|
|
Jun 02 01:49:04 PM PDT 24 |
Jun 02 01:49:06 PM PDT 24 |
43767943 ps |
T315 |
/workspace/coverage/default/47.spi_device_flash_and_tpm_min_idle.2164579391 |
|
|
Jun 02 01:51:21 PM PDT 24 |
Jun 02 01:54:09 PM PDT 24 |
42220076324 ps |
T916 |
/workspace/coverage/default/14.spi_device_stress_all.1091188804 |
|
|
Jun 02 01:49:27 PM PDT 24 |
Jun 02 01:53:40 PM PDT 24 |
34739527330 ps |
T917 |
/workspace/coverage/default/25.spi_device_flash_and_tpm.3871205895 |
|
|
Jun 02 01:50:01 PM PDT 24 |
Jun 02 01:51:35 PM PDT 24 |
6277457471 ps |
T918 |
/workspace/coverage/default/33.spi_device_alert_test.3172657219 |
|
|
Jun 02 01:50:27 PM PDT 24 |
Jun 02 01:50:29 PM PDT 24 |
42175784 ps |
T919 |
/workspace/coverage/default/7.spi_device_pass_addr_payload_swap.240147814 |
|
|
Jun 02 01:48:54 PM PDT 24 |
Jun 02 01:48:59 PM PDT 24 |
3394199692 ps |
T920 |
/workspace/coverage/default/48.spi_device_pass_addr_payload_swap.2719015110 |
|
|
Jun 02 01:51:20 PM PDT 24 |
Jun 02 01:51:24 PM PDT 24 |
400209696 ps |
T921 |
/workspace/coverage/default/44.spi_device_stress_all.3771291450 |
|
|
Jun 02 01:51:08 PM PDT 24 |
Jun 02 01:51:43 PM PDT 24 |
1653424359 ps |
T922 |
/workspace/coverage/default/26.spi_device_csb_read.1550122100 |
|
|
Jun 02 01:50:02 PM PDT 24 |
Jun 02 01:50:03 PM PDT 24 |
60826280 ps |
T923 |
/workspace/coverage/default/15.spi_device_cfg_cmd.1298512052 |
|
|
Jun 02 01:49:27 PM PDT 24 |
Jun 02 01:49:45 PM PDT 24 |
2186378128 ps |
T924 |
/workspace/coverage/default/9.spi_device_alert_test.812452472 |
|
|
Jun 02 01:49:03 PM PDT 24 |
Jun 02 01:49:04 PM PDT 24 |
106334142 ps |
T925 |
/workspace/coverage/default/12.spi_device_cfg_cmd.496199087 |
|
|
Jun 02 01:49:17 PM PDT 24 |
Jun 02 01:49:20 PM PDT 24 |
113044029 ps |
T926 |
/workspace/coverage/default/38.spi_device_intercept.1582541345 |
|
|
Jun 02 01:50:43 PM PDT 24 |
Jun 02 01:50:46 PM PDT 24 |
75334729 ps |
T927 |
/workspace/coverage/default/33.spi_device_stress_all.901406098 |
|
|
Jun 02 01:50:29 PM PDT 24 |
Jun 02 01:52:18 PM PDT 24 |
13819260376 ps |
T928 |
/workspace/coverage/default/33.spi_device_tpm_rw.2126356075 |
|
|
Jun 02 01:50:22 PM PDT 24 |
Jun 02 01:50:24 PM PDT 24 |
19466252 ps |
T929 |
/workspace/coverage/default/35.spi_device_pass_addr_payload_swap.487073047 |
|
|
Jun 02 01:50:31 PM PDT 24 |
Jun 02 01:50:35 PM PDT 24 |
645650587 ps |
T930 |
/workspace/coverage/default/38.spi_device_alert_test.373771475 |
|
|
Jun 02 01:50:40 PM PDT 24 |
Jun 02 01:50:42 PM PDT 24 |
17483925 ps |
T931 |
/workspace/coverage/default/38.spi_device_stress_all.199719224 |
|
|
Jun 02 01:50:49 PM PDT 24 |
Jun 02 01:56:06 PM PDT 24 |
32054103711 ps |
T932 |
/workspace/coverage/default/11.spi_device_read_buffer_direct.3692176836 |
|
|
Jun 02 01:49:20 PM PDT 24 |
Jun 02 01:49:25 PM PDT 24 |
386561278 ps |
T933 |
/workspace/coverage/default/47.spi_device_cfg_cmd.2256293624 |
|
|
Jun 02 01:51:27 PM PDT 24 |
Jun 02 01:51:30 PM PDT 24 |
399838918 ps |
T934 |
/workspace/coverage/default/9.spi_device_csb_read.1779909704 |
|
|
Jun 02 01:49:04 PM PDT 24 |
Jun 02 01:49:06 PM PDT 24 |
15355559 ps |
T935 |
/workspace/coverage/default/37.spi_device_flash_and_tpm_min_idle.3590249970 |
|
|
Jun 02 01:50:44 PM PDT 24 |
Jun 02 01:52:04 PM PDT 24 |
7354381373 ps |
T936 |
/workspace/coverage/default/11.spi_device_stress_all.1479417114 |
|
|
Jun 02 01:49:17 PM PDT 24 |
Jun 02 01:50:58 PM PDT 24 |
7292022743 ps |
T937 |
/workspace/coverage/default/23.spi_device_flash_and_tpm.4198244181 |
|
|
Jun 02 01:49:50 PM PDT 24 |
Jun 02 01:54:44 PM PDT 24 |
59255014567 ps |
T938 |
/workspace/coverage/default/41.spi_device_flash_all.3920017031 |
|
|
Jun 02 01:50:52 PM PDT 24 |
Jun 02 01:52:23 PM PDT 24 |
11512170852 ps |
T939 |
/workspace/coverage/default/3.spi_device_upload.589936245 |
|
|
Jun 02 01:48:42 PM PDT 24 |
Jun 02 01:48:47 PM PDT 24 |
1967709683 ps |
T940 |
/workspace/coverage/default/9.spi_device_intercept.3935511675 |
|
|
Jun 02 01:49:09 PM PDT 24 |
Jun 02 01:49:16 PM PDT 24 |
1227555840 ps |
T941 |
/workspace/coverage/default/7.spi_device_flash_all.3872215869 |
|
|
Jun 02 01:48:55 PM PDT 24 |
Jun 02 01:49:31 PM PDT 24 |
11378409560 ps |
T942 |
/workspace/coverage/default/38.spi_device_flash_mode.3731928867 |
|
|
Jun 02 01:50:42 PM PDT 24 |
Jun 02 01:50:53 PM PDT 24 |
665430123 ps |
T943 |
/workspace/coverage/default/40.spi_device_mailbox.2052700107 |
|
|
Jun 02 01:50:51 PM PDT 24 |
Jun 02 01:50:58 PM PDT 24 |
360333278 ps |
T944 |
/workspace/coverage/default/29.spi_device_cfg_cmd.2220058557 |
|
|
Jun 02 01:50:15 PM PDT 24 |
Jun 02 01:50:32 PM PDT 24 |
2346754853 ps |
T945 |
/workspace/coverage/default/13.spi_device_csb_read.1392543270 |
|
|
Jun 02 01:49:19 PM PDT 24 |
Jun 02 01:49:20 PM PDT 24 |
20648468 ps |
T946 |
/workspace/coverage/default/49.spi_device_flash_all.337276139 |
|
|
Jun 02 01:51:27 PM PDT 24 |
Jun 02 01:51:56 PM PDT 24 |
2084835964 ps |
T947 |
/workspace/coverage/default/5.spi_device_flash_mode.75333688 |
|
|
Jun 02 01:48:47 PM PDT 24 |
Jun 02 01:48:57 PM PDT 24 |
286003351 ps |
T948 |
/workspace/coverage/default/15.spi_device_flash_mode.2116756493 |
|
|
Jun 02 01:49:26 PM PDT 24 |
Jun 02 01:49:46 PM PDT 24 |
2181198543 ps |
T949 |
/workspace/coverage/default/14.spi_device_tpm_all.1278549156 |
|
|
Jun 02 01:49:24 PM PDT 24 |
Jun 02 01:49:31 PM PDT 24 |
399536713 ps |
T950 |
/workspace/coverage/default/3.spi_device_flash_and_tpm_min_idle.1390052801 |
|
|
Jun 02 01:48:44 PM PDT 24 |
Jun 02 01:53:29 PM PDT 24 |
27471197410 ps |
T951 |
/workspace/coverage/default/43.spi_device_pass_cmd_filtering.954140007 |
|
|
Jun 02 01:51:04 PM PDT 24 |
Jun 02 01:51:17 PM PDT 24 |
83700105277 ps |
T297 |
/workspace/coverage/default/10.spi_device_flash_all.61604570 |
|
|
Jun 02 01:49:15 PM PDT 24 |
Jun 02 01:54:03 PM PDT 24 |
134023029246 ps |
T952 |
/workspace/coverage/default/19.spi_device_flash_mode.4095901486 |
|
|
Jun 02 01:49:44 PM PDT 24 |
Jun 02 01:49:52 PM PDT 24 |
808596612 ps |
T953 |
/workspace/coverage/default/20.spi_device_cfg_cmd.1888414016 |
|
|
Jun 02 01:49:45 PM PDT 24 |
Jun 02 01:49:51 PM PDT 24 |
865635400 ps |
T954 |
/workspace/coverage/default/20.spi_device_flash_all.485460198 |
|
|
Jun 02 01:49:44 PM PDT 24 |
Jun 02 01:51:39 PM PDT 24 |
14650355396 ps |
T955 |
/workspace/coverage/default/13.spi_device_intercept.2569013992 |
|
|
Jun 02 01:49:20 PM PDT 24 |
Jun 02 01:49:26 PM PDT 24 |
3880197007 ps |
T956 |
/workspace/coverage/default/41.spi_device_upload.3172084805 |
|
|
Jun 02 01:50:54 PM PDT 24 |
Jun 02 01:51:01 PM PDT 24 |
3467854679 ps |
T957 |
/workspace/coverage/default/39.spi_device_pass_addr_payload_swap.4202228509 |
|
|
Jun 02 01:50:46 PM PDT 24 |
Jun 02 01:50:50 PM PDT 24 |
254297774 ps |
T958 |
/workspace/coverage/default/41.spi_device_tpm_all.1276221919 |
|
|
Jun 02 01:50:54 PM PDT 24 |
Jun 02 01:50:59 PM PDT 24 |
432084721 ps |
T959 |
/workspace/coverage/default/32.spi_device_flash_and_tpm_min_idle.1280039441 |
|
|
Jun 02 01:50:24 PM PDT 24 |
Jun 02 01:51:12 PM PDT 24 |
3118942165 ps |
T960 |
/workspace/coverage/default/49.spi_device_tpm_sts_read.1916574345 |
|
|
Jun 02 01:51:25 PM PDT 24 |
Jun 02 01:51:27 PM PDT 24 |
112907210 ps |
T961 |
/workspace/coverage/default/22.spi_device_flash_mode.2907541982 |
|
|
Jun 02 01:49:42 PM PDT 24 |
Jun 02 01:49:50 PM PDT 24 |
302545265 ps |
T962 |
/workspace/coverage/default/4.spi_device_pass_addr_payload_swap.884804412 |
|
|
Jun 02 01:48:53 PM PDT 24 |
Jun 02 01:49:14 PM PDT 24 |
115209322010 ps |
T963 |
/workspace/coverage/default/4.spi_device_mem_parity.3830415340 |
|
|
Jun 02 01:48:47 PM PDT 24 |
Jun 02 01:48:48 PM PDT 24 |
25050468 ps |
T964 |
/workspace/coverage/default/24.spi_device_stress_all.1770581792 |
|
|
Jun 02 01:49:57 PM PDT 24 |
Jun 02 01:51:15 PM PDT 24 |
5524838675 ps |
T965 |
/workspace/coverage/default/18.spi_device_tpm_all.2972921280 |
|
|
Jun 02 01:49:34 PM PDT 24 |
Jun 02 01:49:42 PM PDT 24 |
4762499300 ps |
T966 |
/workspace/coverage/default/12.spi_device_mem_parity.4087235793 |
|
|
Jun 02 01:49:18 PM PDT 24 |
Jun 02 01:49:20 PM PDT 24 |
89146598 ps |
T967 |
/workspace/coverage/default/48.spi_device_stress_all.1968276085 |
|
|
Jun 02 01:51:21 PM PDT 24 |
Jun 02 01:51:23 PM PDT 24 |
50324548 ps |
T968 |
/workspace/coverage/default/16.spi_device_tpm_sts_read.3930558387 |
|
|
Jun 02 01:49:28 PM PDT 24 |
Jun 02 01:49:29 PM PDT 24 |
42817122 ps |
T969 |
/workspace/coverage/default/38.spi_device_pass_cmd_filtering.4101560695 |
|
|
Jun 02 01:50:44 PM PDT 24 |
Jun 02 01:50:49 PM PDT 24 |
169244023 ps |
T970 |
/workspace/coverage/default/13.spi_device_mem_parity.3851669710 |
|
|
Jun 02 01:49:19 PM PDT 24 |
Jun 02 01:49:21 PM PDT 24 |
167842668 ps |
T316 |
/workspace/coverage/default/32.spi_device_flash_all.2034041828 |
|
|
Jun 02 01:50:24 PM PDT 24 |
Jun 02 01:54:46 PM PDT 24 |
37553172692 ps |
T971 |
/workspace/coverage/default/4.spi_device_flash_and_tpm_min_idle.130501418 |
|
|
Jun 02 01:48:52 PM PDT 24 |
Jun 02 01:49:30 PM PDT 24 |
8028529477 ps |
T972 |
/workspace/coverage/default/0.spi_device_intercept.2517296511 |
|
|
Jun 02 01:48:51 PM PDT 24 |
Jun 02 01:48:56 PM PDT 24 |
208526923 ps |
T973 |
/workspace/coverage/default/27.spi_device_csb_read.3858329532 |
|
|
Jun 02 01:50:05 PM PDT 24 |
Jun 02 01:50:07 PM PDT 24 |
58625161 ps |
T974 |
/workspace/coverage/default/24.spi_device_flash_and_tpm.3980307894 |
|
|
Jun 02 01:49:55 PM PDT 24 |
Jun 02 01:50:45 PM PDT 24 |
39241081555 ps |
T975 |
/workspace/coverage/default/4.spi_device_read_buffer_direct.1208226636 |
|
|
Jun 02 01:48:47 PM PDT 24 |
Jun 02 01:48:52 PM PDT 24 |
1132347784 ps |
T85 |
/workspace/coverage/cover_reg_top/3.spi_device_csr_hw_reset.1951490996 |
|
|
Jun 02 01:52:21 PM PDT 24 |
Jun 02 01:52:23 PM PDT 24 |
73971858 ps |
T144 |
/workspace/coverage/cover_reg_top/17.spi_device_same_csr_outstanding.1444209078 |
|
|
Jun 02 01:52:39 PM PDT 24 |
Jun 02 01:52:41 PM PDT 24 |
60456944 ps |
T121 |
/workspace/coverage/cover_reg_top/4.spi_device_csr_rw.945056958 |
|
|
Jun 02 01:52:23 PM PDT 24 |
Jun 02 01:52:25 PM PDT 24 |
185313124 ps |
T976 |
/workspace/coverage/cover_reg_top/12.spi_device_intr_test.3808355363 |
|
|
Jun 02 01:52:32 PM PDT 24 |
Jun 02 01:52:33 PM PDT 24 |
92347075 ps |
T145 |
/workspace/coverage/cover_reg_top/11.spi_device_csr_rw.3237380026 |
|
|
Jun 02 01:52:28 PM PDT 24 |
Jun 02 01:52:30 PM PDT 24 |
22905178 ps |
T96 |
/workspace/coverage/cover_reg_top/2.spi_device_tl_intg_err.1669282754 |
|
|
Jun 02 01:52:20 PM PDT 24 |
Jun 02 01:52:35 PM PDT 24 |
575768169 ps |
T97 |
/workspace/coverage/cover_reg_top/10.spi_device_tl_errors.4185206912 |
|
|
Jun 02 01:52:32 PM PDT 24 |
Jun 02 01:52:33 PM PDT 24 |
366682787 ps |
T977 |
/workspace/coverage/cover_reg_top/1.spi_device_intr_test.40787111 |
|
|
Jun 02 01:52:14 PM PDT 24 |
Jun 02 01:52:15 PM PDT 24 |
93825547 ps |
T978 |
/workspace/coverage/cover_reg_top/6.spi_device_same_csr_outstanding.2563139309 |
|
|
Jun 02 01:52:21 PM PDT 24 |
Jun 02 01:52:24 PM PDT 24 |
87351411 ps |
T98 |
/workspace/coverage/cover_reg_top/14.spi_device_tl_intg_err.3924346091 |
|
|
Jun 02 01:52:34 PM PDT 24 |
Jun 02 01:52:47 PM PDT 24 |
402877223 ps |
T979 |
/workspace/coverage/cover_reg_top/11.spi_device_same_csr_outstanding.3181281554 |
|
|
Jun 02 01:52:33 PM PDT 24 |
Jun 02 01:52:38 PM PDT 24 |
151107590 ps |
T980 |
/workspace/coverage/cover_reg_top/20.spi_device_intr_test.3382035667 |
|
|
Jun 02 01:52:49 PM PDT 24 |
Jun 02 01:52:50 PM PDT 24 |
19001389 ps |
T981 |
/workspace/coverage/cover_reg_top/7.spi_device_intr_test.1438064131 |
|
|
Jun 02 01:52:26 PM PDT 24 |
Jun 02 01:52:28 PM PDT 24 |
16401481 ps |
T982 |
/workspace/coverage/cover_reg_top/21.spi_device_intr_test.1745363286 |
|
|
Jun 02 01:52:43 PM PDT 24 |
Jun 02 01:52:44 PM PDT 24 |
18318723 ps |
T101 |
/workspace/coverage/cover_reg_top/0.spi_device_tl_intg_err.635426019 |
|
|
Jun 02 01:52:07 PM PDT 24 |
Jun 02 01:52:14 PM PDT 24 |
110513573 ps |
T99 |
/workspace/coverage/cover_reg_top/18.spi_device_tl_errors.3828221360 |
|
|
Jun 02 01:52:39 PM PDT 24 |
Jun 02 01:52:43 PM PDT 24 |
379513600 ps |
T103 |
/workspace/coverage/cover_reg_top/8.spi_device_tl_intg_err.2139607943 |
|
|
Jun 02 01:52:31 PM PDT 24 |
Jun 02 01:52:47 PM PDT 24 |
1289063162 ps |
T983 |
/workspace/coverage/cover_reg_top/4.spi_device_same_csr_outstanding.3700979350 |
|
|
Jun 02 01:52:22 PM PDT 24 |
Jun 02 01:52:27 PM PDT 24 |
155955329 ps |
T100 |
/workspace/coverage/cover_reg_top/2.spi_device_csr_mem_rw_with_rand_reset.2430933568 |
|
|
Jun 02 01:52:21 PM PDT 24 |
Jun 02 01:52:24 PM PDT 24 |
27271156 ps |
T984 |
/workspace/coverage/cover_reg_top/16.spi_device_intr_test.765793106 |
|
|
Jun 02 01:52:40 PM PDT 24 |
Jun 02 01:52:41 PM PDT 24 |
68951438 ps |
T116 |
/workspace/coverage/cover_reg_top/0.spi_device_csr_mem_rw_with_rand_reset.2182004335 |
|
|
Jun 02 01:52:14 PM PDT 24 |
Jun 02 01:52:18 PM PDT 24 |
564373889 ps |
T985 |
/workspace/coverage/cover_reg_top/27.spi_device_intr_test.1774222697 |
|
|
Jun 02 01:52:46 PM PDT 24 |
Jun 02 01:52:47 PM PDT 24 |
13719103 ps |
T122 |
/workspace/coverage/cover_reg_top/6.spi_device_csr_rw.3411395339 |
|
|
Jun 02 01:52:23 PM PDT 24 |
Jun 02 01:52:25 PM PDT 24 |
401368913 ps |
T102 |
/workspace/coverage/cover_reg_top/17.spi_device_tl_errors.3010261352 |
|
|
Jun 02 01:52:36 PM PDT 24 |
Jun 02 01:52:40 PM PDT 24 |
140182588 ps |
T986 |
/workspace/coverage/cover_reg_top/0.spi_device_csr_rw.1788076018 |
|
|
Jun 02 01:52:11 PM PDT 24 |
Jun 02 01:52:14 PM PDT 24 |
37032709 ps |
T987 |
/workspace/coverage/cover_reg_top/31.spi_device_intr_test.1892966867 |
|
|
Jun 02 01:52:49 PM PDT 24 |
Jun 02 01:52:50 PM PDT 24 |
11180428 ps |
T123 |
/workspace/coverage/cover_reg_top/0.spi_device_csr_aliasing.3756245524 |
|
|
Jun 02 01:52:14 PM PDT 24 |
Jun 02 01:52:37 PM PDT 24 |
919529363 ps |
T110 |
/workspace/coverage/cover_reg_top/8.spi_device_tl_errors.4217780412 |
|
|
Jun 02 01:52:27 PM PDT 24 |
Jun 02 01:52:32 PM PDT 24 |
213383677 ps |
T988 |
/workspace/coverage/cover_reg_top/0.spi_device_intr_test.2751211794 |
|
|
Jun 02 01:52:14 PM PDT 24 |
Jun 02 01:52:15 PM PDT 24 |
18474086 ps |
T117 |
/workspace/coverage/cover_reg_top/14.spi_device_csr_mem_rw_with_rand_reset.951960535 |
|
|
Jun 02 01:52:33 PM PDT 24 |
Jun 02 01:52:36 PM PDT 24 |
86347811 ps |
T124 |
/workspace/coverage/cover_reg_top/4.spi_device_mem_partial_access.3287019421 |
|
|
Jun 02 01:52:22 PM PDT 24 |
Jun 02 01:52:25 PM PDT 24 |
528245605 ps |
T989 |
/workspace/coverage/cover_reg_top/17.spi_device_intr_test.2869271852 |
|
|
Jun 02 01:52:39 PM PDT 24 |
Jun 02 01:52:41 PM PDT 24 |
24593463 ps |
T990 |
/workspace/coverage/cover_reg_top/49.spi_device_intr_test.3551684887 |
|
|
Jun 02 01:52:52 PM PDT 24 |
Jun 02 01:52:53 PM PDT 24 |
20873473 ps |
T118 |
/workspace/coverage/cover_reg_top/12.spi_device_tl_intg_err.377688333 |
|
|
Jun 02 01:52:32 PM PDT 24 |
Jun 02 01:52:52 PM PDT 24 |
327941909 ps |
T991 |
/workspace/coverage/cover_reg_top/30.spi_device_intr_test.3212056613 |
|
|
Jun 02 01:52:47 PM PDT 24 |
Jun 02 01:52:48 PM PDT 24 |
23275717 ps |
T114 |
/workspace/coverage/cover_reg_top/19.spi_device_csr_mem_rw_with_rand_reset.2250619625 |
|
|
Jun 02 01:52:49 PM PDT 24 |
Jun 02 01:52:53 PM PDT 24 |
54107872 ps |
T992 |
/workspace/coverage/cover_reg_top/0.spi_device_mem_walk.3420598988 |
|
|
Jun 02 01:52:15 PM PDT 24 |
Jun 02 01:52:16 PM PDT 24 |
11270466 ps |
T993 |
/workspace/coverage/cover_reg_top/24.spi_device_intr_test.2102489129 |
|
|
Jun 02 01:52:45 PM PDT 24 |
Jun 02 01:52:46 PM PDT 24 |
13790351 ps |
T994 |
/workspace/coverage/cover_reg_top/37.spi_device_intr_test.4270010416 |
|
|
Jun 02 01:52:47 PM PDT 24 |
Jun 02 01:52:48 PM PDT 24 |
54946833 ps |
T111 |
/workspace/coverage/cover_reg_top/15.spi_device_csr_mem_rw_with_rand_reset.389415742 |
|
|
Jun 02 01:52:39 PM PDT 24 |
Jun 02 01:52:43 PM PDT 24 |
2161393358 ps |
T995 |
/workspace/coverage/cover_reg_top/12.spi_device_same_csr_outstanding.1556497562 |
|
|
Jun 02 01:52:34 PM PDT 24 |
Jun 02 01:52:37 PM PDT 24 |
439243523 ps |
T996 |
/workspace/coverage/cover_reg_top/25.spi_device_intr_test.3528231104 |
|
|
Jun 02 01:52:48 PM PDT 24 |
Jun 02 01:52:49 PM PDT 24 |
16992097 ps |
T109 |
/workspace/coverage/cover_reg_top/3.spi_device_tl_errors.2264469263 |
|
|
Jun 02 01:52:18 PM PDT 24 |
Jun 02 01:52:22 PM PDT 24 |
197622465 ps |
T125 |
/workspace/coverage/cover_reg_top/2.spi_device_mem_partial_access.3879072414 |
|
|
Jun 02 01:52:17 PM PDT 24 |
Jun 02 01:52:18 PM PDT 24 |
19063251 ps |
T104 |
/workspace/coverage/cover_reg_top/11.spi_device_tl_errors.2144751358 |
|
|
Jun 02 01:52:25 PM PDT 24 |
Jun 02 01:52:29 PM PDT 24 |
125303876 ps |
T105 |
/workspace/coverage/cover_reg_top/14.spi_device_tl_errors.3934458630 |
|
|
Jun 02 01:52:33 PM PDT 24 |
Jun 02 01:52:38 PM PDT 24 |
161556644 ps |
T997 |
/workspace/coverage/cover_reg_top/6.spi_device_csr_mem_rw_with_rand_reset.1057248593 |
|
|
Jun 02 01:52:22 PM PDT 24 |
Jun 02 01:52:24 PM PDT 24 |
82778141 ps |
T998 |
/workspace/coverage/cover_reg_top/9.spi_device_intr_test.625358497 |
|
|
Jun 02 01:52:27 PM PDT 24 |
Jun 02 01:52:29 PM PDT 24 |
29305844 ps |
T149 |
/workspace/coverage/cover_reg_top/16.spi_device_tl_intg_err.2380538637 |
|
|
Jun 02 01:52:41 PM PDT 24 |
Jun 02 01:53:04 PM PDT 24 |
1795020023 ps |
T126 |
/workspace/coverage/cover_reg_top/0.spi_device_mem_partial_access.3577376984 |
|
|
Jun 02 01:52:15 PM PDT 24 |
Jun 02 01:52:16 PM PDT 24 |
38886994 ps |
T999 |
/workspace/coverage/cover_reg_top/7.spi_device_csr_mem_rw_with_rand_reset.4022726247 |
|
|
Jun 02 01:52:32 PM PDT 24 |
Jun 02 01:52:34 PM PDT 24 |
25032765 ps |
T1000 |
/workspace/coverage/cover_reg_top/16.spi_device_csr_rw.51922592 |
|
|
Jun 02 01:52:38 PM PDT 24 |
Jun 02 01:52:41 PM PDT 24 |
151265100 ps |
T127 |
/workspace/coverage/cover_reg_top/1.spi_device_csr_bit_bash.2699691595 |
|
|
Jun 02 01:52:15 PM PDT 24 |
Jun 02 01:52:55 PM PDT 24 |
11222393545 ps |
T177 |
/workspace/coverage/cover_reg_top/1.spi_device_tl_intg_err.2577297789 |
|
|
Jun 02 01:52:15 PM PDT 24 |
Jun 02 01:52:22 PM PDT 24 |
98349092 ps |
T150 |
/workspace/coverage/cover_reg_top/11.spi_device_csr_mem_rw_with_rand_reset.3408426484 |
|
|
Jun 02 01:52:35 PM PDT 24 |
Jun 02 01:52:37 PM PDT 24 |
226787736 ps |
T1001 |
/workspace/coverage/cover_reg_top/0.spi_device_same_csr_outstanding.2237110569 |
|
|
Jun 02 01:52:13 PM PDT 24 |
Jun 02 01:52:18 PM PDT 24 |
62251387 ps |
T1002 |
/workspace/coverage/cover_reg_top/4.spi_device_csr_mem_rw_with_rand_reset.4220844726 |
|
|
Jun 02 01:52:25 PM PDT 24 |
Jun 02 01:52:29 PM PDT 24 |
116276760 ps |
T1003 |
/workspace/coverage/cover_reg_top/2.spi_device_intr_test.1334783945 |
|
|
Jun 02 01:52:21 PM PDT 24 |
Jun 02 01:52:23 PM PDT 24 |
24878423 ps |
T128 |
/workspace/coverage/cover_reg_top/5.spi_device_csr_rw.2406652991 |
|
|
Jun 02 01:52:25 PM PDT 24 |
Jun 02 01:52:28 PM PDT 24 |
130166162 ps |
T1004 |
/workspace/coverage/cover_reg_top/15.spi_device_same_csr_outstanding.2433718803 |
|
|
Jun 02 01:52:38 PM PDT 24 |
Jun 02 01:52:42 PM PDT 24 |
121337104 ps |
T86 |
/workspace/coverage/cover_reg_top/4.spi_device_csr_hw_reset.4147009971 |
|
|
Jun 02 01:52:22 PM PDT 24 |
Jun 02 01:52:24 PM PDT 24 |
164534688 ps |
T1005 |
/workspace/coverage/cover_reg_top/23.spi_device_intr_test.2579396207 |
|
|
Jun 02 01:52:44 PM PDT 24 |
Jun 02 01:52:45 PM PDT 24 |
22953487 ps |
T1006 |
/workspace/coverage/cover_reg_top/46.spi_device_intr_test.4080117950 |
|
|
Jun 02 01:52:44 PM PDT 24 |
Jun 02 01:52:45 PM PDT 24 |
42492446 ps |
T107 |
/workspace/coverage/cover_reg_top/4.spi_device_tl_errors.3178707647 |
|
|
Jun 02 01:52:22 PM PDT 24 |
Jun 02 01:52:24 PM PDT 24 |
93260860 ps |
T129 |
/workspace/coverage/cover_reg_top/13.spi_device_csr_rw.1883446561 |
|
|
Jun 02 01:52:31 PM PDT 24 |
Jun 02 01:52:34 PM PDT 24 |
87885032 ps |
T1007 |
/workspace/coverage/cover_reg_top/33.spi_device_intr_test.255363053 |
|
|
Jun 02 01:52:48 PM PDT 24 |
Jun 02 01:52:49 PM PDT 24 |
22389292 ps |
T1008 |
/workspace/coverage/cover_reg_top/29.spi_device_intr_test.1308869017 |
|
|
Jun 02 01:52:47 PM PDT 24 |
Jun 02 01:52:49 PM PDT 24 |
17724801 ps |
T1009 |
/workspace/coverage/cover_reg_top/5.spi_device_intr_test.2871436194 |
|
|
Jun 02 01:52:23 PM PDT 24 |
Jun 02 01:52:24 PM PDT 24 |
38448555 ps |
T151 |
/workspace/coverage/cover_reg_top/2.spi_device_same_csr_outstanding.4130741667 |
|
|
Jun 02 01:52:19 PM PDT 24 |
Jun 02 01:52:24 PM PDT 24 |
844886269 ps |
T1010 |
/workspace/coverage/cover_reg_top/3.spi_device_csr_rw.86405041 |
|
|
Jun 02 01:52:19 PM PDT 24 |
Jun 02 01:52:21 PM PDT 24 |
74370313 ps |
T1011 |
/workspace/coverage/cover_reg_top/1.spi_device_same_csr_outstanding.1994233150 |
|
|
Jun 02 01:52:16 PM PDT 24 |
Jun 02 01:52:18 PM PDT 24 |
29572963 ps |
T175 |
/workspace/coverage/cover_reg_top/10.spi_device_tl_intg_err.926838685 |
|
|
Jun 02 01:52:29 PM PDT 24 |
Jun 02 01:52:39 PM PDT 24 |
3062807464 ps |
T1012 |
/workspace/coverage/cover_reg_top/22.spi_device_intr_test.2062556300 |
|
|
Jun 02 01:52:48 PM PDT 24 |
Jun 02 01:52:50 PM PDT 24 |
143026706 ps |
T1013 |
/workspace/coverage/cover_reg_top/12.spi_device_csr_mem_rw_with_rand_reset.140575802 |
|
|
Jun 02 01:52:34 PM PDT 24 |
Jun 02 01:52:39 PM PDT 24 |
57670886 ps |
T112 |
/workspace/coverage/cover_reg_top/15.spi_device_tl_errors.945676751 |
|
|
Jun 02 01:52:36 PM PDT 24 |
Jun 02 01:52:41 PM PDT 24 |
64563519 ps |