T812 |
/workspace/coverage/default/26.spi_device_tpm_rw.3735522064 |
|
|
Jun 04 02:21:10 PM PDT 24 |
Jun 04 02:21:12 PM PDT 24 |
49338904 ps |
T813 |
/workspace/coverage/default/32.spi_device_stress_all.1031056096 |
|
|
Jun 04 02:21:45 PM PDT 24 |
Jun 04 02:22:15 PM PDT 24 |
9993954966 ps |
T814 |
/workspace/coverage/default/0.spi_device_alert_test.3706668171 |
|
|
Jun 04 02:18:45 PM PDT 24 |
Jun 04 02:18:46 PM PDT 24 |
14691819 ps |
T815 |
/workspace/coverage/default/42.spi_device_tpm_all.2493370091 |
|
|
Jun 04 02:22:33 PM PDT 24 |
Jun 04 02:22:36 PM PDT 24 |
1802989039 ps |
T816 |
/workspace/coverage/default/43.spi_device_intercept.352106018 |
|
|
Jun 04 02:22:47 PM PDT 24 |
Jun 04 02:22:52 PM PDT 24 |
791032429 ps |
T817 |
/workspace/coverage/default/43.spi_device_flash_and_tpm_min_idle.444304525 |
|
|
Jun 04 02:22:40 PM PDT 24 |
Jun 04 02:23:48 PM PDT 24 |
36725207386 ps |
T818 |
/workspace/coverage/default/45.spi_device_read_buffer_direct.1609829879 |
|
|
Jun 04 02:23:01 PM PDT 24 |
Jun 04 02:23:07 PM PDT 24 |
1459887945 ps |
T819 |
/workspace/coverage/default/48.spi_device_mailbox.3660113981 |
|
|
Jun 04 02:23:17 PM PDT 24 |
Jun 04 02:23:22 PM PDT 24 |
157454336 ps |
T820 |
/workspace/coverage/default/1.spi_device_csb_read.2224592311 |
|
|
Jun 04 02:18:46 PM PDT 24 |
Jun 04 02:18:47 PM PDT 24 |
31714375 ps |
T821 |
/workspace/coverage/default/4.spi_device_alert_test.3697979259 |
|
|
Jun 04 02:19:15 PM PDT 24 |
Jun 04 02:19:17 PM PDT 24 |
13485988 ps |
T252 |
/workspace/coverage/default/36.spi_device_flash_all.3100716828 |
|
|
Jun 04 02:22:04 PM PDT 24 |
Jun 04 02:23:24 PM PDT 24 |
11844391837 ps |
T822 |
/workspace/coverage/default/8.spi_device_read_buffer_direct.3758621881 |
|
|
Jun 04 02:19:28 PM PDT 24 |
Jun 04 02:19:33 PM PDT 24 |
103784120 ps |
T823 |
/workspace/coverage/default/14.spi_device_upload.1025529945 |
|
|
Jun 04 02:20:05 PM PDT 24 |
Jun 04 02:20:14 PM PDT 24 |
8405667376 ps |
T69 |
/workspace/coverage/default/0.spi_device_sec_cm.645300164 |
|
|
Jun 04 02:18:45 PM PDT 24 |
Jun 04 02:18:47 PM PDT 24 |
370363658 ps |
T824 |
/workspace/coverage/default/41.spi_device_mailbox.3204705056 |
|
|
Jun 04 02:22:32 PM PDT 24 |
Jun 04 02:23:43 PM PDT 24 |
23101604038 ps |
T825 |
/workspace/coverage/default/40.spi_device_flash_mode.2116009620 |
|
|
Jun 04 02:22:29 PM PDT 24 |
Jun 04 02:22:56 PM PDT 24 |
7431547886 ps |
T826 |
/workspace/coverage/default/31.spi_device_flash_mode.2842214983 |
|
|
Jun 04 02:21:41 PM PDT 24 |
Jun 04 02:21:58 PM PDT 24 |
1076517580 ps |
T827 |
/workspace/coverage/default/22.spi_device_pass_addr_payload_swap.1483411585 |
|
|
Jun 04 02:20:49 PM PDT 24 |
Jun 04 02:21:07 PM PDT 24 |
31456355282 ps |
T828 |
/workspace/coverage/default/6.spi_device_cfg_cmd.1074721592 |
|
|
Jun 04 02:19:21 PM PDT 24 |
Jun 04 02:19:24 PM PDT 24 |
200302613 ps |
T261 |
/workspace/coverage/default/25.spi_device_flash_and_tpm_min_idle.1687553889 |
|
|
Jun 04 02:21:11 PM PDT 24 |
Jun 04 02:21:52 PM PDT 24 |
5077604845 ps |
T829 |
/workspace/coverage/default/11.spi_device_csb_read.1423600551 |
|
|
Jun 04 02:19:47 PM PDT 24 |
Jun 04 02:19:49 PM PDT 24 |
107348944 ps |
T830 |
/workspace/coverage/default/17.spi_device_cfg_cmd.1283529354 |
|
|
Jun 04 02:20:18 PM PDT 24 |
Jun 04 02:20:24 PM PDT 24 |
1711348173 ps |
T237 |
/workspace/coverage/default/29.spi_device_flash_and_tpm_min_idle.1279047804 |
|
|
Jun 04 02:21:34 PM PDT 24 |
Jun 04 02:27:06 PM PDT 24 |
56486946370 ps |
T831 |
/workspace/coverage/default/11.spi_device_pass_addr_payload_swap.2441327110 |
|
|
Jun 04 02:19:45 PM PDT 24 |
Jun 04 02:19:56 PM PDT 24 |
4544116337 ps |
T832 |
/workspace/coverage/default/38.spi_device_intercept.96856531 |
|
|
Jun 04 02:22:11 PM PDT 24 |
Jun 04 02:22:16 PM PDT 24 |
98227023 ps |
T833 |
/workspace/coverage/default/23.spi_device_flash_all.2855655102 |
|
|
Jun 04 02:20:55 PM PDT 24 |
Jun 04 02:21:09 PM PDT 24 |
2664260873 ps |
T834 |
/workspace/coverage/default/17.spi_device_read_buffer_direct.1094062154 |
|
|
Jun 04 02:20:20 PM PDT 24 |
Jun 04 02:20:43 PM PDT 24 |
5269353217 ps |
T835 |
/workspace/coverage/default/16.spi_device_tpm_rw.3448214095 |
|
|
Jun 04 02:20:11 PM PDT 24 |
Jun 04 02:20:15 PM PDT 24 |
317235928 ps |
T836 |
/workspace/coverage/default/20.spi_device_tpm_all.2541921311 |
|
|
Jun 04 02:20:33 PM PDT 24 |
Jun 04 02:20:57 PM PDT 24 |
1849220327 ps |
T837 |
/workspace/coverage/default/37.spi_device_alert_test.3245179025 |
|
|
Jun 04 02:22:15 PM PDT 24 |
Jun 04 02:22:17 PM PDT 24 |
70270880 ps |
T838 |
/workspace/coverage/default/1.spi_device_pass_cmd_filtering.4090731491 |
|
|
Jun 04 02:18:43 PM PDT 24 |
Jun 04 02:18:47 PM PDT 24 |
106004276 ps |
T839 |
/workspace/coverage/default/10.spi_device_flash_mode.1212917765 |
|
|
Jun 04 02:19:42 PM PDT 24 |
Jun 04 02:19:51 PM PDT 24 |
464056135 ps |
T840 |
/workspace/coverage/default/21.spi_device_intercept.3746542581 |
|
|
Jun 04 02:20:44 PM PDT 24 |
Jun 04 02:20:50 PM PDT 24 |
316412132 ps |
T841 |
/workspace/coverage/default/4.spi_device_tpm_sts_read.3690286211 |
|
|
Jun 04 02:19:05 PM PDT 24 |
Jun 04 02:19:06 PM PDT 24 |
70785617 ps |
T842 |
/workspace/coverage/default/27.spi_device_flash_and_tpm_min_idle.3604897777 |
|
|
Jun 04 02:21:18 PM PDT 24 |
Jun 04 02:27:34 PM PDT 24 |
37015157744 ps |
T843 |
/workspace/coverage/default/23.spi_device_read_buffer_direct.2156868624 |
|
|
Jun 04 02:20:58 PM PDT 24 |
Jun 04 02:21:03 PM PDT 24 |
285715675 ps |
T844 |
/workspace/coverage/default/2.spi_device_mem_parity.1842108683 |
|
|
Jun 04 02:18:52 PM PDT 24 |
Jun 04 02:18:54 PM PDT 24 |
120213435 ps |
T845 |
/workspace/coverage/default/37.spi_device_cfg_cmd.1506760206 |
|
|
Jun 04 02:22:11 PM PDT 24 |
Jun 04 02:22:35 PM PDT 24 |
8145043025 ps |
T846 |
/workspace/coverage/default/48.spi_device_cfg_cmd.3937194641 |
|
|
Jun 04 02:23:06 PM PDT 24 |
Jun 04 02:23:14 PM PDT 24 |
531175918 ps |
T847 |
/workspace/coverage/default/0.spi_device_intercept.1040441816 |
|
|
Jun 04 02:18:48 PM PDT 24 |
Jun 04 02:18:52 PM PDT 24 |
1051523145 ps |
T848 |
/workspace/coverage/default/29.spi_device_pass_cmd_filtering.1089746057 |
|
|
Jun 04 02:21:26 PM PDT 24 |
Jun 04 02:21:40 PM PDT 24 |
2106564451 ps |
T849 |
/workspace/coverage/default/31.spi_device_tpm_read_hw_reg.594191826 |
|
|
Jun 04 02:21:41 PM PDT 24 |
Jun 04 02:21:49 PM PDT 24 |
5440535862 ps |
T850 |
/workspace/coverage/default/28.spi_device_stress_all.3891531835 |
|
|
Jun 04 02:21:26 PM PDT 24 |
Jun 04 02:21:28 PM PDT 24 |
230150724 ps |
T851 |
/workspace/coverage/default/31.spi_device_intercept.1273304311 |
|
|
Jun 04 02:21:35 PM PDT 24 |
Jun 04 02:21:40 PM PDT 24 |
155630141 ps |
T852 |
/workspace/coverage/default/13.spi_device_tpm_rw.2571292389 |
|
|
Jun 04 02:20:00 PM PDT 24 |
Jun 04 02:20:02 PM PDT 24 |
80048845 ps |
T853 |
/workspace/coverage/default/42.spi_device_csb_read.2082915205 |
|
|
Jun 04 02:22:36 PM PDT 24 |
Jun 04 02:22:37 PM PDT 24 |
62334624 ps |
T854 |
/workspace/coverage/default/24.spi_device_stress_all.3652076743 |
|
|
Jun 04 02:21:01 PM PDT 24 |
Jun 04 02:25:30 PM PDT 24 |
142478263339 ps |
T855 |
/workspace/coverage/default/48.spi_device_tpm_read_hw_reg.3937598306 |
|
|
Jun 04 02:23:14 PM PDT 24 |
Jun 04 02:23:40 PM PDT 24 |
8314932883 ps |
T244 |
/workspace/coverage/default/18.spi_device_flash_and_tpm.2983159973 |
|
|
Jun 04 02:20:28 PM PDT 24 |
Jun 04 02:23:21 PM PDT 24 |
10577473727 ps |
T856 |
/workspace/coverage/default/10.spi_device_intercept.1083170059 |
|
|
Jun 04 02:19:39 PM PDT 24 |
Jun 04 02:19:45 PM PDT 24 |
337627318 ps |
T857 |
/workspace/coverage/default/13.spi_device_pass_addr_payload_swap.1490982361 |
|
|
Jun 04 02:20:00 PM PDT 24 |
Jun 04 02:20:07 PM PDT 24 |
369919442 ps |
T858 |
/workspace/coverage/default/29.spi_device_cfg_cmd.3055070048 |
|
|
Jun 04 02:21:33 PM PDT 24 |
Jun 04 02:21:37 PM PDT 24 |
122655309 ps |
T859 |
/workspace/coverage/default/7.spi_device_tpm_all.4173142346 |
|
|
Jun 04 02:19:24 PM PDT 24 |
Jun 04 02:19:49 PM PDT 24 |
13954087037 ps |
T860 |
/workspace/coverage/default/20.spi_device_mailbox.762678757 |
|
|
Jun 04 02:20:43 PM PDT 24 |
Jun 04 02:20:58 PM PDT 24 |
1931587025 ps |
T255 |
/workspace/coverage/default/24.spi_device_flash_and_tpm_min_idle.3675896311 |
|
|
Jun 04 02:21:04 PM PDT 24 |
Jun 04 02:23:07 PM PDT 24 |
74949351147 ps |
T861 |
/workspace/coverage/default/49.spi_device_flash_and_tpm.1210537255 |
|
|
Jun 04 02:23:14 PM PDT 24 |
Jun 04 02:27:05 PM PDT 24 |
103459329209 ps |
T862 |
/workspace/coverage/default/5.spi_device_flash_and_tpm_min_idle.71957998 |
|
|
Jun 04 02:19:13 PM PDT 24 |
Jun 04 02:20:35 PM PDT 24 |
12092036518 ps |
T863 |
/workspace/coverage/default/8.spi_device_upload.4103885223 |
|
|
Jun 04 02:19:30 PM PDT 24 |
Jun 04 02:19:37 PM PDT 24 |
3118436459 ps |
T138 |
/workspace/coverage/default/1.spi_device_stress_all.1845679660 |
|
|
Jun 04 02:18:51 PM PDT 24 |
Jun 04 02:23:31 PM PDT 24 |
103446153568 ps |
T864 |
/workspace/coverage/default/24.spi_device_pass_cmd_filtering.3418865744 |
|
|
Jun 04 02:20:56 PM PDT 24 |
Jun 04 02:21:10 PM PDT 24 |
1859570958 ps |
T865 |
/workspace/coverage/default/30.spi_device_tpm_sts_read.774294246 |
|
|
Jun 04 02:21:34 PM PDT 24 |
Jun 04 02:21:36 PM PDT 24 |
96254845 ps |
T866 |
/workspace/coverage/default/37.spi_device_intercept.1976275608 |
|
|
Jun 04 02:22:11 PM PDT 24 |
Jun 04 02:22:39 PM PDT 24 |
2927771905 ps |
T867 |
/workspace/coverage/default/15.spi_device_flash_all.502319901 |
|
|
Jun 04 02:20:11 PM PDT 24 |
Jun 04 02:21:47 PM PDT 24 |
4511780636 ps |
T868 |
/workspace/coverage/default/40.spi_device_upload.632540095 |
|
|
Jun 04 02:22:26 PM PDT 24 |
Jun 04 02:22:30 PM PDT 24 |
306202107 ps |
T869 |
/workspace/coverage/default/26.spi_device_flash_and_tpm_min_idle.1313017303 |
|
|
Jun 04 02:21:18 PM PDT 24 |
Jun 04 02:22:56 PM PDT 24 |
4450401049 ps |
T870 |
/workspace/coverage/default/14.spi_device_mem_parity.1880467687 |
|
|
Jun 04 02:20:06 PM PDT 24 |
Jun 04 02:20:08 PM PDT 24 |
17680041 ps |
T871 |
/workspace/coverage/default/23.spi_device_tpm_all.88111833 |
|
|
Jun 04 02:20:58 PM PDT 24 |
Jun 04 02:21:14 PM PDT 24 |
2694559295 ps |
T872 |
/workspace/coverage/default/8.spi_device_tpm_sts_read.1262459843 |
|
|
Jun 04 02:19:32 PM PDT 24 |
Jun 04 02:19:33 PM PDT 24 |
34916043 ps |
T873 |
/workspace/coverage/default/41.spi_device_tpm_read_hw_reg.1597714733 |
|
|
Jun 04 02:22:26 PM PDT 24 |
Jun 04 02:22:31 PM PDT 24 |
1035088320 ps |
T874 |
/workspace/coverage/default/1.spi_device_tpm_all.3251612152 |
|
|
Jun 04 02:18:46 PM PDT 24 |
Jun 04 02:19:29 PM PDT 24 |
14296568993 ps |
T875 |
/workspace/coverage/default/26.spi_device_tpm_all.74037149 |
|
|
Jun 04 02:21:12 PM PDT 24 |
Jun 04 02:21:33 PM PDT 24 |
2034383858 ps |
T876 |
/workspace/coverage/default/28.spi_device_intercept.3019496035 |
|
|
Jun 04 02:21:29 PM PDT 24 |
Jun 04 02:21:40 PM PDT 24 |
1012738580 ps |
T877 |
/workspace/coverage/default/14.spi_device_alert_test.1155532220 |
|
|
Jun 04 02:20:05 PM PDT 24 |
Jun 04 02:20:07 PM PDT 24 |
14332807 ps |
T878 |
/workspace/coverage/default/20.spi_device_tpm_read_hw_reg.884571727 |
|
|
Jun 04 02:20:34 PM PDT 24 |
Jun 04 02:20:39 PM PDT 24 |
704149428 ps |
T879 |
/workspace/coverage/default/39.spi_device_mailbox.478583200 |
|
|
Jun 04 02:22:21 PM PDT 24 |
Jun 04 02:23:06 PM PDT 24 |
6469499788 ps |
T880 |
/workspace/coverage/default/21.spi_device_read_buffer_direct.3909801410 |
|
|
Jun 04 02:20:49 PM PDT 24 |
Jun 04 02:20:58 PM PDT 24 |
1041311304 ps |
T881 |
/workspace/coverage/default/29.spi_device_upload.1109438509 |
|
|
Jun 04 02:21:28 PM PDT 24 |
Jun 04 02:21:42 PM PDT 24 |
5158117479 ps |
T882 |
/workspace/coverage/default/25.spi_device_tpm_all.1606210724 |
|
|
Jun 04 02:21:05 PM PDT 24 |
Jun 04 02:21:34 PM PDT 24 |
9453174075 ps |
T883 |
/workspace/coverage/default/17.spi_device_intercept.3410761735 |
|
|
Jun 04 02:20:19 PM PDT 24 |
Jun 04 02:20:32 PM PDT 24 |
1191894589 ps |
T884 |
/workspace/coverage/default/45.spi_device_flash_and_tpm_min_idle.3770569953 |
|
|
Jun 04 02:22:56 PM PDT 24 |
Jun 04 02:27:45 PM PDT 24 |
392805918205 ps |
T313 |
/workspace/coverage/default/20.spi_device_flash_mode.3675242163 |
|
|
Jun 04 02:20:41 PM PDT 24 |
Jun 04 02:20:52 PM PDT 24 |
613507844 ps |
T885 |
/workspace/coverage/default/23.spi_device_pass_addr_payload_swap.283438132 |
|
|
Jun 04 02:20:57 PM PDT 24 |
Jun 04 02:21:06 PM PDT 24 |
2995668535 ps |
T886 |
/workspace/coverage/default/12.spi_device_alert_test.3800178741 |
|
|
Jun 04 02:20:02 PM PDT 24 |
Jun 04 02:20:04 PM PDT 24 |
43359432 ps |
T887 |
/workspace/coverage/default/14.spi_device_mailbox.119405239 |
|
|
Jun 04 02:20:04 PM PDT 24 |
Jun 04 02:22:33 PM PDT 24 |
72776496592 ps |
T888 |
/workspace/coverage/default/4.spi_device_flash_and_tpm.2970778494 |
|
|
Jun 04 02:19:06 PM PDT 24 |
Jun 04 02:20:30 PM PDT 24 |
12067376287 ps |
T314 |
/workspace/coverage/default/44.spi_device_flash_mode.1592246537 |
|
|
Jun 04 02:22:46 PM PDT 24 |
Jun 04 02:23:14 PM PDT 24 |
4495528386 ps |
T889 |
/workspace/coverage/default/22.spi_device_intercept.3869275770 |
|
|
Jun 04 02:20:48 PM PDT 24 |
Jun 04 02:21:00 PM PDT 24 |
2982731810 ps |
T890 |
/workspace/coverage/default/28.spi_device_flash_mode.3619767408 |
|
|
Jun 04 02:21:28 PM PDT 24 |
Jun 04 02:21:32 PM PDT 24 |
66007998 ps |
T891 |
/workspace/coverage/default/0.spi_device_tpm_read_hw_reg.1409875509 |
|
|
Jun 04 02:18:44 PM PDT 24 |
Jun 04 02:18:58 PM PDT 24 |
4632354765 ps |
T892 |
/workspace/coverage/default/10.spi_device_tpm_all.3929766007 |
|
|
Jun 04 02:19:38 PM PDT 24 |
Jun 04 02:19:59 PM PDT 24 |
21579881968 ps |
T893 |
/workspace/coverage/default/21.spi_device_flash_and_tpm.687593745 |
|
|
Jun 04 02:20:50 PM PDT 24 |
Jun 04 02:21:48 PM PDT 24 |
26679103067 ps |
T894 |
/workspace/coverage/default/30.spi_device_stress_all.877560259 |
|
|
Jun 04 02:21:41 PM PDT 24 |
Jun 04 02:21:43 PM PDT 24 |
42299460 ps |
T895 |
/workspace/coverage/default/48.spi_device_tpm_sts_read.954532112 |
|
|
Jun 04 02:23:08 PM PDT 24 |
Jun 04 02:23:09 PM PDT 24 |
39228225 ps |
T896 |
/workspace/coverage/default/6.spi_device_flash_and_tpm_min_idle.2448838997 |
|
|
Jun 04 02:19:20 PM PDT 24 |
Jun 04 02:20:39 PM PDT 24 |
19086772449 ps |
T897 |
/workspace/coverage/default/19.spi_device_tpm_all.2162898402 |
|
|
Jun 04 02:20:34 PM PDT 24 |
Jun 04 02:20:35 PM PDT 24 |
42034414 ps |
T898 |
/workspace/coverage/default/17.spi_device_mailbox.455735072 |
|
|
Jun 04 02:20:21 PM PDT 24 |
Jun 04 02:20:26 PM PDT 24 |
823792268 ps |
T899 |
/workspace/coverage/default/27.spi_device_intercept.1869903284 |
|
|
Jun 04 02:21:23 PM PDT 24 |
Jun 04 02:21:27 PM PDT 24 |
8602225018 ps |
T900 |
/workspace/coverage/default/12.spi_device_flash_and_tpm.3453339076 |
|
|
Jun 04 02:19:59 PM PDT 24 |
Jun 04 02:20:32 PM PDT 24 |
4633755779 ps |
T901 |
/workspace/coverage/default/46.spi_device_upload.4230389782 |
|
|
Jun 04 02:22:56 PM PDT 24 |
Jun 04 02:23:04 PM PDT 24 |
3790306153 ps |
T902 |
/workspace/coverage/default/41.spi_device_read_buffer_direct.3395942666 |
|
|
Jun 04 02:22:36 PM PDT 24 |
Jun 04 02:22:48 PM PDT 24 |
1094448597 ps |
T903 |
/workspace/coverage/default/8.spi_device_intercept.223105012 |
|
|
Jun 04 02:19:32 PM PDT 24 |
Jun 04 02:19:38 PM PDT 24 |
715787111 ps |
T248 |
/workspace/coverage/default/39.spi_device_stress_all.3657610776 |
|
|
Jun 04 02:22:23 PM PDT 24 |
Jun 04 02:31:46 PM PDT 24 |
68461099038 ps |
T904 |
/workspace/coverage/default/20.spi_device_stress_all.127598035 |
|
|
Jun 04 02:20:41 PM PDT 24 |
Jun 04 02:20:42 PM PDT 24 |
80924671 ps |
T905 |
/workspace/coverage/default/16.spi_device_flash_mode.2501339589 |
|
|
Jun 04 02:20:11 PM PDT 24 |
Jun 04 02:20:26 PM PDT 24 |
2877247903 ps |
T257 |
/workspace/coverage/default/46.spi_device_stress_all.1187853461 |
|
|
Jun 04 02:22:59 PM PDT 24 |
Jun 04 02:33:35 PM PDT 24 |
63656893920 ps |
T906 |
/workspace/coverage/default/18.spi_device_upload.4178539006 |
|
|
Jun 04 02:20:30 PM PDT 24 |
Jun 04 02:20:37 PM PDT 24 |
1773177110 ps |
T907 |
/workspace/coverage/default/15.spi_device_intercept.879621712 |
|
|
Jun 04 02:20:05 PM PDT 24 |
Jun 04 02:20:22 PM PDT 24 |
19763697518 ps |
T908 |
/workspace/coverage/default/29.spi_device_csb_read.3566823588 |
|
|
Jun 04 02:21:28 PM PDT 24 |
Jun 04 02:21:30 PM PDT 24 |
14410903 ps |
T909 |
/workspace/coverage/default/21.spi_device_tpm_all.2220219217 |
|
|
Jun 04 02:20:44 PM PDT 24 |
Jun 04 02:21:20 PM PDT 24 |
4422382161 ps |
T910 |
/workspace/coverage/default/37.spi_device_tpm_sts_read.2475667581 |
|
|
Jun 04 02:22:09 PM PDT 24 |
Jun 04 02:22:10 PM PDT 24 |
181268896 ps |
T911 |
/workspace/coverage/default/1.spi_device_flash_mode.213983966 |
|
|
Jun 04 02:18:52 PM PDT 24 |
Jun 04 02:19:09 PM PDT 24 |
1678169910 ps |
T912 |
/workspace/coverage/default/24.spi_device_flash_and_tpm.1832954837 |
|
|
Jun 04 02:21:03 PM PDT 24 |
Jun 04 02:21:33 PM PDT 24 |
3977444150 ps |
T913 |
/workspace/coverage/default/7.spi_device_tpm_sts_read.48157326 |
|
|
Jun 04 02:19:21 PM PDT 24 |
Jun 04 02:19:23 PM PDT 24 |
112314905 ps |
T914 |
/workspace/coverage/default/44.spi_device_tpm_all.2817771855 |
|
|
Jun 04 02:22:48 PM PDT 24 |
Jun 04 02:23:15 PM PDT 24 |
24754530779 ps |
T915 |
/workspace/coverage/default/14.spi_device_stress_all.3695284563 |
|
|
Jun 04 02:20:04 PM PDT 24 |
Jun 04 02:25:52 PM PDT 24 |
293041367303 ps |
T916 |
/workspace/coverage/default/23.spi_device_tpm_read_hw_reg.3226669028 |
|
|
Jun 04 02:20:54 PM PDT 24 |
Jun 04 02:21:04 PM PDT 24 |
2227541254 ps |
T917 |
/workspace/coverage/default/18.spi_device_tpm_read_hw_reg.841593474 |
|
|
Jun 04 02:20:25 PM PDT 24 |
Jun 04 02:20:29 PM PDT 24 |
982519342 ps |
T918 |
/workspace/coverage/default/33.spi_device_flash_and_tpm_min_idle.467547465 |
|
|
Jun 04 02:21:47 PM PDT 24 |
Jun 04 02:22:12 PM PDT 24 |
4099167138 ps |
T919 |
/workspace/coverage/default/21.spi_device_upload.802836354 |
|
|
Jun 04 02:20:49 PM PDT 24 |
Jun 04 02:21:08 PM PDT 24 |
8677405311 ps |
T920 |
/workspace/coverage/default/11.spi_device_cfg_cmd.765142383 |
|
|
Jun 04 02:19:50 PM PDT 24 |
Jun 04 02:19:54 PM PDT 24 |
173608519 ps |
T921 |
/workspace/coverage/default/33.spi_device_cfg_cmd.1112907368 |
|
|
Jun 04 02:21:47 PM PDT 24 |
Jun 04 02:21:55 PM PDT 24 |
416440396 ps |
T922 |
/workspace/coverage/default/33.spi_device_upload.3638916602 |
|
|
Jun 04 02:21:50 PM PDT 24 |
Jun 04 02:22:03 PM PDT 24 |
5765572315 ps |
T923 |
/workspace/coverage/default/8.spi_device_flash_and_tpm_min_idle.3691636996 |
|
|
Jun 04 02:19:29 PM PDT 24 |
Jun 04 02:19:48 PM PDT 24 |
9351121637 ps |
T924 |
/workspace/coverage/default/0.spi_device_mem_parity.2499318126 |
|
|
Jun 04 02:18:43 PM PDT 24 |
Jun 04 02:18:45 PM PDT 24 |
87704228 ps |
T925 |
/workspace/coverage/default/28.spi_device_cfg_cmd.3340292526 |
|
|
Jun 04 02:21:32 PM PDT 24 |
Jun 04 02:21:46 PM PDT 24 |
1610889194 ps |
T926 |
/workspace/coverage/default/7.spi_device_mailbox.1538563047 |
|
|
Jun 04 02:19:29 PM PDT 24 |
Jun 04 02:20:26 PM PDT 24 |
8032808299 ps |
T927 |
/workspace/coverage/default/7.spi_device_csb_read.3323185400 |
|
|
Jun 04 02:19:23 PM PDT 24 |
Jun 04 02:19:25 PM PDT 24 |
20015171 ps |
T928 |
/workspace/coverage/default/20.spi_device_read_buffer_direct.4149343899 |
|
|
Jun 04 02:20:42 PM PDT 24 |
Jun 04 02:20:55 PM PDT 24 |
4915347122 ps |
T929 |
/workspace/coverage/default/4.spi_device_mailbox.2607623970 |
|
|
Jun 04 02:19:07 PM PDT 24 |
Jun 04 02:19:23 PM PDT 24 |
6697229008 ps |
T930 |
/workspace/coverage/default/47.spi_device_alert_test.4140439338 |
|
|
Jun 04 02:23:19 PM PDT 24 |
Jun 04 02:23:21 PM PDT 24 |
14247757 ps |
T931 |
/workspace/coverage/default/42.spi_device_stress_all.4189783967 |
|
|
Jun 04 02:22:41 PM PDT 24 |
Jun 04 02:23:46 PM PDT 24 |
17641416422 ps |
T932 |
/workspace/coverage/default/9.spi_device_tpm_rw.1191596403 |
|
|
Jun 04 02:19:30 PM PDT 24 |
Jun 04 02:19:33 PM PDT 24 |
447426694 ps |
T933 |
/workspace/coverage/default/21.spi_device_flash_and_tpm_min_idle.520822566 |
|
|
Jun 04 02:20:47 PM PDT 24 |
Jun 04 02:20:58 PM PDT 24 |
3058006417 ps |
T934 |
/workspace/coverage/default/39.spi_device_tpm_rw.1192347546 |
|
|
Jun 04 02:22:17 PM PDT 24 |
Jun 04 02:22:19 PM PDT 24 |
38130102 ps |
T935 |
/workspace/coverage/default/9.spi_device_tpm_read_hw_reg.2741940593 |
|
|
Jun 04 02:19:30 PM PDT 24 |
Jun 04 02:19:49 PM PDT 24 |
5230756267 ps |
T936 |
/workspace/coverage/default/32.spi_device_intercept.1126901117 |
|
|
Jun 04 02:21:40 PM PDT 24 |
Jun 04 02:21:44 PM PDT 24 |
467173743 ps |
T937 |
/workspace/coverage/default/38.spi_device_read_buffer_direct.3884905184 |
|
|
Jun 04 02:22:16 PM PDT 24 |
Jun 04 02:22:27 PM PDT 24 |
8138506650 ps |
T938 |
/workspace/coverage/default/32.spi_device_flash_and_tpm_min_idle.1145784109 |
|
|
Jun 04 02:21:49 PM PDT 24 |
Jun 04 02:27:57 PM PDT 24 |
153484847777 ps |
T939 |
/workspace/coverage/default/4.spi_device_intercept.1586767295 |
|
|
Jun 04 02:19:10 PM PDT 24 |
Jun 04 02:19:19 PM PDT 24 |
2221565786 ps |
T940 |
/workspace/coverage/default/15.spi_device_pass_cmd_filtering.3893410658 |
|
|
Jun 04 02:20:02 PM PDT 24 |
Jun 04 02:20:05 PM PDT 24 |
363813507 ps |
T227 |
/workspace/coverage/default/33.spi_device_flash_and_tpm.2956429127 |
|
|
Jun 04 02:21:47 PM PDT 24 |
Jun 04 02:27:34 PM PDT 24 |
30564598388 ps |
T941 |
/workspace/coverage/default/31.spi_device_tpm_rw.1012186223 |
|
|
Jun 04 02:21:32 PM PDT 24 |
Jun 04 02:21:34 PM PDT 24 |
168671889 ps |
T942 |
/workspace/coverage/default/11.spi_device_alert_test.2643632154 |
|
|
Jun 04 02:19:53 PM PDT 24 |
Jun 04 02:19:55 PM PDT 24 |
26409948 ps |
T943 |
/workspace/coverage/default/14.spi_device_tpm_rw.3714492811 |
|
|
Jun 04 02:20:05 PM PDT 24 |
Jun 04 02:20:08 PM PDT 24 |
36078742 ps |
T944 |
/workspace/coverage/default/48.spi_device_intercept.3011295591 |
|
|
Jun 04 02:23:19 PM PDT 24 |
Jun 04 02:23:32 PM PDT 24 |
1307265880 ps |
T945 |
/workspace/coverage/default/36.spi_device_pass_addr_payload_swap.66406549 |
|
|
Jun 04 02:22:05 PM PDT 24 |
Jun 04 02:22:09 PM PDT 24 |
301078923 ps |
T946 |
/workspace/coverage/default/13.spi_device_alert_test.1245984011 |
|
|
Jun 04 02:20:02 PM PDT 24 |
Jun 04 02:20:03 PM PDT 24 |
13555607 ps |
T947 |
/workspace/coverage/default/25.spi_device_cfg_cmd.2571308258 |
|
|
Jun 04 02:21:11 PM PDT 24 |
Jun 04 02:21:14 PM PDT 24 |
201413890 ps |
T948 |
/workspace/coverage/default/48.spi_device_upload.3253374034 |
|
|
Jun 04 02:23:07 PM PDT 24 |
Jun 04 02:23:31 PM PDT 24 |
24638075085 ps |
T949 |
/workspace/coverage/default/2.spi_device_alert_test.1257639594 |
|
|
Jun 04 02:18:59 PM PDT 24 |
Jun 04 02:19:00 PM PDT 24 |
28222731 ps |
T950 |
/workspace/coverage/default/6.spi_device_mem_parity.3456449273 |
|
|
Jun 04 02:19:13 PM PDT 24 |
Jun 04 02:19:15 PM PDT 24 |
41582367 ps |
T951 |
/workspace/coverage/default/8.spi_device_pass_cmd_filtering.3491136909 |
|
|
Jun 04 02:19:30 PM PDT 24 |
Jun 04 02:19:49 PM PDT 24 |
49988731804 ps |
T952 |
/workspace/coverage/default/25.spi_device_alert_test.3907504028 |
|
|
Jun 04 02:21:15 PM PDT 24 |
Jun 04 02:21:16 PM PDT 24 |
41491109 ps |
T953 |
/workspace/coverage/default/34.spi_device_read_buffer_direct.508695028 |
|
|
Jun 04 02:21:57 PM PDT 24 |
Jun 04 02:22:03 PM PDT 24 |
2918973610 ps |
T954 |
/workspace/coverage/default/11.spi_device_read_buffer_direct.532647510 |
|
|
Jun 04 02:19:50 PM PDT 24 |
Jun 04 02:20:04 PM PDT 24 |
1381604410 ps |
T955 |
/workspace/coverage/default/33.spi_device_pass_cmd_filtering.94345637 |
|
|
Jun 04 02:21:50 PM PDT 24 |
Jun 04 02:21:53 PM PDT 24 |
107030003 ps |
T956 |
/workspace/coverage/default/14.spi_device_pass_cmd_filtering.1552761753 |
|
|
Jun 04 02:20:08 PM PDT 24 |
Jun 04 02:20:15 PM PDT 24 |
1404477043 ps |
T957 |
/workspace/coverage/default/38.spi_device_flash_and_tpm.3139627173 |
|
|
Jun 04 02:22:23 PM PDT 24 |
Jun 04 02:23:01 PM PDT 24 |
14259975876 ps |
T958 |
/workspace/coverage/default/7.spi_device_pass_addr_payload_swap.2478931767 |
|
|
Jun 04 02:19:22 PM PDT 24 |
Jun 04 02:19:25 PM PDT 24 |
55889025 ps |
T959 |
/workspace/coverage/default/49.spi_device_cfg_cmd.789750695 |
|
|
Jun 04 02:23:15 PM PDT 24 |
Jun 04 02:23:20 PM PDT 24 |
312868532 ps |
T222 |
/workspace/coverage/default/1.spi_device_flash_and_tpm_min_idle.2949825332 |
|
|
Jun 04 02:18:50 PM PDT 24 |
Jun 04 02:26:08 PM PDT 24 |
147049062016 ps |
T960 |
/workspace/coverage/default/41.spi_device_flash_all.1047458652 |
|
|
Jun 04 02:22:33 PM PDT 24 |
Jun 04 02:23:02 PM PDT 24 |
2461910593 ps |
T961 |
/workspace/coverage/default/37.spi_device_csb_read.1649476770 |
|
|
Jun 04 02:22:12 PM PDT 24 |
Jun 04 02:22:14 PM PDT 24 |
14893258 ps |
T962 |
/workspace/coverage/default/38.spi_device_flash_all.887979058 |
|
|
Jun 04 02:22:18 PM PDT 24 |
Jun 04 02:23:16 PM PDT 24 |
4293087154 ps |
T963 |
/workspace/coverage/default/17.spi_device_mem_parity.3914847252 |
|
|
Jun 04 02:20:18 PM PDT 24 |
Jun 04 02:20:21 PM PDT 24 |
33714386 ps |
T964 |
/workspace/coverage/default/30.spi_device_mailbox.1902237025 |
|
|
Jun 04 02:21:38 PM PDT 24 |
Jun 04 02:22:02 PM PDT 24 |
1322215909 ps |
T965 |
/workspace/coverage/default/36.spi_device_cfg_cmd.1294907672 |
|
|
Jun 04 02:22:07 PM PDT 24 |
Jun 04 02:22:11 PM PDT 24 |
872103975 ps |
T966 |
/workspace/coverage/default/32.spi_device_tpm_rw.2227114819 |
|
|
Jun 04 02:21:40 PM PDT 24 |
Jun 04 02:21:43 PM PDT 24 |
181441339 ps |
T967 |
/workspace/coverage/default/47.spi_device_tpm_all.3484045761 |
|
|
Jun 04 02:23:00 PM PDT 24 |
Jun 04 02:23:02 PM PDT 24 |
13053857 ps |
T968 |
/workspace/coverage/default/19.spi_device_tpm_read_hw_reg.124752572 |
|
|
Jun 04 02:20:34 PM PDT 24 |
Jun 04 02:20:45 PM PDT 24 |
3630384085 ps |
T969 |
/workspace/coverage/default/43.spi_device_tpm_read_hw_reg.1761992137 |
|
|
Jun 04 02:22:38 PM PDT 24 |
Jun 04 02:22:40 PM PDT 24 |
198368753 ps |
T970 |
/workspace/coverage/default/14.spi_device_pass_addr_payload_swap.4111030460 |
|
|
Jun 04 02:20:04 PM PDT 24 |
Jun 04 02:20:17 PM PDT 24 |
4492966136 ps |
T971 |
/workspace/coverage/default/35.spi_device_alert_test.3309602171 |
|
|
Jun 04 02:22:09 PM PDT 24 |
Jun 04 02:22:10 PM PDT 24 |
38159026 ps |
T972 |
/workspace/coverage/default/36.spi_device_alert_test.651017849 |
|
|
Jun 04 02:22:07 PM PDT 24 |
Jun 04 02:22:08 PM PDT 24 |
12703489 ps |
T973 |
/workspace/coverage/default/39.spi_device_flash_and_tpm.728540849 |
|
|
Jun 04 02:22:24 PM PDT 24 |
Jun 04 02:23:59 PM PDT 24 |
3794988990 ps |
T974 |
/workspace/coverage/default/8.spi_device_flash_all.3245817545 |
|
|
Jun 04 02:19:35 PM PDT 24 |
Jun 04 02:19:36 PM PDT 24 |
53047470 ps |
T91 |
/workspace/coverage/cover_reg_top/12.spi_device_tl_intg_err.1081984436 |
|
|
Jun 04 12:47:06 PM PDT 24 |
Jun 04 12:47:18 PM PDT 24 |
3091909140 ps |
T975 |
/workspace/coverage/cover_reg_top/35.spi_device_intr_test.1939038941 |
|
|
Jun 04 12:47:13 PM PDT 24 |
Jun 04 12:47:16 PM PDT 24 |
16830285 ps |
T112 |
/workspace/coverage/cover_reg_top/4.spi_device_csr_rw.1188678029 |
|
|
Jun 04 12:47:06 PM PDT 24 |
Jun 04 12:47:09 PM PDT 24 |
129552514 ps |
T976 |
/workspace/coverage/cover_reg_top/9.spi_device_intr_test.3390245214 |
|
|
Jun 04 12:47:04 PM PDT 24 |
Jun 04 12:47:06 PM PDT 24 |
14426138 ps |
T139 |
/workspace/coverage/cover_reg_top/1.spi_device_csr_rw.2582947686 |
|
|
Jun 04 12:46:56 PM PDT 24 |
Jun 04 12:46:59 PM PDT 24 |
42006045 ps |
T140 |
/workspace/coverage/cover_reg_top/7.spi_device_same_csr_outstanding.2361357977 |
|
|
Jun 04 12:47:06 PM PDT 24 |
Jun 04 12:47:12 PM PDT 24 |
628654027 ps |
T92 |
/workspace/coverage/cover_reg_top/7.spi_device_tl_errors.3893353010 |
|
|
Jun 04 12:47:11 PM PDT 24 |
Jun 04 12:47:16 PM PDT 24 |
49230893 ps |
T93 |
/workspace/coverage/cover_reg_top/12.spi_device_tl_errors.3769796146 |
|
|
Jun 04 12:47:00 PM PDT 24 |
Jun 04 12:47:03 PM PDT 24 |
25550865 ps |
T977 |
/workspace/coverage/cover_reg_top/48.spi_device_intr_test.2815441454 |
|
|
Jun 04 12:47:17 PM PDT 24 |
Jun 04 12:47:20 PM PDT 24 |
45301755 ps |
T978 |
/workspace/coverage/cover_reg_top/22.spi_device_intr_test.2163476999 |
|
|
Jun 04 12:47:27 PM PDT 24 |
Jun 04 12:47:30 PM PDT 24 |
27054826 ps |
T94 |
/workspace/coverage/cover_reg_top/9.spi_device_tl_errors.4006275768 |
|
|
Jun 04 12:47:06 PM PDT 24 |
Jun 04 12:47:09 PM PDT 24 |
122435253 ps |
T979 |
/workspace/coverage/cover_reg_top/4.spi_device_intr_test.1987821708 |
|
|
Jun 04 12:46:48 PM PDT 24 |
Jun 04 12:46:50 PM PDT 24 |
12432222 ps |
T113 |
/workspace/coverage/cover_reg_top/2.spi_device_csr_aliasing.2791616839 |
|
|
Jun 04 12:46:50 PM PDT 24 |
Jun 04 12:47:07 PM PDT 24 |
731119811 ps |
T95 |
/workspace/coverage/cover_reg_top/5.spi_device_tl_errors.117733413 |
|
|
Jun 04 12:46:58 PM PDT 24 |
Jun 04 12:47:01 PM PDT 24 |
79523278 ps |
T96 |
/workspace/coverage/cover_reg_top/8.spi_device_tl_intg_err.2843270877 |
|
|
Jun 04 12:47:04 PM PDT 24 |
Jun 04 12:47:12 PM PDT 24 |
417194405 ps |
T114 |
/workspace/coverage/cover_reg_top/3.spi_device_mem_partial_access.3778926885 |
|
|
Jun 04 12:46:59 PM PDT 24 |
Jun 04 12:47:02 PM PDT 24 |
40201182 ps |
T81 |
/workspace/coverage/cover_reg_top/1.spi_device_csr_hw_reset.3777204531 |
|
|
Jun 04 12:47:05 PM PDT 24 |
Jun 04 12:47:08 PM PDT 24 |
73026860 ps |
T100 |
/workspace/coverage/cover_reg_top/16.spi_device_tl_errors.1436194306 |
|
|
Jun 04 12:47:09 PM PDT 24 |
Jun 04 12:47:15 PM PDT 24 |
324488694 ps |
T115 |
/workspace/coverage/cover_reg_top/6.spi_device_csr_rw.958927638 |
|
|
Jun 04 12:47:03 PM PDT 24 |
Jun 04 12:47:07 PM PDT 24 |
64211842 ps |
T980 |
/workspace/coverage/cover_reg_top/44.spi_device_intr_test.2671859329 |
|
|
Jun 04 12:47:14 PM PDT 24 |
Jun 04 12:47:17 PM PDT 24 |
23964572 ps |
T105 |
/workspace/coverage/cover_reg_top/9.spi_device_csr_mem_rw_with_rand_reset.1991912198 |
|
|
Jun 04 12:47:04 PM PDT 24 |
Jun 04 12:47:13 PM PDT 24 |
174391118 ps |
T106 |
/workspace/coverage/cover_reg_top/15.spi_device_tl_errors.3464609220 |
|
|
Jun 04 12:47:02 PM PDT 24 |
Jun 04 12:47:05 PM PDT 24 |
55711216 ps |
T981 |
/workspace/coverage/cover_reg_top/18.spi_device_same_csr_outstanding.289112453 |
|
|
Jun 04 12:47:11 PM PDT 24 |
Jun 04 12:47:15 PM PDT 24 |
343055082 ps |
T982 |
/workspace/coverage/cover_reg_top/5.spi_device_intr_test.1359377783 |
|
|
Jun 04 12:46:50 PM PDT 24 |
Jun 04 12:46:52 PM PDT 24 |
99698336 ps |
T82 |
/workspace/coverage/cover_reg_top/4.spi_device_csr_hw_reset.1701927067 |
|
|
Jun 04 12:46:59 PM PDT 24 |
Jun 04 12:47:01 PM PDT 24 |
53202377 ps |
T983 |
/workspace/coverage/cover_reg_top/17.spi_device_intr_test.3743660380 |
|
|
Jun 04 12:47:15 PM PDT 24 |
Jun 04 12:47:18 PM PDT 24 |
15923149 ps |
T97 |
/workspace/coverage/cover_reg_top/13.spi_device_tl_intg_err.4247833319 |
|
|
Jun 04 12:47:02 PM PDT 24 |
Jun 04 12:47:24 PM PDT 24 |
3933640441 ps |
T984 |
/workspace/coverage/cover_reg_top/6.spi_device_intr_test.752127983 |
|
|
Jun 04 12:47:00 PM PDT 24 |
Jun 04 12:47:02 PM PDT 24 |
53317320 ps |
T116 |
/workspace/coverage/cover_reg_top/14.spi_device_csr_rw.308502117 |
|
|
Jun 04 12:47:04 PM PDT 24 |
Jun 04 12:47:08 PM PDT 24 |
183693933 ps |
T117 |
/workspace/coverage/cover_reg_top/3.spi_device_csr_hw_reset.3972750936 |
|
|
Jun 04 12:46:54 PM PDT 24 |
Jun 04 12:46:56 PM PDT 24 |
17915603 ps |
T118 |
/workspace/coverage/cover_reg_top/2.spi_device_csr_rw.3088029322 |
|
|
Jun 04 12:47:04 PM PDT 24 |
Jun 04 12:47:06 PM PDT 24 |
31806002 ps |
T985 |
/workspace/coverage/cover_reg_top/36.spi_device_intr_test.3809805364 |
|
|
Jun 04 12:47:15 PM PDT 24 |
Jun 04 12:47:18 PM PDT 24 |
15735951 ps |
T986 |
/workspace/coverage/cover_reg_top/12.spi_device_intr_test.3933273609 |
|
|
Jun 04 12:47:07 PM PDT 24 |
Jun 04 12:47:09 PM PDT 24 |
13751154 ps |
T108 |
/workspace/coverage/cover_reg_top/4.spi_device_tl_intg_err.601602345 |
|
|
Jun 04 12:47:06 PM PDT 24 |
Jun 04 12:47:15 PM PDT 24 |
1251514922 ps |
T119 |
/workspace/coverage/cover_reg_top/10.spi_device_csr_rw.1205559635 |
|
|
Jun 04 12:47:07 PM PDT 24 |
Jun 04 12:47:10 PM PDT 24 |
37875937 ps |
T101 |
/workspace/coverage/cover_reg_top/4.spi_device_tl_errors.2382361088 |
|
|
Jun 04 12:46:48 PM PDT 24 |
Jun 04 12:46:53 PM PDT 24 |
57623562 ps |
T107 |
/workspace/coverage/cover_reg_top/9.spi_device_tl_intg_err.3329871097 |
|
|
Jun 04 12:47:07 PM PDT 24 |
Jun 04 12:47:19 PM PDT 24 |
223136535 ps |
T267 |
/workspace/coverage/cover_reg_top/19.spi_device_tl_intg_err.1802193276 |
|
|
Jun 04 12:47:12 PM PDT 24 |
Jun 04 12:47:21 PM PDT 24 |
1069100969 ps |
T987 |
/workspace/coverage/cover_reg_top/0.spi_device_mem_walk.1378057828 |
|
|
Jun 04 12:46:44 PM PDT 24 |
Jun 04 12:46:45 PM PDT 24 |
47253917 ps |
T988 |
/workspace/coverage/cover_reg_top/11.spi_device_intr_test.856055839 |
|
|
Jun 04 12:47:04 PM PDT 24 |
Jun 04 12:47:11 PM PDT 24 |
16699112 ps |
T120 |
/workspace/coverage/cover_reg_top/1.spi_device_csr_aliasing.2378849147 |
|
|
Jun 04 12:46:51 PM PDT 24 |
Jun 04 12:47:14 PM PDT 24 |
3466876780 ps |
T989 |
/workspace/coverage/cover_reg_top/2.spi_device_same_csr_outstanding.890646971 |
|
|
Jun 04 12:46:49 PM PDT 24 |
Jun 04 12:46:52 PM PDT 24 |
375755066 ps |
T121 |
/workspace/coverage/cover_reg_top/5.spi_device_csr_rw.2849474475 |
|
|
Jun 04 12:46:52 PM PDT 24 |
Jun 04 12:46:55 PM PDT 24 |
62918923 ps |
T83 |
/workspace/coverage/cover_reg_top/2.spi_device_csr_hw_reset.1560432603 |
|
|
Jun 04 12:46:54 PM PDT 24 |
Jun 04 12:46:57 PM PDT 24 |
144899420 ps |
T990 |
/workspace/coverage/cover_reg_top/0.spi_device_intr_test.1553994976 |
|
|
Jun 04 12:46:50 PM PDT 24 |
Jun 04 12:46:52 PM PDT 24 |
31327839 ps |
T122 |
/workspace/coverage/cover_reg_top/15.spi_device_csr_rw.1625140779 |
|
|
Jun 04 12:47:08 PM PDT 24 |
Jun 04 12:47:11 PM PDT 24 |
285883436 ps |
T991 |
/workspace/coverage/cover_reg_top/8.spi_device_csr_rw.3372030234 |
|
|
Jun 04 12:47:07 PM PDT 24 |
Jun 04 12:47:11 PM PDT 24 |
85836085 ps |
T992 |
/workspace/coverage/cover_reg_top/40.spi_device_intr_test.177097412 |
|
|
Jun 04 12:47:14 PM PDT 24 |
Jun 04 12:47:16 PM PDT 24 |
14955984 ps |
T993 |
/workspace/coverage/cover_reg_top/7.spi_device_intr_test.3500658298 |
|
|
Jun 04 12:47:04 PM PDT 24 |
Jun 04 12:47:06 PM PDT 24 |
18516899 ps |
T123 |
/workspace/coverage/cover_reg_top/2.spi_device_mem_partial_access.2863674492 |
|
|
Jun 04 12:46:53 PM PDT 24 |
Jun 04 12:46:55 PM PDT 24 |
17353651 ps |
T269 |
/workspace/coverage/cover_reg_top/17.spi_device_tl_intg_err.687417182 |
|
|
Jun 04 12:47:13 PM PDT 24 |
Jun 04 12:47:22 PM PDT 24 |
110695436 ps |
T152 |
/workspace/coverage/cover_reg_top/7.spi_device_csr_rw.682840989 |
|
|
Jun 04 12:47:09 PM PDT 24 |
Jun 04 12:47:12 PM PDT 24 |
80569924 ps |
T994 |
/workspace/coverage/cover_reg_top/18.spi_device_intr_test.1016372787 |
|
|
Jun 04 12:47:14 PM PDT 24 |
Jun 04 12:47:17 PM PDT 24 |
42536938 ps |
T995 |
/workspace/coverage/cover_reg_top/5.spi_device_same_csr_outstanding.733563706 |
|
|
Jun 04 12:46:52 PM PDT 24 |
Jun 04 12:46:57 PM PDT 24 |
1794654631 ps |
T153 |
/workspace/coverage/cover_reg_top/16.spi_device_same_csr_outstanding.1381761419 |
|
|
Jun 04 12:47:05 PM PDT 24 |
Jun 04 12:47:10 PM PDT 24 |
773689770 ps |
T104 |
/workspace/coverage/cover_reg_top/3.spi_device_tl_errors.4034297803 |
|
|
Jun 04 12:47:03 PM PDT 24 |
Jun 04 12:47:08 PM PDT 24 |
226916389 ps |
T996 |
/workspace/coverage/cover_reg_top/9.spi_device_csr_rw.1805062250 |
|
|
Jun 04 12:47:03 PM PDT 24 |
Jun 04 12:47:06 PM PDT 24 |
31937367 ps |
T997 |
/workspace/coverage/cover_reg_top/8.spi_device_same_csr_outstanding.296000373 |
|
|
Jun 04 12:47:00 PM PDT 24 |
Jun 04 12:47:03 PM PDT 24 |
96340041 ps |
T998 |
/workspace/coverage/cover_reg_top/0.spi_device_csr_mem_rw_with_rand_reset.1988547404 |
|
|
Jun 04 12:46:49 PM PDT 24 |
Jun 04 12:46:52 PM PDT 24 |
27174037 ps |
T999 |
/workspace/coverage/cover_reg_top/2.spi_device_intr_test.3609407241 |
|
|
Jun 04 12:46:52 PM PDT 24 |
Jun 04 12:46:54 PM PDT 24 |
22818633 ps |
T1000 |
/workspace/coverage/cover_reg_top/38.spi_device_intr_test.2935218128 |
|
|
Jun 04 12:47:13 PM PDT 24 |
Jun 04 12:47:16 PM PDT 24 |
25627898 ps |
T1001 |
/workspace/coverage/cover_reg_top/19.spi_device_same_csr_outstanding.1771993177 |
|
|
Jun 04 12:47:16 PM PDT 24 |
Jun 04 12:47:23 PM PDT 24 |
621830375 ps |
T1002 |
/workspace/coverage/cover_reg_top/12.spi_device_same_csr_outstanding.4158064978 |
|
|
Jun 04 12:47:09 PM PDT 24 |
Jun 04 12:47:13 PM PDT 24 |
107672047 ps |
T1003 |
/workspace/coverage/cover_reg_top/2.spi_device_csr_mem_rw_with_rand_reset.2985295773 |
|
|
Jun 04 12:46:59 PM PDT 24 |
Jun 04 12:47:02 PM PDT 24 |
53807552 ps |
T268 |
/workspace/coverage/cover_reg_top/16.spi_device_tl_intg_err.778072545 |
|
|
Jun 04 12:47:11 PM PDT 24 |
Jun 04 12:47:33 PM PDT 24 |
1594046993 ps |
T1004 |
/workspace/coverage/cover_reg_top/43.spi_device_intr_test.2856133261 |
|
|
Jun 04 12:47:15 PM PDT 24 |
Jun 04 12:47:18 PM PDT 24 |
20183523 ps |
T1005 |
/workspace/coverage/cover_reg_top/4.spi_device_csr_mem_rw_with_rand_reset.85080002 |
|
|
Jun 04 12:47:07 PM PDT 24 |
Jun 04 12:47:12 PM PDT 24 |
28084919 ps |
T1006 |
/workspace/coverage/cover_reg_top/1.spi_device_mem_walk.195972799 |
|
|
Jun 04 12:46:53 PM PDT 24 |
Jun 04 12:46:55 PM PDT 24 |
33442895 ps |
T1007 |
/workspace/coverage/cover_reg_top/2.spi_device_mem_walk.570578790 |
|
|
Jun 04 12:46:53 PM PDT 24 |
Jun 04 12:46:55 PM PDT 24 |
19846282 ps |
T1008 |
/workspace/coverage/cover_reg_top/24.spi_device_intr_test.992698186 |
|
|
Jun 04 12:47:12 PM PDT 24 |
Jun 04 12:47:14 PM PDT 24 |
14563449 ps |
T1009 |
/workspace/coverage/cover_reg_top/5.spi_device_csr_mem_rw_with_rand_reset.2951484739 |
|
|
Jun 04 12:47:04 PM PDT 24 |
Jun 04 12:47:08 PM PDT 24 |
74244591 ps |
T1010 |
/workspace/coverage/cover_reg_top/3.spi_device_csr_rw.2563227601 |
|
|
Jun 04 12:46:54 PM PDT 24 |
Jun 04 12:46:56 PM PDT 24 |
409093182 ps |
T1011 |
/workspace/coverage/cover_reg_top/17.spi_device_csr_rw.2475038251 |
|
|
Jun 04 12:47:12 PM PDT 24 |
Jun 04 12:47:15 PM PDT 24 |
55351469 ps |
T1012 |
/workspace/coverage/cover_reg_top/49.spi_device_intr_test.2388733477 |
|
|
Jun 04 12:47:12 PM PDT 24 |
Jun 04 12:47:15 PM PDT 24 |
50650751 ps |