| T63 |
/workspace/coverage/default/1.spi_device_sec_cm.2056809098 |
|
|
Jun 05 05:40:54 PM PDT 24 |
Jun 05 05:40:55 PM PDT 24 |
233061470 ps |
| T221 |
/workspace/coverage/default/37.spi_device_flash_and_tpm.4076067432 |
|
|
Jun 05 05:42:52 PM PDT 24 |
Jun 05 05:43:48 PM PDT 24 |
5152475329 ps |
| T816 |
/workspace/coverage/default/39.spi_device_tpm_sts_read.3984842777 |
|
|
Jun 05 05:42:56 PM PDT 24 |
Jun 05 05:42:57 PM PDT 24 |
47985031 ps |
| T817 |
/workspace/coverage/default/48.spi_device_intercept.1653581319 |
|
|
Jun 05 05:43:26 PM PDT 24 |
Jun 05 05:43:35 PM PDT 24 |
361394149 ps |
| T818 |
/workspace/coverage/default/14.spi_device_tpm_sts_read.458475649 |
|
|
Jun 05 05:41:34 PM PDT 24 |
Jun 05 05:41:36 PM PDT 24 |
106843139 ps |
| T819 |
/workspace/coverage/default/9.spi_device_tpm_all.556080586 |
|
|
Jun 05 05:41:22 PM PDT 24 |
Jun 05 05:41:33 PM PDT 24 |
1432650569 ps |
| T820 |
/workspace/coverage/default/21.spi_device_read_buffer_direct.2964525425 |
|
|
Jun 05 05:42:05 PM PDT 24 |
Jun 05 05:42:11 PM PDT 24 |
341481924 ps |
| T821 |
/workspace/coverage/default/12.spi_device_mailbox.1700436595 |
|
|
Jun 05 05:41:28 PM PDT 24 |
Jun 05 05:41:59 PM PDT 24 |
17348544246 ps |
| T822 |
/workspace/coverage/default/28.spi_device_tpm_sts_read.3290791034 |
|
|
Jun 05 05:42:26 PM PDT 24 |
Jun 05 05:42:27 PM PDT 24 |
281721246 ps |
| T823 |
/workspace/coverage/default/6.spi_device_mailbox.474666643 |
|
|
Jun 05 05:41:13 PM PDT 24 |
Jun 05 05:42:49 PM PDT 24 |
56635540874 ps |
| T824 |
/workspace/coverage/default/12.spi_device_flash_and_tpm.134491187 |
|
|
Jun 05 05:41:27 PM PDT 24 |
Jun 05 05:45:57 PM PDT 24 |
108762337301 ps |
| T825 |
/workspace/coverage/default/26.spi_device_cfg_cmd.1209676558 |
|
|
Jun 05 05:42:25 PM PDT 24 |
Jun 05 05:42:32 PM PDT 24 |
581111555 ps |
| T826 |
/workspace/coverage/default/3.spi_device_csb_read.1323077902 |
|
|
Jun 05 05:40:56 PM PDT 24 |
Jun 05 05:40:57 PM PDT 24 |
72283090 ps |
| T827 |
/workspace/coverage/default/6.spi_device_cfg_cmd.1498520607 |
|
|
Jun 05 05:41:12 PM PDT 24 |
Jun 05 05:41:15 PM PDT 24 |
283448560 ps |
| T828 |
/workspace/coverage/default/5.spi_device_tpm_sts_read.4177727164 |
|
|
Jun 05 05:41:06 PM PDT 24 |
Jun 05 05:41:08 PM PDT 24 |
255184657 ps |
| T829 |
/workspace/coverage/default/49.spi_device_tpm_read_hw_reg.1284600643 |
|
|
Jun 05 05:43:31 PM PDT 24 |
Jun 05 05:43:34 PM PDT 24 |
658447803 ps |
| T213 |
/workspace/coverage/default/42.spi_device_flash_all.2445065622 |
|
|
Jun 05 05:43:12 PM PDT 24 |
Jun 05 05:44:53 PM PDT 24 |
18342946386 ps |
| T830 |
/workspace/coverage/default/33.spi_device_flash_mode.520030239 |
|
|
Jun 05 05:42:32 PM PDT 24 |
Jun 05 05:42:38 PM PDT 24 |
441041022 ps |
| T831 |
/workspace/coverage/default/12.spi_device_pass_cmd_filtering.38568875 |
|
|
Jun 05 05:41:28 PM PDT 24 |
Jun 05 05:41:39 PM PDT 24 |
1355184132 ps |
| T832 |
/workspace/coverage/default/15.spi_device_flash_and_tpm.995364828 |
|
|
Jun 05 05:41:42 PM PDT 24 |
Jun 05 05:44:56 PM PDT 24 |
97277768482 ps |
| T246 |
/workspace/coverage/default/7.spi_device_cfg_cmd.1579097614 |
|
|
Jun 05 05:41:14 PM PDT 24 |
Jun 05 05:41:18 PM PDT 24 |
409020084 ps |
| T833 |
/workspace/coverage/default/47.spi_device_flash_all.867531686 |
|
|
Jun 05 05:43:24 PM PDT 24 |
Jun 05 05:44:54 PM PDT 24 |
85147621420 ps |
| T834 |
/workspace/coverage/default/19.spi_device_flash_mode.2843429061 |
|
|
Jun 05 05:42:00 PM PDT 24 |
Jun 05 05:42:38 PM PDT 24 |
10117576076 ps |
| T835 |
/workspace/coverage/default/44.spi_device_tpm_sts_read.2438567456 |
|
|
Jun 05 05:43:12 PM PDT 24 |
Jun 05 05:43:13 PM PDT 24 |
30956388 ps |
| T836 |
/workspace/coverage/default/1.spi_device_mailbox.3858511624 |
|
|
Jun 05 05:40:50 PM PDT 24 |
Jun 05 05:41:01 PM PDT 24 |
12434649837 ps |
| T837 |
/workspace/coverage/default/8.spi_device_tpm_sts_read.2658896515 |
|
|
Jun 05 05:41:15 PM PDT 24 |
Jun 05 05:41:16 PM PDT 24 |
36512690 ps |
| T838 |
/workspace/coverage/default/21.spi_device_pass_addr_payload_swap.3151057077 |
|
|
Jun 05 05:41:58 PM PDT 24 |
Jun 05 05:42:27 PM PDT 24 |
30809024746 ps |
| T150 |
/workspace/coverage/default/2.spi_device_stress_all.584092329 |
|
|
Jun 05 05:40:59 PM PDT 24 |
Jun 05 05:41:01 PM PDT 24 |
47506182 ps |
| T839 |
/workspace/coverage/default/47.spi_device_intercept.1926018378 |
|
|
Jun 05 05:43:23 PM PDT 24 |
Jun 05 05:43:27 PM PDT 24 |
71169284 ps |
| T840 |
/workspace/coverage/default/3.spi_device_mailbox.4265238989 |
|
|
Jun 05 05:40:58 PM PDT 24 |
Jun 05 05:42:02 PM PDT 24 |
6262957240 ps |
| T841 |
/workspace/coverage/default/4.spi_device_pass_addr_payload_swap.2776482878 |
|
|
Jun 05 05:41:07 PM PDT 24 |
Jun 05 05:41:10 PM PDT 24 |
140656998 ps |
| T842 |
/workspace/coverage/default/48.spi_device_pass_cmd_filtering.2865902192 |
|
|
Jun 05 05:43:24 PM PDT 24 |
Jun 05 05:43:27 PM PDT 24 |
109326840 ps |
| T843 |
/workspace/coverage/default/39.spi_device_flash_and_tpm_min_idle.2912443487 |
|
|
Jun 05 05:42:58 PM PDT 24 |
Jun 05 05:43:15 PM PDT 24 |
6877145131 ps |
| T844 |
/workspace/coverage/default/20.spi_device_upload.186935536 |
|
|
Jun 05 05:41:58 PM PDT 24 |
Jun 05 05:42:11 PM PDT 24 |
2583127620 ps |
| T845 |
/workspace/coverage/default/34.spi_device_pass_cmd_filtering.1831719427 |
|
|
Jun 05 05:42:43 PM PDT 24 |
Jun 05 05:42:50 PM PDT 24 |
1099900884 ps |
| T846 |
/workspace/coverage/default/5.spi_device_mailbox.1615158382 |
|
|
Jun 05 05:41:08 PM PDT 24 |
Jun 05 05:41:20 PM PDT 24 |
2489436197 ps |
| T847 |
/workspace/coverage/default/12.spi_device_intercept.1500019108 |
|
|
Jun 05 05:41:29 PM PDT 24 |
Jun 05 05:41:53 PM PDT 24 |
5110866962 ps |
| T848 |
/workspace/coverage/default/39.spi_device_flash_mode.2780532317 |
|
|
Jun 05 05:42:57 PM PDT 24 |
Jun 05 05:43:07 PM PDT 24 |
1917987806 ps |
| T130 |
/workspace/coverage/default/42.spi_device_stress_all.1452037353 |
|
|
Jun 05 05:43:11 PM PDT 24 |
Jun 05 06:00:22 PM PDT 24 |
129397472944 ps |
| T849 |
/workspace/coverage/default/2.spi_device_tpm_rw.3974423640 |
|
|
Jun 05 05:41:01 PM PDT 24 |
Jun 05 05:41:03 PM PDT 24 |
22582624 ps |
| T850 |
/workspace/coverage/default/8.spi_device_mailbox.2355766212 |
|
|
Jun 05 05:41:19 PM PDT 24 |
Jun 05 05:41:33 PM PDT 24 |
5527133952 ps |
| T851 |
/workspace/coverage/default/43.spi_device_csb_read.2297150120 |
|
|
Jun 05 05:43:12 PM PDT 24 |
Jun 05 05:43:13 PM PDT 24 |
16958373 ps |
| T852 |
/workspace/coverage/default/13.spi_device_tpm_all.3383691180 |
|
|
Jun 05 05:41:33 PM PDT 24 |
Jun 05 05:41:34 PM PDT 24 |
60808336 ps |
| T853 |
/workspace/coverage/default/26.spi_device_tpm_read_hw_reg.736019395 |
|
|
Jun 05 05:42:14 PM PDT 24 |
Jun 05 05:42:16 PM PDT 24 |
218070976 ps |
| T854 |
/workspace/coverage/default/16.spi_device_mem_parity.3715319287 |
|
|
Jun 05 05:41:42 PM PDT 24 |
Jun 05 05:41:44 PM PDT 24 |
114057764 ps |
| T855 |
/workspace/coverage/default/0.spi_device_upload.2250628587 |
|
|
Jun 05 05:40:50 PM PDT 24 |
Jun 05 05:40:56 PM PDT 24 |
833910121 ps |
| T856 |
/workspace/coverage/default/8.spi_device_flash_and_tpm.4098581250 |
|
|
Jun 05 05:41:23 PM PDT 24 |
Jun 05 05:42:00 PM PDT 24 |
22642107435 ps |
| T857 |
/workspace/coverage/default/33.spi_device_cfg_cmd.1257961260 |
|
|
Jun 05 05:42:38 PM PDT 24 |
Jun 05 05:42:41 PM PDT 24 |
327064964 ps |
| T858 |
/workspace/coverage/default/24.spi_device_read_buffer_direct.458148339 |
|
|
Jun 05 05:42:07 PM PDT 24 |
Jun 05 05:42:13 PM PDT 24 |
444879675 ps |
| T859 |
/workspace/coverage/default/0.spi_device_tpm_rw.4281399357 |
|
|
Jun 05 05:40:46 PM PDT 24 |
Jun 05 05:40:51 PM PDT 24 |
335995734 ps |
| T860 |
/workspace/coverage/default/42.spi_device_pass_cmd_filtering.1637759922 |
|
|
Jun 05 05:43:09 PM PDT 24 |
Jun 05 05:43:23 PM PDT 24 |
4181876630 ps |
| T861 |
/workspace/coverage/default/12.spi_device_pass_addr_payload_swap.119742114 |
|
|
Jun 05 05:41:26 PM PDT 24 |
Jun 05 05:41:29 PM PDT 24 |
216064442 ps |
| T862 |
/workspace/coverage/default/7.spi_device_mailbox.2916961130 |
|
|
Jun 05 05:41:17 PM PDT 24 |
Jun 05 05:42:54 PM PDT 24 |
45407182618 ps |
| T863 |
/workspace/coverage/default/31.spi_device_mailbox.2043323251 |
|
|
Jun 05 05:42:40 PM PDT 24 |
Jun 05 05:43:06 PM PDT 24 |
12220497093 ps |
| T864 |
/workspace/coverage/default/45.spi_device_tpm_all.3019777012 |
|
|
Jun 05 05:43:18 PM PDT 24 |
Jun 05 05:43:27 PM PDT 24 |
2456247026 ps |
| T865 |
/workspace/coverage/default/9.spi_device_pass_addr_payload_swap.963943297 |
|
|
Jun 05 05:41:17 PM PDT 24 |
Jun 05 05:41:20 PM PDT 24 |
187065777 ps |
| T866 |
/workspace/coverage/default/20.spi_device_flash_and_tpm.4069308351 |
|
|
Jun 05 05:41:59 PM PDT 24 |
Jun 05 05:42:12 PM PDT 24 |
5216261120 ps |
| T867 |
/workspace/coverage/default/25.spi_device_alert_test.1297145027 |
|
|
Jun 05 05:42:13 PM PDT 24 |
Jun 05 05:42:14 PM PDT 24 |
30258012 ps |
| T868 |
/workspace/coverage/default/1.spi_device_csb_read.3414783900 |
|
|
Jun 05 05:41:01 PM PDT 24 |
Jun 05 05:41:03 PM PDT 24 |
70006222 ps |
| T869 |
/workspace/coverage/default/10.spi_device_mem_parity.1160955337 |
|
|
Jun 05 05:41:21 PM PDT 24 |
Jun 05 05:41:23 PM PDT 24 |
88599780 ps |
| T223 |
/workspace/coverage/default/48.spi_device_flash_and_tpm_min_idle.2896259578 |
|
|
Jun 05 05:43:20 PM PDT 24 |
Jun 05 05:45:13 PM PDT 24 |
7848335039 ps |
| T870 |
/workspace/coverage/default/8.spi_device_pass_cmd_filtering.3746961993 |
|
|
Jun 05 05:41:22 PM PDT 24 |
Jun 05 05:41:27 PM PDT 24 |
884527322 ps |
| T871 |
/workspace/coverage/default/42.spi_device_pass_addr_payload_swap.435925416 |
|
|
Jun 05 05:43:10 PM PDT 24 |
Jun 05 05:43:14 PM PDT 24 |
1229316402 ps |
| T872 |
/workspace/coverage/default/23.spi_device_read_buffer_direct.2112907685 |
|
|
Jun 05 05:42:05 PM PDT 24 |
Jun 05 05:42:13 PM PDT 24 |
567317712 ps |
| T236 |
/workspace/coverage/default/39.spi_device_pass_addr_payload_swap.2443321842 |
|
|
Jun 05 05:42:57 PM PDT 24 |
Jun 05 05:43:06 PM PDT 24 |
801802157 ps |
| T873 |
/workspace/coverage/default/27.spi_device_tpm_rw.2174725024 |
|
|
Jun 05 05:42:25 PM PDT 24 |
Jun 05 05:42:27 PM PDT 24 |
71357424 ps |
| T212 |
/workspace/coverage/default/45.spi_device_flash_and_tpm_min_idle.560897323 |
|
|
Jun 05 05:43:19 PM PDT 24 |
Jun 05 05:48:26 PM PDT 24 |
198104160190 ps |
| T874 |
/workspace/coverage/default/17.spi_device_flash_mode.2048603763 |
|
|
Jun 05 05:41:50 PM PDT 24 |
Jun 05 05:41:56 PM PDT 24 |
843701589 ps |
| T875 |
/workspace/coverage/default/29.spi_device_intercept.3940821629 |
|
|
Jun 05 05:42:33 PM PDT 24 |
Jun 05 05:42:39 PM PDT 24 |
776888925 ps |
| T876 |
/workspace/coverage/default/7.spi_device_upload.1863670149 |
|
|
Jun 05 05:41:12 PM PDT 24 |
Jun 05 05:41:14 PM PDT 24 |
81126887 ps |
| T877 |
/workspace/coverage/default/19.spi_device_tpm_read_hw_reg.2135056098 |
|
|
Jun 05 05:41:51 PM PDT 24 |
Jun 05 05:41:52 PM PDT 24 |
36900134 ps |
| T878 |
/workspace/coverage/default/30.spi_device_upload.509812498 |
|
|
Jun 05 05:42:32 PM PDT 24 |
Jun 05 05:42:57 PM PDT 24 |
22097116978 ps |
| T879 |
/workspace/coverage/default/16.spi_device_upload.4019704413 |
|
|
Jun 05 05:41:39 PM PDT 24 |
Jun 05 05:41:45 PM PDT 24 |
3823340177 ps |
| T207 |
/workspace/coverage/default/45.spi_device_flash_all.1598997040 |
|
|
Jun 05 05:43:17 PM PDT 24 |
Jun 05 05:44:09 PM PDT 24 |
8821124940 ps |
| T880 |
/workspace/coverage/default/46.spi_device_stress_all.1646342441 |
|
|
Jun 05 05:43:24 PM PDT 24 |
Jun 05 05:51:56 PM PDT 24 |
140840861290 ps |
| T881 |
/workspace/coverage/default/49.spi_device_flash_mode.231755770 |
|
|
Jun 05 05:43:32 PM PDT 24 |
Jun 05 05:43:39 PM PDT 24 |
655490235 ps |
| T882 |
/workspace/coverage/default/38.spi_device_tpm_sts_read.865983602 |
|
|
Jun 05 05:42:51 PM PDT 24 |
Jun 05 05:42:53 PM PDT 24 |
37012854 ps |
| T883 |
/workspace/coverage/default/40.spi_device_alert_test.546233151 |
|
|
Jun 05 05:43:01 PM PDT 24 |
Jun 05 05:43:02 PM PDT 24 |
13256005 ps |
| T884 |
/workspace/coverage/default/27.spi_device_pass_cmd_filtering.429311975 |
|
|
Jun 05 05:42:23 PM PDT 24 |
Jun 05 05:42:29 PM PDT 24 |
336768616 ps |
| T885 |
/workspace/coverage/default/32.spi_device_tpm_all.2105776889 |
|
|
Jun 05 05:42:36 PM PDT 24 |
Jun 05 05:42:52 PM PDT 24 |
2427491038 ps |
| T886 |
/workspace/coverage/default/15.spi_device_intercept.3728494411 |
|
|
Jun 05 05:41:37 PM PDT 24 |
Jun 05 05:41:41 PM PDT 24 |
35426623 ps |
| T887 |
/workspace/coverage/default/18.spi_device_mem_parity.1039117583 |
|
|
Jun 05 05:41:49 PM PDT 24 |
Jun 05 05:41:51 PM PDT 24 |
24871773 ps |
| T888 |
/workspace/coverage/default/31.spi_device_tpm_sts_read.3364936387 |
|
|
Jun 05 05:42:32 PM PDT 24 |
Jun 05 05:42:33 PM PDT 24 |
21868864 ps |
| T889 |
/workspace/coverage/default/17.spi_device_read_buffer_direct.3203135018 |
|
|
Jun 05 05:41:48 PM PDT 24 |
Jun 05 05:41:54 PM PDT 24 |
2476766193 ps |
| T890 |
/workspace/coverage/default/17.spi_device_pass_cmd_filtering.2399995599 |
|
|
Jun 05 05:41:50 PM PDT 24 |
Jun 05 05:41:56 PM PDT 24 |
2159464082 ps |
| T891 |
/workspace/coverage/default/22.spi_device_flash_and_tpm.3632176825 |
|
|
Jun 05 05:42:00 PM PDT 24 |
Jun 05 05:43:46 PM PDT 24 |
7768011852 ps |
| T892 |
/workspace/coverage/default/35.spi_device_mailbox.3613291125 |
|
|
Jun 05 05:42:42 PM PDT 24 |
Jun 05 05:42:45 PM PDT 24 |
126660620 ps |
| T215 |
/workspace/coverage/default/3.spi_device_flash_and_tpm_min_idle.3944709046 |
|
|
Jun 05 05:40:58 PM PDT 24 |
Jun 05 05:42:31 PM PDT 24 |
10583534993 ps |
| T893 |
/workspace/coverage/default/22.spi_device_flash_all.898136393 |
|
|
Jun 05 05:42:03 PM PDT 24 |
Jun 05 05:42:56 PM PDT 24 |
24502634115 ps |
| T894 |
/workspace/coverage/default/14.spi_device_flash_and_tpm.2904870934 |
|
|
Jun 05 05:41:40 PM PDT 24 |
Jun 05 05:43:47 PM PDT 24 |
15677560310 ps |
| T895 |
/workspace/coverage/default/19.spi_device_mem_parity.1259797745 |
|
|
Jun 05 05:41:48 PM PDT 24 |
Jun 05 05:41:50 PM PDT 24 |
65683262 ps |
| T896 |
/workspace/coverage/default/48.spi_device_upload.99698835 |
|
|
Jun 05 05:43:23 PM PDT 24 |
Jun 05 05:43:37 PM PDT 24 |
54602407948 ps |
| T897 |
/workspace/coverage/default/18.spi_device_intercept.3059127356 |
|
|
Jun 05 05:41:49 PM PDT 24 |
Jun 05 05:41:58 PM PDT 24 |
829575311 ps |
| T898 |
/workspace/coverage/default/14.spi_device_upload.2218004408 |
|
|
Jun 05 05:41:37 PM PDT 24 |
Jun 05 05:41:40 PM PDT 24 |
61880872 ps |
| T899 |
/workspace/coverage/default/9.spi_device_flash_and_tpm.1341555860 |
|
|
Jun 05 05:41:19 PM PDT 24 |
Jun 05 05:46:19 PM PDT 24 |
28506555018 ps |
| T247 |
/workspace/coverage/default/4.spi_device_flash_all.2196864522 |
|
|
Jun 05 05:41:06 PM PDT 24 |
Jun 05 05:41:27 PM PDT 24 |
2903896503 ps |
| T900 |
/workspace/coverage/default/9.spi_device_tpm_read_hw_reg.960235592 |
|
|
Jun 05 05:41:19 PM PDT 24 |
Jun 05 05:41:34 PM PDT 24 |
5144961852 ps |
| T901 |
/workspace/coverage/default/1.spi_device_read_buffer_direct.1618922982 |
|
|
Jun 05 05:40:50 PM PDT 24 |
Jun 05 05:40:54 PM PDT 24 |
169813635 ps |
| T902 |
/workspace/coverage/default/19.spi_device_read_buffer_direct.2595708591 |
|
|
Jun 05 05:41:58 PM PDT 24 |
Jun 05 05:42:04 PM PDT 24 |
571389572 ps |
| T903 |
/workspace/coverage/default/43.spi_device_pass_cmd_filtering.2663621940 |
|
|
Jun 05 05:43:11 PM PDT 24 |
Jun 05 05:43:42 PM PDT 24 |
166457457623 ps |
| T904 |
/workspace/coverage/default/33.spi_device_flash_all.2945837393 |
|
|
Jun 05 05:42:46 PM PDT 24 |
Jun 05 05:43:41 PM PDT 24 |
2548104497 ps |
| T905 |
/workspace/coverage/default/19.spi_device_tpm_all.1575865309 |
|
|
Jun 05 05:41:49 PM PDT 24 |
Jun 05 05:41:55 PM PDT 24 |
1160898543 ps |
| T906 |
/workspace/coverage/default/49.spi_device_pass_cmd_filtering.3096616613 |
|
|
Jun 05 05:43:31 PM PDT 24 |
Jun 05 05:43:35 PM PDT 24 |
144181180 ps |
| T907 |
/workspace/coverage/default/41.spi_device_tpm_all.170567094 |
|
|
Jun 05 05:43:03 PM PDT 24 |
Jun 05 05:43:41 PM PDT 24 |
12015176426 ps |
| T908 |
/workspace/coverage/default/14.spi_device_tpm_rw.916137935 |
|
|
Jun 05 05:41:32 PM PDT 24 |
Jun 05 05:41:34 PM PDT 24 |
43901560 ps |
| T909 |
/workspace/coverage/default/44.spi_device_intercept.2070023450 |
|
|
Jun 05 05:43:16 PM PDT 24 |
Jun 05 05:43:24 PM PDT 24 |
1549882919 ps |
| T910 |
/workspace/coverage/default/5.spi_device_read_buffer_direct.3172674857 |
|
|
Jun 05 05:41:09 PM PDT 24 |
Jun 05 05:41:16 PM PDT 24 |
708555805 ps |
| T911 |
/workspace/coverage/default/18.spi_device_tpm_read_hw_reg.3778640672 |
|
|
Jun 05 05:41:51 PM PDT 24 |
Jun 05 05:42:14 PM PDT 24 |
7466058853 ps |
| T912 |
/workspace/coverage/default/32.spi_device_alert_test.1988685494 |
|
|
Jun 05 05:42:36 PM PDT 24 |
Jun 05 05:42:38 PM PDT 24 |
18422237 ps |
| T913 |
/workspace/coverage/default/30.spi_device_tpm_rw.2069173591 |
|
|
Jun 05 05:42:27 PM PDT 24 |
Jun 05 05:42:33 PM PDT 24 |
2189135893 ps |
| T914 |
/workspace/coverage/default/47.spi_device_alert_test.3626203621 |
|
|
Jun 05 05:43:26 PM PDT 24 |
Jun 05 05:43:28 PM PDT 24 |
35032790 ps |
| T915 |
/workspace/coverage/default/45.spi_device_intercept.3861841785 |
|
|
Jun 05 05:43:19 PM PDT 24 |
Jun 05 05:43:23 PM PDT 24 |
79045951 ps |
| T916 |
/workspace/coverage/default/11.spi_device_flash_all.2965853236 |
|
|
Jun 05 05:41:29 PM PDT 24 |
Jun 05 05:41:46 PM PDT 24 |
13420382496 ps |
| T917 |
/workspace/coverage/default/19.spi_device_tpm_rw.2654336398 |
|
|
Jun 05 05:41:55 PM PDT 24 |
Jun 05 05:41:57 PM PDT 24 |
198129990 ps |
| T918 |
/workspace/coverage/default/46.spi_device_intercept.21796964 |
|
|
Jun 05 05:43:31 PM PDT 24 |
Jun 05 05:43:45 PM PDT 24 |
1201747342 ps |
| T919 |
/workspace/coverage/default/48.spi_device_alert_test.2305724905 |
|
|
Jun 05 05:43:24 PM PDT 24 |
Jun 05 05:43:26 PM PDT 24 |
41199687 ps |
| T920 |
/workspace/coverage/default/39.spi_device_tpm_all.552892710 |
|
|
Jun 05 05:42:58 PM PDT 24 |
Jun 05 05:43:26 PM PDT 24 |
13385384773 ps |
| T921 |
/workspace/coverage/default/2.spi_device_tpm_read_hw_reg.933551700 |
|
|
Jun 05 05:41:01 PM PDT 24 |
Jun 05 05:41:11 PM PDT 24 |
8248741564 ps |
| T214 |
/workspace/coverage/default/6.spi_device_flash_and_tpm_min_idle.3713966921 |
|
|
Jun 05 05:41:14 PM PDT 24 |
Jun 05 05:42:50 PM PDT 24 |
9137224805 ps |
| T922 |
/workspace/coverage/default/10.spi_device_flash_all.303709322 |
|
|
Jun 05 05:41:28 PM PDT 24 |
Jun 05 05:44:01 PM PDT 24 |
19424745128 ps |
| T923 |
/workspace/coverage/default/0.spi_device_pass_addr_payload_swap.2142330832 |
|
|
Jun 05 05:40:47 PM PDT 24 |
Jun 05 05:41:02 PM PDT 24 |
12823215784 ps |
| T924 |
/workspace/coverage/default/18.spi_device_upload.1988528877 |
|
|
Jun 05 05:41:51 PM PDT 24 |
Jun 05 05:41:54 PM PDT 24 |
70407009 ps |
| T925 |
/workspace/coverage/default/15.spi_device_flash_all.486834620 |
|
|
Jun 05 05:41:43 PM PDT 24 |
Jun 05 05:46:20 PM PDT 24 |
78303496236 ps |
| T926 |
/workspace/coverage/default/19.spi_device_tpm_sts_read.2395001151 |
|
|
Jun 05 05:41:56 PM PDT 24 |
Jun 05 05:41:57 PM PDT 24 |
71495447 ps |
| T927 |
/workspace/coverage/default/9.spi_device_intercept.1562596109 |
|
|
Jun 05 05:41:31 PM PDT 24 |
Jun 05 05:41:36 PM PDT 24 |
262483701 ps |
| T928 |
/workspace/coverage/default/40.spi_device_pass_addr_payload_swap.385536892 |
|
|
Jun 05 05:43:05 PM PDT 24 |
Jun 05 05:43:09 PM PDT 24 |
2095153462 ps |
| T929 |
/workspace/coverage/default/21.spi_device_flash_and_tpm_min_idle.3291259340 |
|
|
Jun 05 05:42:01 PM PDT 24 |
Jun 05 05:42:44 PM PDT 24 |
5706188374 ps |
| T930 |
/workspace/coverage/default/47.spi_device_read_buffer_direct.3939723751 |
|
|
Jun 05 05:43:24 PM PDT 24 |
Jun 05 05:43:29 PM PDT 24 |
241358168 ps |
| T931 |
/workspace/coverage/default/25.spi_device_flash_and_tpm.1371501764 |
|
|
Jun 05 05:42:21 PM PDT 24 |
Jun 05 05:43:18 PM PDT 24 |
4715063026 ps |
| T932 |
/workspace/coverage/default/47.spi_device_pass_addr_payload_swap.3235119148 |
|
|
Jun 05 05:43:24 PM PDT 24 |
Jun 05 05:43:32 PM PDT 24 |
12350434363 ps |
| T933 |
/workspace/coverage/default/39.spi_device_tpm_read_hw_reg.3509636295 |
|
|
Jun 05 05:42:58 PM PDT 24 |
Jun 05 05:43:04 PM PDT 24 |
889318225 ps |
| T934 |
/workspace/coverage/default/15.spi_device_csb_read.3135926864 |
|
|
Jun 05 05:41:34 PM PDT 24 |
Jun 05 05:41:35 PM PDT 24 |
18493053 ps |
| T935 |
/workspace/coverage/default/31.spi_device_tpm_read_hw_reg.1298849155 |
|
|
Jun 05 05:42:37 PM PDT 24 |
Jun 05 05:42:53 PM PDT 24 |
6593729392 ps |
| T936 |
/workspace/coverage/default/46.spi_device_read_buffer_direct.934791724 |
|
|
Jun 05 05:43:27 PM PDT 24 |
Jun 05 05:43:34 PM PDT 24 |
380958221 ps |
| T937 |
/workspace/coverage/default/0.spi_device_alert_test.1927880378 |
|
|
Jun 05 05:40:51 PM PDT 24 |
Jun 05 05:40:53 PM PDT 24 |
13509493 ps |
| T938 |
/workspace/coverage/default/47.spi_device_csb_read.3252672012 |
|
|
Jun 05 05:43:24 PM PDT 24 |
Jun 05 05:43:26 PM PDT 24 |
28589300 ps |
| T939 |
/workspace/coverage/default/3.spi_device_read_buffer_direct.781702696 |
|
|
Jun 05 05:41:02 PM PDT 24 |
Jun 05 05:41:15 PM PDT 24 |
3703318366 ps |
| T940 |
/workspace/coverage/default/45.spi_device_tpm_sts_read.1432533414 |
|
|
Jun 05 05:43:17 PM PDT 24 |
Jun 05 05:43:18 PM PDT 24 |
85047248 ps |
| T941 |
/workspace/coverage/default/14.spi_device_csb_read.3963824774 |
|
|
Jun 05 05:41:40 PM PDT 24 |
Jun 05 05:41:41 PM PDT 24 |
63671460 ps |
| T942 |
/workspace/coverage/default/18.spi_device_cfg_cmd.351743058 |
|
|
Jun 05 05:41:48 PM PDT 24 |
Jun 05 05:41:52 PM PDT 24 |
121567043 ps |
| T943 |
/workspace/coverage/default/32.spi_device_pass_addr_payload_swap.2348722659 |
|
|
Jun 05 05:42:37 PM PDT 24 |
Jun 05 05:42:43 PM PDT 24 |
324621862 ps |
| T944 |
/workspace/coverage/default/25.spi_device_mailbox.4236275891 |
|
|
Jun 05 05:42:13 PM PDT 24 |
Jun 05 05:42:20 PM PDT 24 |
1175395338 ps |
| T945 |
/workspace/coverage/default/4.spi_device_flash_mode.361318538 |
|
|
Jun 05 05:41:05 PM PDT 24 |
Jun 05 05:41:10 PM PDT 24 |
359734866 ps |
| T946 |
/workspace/coverage/default/39.spi_device_mailbox.2573525105 |
|
|
Jun 05 05:42:56 PM PDT 24 |
Jun 05 05:43:06 PM PDT 24 |
279052979 ps |
| T947 |
/workspace/coverage/default/24.spi_device_mailbox.2372683451 |
|
|
Jun 05 05:42:10 PM PDT 24 |
Jun 05 05:43:44 PM PDT 24 |
11260339904 ps |
| T948 |
/workspace/coverage/default/36.spi_device_flash_all.3527421695 |
|
|
Jun 05 05:42:48 PM PDT 24 |
Jun 05 05:42:53 PM PDT 24 |
181270318 ps |
| T949 |
/workspace/coverage/default/29.spi_device_alert_test.1196558777 |
|
|
Jun 05 05:42:30 PM PDT 24 |
Jun 05 05:42:32 PM PDT 24 |
49821451 ps |
| T950 |
/workspace/coverage/default/4.spi_device_upload.3313548612 |
|
|
Jun 05 05:41:05 PM PDT 24 |
Jun 05 05:41:13 PM PDT 24 |
605474443 ps |
| T951 |
/workspace/coverage/default/40.spi_device_flash_and_tpm_min_idle.2973403780 |
|
|
Jun 05 05:43:04 PM PDT 24 |
Jun 05 05:44:36 PM PDT 24 |
4328850846 ps |
| T952 |
/workspace/coverage/default/38.spi_device_flash_and_tpm.3509563390 |
|
|
Jun 05 05:42:59 PM PDT 24 |
Jun 05 05:43:46 PM PDT 24 |
42283334342 ps |
| T953 |
/workspace/coverage/default/35.spi_device_read_buffer_direct.1368262354 |
|
|
Jun 05 05:42:43 PM PDT 24 |
Jun 05 05:42:48 PM PDT 24 |
616231393 ps |
| T954 |
/workspace/coverage/default/18.spi_device_flash_and_tpm.880831164 |
|
|
Jun 05 05:41:50 PM PDT 24 |
Jun 05 05:46:58 PM PDT 24 |
33385329134 ps |
| T955 |
/workspace/coverage/default/33.spi_device_tpm_all.3043442941 |
|
|
Jun 05 05:42:36 PM PDT 24 |
Jun 05 05:43:02 PM PDT 24 |
2673228666 ps |
| T956 |
/workspace/coverage/default/45.spi_device_alert_test.3364453240 |
|
|
Jun 05 05:43:19 PM PDT 24 |
Jun 05 05:43:21 PM PDT 24 |
16197161 ps |
| T957 |
/workspace/coverage/default/0.spi_device_mem_parity.3453066674 |
|
|
Jun 05 05:40:44 PM PDT 24 |
Jun 05 05:40:46 PM PDT 24 |
25298430 ps |
| T958 |
/workspace/coverage/default/37.spi_device_tpm_read_hw_reg.3186773092 |
|
|
Jun 05 05:42:49 PM PDT 24 |
Jun 05 05:42:57 PM PDT 24 |
1165898688 ps |
| T959 |
/workspace/coverage/default/35.spi_device_alert_test.1101297917 |
|
|
Jun 05 05:42:43 PM PDT 24 |
Jun 05 05:42:44 PM PDT 24 |
12630807 ps |
| T960 |
/workspace/coverage/default/35.spi_device_upload.1544453730 |
|
|
Jun 05 05:42:56 PM PDT 24 |
Jun 05 05:43:02 PM PDT 24 |
2963475492 ps |
| T961 |
/workspace/coverage/default/0.spi_device_pass_cmd_filtering.4275158494 |
|
|
Jun 05 05:40:44 PM PDT 24 |
Jun 05 05:40:51 PM PDT 24 |
751417582 ps |
| T962 |
/workspace/coverage/default/31.spi_device_csb_read.2365495125 |
|
|
Jun 05 05:42:32 PM PDT 24 |
Jun 05 05:42:34 PM PDT 24 |
22860980 ps |
| T963 |
/workspace/coverage/default/6.spi_device_mem_parity.3459671239 |
|
|
Jun 05 05:41:12 PM PDT 24 |
Jun 05 05:41:14 PM PDT 24 |
90066142 ps |
| T964 |
/workspace/coverage/default/31.spi_device_tpm_rw.3182269636 |
|
|
Jun 05 05:42:38 PM PDT 24 |
Jun 05 05:42:40 PM PDT 24 |
46073065 ps |
| T965 |
/workspace/coverage/default/46.spi_device_flash_and_tpm_min_idle.232496298 |
|
|
Jun 05 05:43:24 PM PDT 24 |
Jun 05 05:45:20 PM PDT 24 |
48175537892 ps |
| T966 |
/workspace/coverage/default/12.spi_device_upload.1929518406 |
|
|
Jun 05 05:41:29 PM PDT 24 |
Jun 05 05:41:32 PM PDT 24 |
320741639 ps |
| T230 |
/workspace/coverage/default/47.spi_device_flash_and_tpm.2035478960 |
|
|
Jun 05 05:43:23 PM PDT 24 |
Jun 05 05:47:49 PM PDT 24 |
46396237235 ps |
| T967 |
/workspace/coverage/default/15.spi_device_stress_all.1259109763 |
|
|
Jun 05 05:41:38 PM PDT 24 |
Jun 05 05:43:26 PM PDT 24 |
9168954977 ps |
| T968 |
/workspace/coverage/default/21.spi_device_csb_read.863945677 |
|
|
Jun 05 05:42:02 PM PDT 24 |
Jun 05 05:42:04 PM PDT 24 |
56735267 ps |
| T969 |
/workspace/coverage/default/31.spi_device_stress_all.3560959917 |
|
|
Jun 05 05:42:36 PM PDT 24 |
Jun 05 05:51:25 PM PDT 24 |
42556849745 ps |
| T970 |
/workspace/coverage/default/5.spi_device_cfg_cmd.2092511734 |
|
|
Jun 05 05:41:06 PM PDT 24 |
Jun 05 05:41:29 PM PDT 24 |
2127177635 ps |
| T971 |
/workspace/coverage/default/10.spi_device_read_buffer_direct.2625328580 |
|
|
Jun 05 05:41:31 PM PDT 24 |
Jun 05 05:41:44 PM PDT 24 |
3518373319 ps |
| T972 |
/workspace/coverage/default/37.spi_device_flash_mode.1463370513 |
|
|
Jun 05 05:42:49 PM PDT 24 |
Jun 05 05:43:01 PM PDT 24 |
4547468028 ps |
| T973 |
/workspace/coverage/default/33.spi_device_flash_and_tpm.1687724564 |
|
|
Jun 05 05:42:40 PM PDT 24 |
Jun 05 05:49:09 PM PDT 24 |
163156266153 ps |
| T974 |
/workspace/coverage/default/28.spi_device_tpm_rw.160390955 |
|
|
Jun 05 05:42:25 PM PDT 24 |
Jun 05 05:42:26 PM PDT 24 |
11655473 ps |
| T975 |
/workspace/coverage/default/30.spi_device_alert_test.1941256771 |
|
|
Jun 05 05:42:31 PM PDT 24 |
Jun 05 05:42:33 PM PDT 24 |
56860007 ps |
| T976 |
/workspace/coverage/default/15.spi_device_read_buffer_direct.2119055742 |
|
|
Jun 05 05:41:42 PM PDT 24 |
Jun 05 05:41:46 PM PDT 24 |
888437228 ps |
| T977 |
/workspace/coverage/default/36.spi_device_upload.4260870757 |
|
|
Jun 05 05:42:50 PM PDT 24 |
Jun 05 05:43:00 PM PDT 24 |
17327424422 ps |
| T978 |
/workspace/coverage/cover_reg_top/28.spi_device_intr_test.440868403 |
|
|
Jun 05 04:34:34 PM PDT 24 |
Jun 05 04:34:37 PM PDT 24 |
11427170 ps |
| T88 |
/workspace/coverage/cover_reg_top/1.spi_device_csr_mem_rw_with_rand_reset.2571067370 |
|
|
Jun 05 04:34:03 PM PDT 24 |
Jun 05 04:34:07 PM PDT 24 |
464178491 ps |
| T979 |
/workspace/coverage/cover_reg_top/42.spi_device_intr_test.419466636 |
|
|
Jun 05 04:34:32 PM PDT 24 |
Jun 05 04:34:35 PM PDT 24 |
104254611 ps |
| T89 |
/workspace/coverage/cover_reg_top/0.spi_device_tl_intg_err.1040484498 |
|
|
Jun 05 04:34:02 PM PDT 24 |
Jun 05 04:34:26 PM PDT 24 |
1703624714 ps |
| T980 |
/workspace/coverage/cover_reg_top/29.spi_device_intr_test.4073230396 |
|
|
Jun 05 04:34:32 PM PDT 24 |
Jun 05 04:34:34 PM PDT 24 |
17448584 ps |
| T981 |
/workspace/coverage/cover_reg_top/45.spi_device_intr_test.1709708066 |
|
|
Jun 05 04:34:32 PM PDT 24 |
Jun 05 04:34:37 PM PDT 24 |
28081347 ps |
| T90 |
/workspace/coverage/cover_reg_top/16.spi_device_tl_errors.2856006929 |
|
|
Jun 05 04:34:36 PM PDT 24 |
Jun 05 04:34:41 PM PDT 24 |
351767521 ps |
| T91 |
/workspace/coverage/cover_reg_top/5.spi_device_csr_mem_rw_with_rand_reset.3050739270 |
|
|
Jun 05 04:34:12 PM PDT 24 |
Jun 05 04:34:15 PM PDT 24 |
60130882 ps |
| T982 |
/workspace/coverage/cover_reg_top/21.spi_device_intr_test.3438536571 |
|
|
Jun 05 04:34:20 PM PDT 24 |
Jun 05 04:34:22 PM PDT 24 |
12534896 ps |
| T983 |
/workspace/coverage/cover_reg_top/40.spi_device_intr_test.3434972728 |
|
|
Jun 05 04:34:32 PM PDT 24 |
Jun 05 04:34:34 PM PDT 24 |
24351714 ps |
| T92 |
/workspace/coverage/cover_reg_top/7.spi_device_tl_intg_err.3105900769 |
|
|
Jun 05 04:34:37 PM PDT 24 |
Jun 05 04:34:59 PM PDT 24 |
3795374757 ps |
| T984 |
/workspace/coverage/cover_reg_top/1.spi_device_csr_bit_bash.1041894308 |
|
|
Jun 05 04:34:01 PM PDT 24 |
Jun 05 04:34:26 PM PDT 24 |
1256487947 ps |
| T93 |
/workspace/coverage/cover_reg_top/9.spi_device_tl_errors.3407996932 |
|
|
Jun 05 04:34:11 PM PDT 24 |
Jun 05 04:34:14 PM PDT 24 |
287540640 ps |
| T94 |
/workspace/coverage/cover_reg_top/5.spi_device_tl_intg_err.4180501878 |
|
|
Jun 05 04:34:02 PM PDT 24 |
Jun 05 04:34:26 PM PDT 24 |
4219426508 ps |
| T131 |
/workspace/coverage/cover_reg_top/12.spi_device_same_csr_outstanding.611593680 |
|
|
Jun 05 04:34:19 PM PDT 24 |
Jun 05 04:34:22 PM PDT 24 |
92816991 ps |
| T132 |
/workspace/coverage/cover_reg_top/19.spi_device_csr_rw.4230309910 |
|
|
Jun 05 04:34:21 PM PDT 24 |
Jun 05 04:34:24 PM PDT 24 |
265875551 ps |
| T95 |
/workspace/coverage/cover_reg_top/6.spi_device_csr_mem_rw_with_rand_reset.2176978259 |
|
|
Jun 05 04:34:12 PM PDT 24 |
Jun 05 04:34:17 PM PDT 24 |
184223676 ps |
| T985 |
/workspace/coverage/cover_reg_top/6.spi_device_intr_test.2495502689 |
|
|
Jun 05 04:34:40 PM PDT 24 |
Jun 05 04:34:43 PM PDT 24 |
26457554 ps |
| T986 |
/workspace/coverage/cover_reg_top/43.spi_device_intr_test.3585304203 |
|
|
Jun 05 04:34:35 PM PDT 24 |
Jun 05 04:34:38 PM PDT 24 |
30093383 ps |
| T987 |
/workspace/coverage/cover_reg_top/13.spi_device_intr_test.861099581 |
|
|
Jun 05 04:34:52 PM PDT 24 |
Jun 05 04:34:53 PM PDT 24 |
13160042 ps |
| T112 |
/workspace/coverage/cover_reg_top/2.spi_device_mem_partial_access.545631842 |
|
|
Jun 05 04:34:04 PM PDT 24 |
Jun 05 04:34:07 PM PDT 24 |
23141768 ps |
| T96 |
/workspace/coverage/cover_reg_top/11.spi_device_tl_errors.420825801 |
|
|
Jun 05 04:34:22 PM PDT 24 |
Jun 05 04:34:26 PM PDT 24 |
405906824 ps |
| T988 |
/workspace/coverage/cover_reg_top/26.spi_device_intr_test.2882132047 |
|
|
Jun 05 04:34:30 PM PDT 24 |
Jun 05 04:34:32 PM PDT 24 |
20445028 ps |
| T989 |
/workspace/coverage/cover_reg_top/4.spi_device_same_csr_outstanding.934592825 |
|
|
Jun 05 04:34:14 PM PDT 24 |
Jun 05 04:34:18 PM PDT 24 |
178300241 ps |
| T76 |
/workspace/coverage/cover_reg_top/1.spi_device_csr_hw_reset.2105021124 |
|
|
Jun 05 04:34:06 PM PDT 24 |
Jun 05 04:34:08 PM PDT 24 |
39824578 ps |
| T990 |
/workspace/coverage/cover_reg_top/11.spi_device_intr_test.482991579 |
|
|
Jun 05 04:34:29 PM PDT 24 |
Jun 05 04:34:31 PM PDT 24 |
20574286 ps |
| T991 |
/workspace/coverage/cover_reg_top/32.spi_device_intr_test.319256450 |
|
|
Jun 05 04:34:28 PM PDT 24 |
Jun 05 04:34:30 PM PDT 24 |
58239267 ps |
| T109 |
/workspace/coverage/cover_reg_top/13.spi_device_csr_mem_rw_with_rand_reset.1502351392 |
|
|
Jun 05 04:34:24 PM PDT 24 |
Jun 05 04:34:29 PM PDT 24 |
93160314 ps |
| T113 |
/workspace/coverage/cover_reg_top/1.spi_device_mem_partial_access.3776460327 |
|
|
Jun 05 04:34:03 PM PDT 24 |
Jun 05 04:34:06 PM PDT 24 |
147982522 ps |
| T992 |
/workspace/coverage/cover_reg_top/10.spi_device_intr_test.2547685933 |
|
|
Jun 05 04:34:14 PM PDT 24 |
Jun 05 04:34:16 PM PDT 24 |
15089190 ps |
| T110 |
/workspace/coverage/cover_reg_top/15.spi_device_tl_intg_err.1628538309 |
|
|
Jun 05 04:34:14 PM PDT 24 |
Jun 05 04:34:23 PM PDT 24 |
1442472504 ps |
| T99 |
/workspace/coverage/cover_reg_top/1.spi_device_tl_errors.1571856674 |
|
|
Jun 05 04:34:09 PM PDT 24 |
Jun 05 04:34:14 PM PDT 24 |
230928594 ps |
| T993 |
/workspace/coverage/cover_reg_top/11.spi_device_csr_rw.348325713 |
|
|
Jun 05 04:34:13 PM PDT 24 |
Jun 05 04:34:16 PM PDT 24 |
29430172 ps |
| T242 |
/workspace/coverage/cover_reg_top/18.spi_device_tl_intg_err.1438336859 |
|
|
Jun 05 04:34:12 PM PDT 24 |
Jun 05 04:34:33 PM PDT 24 |
1217086416 ps |
| T994 |
/workspace/coverage/cover_reg_top/30.spi_device_intr_test.2743576688 |
|
|
Jun 05 04:34:30 PM PDT 24 |
Jun 05 04:34:32 PM PDT 24 |
75134109 ps |
| T995 |
/workspace/coverage/cover_reg_top/33.spi_device_intr_test.2311299597 |
|
|
Jun 05 04:34:28 PM PDT 24 |
Jun 05 04:34:30 PM PDT 24 |
12477851 ps |
| T996 |
/workspace/coverage/cover_reg_top/0.spi_device_mem_walk.3203293186 |
|
|
Jun 05 04:34:04 PM PDT 24 |
Jun 05 04:34:06 PM PDT 24 |
16884246 ps |
| T138 |
/workspace/coverage/cover_reg_top/9.spi_device_csr_rw.2554810196 |
|
|
Jun 05 04:34:12 PM PDT 24 |
Jun 05 04:34:15 PM PDT 24 |
81261025 ps |
| T997 |
/workspace/coverage/cover_reg_top/19.spi_device_tl_intg_err.291289285 |
|
|
Jun 05 04:34:20 PM PDT 24 |
Jun 05 04:34:28 PM PDT 24 |
132801726 ps |
| T100 |
/workspace/coverage/cover_reg_top/13.spi_device_tl_errors.691450779 |
|
|
Jun 05 04:34:29 PM PDT 24 |
Jun 05 04:34:34 PM PDT 24 |
208887548 ps |
| T114 |
/workspace/coverage/cover_reg_top/18.spi_device_csr_rw.3662832956 |
|
|
Jun 05 04:34:26 PM PDT 24 |
Jun 05 04:34:28 PM PDT 24 |
26405180 ps |
| T998 |
/workspace/coverage/cover_reg_top/4.spi_device_mem_walk.3464492691 |
|
|
Jun 05 04:34:09 PM PDT 24 |
Jun 05 04:34:11 PM PDT 24 |
31061947 ps |
| T139 |
/workspace/coverage/cover_reg_top/12.spi_device_csr_mem_rw_with_rand_reset.3822712350 |
|
|
Jun 05 04:34:14 PM PDT 24 |
Jun 05 04:34:19 PM PDT 24 |
223407239 ps |
| T241 |
/workspace/coverage/cover_reg_top/2.spi_device_tl_intg_err.2515049797 |
|
|
Jun 05 04:34:04 PM PDT 24 |
Jun 05 04:34:12 PM PDT 24 |
107928043 ps |
| T999 |
/workspace/coverage/cover_reg_top/0.spi_device_csr_bit_bash.3742064743 |
|
|
Jun 05 04:34:01 PM PDT 24 |
Jun 05 04:34:29 PM PDT 24 |
9351040743 ps |
| T102 |
/workspace/coverage/cover_reg_top/18.spi_device_tl_errors.3890164857 |
|
|
Jun 05 04:34:11 PM PDT 24 |
Jun 05 04:34:16 PM PDT 24 |
156303463 ps |
| T1000 |
/workspace/coverage/cover_reg_top/15.spi_device_same_csr_outstanding.3378057146 |
|
|
Jun 05 04:34:16 PM PDT 24 |
Jun 05 04:34:19 PM PDT 24 |
41371213 ps |
| T140 |
/workspace/coverage/cover_reg_top/3.spi_device_csr_hw_reset.4130106950 |
|
|
Jun 05 04:34:16 PM PDT 24 |
Jun 05 04:34:18 PM PDT 24 |
24412513 ps |
| T1001 |
/workspace/coverage/cover_reg_top/18.spi_device_same_csr_outstanding.3183251530 |
|
|
Jun 05 04:34:16 PM PDT 24 |
Jun 05 04:34:20 PM PDT 24 |
57830666 ps |
| T103 |
/workspace/coverage/cover_reg_top/12.spi_device_tl_errors.1676033252 |
|
|
Jun 05 04:34:16 PM PDT 24 |
Jun 05 04:34:18 PM PDT 24 |
85584169 ps |
| T77 |
/workspace/coverage/cover_reg_top/2.spi_device_csr_hw_reset.4061705136 |
|
|
Jun 05 04:34:02 PM PDT 24 |
Jun 05 04:34:05 PM PDT 24 |
47438848 ps |
| T243 |
/workspace/coverage/cover_reg_top/14.spi_device_tl_intg_err.1389059485 |
|
|
Jun 05 04:34:30 PM PDT 24 |
Jun 05 04:34:46 PM PDT 24 |
1846792595 ps |
| T1002 |
/workspace/coverage/cover_reg_top/6.spi_device_tl_intg_err.57465695 |
|
|
Jun 05 04:34:31 PM PDT 24 |
Jun 05 04:34:46 PM PDT 24 |
810913966 ps |
| T141 |
/workspace/coverage/cover_reg_top/13.spi_device_tl_intg_err.2559439033 |
|
|
Jun 05 04:34:28 PM PDT 24 |
Jun 05 04:34:53 PM PDT 24 |
5557827754 ps |
| T1003 |
/workspace/coverage/cover_reg_top/2.spi_device_intr_test.2877550884 |
|
|
Jun 05 04:34:03 PM PDT 24 |
Jun 05 04:34:05 PM PDT 24 |
49608249 ps |
| T1004 |
/workspace/coverage/cover_reg_top/39.spi_device_intr_test.3953314230 |
|
|
Jun 05 04:34:41 PM PDT 24 |
Jun 05 04:34:43 PM PDT 24 |
31861967 ps |
| T106 |
/workspace/coverage/cover_reg_top/15.spi_device_tl_errors.3580245644 |
|
|
Jun 05 04:34:35 PM PDT 24 |
Jun 05 04:34:39 PM PDT 24 |
97460792 ps |
| T142 |
/workspace/coverage/cover_reg_top/7.spi_device_csr_mem_rw_with_rand_reset.2419870935 |
|
|
Jun 05 04:34:26 PM PDT 24 |
Jun 05 04:34:31 PM PDT 24 |
604932694 ps |
| T1005 |
/workspace/coverage/cover_reg_top/15.spi_device_intr_test.3087134531 |
|
|
Jun 05 04:34:23 PM PDT 24 |
Jun 05 04:34:25 PM PDT 24 |
27276590 ps |
| T1006 |
/workspace/coverage/cover_reg_top/4.spi_device_tl_intg_err.3558832586 |
|
|
Jun 05 04:34:13 PM PDT 24 |
Jun 05 04:34:22 PM PDT 24 |
1883731851 ps |
| T1007 |
/workspace/coverage/cover_reg_top/4.spi_device_csr_aliasing.197968023 |
|
|
Jun 05 04:34:07 PM PDT 24 |
Jun 05 04:34:25 PM PDT 24 |
2454550093 ps |
| T115 |
/workspace/coverage/cover_reg_top/1.spi_device_csr_rw.265133367 |
|
|
Jun 05 04:34:07 PM PDT 24 |
Jun 05 04:34:10 PM PDT 24 |
41956759 ps |
| T116 |
/workspace/coverage/cover_reg_top/15.spi_device_csr_rw.3480562970 |
|
|
Jun 05 04:34:22 PM PDT 24 |
Jun 05 04:34:26 PM PDT 24 |
124170148 ps |
| T117 |
/workspace/coverage/cover_reg_top/3.spi_device_mem_partial_access.3456785784 |
|
|
Jun 05 04:34:04 PM PDT 24 |
Jun 05 04:34:07 PM PDT 24 |
124552914 ps |
| T121 |
/workspace/coverage/cover_reg_top/2.spi_device_csr_bit_bash.2545165535 |
|
|
Jun 05 04:34:07 PM PDT 24 |
Jun 05 04:34:21 PM PDT 24 |
2538312320 ps |
| T1008 |
/workspace/coverage/cover_reg_top/19.spi_device_intr_test.317663305 |
|
|
Jun 05 04:34:15 PM PDT 24 |
Jun 05 04:34:17 PM PDT 24 |
17527546 ps |
| T1009 |
/workspace/coverage/cover_reg_top/1.spi_device_mem_walk.3347533961 |
|
|
Jun 05 04:34:09 PM PDT 24 |
Jun 05 04:34:16 PM PDT 24 |
89836970 ps |
| T1010 |
/workspace/coverage/cover_reg_top/1.spi_device_same_csr_outstanding.2290249674 |
|
|
Jun 05 04:34:12 PM PDT 24 |
Jun 05 04:34:16 PM PDT 24 |
128493584 ps |
| T118 |
/workspace/coverage/cover_reg_top/0.spi_device_csr_aliasing.1276309629 |
|
|
Jun 05 04:34:02 PM PDT 24 |
Jun 05 04:34:20 PM PDT 24 |
744794725 ps |
| T101 |
/workspace/coverage/cover_reg_top/0.spi_device_tl_errors.822518239 |
|
|
Jun 05 04:34:00 PM PDT 24 |
Jun 05 04:34:06 PM PDT 24 |
75014019 ps |
| T143 |
/workspace/coverage/cover_reg_top/10.spi_device_tl_intg_err.1721982518 |
|
|
Jun 05 04:34:30 PM PDT 24 |
Jun 05 04:34:47 PM PDT 24 |
2619149077 ps |
| T1011 |
/workspace/coverage/cover_reg_top/0.spi_device_csr_mem_rw_with_rand_reset.2932345393 |
|
|
Jun 05 04:34:05 PM PDT 24 |
Jun 05 04:34:07 PM PDT 24 |
50747129 ps |
| T1012 |
/workspace/coverage/cover_reg_top/10.spi_device_tl_errors.3341805486 |
|
|
Jun 05 04:34:11 PM PDT 24 |
Jun 05 04:34:13 PM PDT 24 |
55611551 ps |
| T1013 |
/workspace/coverage/cover_reg_top/35.spi_device_intr_test.2674141132 |
|
|
Jun 05 04:34:30 PM PDT 24 |
Jun 05 04:34:32 PM PDT 24 |
49413140 ps |