T816 |
/workspace/coverage/default/6.spi_device_flash_all.1381513107 |
|
|
Jun 21 07:02:45 PM PDT 24 |
Jun 21 07:03:48 PM PDT 24 |
15419770963 ps |
T817 |
/workspace/coverage/default/2.spi_device_cfg_cmd.2323723664 |
|
|
Jun 21 07:02:32 PM PDT 24 |
Jun 21 07:02:46 PM PDT 24 |
726399815 ps |
T818 |
/workspace/coverage/default/11.spi_device_mem_parity.3314134619 |
|
|
Jun 21 07:03:01 PM PDT 24 |
Jun 21 07:03:09 PM PDT 24 |
17566622 ps |
T126 |
/workspace/coverage/default/0.spi_device_stress_all.3318965967 |
|
|
Jun 21 07:02:28 PM PDT 24 |
Jun 21 07:15:58 PM PDT 24 |
332287246887 ps |
T819 |
/workspace/coverage/default/20.spi_device_cfg_cmd.2687280300 |
|
|
Jun 21 07:03:34 PM PDT 24 |
Jun 21 07:03:44 PM PDT 24 |
78599143 ps |
T820 |
/workspace/coverage/default/12.spi_device_read_buffer_direct.3489396868 |
|
|
Jun 21 07:03:02 PM PDT 24 |
Jun 21 07:03:20 PM PDT 24 |
1089133567 ps |
T821 |
/workspace/coverage/default/49.spi_device_flash_all.804346814 |
|
|
Jun 21 07:05:15 PM PDT 24 |
Jun 21 07:06:46 PM PDT 24 |
25065899666 ps |
T822 |
/workspace/coverage/default/37.spi_device_intercept.2104522957 |
|
|
Jun 21 07:04:27 PM PDT 24 |
Jun 21 07:04:38 PM PDT 24 |
320518180 ps |
T823 |
/workspace/coverage/default/4.spi_device_pass_cmd_filtering.2945961832 |
|
|
Jun 21 07:02:37 PM PDT 24 |
Jun 21 07:02:44 PM PDT 24 |
347796798 ps |
T824 |
/workspace/coverage/default/37.spi_device_flash_all.2376794629 |
|
|
Jun 21 07:04:37 PM PDT 24 |
Jun 21 07:07:06 PM PDT 24 |
32919357108 ps |
T825 |
/workspace/coverage/default/25.spi_device_mailbox.4251073313 |
|
|
Jun 21 07:03:46 PM PDT 24 |
Jun 21 07:04:01 PM PDT 24 |
4038545704 ps |
T826 |
/workspace/coverage/default/17.spi_device_cfg_cmd.2575502365 |
|
|
Jun 21 07:03:22 PM PDT 24 |
Jun 21 07:03:53 PM PDT 24 |
2875980493 ps |
T233 |
/workspace/coverage/default/39.spi_device_pass_addr_payload_swap.2002484939 |
|
|
Jun 21 07:04:27 PM PDT 24 |
Jun 21 07:04:50 PM PDT 24 |
27550060815 ps |
T827 |
/workspace/coverage/default/18.spi_device_tpm_sts_read.995595352 |
|
|
Jun 21 07:03:29 PM PDT 24 |
Jun 21 07:03:37 PM PDT 24 |
56618897 ps |
T828 |
/workspace/coverage/default/8.spi_device_tpm_sts_read.3453698723 |
|
|
Jun 21 07:02:52 PM PDT 24 |
Jun 21 07:02:58 PM PDT 24 |
81000550 ps |
T829 |
/workspace/coverage/default/18.spi_device_stress_all.1630222449 |
|
|
Jun 21 07:03:28 PM PDT 24 |
Jun 21 07:03:37 PM PDT 24 |
50526222 ps |
T830 |
/workspace/coverage/default/30.spi_device_mailbox.523425286 |
|
|
Jun 21 07:04:04 PM PDT 24 |
Jun 21 07:04:20 PM PDT 24 |
758307482 ps |
T831 |
/workspace/coverage/default/18.spi_device_upload.1997701803 |
|
|
Jun 21 07:03:29 PM PDT 24 |
Jun 21 07:03:41 PM PDT 24 |
195606748 ps |
T832 |
/workspace/coverage/default/31.spi_device_tpm_sts_read.538879904 |
|
|
Jun 21 07:04:11 PM PDT 24 |
Jun 21 07:04:21 PM PDT 24 |
111497841 ps |
T833 |
/workspace/coverage/default/19.spi_device_pass_cmd_filtering.3841363351 |
|
|
Jun 21 07:03:33 PM PDT 24 |
Jun 21 07:03:46 PM PDT 24 |
3237253541 ps |
T834 |
/workspace/coverage/default/15.spi_device_csb_read.4234366166 |
|
|
Jun 21 07:03:13 PM PDT 24 |
Jun 21 07:03:19 PM PDT 24 |
43010270 ps |
T835 |
/workspace/coverage/default/32.spi_device_pass_addr_payload_swap.3137219203 |
|
|
Jun 21 07:04:13 PM PDT 24 |
Jun 21 07:04:28 PM PDT 24 |
4178117539 ps |
T836 |
/workspace/coverage/default/27.spi_device_mailbox.3784408804 |
|
|
Jun 21 07:03:53 PM PDT 24 |
Jun 21 07:05:04 PM PDT 24 |
32056221786 ps |
T837 |
/workspace/coverage/default/9.spi_device_flash_and_tpm_min_idle.2989574544 |
|
|
Jun 21 07:02:53 PM PDT 24 |
Jun 21 07:03:22 PM PDT 24 |
2215416524 ps |
T838 |
/workspace/coverage/default/24.spi_device_pass_addr_payload_swap.67555184 |
|
|
Jun 21 07:03:44 PM PDT 24 |
Jun 21 07:04:10 PM PDT 24 |
5970759066 ps |
T839 |
/workspace/coverage/default/3.spi_device_intercept.2796922319 |
|
|
Jun 21 07:02:34 PM PDT 24 |
Jun 21 07:02:42 PM PDT 24 |
168697825 ps |
T840 |
/workspace/coverage/default/38.spi_device_tpm_sts_read.2322070668 |
|
|
Jun 21 07:04:29 PM PDT 24 |
Jun 21 07:04:40 PM PDT 24 |
39215615 ps |
T841 |
/workspace/coverage/default/48.spi_device_alert_test.2966262935 |
|
|
Jun 21 07:05:01 PM PDT 24 |
Jun 21 07:05:12 PM PDT 24 |
22872012 ps |
T842 |
/workspace/coverage/default/3.spi_device_flash_mode.1293005550 |
|
|
Jun 21 07:02:40 PM PDT 24 |
Jun 21 07:02:58 PM PDT 24 |
482552374 ps |
T227 |
/workspace/coverage/default/18.spi_device_pass_addr_payload_swap.890513801 |
|
|
Jun 21 07:03:29 PM PDT 24 |
Jun 21 07:03:59 PM PDT 24 |
10701319489 ps |
T843 |
/workspace/coverage/default/41.spi_device_stress_all.918650872 |
|
|
Jun 21 07:04:45 PM PDT 24 |
Jun 21 07:04:56 PM PDT 24 |
613453896 ps |
T844 |
/workspace/coverage/default/29.spi_device_pass_addr_payload_swap.406901599 |
|
|
Jun 21 07:04:05 PM PDT 24 |
Jun 21 07:04:29 PM PDT 24 |
45803852918 ps |
T845 |
/workspace/coverage/default/22.spi_device_tpm_read_hw_reg.2928866726 |
|
|
Jun 21 07:03:37 PM PDT 24 |
Jun 21 07:03:45 PM PDT 24 |
630203145 ps |
T846 |
/workspace/coverage/default/18.spi_device_tpm_rw.513798774 |
|
|
Jun 21 07:03:30 PM PDT 24 |
Jun 21 07:03:41 PM PDT 24 |
118893196 ps |
T847 |
/workspace/coverage/default/30.spi_device_alert_test.216779068 |
|
|
Jun 21 07:04:05 PM PDT 24 |
Jun 21 07:04:16 PM PDT 24 |
50084158 ps |
T848 |
/workspace/coverage/default/43.spi_device_cfg_cmd.2499978216 |
|
|
Jun 21 07:04:51 PM PDT 24 |
Jun 21 07:05:06 PM PDT 24 |
1404139223 ps |
T849 |
/workspace/coverage/default/23.spi_device_upload.2122384230 |
|
|
Jun 21 07:03:46 PM PDT 24 |
Jun 21 07:04:02 PM PDT 24 |
6619481141 ps |
T850 |
/workspace/coverage/default/46.spi_device_tpm_read_hw_reg.2301202969 |
|
|
Jun 21 07:04:53 PM PDT 24 |
Jun 21 07:05:07 PM PDT 24 |
1124188266 ps |
T851 |
/workspace/coverage/default/2.spi_device_upload.1206480844 |
|
|
Jun 21 07:02:26 PM PDT 24 |
Jun 21 07:03:02 PM PDT 24 |
9384928681 ps |
T852 |
/workspace/coverage/default/15.spi_device_upload.3775892105 |
|
|
Jun 21 07:03:20 PM PDT 24 |
Jun 21 07:03:26 PM PDT 24 |
183015983 ps |
T853 |
/workspace/coverage/default/46.spi_device_upload.3871574130 |
|
|
Jun 21 07:05:02 PM PDT 24 |
Jun 21 07:05:24 PM PDT 24 |
17292984245 ps |
T854 |
/workspace/coverage/default/29.spi_device_cfg_cmd.198367964 |
|
|
Jun 21 07:04:03 PM PDT 24 |
Jun 21 07:04:17 PM PDT 24 |
639776838 ps |
T855 |
/workspace/coverage/default/47.spi_device_mailbox.2969404082 |
|
|
Jun 21 07:05:03 PM PDT 24 |
Jun 21 07:06:38 PM PDT 24 |
18830700544 ps |
T856 |
/workspace/coverage/default/1.spi_device_mem_parity.3079557244 |
|
|
Jun 21 07:02:28 PM PDT 24 |
Jun 21 07:02:34 PM PDT 24 |
15460020 ps |
T857 |
/workspace/coverage/default/6.spi_device_flash_and_tpm.2383355971 |
|
|
Jun 21 07:02:43 PM PDT 24 |
Jun 21 07:04:31 PM PDT 24 |
75409749767 ps |
T858 |
/workspace/coverage/default/24.spi_device_flash_mode.1166474318 |
|
|
Jun 21 07:03:43 PM PDT 24 |
Jun 21 07:03:58 PM PDT 24 |
1214754380 ps |
T859 |
/workspace/coverage/default/33.spi_device_flash_and_tpm_min_idle.2016400094 |
|
|
Jun 21 07:04:19 PM PDT 24 |
Jun 21 07:10:50 PM PDT 24 |
101102604688 ps |
T860 |
/workspace/coverage/default/14.spi_device_csb_read.3594570919 |
|
|
Jun 21 07:03:13 PM PDT 24 |
Jun 21 07:03:19 PM PDT 24 |
14337561 ps |
T861 |
/workspace/coverage/default/9.spi_device_tpm_all.2003969184 |
|
|
Jun 21 07:02:55 PM PDT 24 |
Jun 21 07:03:29 PM PDT 24 |
14007084602 ps |
T862 |
/workspace/coverage/default/28.spi_device_tpm_rw.3290818359 |
|
|
Jun 21 07:03:57 PM PDT 24 |
Jun 21 07:04:10 PM PDT 24 |
34706975 ps |
T863 |
/workspace/coverage/default/19.spi_device_alert_test.488905520 |
|
|
Jun 21 07:03:31 PM PDT 24 |
Jun 21 07:03:39 PM PDT 24 |
10779249 ps |
T864 |
/workspace/coverage/default/41.spi_device_tpm_all.1401349239 |
|
|
Jun 21 07:04:42 PM PDT 24 |
Jun 21 07:05:03 PM PDT 24 |
10176472913 ps |
T865 |
/workspace/coverage/default/5.spi_device_csb_read.1312303571 |
|
|
Jun 21 07:02:38 PM PDT 24 |
Jun 21 07:02:44 PM PDT 24 |
16511694 ps |
T866 |
/workspace/coverage/default/47.spi_device_pass_addr_payload_swap.4005696483 |
|
|
Jun 21 07:05:03 PM PDT 24 |
Jun 21 07:05:14 PM PDT 24 |
34485336 ps |
T867 |
/workspace/coverage/default/1.spi_device_stress_all.2177096460 |
|
|
Jun 21 07:02:28 PM PDT 24 |
Jun 21 07:02:56 PM PDT 24 |
16983942278 ps |
T868 |
/workspace/coverage/default/27.spi_device_flash_and_tpm_min_idle.107632381 |
|
|
Jun 21 07:03:57 PM PDT 24 |
Jun 21 07:07:52 PM PDT 24 |
43933604820 ps |
T869 |
/workspace/coverage/default/29.spi_device_read_buffer_direct.1009018952 |
|
|
Jun 21 07:04:04 PM PDT 24 |
Jun 21 07:04:18 PM PDT 24 |
143734866 ps |
T870 |
/workspace/coverage/default/20.spi_device_mailbox.1650607365 |
|
|
Jun 21 07:03:30 PM PDT 24 |
Jun 21 07:03:40 PM PDT 24 |
78028420 ps |
T871 |
/workspace/coverage/default/19.spi_device_flash_and_tpm.3638273671 |
|
|
Jun 21 07:03:28 PM PDT 24 |
Jun 21 07:16:50 PM PDT 24 |
79532147303 ps |
T872 |
/workspace/coverage/default/18.spi_device_tpm_read_hw_reg.3332207492 |
|
|
Jun 21 07:03:29 PM PDT 24 |
Jun 21 07:03:37 PM PDT 24 |
10787873 ps |
T873 |
/workspace/coverage/default/26.spi_device_tpm_all.2215139710 |
|
|
Jun 21 07:03:46 PM PDT 24 |
Jun 21 07:04:00 PM PDT 24 |
2449352997 ps |
T874 |
/workspace/coverage/default/40.spi_device_csb_read.1148272066 |
|
|
Jun 21 07:04:35 PM PDT 24 |
Jun 21 07:04:48 PM PDT 24 |
46457629 ps |
T875 |
/workspace/coverage/default/23.spi_device_flash_and_tpm_min_idle.4219643309 |
|
|
Jun 21 07:03:44 PM PDT 24 |
Jun 21 07:06:13 PM PDT 24 |
33755873302 ps |
T876 |
/workspace/coverage/default/12.spi_device_upload.4275383797 |
|
|
Jun 21 07:03:05 PM PDT 24 |
Jun 21 07:03:30 PM PDT 24 |
10071965511 ps |
T877 |
/workspace/coverage/default/27.spi_device_flash_and_tpm.2351230571 |
|
|
Jun 21 07:03:57 PM PDT 24 |
Jun 21 07:04:19 PM PDT 24 |
3008167685 ps |
T878 |
/workspace/coverage/default/44.spi_device_pass_addr_payload_swap.2939156568 |
|
|
Jun 21 07:04:50 PM PDT 24 |
Jun 21 07:05:19 PM PDT 24 |
5353751588 ps |
T879 |
/workspace/coverage/default/21.spi_device_tpm_all.2162411998 |
|
|
Jun 21 07:03:42 PM PDT 24 |
Jun 21 07:03:48 PM PDT 24 |
45506782 ps |
T880 |
/workspace/coverage/default/29.spi_device_intercept.3341949602 |
|
|
Jun 21 07:04:05 PM PDT 24 |
Jun 21 07:04:18 PM PDT 24 |
46782874 ps |
T881 |
/workspace/coverage/default/1.spi_device_intercept.4266381310 |
|
|
Jun 21 07:02:25 PM PDT 24 |
Jun 21 07:02:35 PM PDT 24 |
1089934406 ps |
T882 |
/workspace/coverage/default/3.spi_device_mem_parity.3874924375 |
|
|
Jun 21 07:02:35 PM PDT 24 |
Jun 21 07:02:41 PM PDT 24 |
16010631 ps |
T883 |
/workspace/coverage/default/36.spi_device_flash_mode.2994350679 |
|
|
Jun 21 07:04:28 PM PDT 24 |
Jun 21 07:05:00 PM PDT 24 |
8563310757 ps |
T884 |
/workspace/coverage/default/29.spi_device_pass_cmd_filtering.1998263762 |
|
|
Jun 21 07:04:01 PM PDT 24 |
Jun 21 07:04:25 PM PDT 24 |
3443684635 ps |
T885 |
/workspace/coverage/default/49.spi_device_flash_mode.1615378661 |
|
|
Jun 21 07:05:13 PM PDT 24 |
Jun 21 07:05:35 PM PDT 24 |
884847905 ps |
T886 |
/workspace/coverage/default/36.spi_device_tpm_read_hw_reg.1031341932 |
|
|
Jun 21 07:04:23 PM PDT 24 |
Jun 21 07:04:38 PM PDT 24 |
7905092192 ps |
T887 |
/workspace/coverage/default/32.spi_device_cfg_cmd.501516057 |
|
|
Jun 21 07:04:11 PM PDT 24 |
Jun 21 07:04:24 PM PDT 24 |
100953898 ps |
T204 |
/workspace/coverage/default/28.spi_device_flash_all.783495119 |
|
|
Jun 21 07:04:03 PM PDT 24 |
Jun 21 07:06:19 PM PDT 24 |
34944510921 ps |
T888 |
/workspace/coverage/default/4.spi_device_intercept.1043055901 |
|
|
Jun 21 07:02:39 PM PDT 24 |
Jun 21 07:02:52 PM PDT 24 |
249515788 ps |
T889 |
/workspace/coverage/default/47.spi_device_tpm_read_hw_reg.3216723960 |
|
|
Jun 21 07:05:01 PM PDT 24 |
Jun 21 07:05:14 PM PDT 24 |
3335196230 ps |
T890 |
/workspace/coverage/default/49.spi_device_flash_and_tpm_min_idle.2473785999 |
|
|
Jun 21 07:05:15 PM PDT 24 |
Jun 21 07:09:53 PM PDT 24 |
105943666814 ps |
T891 |
/workspace/coverage/default/7.spi_device_csb_read.864897084 |
|
|
Jun 21 07:02:43 PM PDT 24 |
Jun 21 07:02:49 PM PDT 24 |
18680644 ps |
T892 |
/workspace/coverage/default/8.spi_device_flash_and_tpm_min_idle.3423750408 |
|
|
Jun 21 07:03:02 PM PDT 24 |
Jun 21 07:03:38 PM PDT 24 |
1961228172 ps |
T893 |
/workspace/coverage/default/47.spi_device_tpm_all.4101590096 |
|
|
Jun 21 07:05:03 PM PDT 24 |
Jun 21 07:05:35 PM PDT 24 |
3953098476 ps |
T894 |
/workspace/coverage/default/44.spi_device_tpm_read_hw_reg.2184170982 |
|
|
Jun 21 07:04:52 PM PDT 24 |
Jun 21 07:05:05 PM PDT 24 |
659360721 ps |
T895 |
/workspace/coverage/default/5.spi_device_cfg_cmd.3556416467 |
|
|
Jun 21 07:02:47 PM PDT 24 |
Jun 21 07:02:55 PM PDT 24 |
466904051 ps |
T896 |
/workspace/coverage/default/0.spi_device_tpm_rw.2656913644 |
|
|
Jun 21 07:02:22 PM PDT 24 |
Jun 21 07:02:27 PM PDT 24 |
24787239 ps |
T897 |
/workspace/coverage/default/9.spi_device_pass_addr_payload_swap.3349741994 |
|
|
Jun 21 07:02:50 PM PDT 24 |
Jun 21 07:03:09 PM PDT 24 |
9232704757 ps |
T898 |
/workspace/coverage/default/22.spi_device_tpm_sts_read.1350961648 |
|
|
Jun 21 07:03:39 PM PDT 24 |
Jun 21 07:03:46 PM PDT 24 |
161031625 ps |
T899 |
/workspace/coverage/default/13.spi_device_mem_parity.604494299 |
|
|
Jun 21 07:02:59 PM PDT 24 |
Jun 21 07:03:07 PM PDT 24 |
135978307 ps |
T231 |
/workspace/coverage/default/25.spi_device_flash_and_tpm_min_idle.2217754787 |
|
|
Jun 21 07:03:45 PM PDT 24 |
Jun 21 07:10:48 PM PDT 24 |
52333153497 ps |
T900 |
/workspace/coverage/default/1.spi_device_tpm_rw.3047958791 |
|
|
Jun 21 07:02:29 PM PDT 24 |
Jun 21 07:02:44 PM PDT 24 |
501039089 ps |
T901 |
/workspace/coverage/default/32.spi_device_read_buffer_direct.1307996626 |
|
|
Jun 21 07:04:12 PM PDT 24 |
Jun 21 07:04:25 PM PDT 24 |
877073684 ps |
T902 |
/workspace/coverage/default/10.spi_device_stress_all.1512497455 |
|
|
Jun 21 07:02:59 PM PDT 24 |
Jun 21 07:03:06 PM PDT 24 |
210127626 ps |
T903 |
/workspace/coverage/default/22.spi_device_mailbox.2555401204 |
|
|
Jun 21 07:03:38 PM PDT 24 |
Jun 21 07:04:05 PM PDT 24 |
2036090781 ps |
T904 |
/workspace/coverage/default/41.spi_device_flash_and_tpm_min_idle.1540934506 |
|
|
Jun 21 07:04:44 PM PDT 24 |
Jun 21 07:06:14 PM PDT 24 |
43919792257 ps |
T905 |
/workspace/coverage/default/27.spi_device_cfg_cmd.3530766614 |
|
|
Jun 21 07:03:54 PM PDT 24 |
Jun 21 07:04:11 PM PDT 24 |
1218022266 ps |
T906 |
/workspace/coverage/default/38.spi_device_pass_addr_payload_swap.2678832463 |
|
|
Jun 21 07:04:28 PM PDT 24 |
Jun 21 07:04:40 PM PDT 24 |
172473493 ps |
T199 |
/workspace/coverage/default/30.spi_device_stress_all.3941023655 |
|
|
Jun 21 07:04:02 PM PDT 24 |
Jun 21 07:08:18 PM PDT 24 |
15960907715 ps |
T907 |
/workspace/coverage/default/25.spi_device_cfg_cmd.2210954409 |
|
|
Jun 21 07:03:44 PM PDT 24 |
Jun 21 07:03:54 PM PDT 24 |
169023987 ps |
T908 |
/workspace/coverage/default/32.spi_device_mailbox.1576882651 |
|
|
Jun 21 07:04:08 PM PDT 24 |
Jun 21 07:04:21 PM PDT 24 |
639036883 ps |
T909 |
/workspace/coverage/default/16.spi_device_csb_read.2233711572 |
|
|
Jun 21 07:03:25 PM PDT 24 |
Jun 21 07:03:34 PM PDT 24 |
35289964 ps |
T910 |
/workspace/coverage/default/33.spi_device_cfg_cmd.2591841538 |
|
|
Jun 21 07:04:26 PM PDT 24 |
Jun 21 07:04:40 PM PDT 24 |
432801709 ps |
T911 |
/workspace/coverage/default/2.spi_device_flash_and_tpm_min_idle.2415961135 |
|
|
Jun 21 07:02:27 PM PDT 24 |
Jun 21 07:03:10 PM PDT 24 |
2231190909 ps |
T912 |
/workspace/coverage/default/0.spi_device_alert_test.3600332373 |
|
|
Jun 21 07:02:30 PM PDT 24 |
Jun 21 07:02:36 PM PDT 24 |
67043626 ps |
T913 |
/workspace/coverage/default/31.spi_device_stress_all.2966392214 |
|
|
Jun 21 07:04:12 PM PDT 24 |
Jun 21 07:05:55 PM PDT 24 |
38903593603 ps |
T914 |
/workspace/coverage/default/38.spi_device_flash_all.112713677 |
|
|
Jun 21 07:04:31 PM PDT 24 |
Jun 21 07:05:42 PM PDT 24 |
6403779094 ps |
T202 |
/workspace/coverage/default/36.spi_device_stress_all.2765814211 |
|
|
Jun 21 07:04:31 PM PDT 24 |
Jun 21 07:09:09 PM PDT 24 |
134788947701 ps |
T915 |
/workspace/coverage/default/9.spi_device_alert_test.73141473 |
|
|
Jun 21 07:03:01 PM PDT 24 |
Jun 21 07:03:09 PM PDT 24 |
34903631 ps |
T916 |
/workspace/coverage/default/29.spi_device_alert_test.140986016 |
|
|
Jun 21 07:04:03 PM PDT 24 |
Jun 21 07:04:13 PM PDT 24 |
43171884 ps |
T917 |
/workspace/coverage/default/32.spi_device_upload.3092721339 |
|
|
Jun 21 07:04:11 PM PDT 24 |
Jun 21 07:04:25 PM PDT 24 |
1457278788 ps |
T918 |
/workspace/coverage/default/37.spi_device_pass_cmd_filtering.1779139843 |
|
|
Jun 21 07:04:27 PM PDT 24 |
Jun 21 07:04:42 PM PDT 24 |
417171109 ps |
T919 |
/workspace/coverage/default/29.spi_device_tpm_all.4096201169 |
|
|
Jun 21 07:04:05 PM PDT 24 |
Jun 21 07:04:38 PM PDT 24 |
1488901281 ps |
T920 |
/workspace/coverage/default/43.spi_device_csb_read.2371489795 |
|
|
Jun 21 07:04:47 PM PDT 24 |
Jun 21 07:04:58 PM PDT 24 |
23704553 ps |
T921 |
/workspace/coverage/default/26.spi_device_pass_addr_payload_swap.4212381912 |
|
|
Jun 21 07:03:54 PM PDT 24 |
Jun 21 07:04:08 PM PDT 24 |
339146441 ps |
T219 |
/workspace/coverage/default/5.spi_device_pass_addr_payload_swap.1962318295 |
|
|
Jun 21 07:02:40 PM PDT 24 |
Jun 21 07:03:36 PM PDT 24 |
39455543273 ps |
T922 |
/workspace/coverage/default/41.spi_device_flash_and_tpm.1210394458 |
|
|
Jun 21 07:04:46 PM PDT 24 |
Jun 21 07:05:21 PM PDT 24 |
1056880930 ps |
T923 |
/workspace/coverage/default/15.spi_device_tpm_read_hw_reg.1060090400 |
|
|
Jun 21 07:03:11 PM PDT 24 |
Jun 21 07:03:35 PM PDT 24 |
59117757044 ps |
T924 |
/workspace/coverage/default/7.spi_device_flash_mode.1167954020 |
|
|
Jun 21 07:02:43 PM PDT 24 |
Jun 21 07:03:05 PM PDT 24 |
1347810845 ps |
T925 |
/workspace/coverage/default/13.spi_device_upload.914345204 |
|
|
Jun 21 07:03:12 PM PDT 24 |
Jun 21 07:03:26 PM PDT 24 |
3559317327 ps |
T926 |
/workspace/coverage/default/2.spi_device_csb_read.2831264227 |
|
|
Jun 21 07:02:28 PM PDT 24 |
Jun 21 07:02:34 PM PDT 24 |
37419449 ps |
T927 |
/workspace/coverage/default/45.spi_device_flash_mode.965934730 |
|
|
Jun 21 07:04:52 PM PDT 24 |
Jun 21 07:05:28 PM PDT 24 |
2458708181 ps |
T928 |
/workspace/coverage/default/19.spi_device_intercept.89425134 |
|
|
Jun 21 07:03:29 PM PDT 24 |
Jun 21 07:03:44 PM PDT 24 |
692711992 ps |
T929 |
/workspace/coverage/default/36.spi_device_flash_and_tpm.2564350188 |
|
|
Jun 21 07:04:26 PM PDT 24 |
Jun 21 07:06:45 PM PDT 24 |
8767055267 ps |
T930 |
/workspace/coverage/default/20.spi_device_pass_addr_payload_swap.1414631699 |
|
|
Jun 21 07:03:28 PM PDT 24 |
Jun 21 07:03:40 PM PDT 24 |
1776658577 ps |
T931 |
/workspace/coverage/default/23.spi_device_cfg_cmd.1480679083 |
|
|
Jun 21 07:03:49 PM PDT 24 |
Jun 21 07:04:01 PM PDT 24 |
161269378 ps |
T222 |
/workspace/coverage/default/37.spi_device_flash_and_tpm.2125683640 |
|
|
Jun 21 07:04:27 PM PDT 24 |
Jun 21 07:06:26 PM PDT 24 |
63920256623 ps |
T932 |
/workspace/coverage/default/33.spi_device_stress_all.572701790 |
|
|
Jun 21 07:04:19 PM PDT 24 |
Jun 21 07:04:28 PM PDT 24 |
156002498 ps |
T933 |
/workspace/coverage/default/9.spi_device_mem_parity.3537553851 |
|
|
Jun 21 07:02:53 PM PDT 24 |
Jun 21 07:03:00 PM PDT 24 |
27641696 ps |
T934 |
/workspace/coverage/default/18.spi_device_flash_mode.220036765 |
|
|
Jun 21 07:03:31 PM PDT 24 |
Jun 21 07:03:44 PM PDT 24 |
1056599160 ps |
T228 |
/workspace/coverage/default/6.spi_device_pass_addr_payload_swap.3570223061 |
|
|
Jun 21 07:02:45 PM PDT 24 |
Jun 21 07:03:03 PM PDT 24 |
12497463439 ps |
T935 |
/workspace/coverage/default/40.spi_device_tpm_all.2391220774 |
|
|
Jun 21 07:04:40 PM PDT 24 |
Jun 21 07:05:29 PM PDT 24 |
25127808354 ps |
T936 |
/workspace/coverage/default/41.spi_device_pass_cmd_filtering.758767440 |
|
|
Jun 21 07:04:40 PM PDT 24 |
Jun 21 07:04:54 PM PDT 24 |
66075648 ps |
T937 |
/workspace/coverage/default/47.spi_device_tpm_sts_read.2220298976 |
|
|
Jun 21 07:04:58 PM PDT 24 |
Jun 21 07:05:09 PM PDT 24 |
31242393 ps |
T938 |
/workspace/coverage/default/1.spi_device_flash_and_tpm.576554170 |
|
|
Jun 21 07:02:27 PM PDT 24 |
Jun 21 07:06:56 PM PDT 24 |
130251388673 ps |
T939 |
/workspace/coverage/default/33.spi_device_mailbox.853240448 |
|
|
Jun 21 07:04:23 PM PDT 24 |
Jun 21 07:04:38 PM PDT 24 |
290232411 ps |
T940 |
/workspace/coverage/default/22.spi_device_alert_test.1781537999 |
|
|
Jun 21 07:03:43 PM PDT 24 |
Jun 21 07:03:50 PM PDT 24 |
18313125 ps |
T941 |
/workspace/coverage/default/48.spi_device_csb_read.2378384124 |
|
|
Jun 21 07:05:03 PM PDT 24 |
Jun 21 07:05:13 PM PDT 24 |
19044401 ps |
T942 |
/workspace/coverage/default/7.spi_device_stress_all.40195080 |
|
|
Jun 21 07:02:42 PM PDT 24 |
Jun 21 07:03:32 PM PDT 24 |
1876934369 ps |
T943 |
/workspace/coverage/default/34.spi_device_upload.59301169 |
|
|
Jun 21 07:04:26 PM PDT 24 |
Jun 21 07:04:41 PM PDT 24 |
20185870017 ps |
T944 |
/workspace/coverage/default/2.spi_device_read_buffer_direct.990125536 |
|
|
Jun 21 07:02:32 PM PDT 24 |
Jun 21 07:02:50 PM PDT 24 |
3068132339 ps |
T945 |
/workspace/coverage/default/3.spi_device_tpm_all.2553132326 |
|
|
Jun 21 07:02:34 PM PDT 24 |
Jun 21 07:03:04 PM PDT 24 |
15134407924 ps |
T946 |
/workspace/coverage/default/12.spi_device_stress_all.987251626 |
|
|
Jun 21 07:03:05 PM PDT 24 |
Jun 21 07:03:12 PM PDT 24 |
210074174 ps |
T947 |
/workspace/coverage/default/32.spi_device_flash_mode.3436131299 |
|
|
Jun 21 07:04:08 PM PDT 24 |
Jun 21 07:05:09 PM PDT 24 |
7655411785 ps |
T948 |
/workspace/coverage/default/30.spi_device_cfg_cmd.3789556993 |
|
|
Jun 21 07:04:03 PM PDT 24 |
Jun 21 07:04:17 PM PDT 24 |
251996171 ps |
T949 |
/workspace/coverage/default/38.spi_device_alert_test.1170752610 |
|
|
Jun 21 07:04:29 PM PDT 24 |
Jun 21 07:04:40 PM PDT 24 |
52813127 ps |
T950 |
/workspace/coverage/default/49.spi_device_flash_and_tpm.2541720203 |
|
|
Jun 21 07:05:15 PM PDT 24 |
Jun 21 07:06:45 PM PDT 24 |
68182407090 ps |
T951 |
/workspace/coverage/default/25.spi_device_alert_test.1926944955 |
|
|
Jun 21 07:03:46 PM PDT 24 |
Jun 21 07:03:54 PM PDT 24 |
11694378 ps |
T952 |
/workspace/coverage/default/20.spi_device_flash_and_tpm_min_idle.2364043726 |
|
|
Jun 21 07:03:39 PM PDT 24 |
Jun 21 07:03:46 PM PDT 24 |
20815299 ps |
T953 |
/workspace/coverage/default/21.spi_device_flash_and_tpm_min_idle.543747403 |
|
|
Jun 21 07:03:39 PM PDT 24 |
Jun 21 07:04:54 PM PDT 24 |
3341547043 ps |
T954 |
/workspace/coverage/default/28.spi_device_intercept.3158378867 |
|
|
Jun 21 07:03:53 PM PDT 24 |
Jun 21 07:04:07 PM PDT 24 |
95255943 ps |
T955 |
/workspace/coverage/default/36.spi_device_alert_test.3536063662 |
|
|
Jun 21 07:04:30 PM PDT 24 |
Jun 21 07:04:42 PM PDT 24 |
19356693 ps |
T956 |
/workspace/coverage/default/24.spi_device_flash_and_tpm.501738070 |
|
|
Jun 21 07:03:45 PM PDT 24 |
Jun 21 07:08:16 PM PDT 24 |
34696981164 ps |
T957 |
/workspace/coverage/default/44.spi_device_mailbox.3126108308 |
|
|
Jun 21 07:04:53 PM PDT 24 |
Jun 21 07:05:29 PM PDT 24 |
2039081458 ps |
T958 |
/workspace/coverage/default/2.spi_device_alert_test.467850410 |
|
|
Jun 21 07:02:37 PM PDT 24 |
Jun 21 07:02:42 PM PDT 24 |
17427476 ps |
T959 |
/workspace/coverage/default/22.spi_device_upload.307333216 |
|
|
Jun 21 07:03:42 PM PDT 24 |
Jun 21 07:03:57 PM PDT 24 |
910532602 ps |
T960 |
/workspace/coverage/default/7.spi_device_flash_and_tpm_min_idle.3704574986 |
|
|
Jun 21 07:02:47 PM PDT 24 |
Jun 21 07:04:30 PM PDT 24 |
15246744855 ps |
T961 |
/workspace/coverage/default/8.spi_device_tpm_all.1198844478 |
|
|
Jun 21 07:02:54 PM PDT 24 |
Jun 21 07:03:25 PM PDT 24 |
14631493647 ps |
T962 |
/workspace/coverage/default/5.spi_device_alert_test.238869607 |
|
|
Jun 21 07:02:46 PM PDT 24 |
Jun 21 07:02:52 PM PDT 24 |
11963573 ps |
T963 |
/workspace/coverage/default/18.spi_device_mem_parity.3246531719 |
|
|
Jun 21 07:03:32 PM PDT 24 |
Jun 21 07:03:40 PM PDT 24 |
60211584 ps |
T964 |
/workspace/coverage/default/3.spi_device_pass_addr_payload_swap.2304616164 |
|
|
Jun 21 07:02:37 PM PDT 24 |
Jun 21 07:03:01 PM PDT 24 |
23367897296 ps |
T965 |
/workspace/coverage/default/35.spi_device_read_buffer_direct.3589175105 |
|
|
Jun 21 07:04:25 PM PDT 24 |
Jun 21 07:04:37 PM PDT 24 |
122090207 ps |
T966 |
/workspace/coverage/default/16.spi_device_mailbox.3358833102 |
|
|
Jun 21 07:03:25 PM PDT 24 |
Jun 21 07:03:42 PM PDT 24 |
1074048612 ps |
T967 |
/workspace/coverage/default/10.spi_device_tpm_sts_read.1349672909 |
|
|
Jun 21 07:02:53 PM PDT 24 |
Jun 21 07:02:59 PM PDT 24 |
52179764 ps |
T968 |
/workspace/coverage/default/13.spi_device_tpm_sts_read.1778091564 |
|
|
Jun 21 07:03:11 PM PDT 24 |
Jun 21 07:03:17 PM PDT 24 |
103595928 ps |
T969 |
/workspace/coverage/default/27.spi_device_tpm_rw.3142307169 |
|
|
Jun 21 07:03:57 PM PDT 24 |
Jun 21 07:04:15 PM PDT 24 |
178094973 ps |
T970 |
/workspace/coverage/default/5.spi_device_mem_parity.2969512557 |
|
|
Jun 21 07:02:35 PM PDT 24 |
Jun 21 07:02:41 PM PDT 24 |
47832858 ps |
T971 |
/workspace/coverage/default/49.spi_device_pass_addr_payload_swap.3033365455 |
|
|
Jun 21 07:05:03 PM PDT 24 |
Jun 21 07:05:15 PM PDT 24 |
74354733 ps |
T216 |
/workspace/coverage/default/33.spi_device_flash_all.2844362471 |
|
|
Jun 21 07:04:22 PM PDT 24 |
Jun 21 07:10:17 PM PDT 24 |
42962661742 ps |
T972 |
/workspace/coverage/default/5.spi_device_tpm_rw.3613937204 |
|
|
Jun 21 07:02:40 PM PDT 24 |
Jun 21 07:02:49 PM PDT 24 |
394845768 ps |
T973 |
/workspace/coverage/default/48.spi_device_flash_and_tpm.2491153715 |
|
|
Jun 21 07:04:59 PM PDT 24 |
Jun 21 07:07:01 PM PDT 24 |
8011725282 ps |
T974 |
/workspace/coverage/default/20.spi_device_read_buffer_direct.3221696350 |
|
|
Jun 21 07:03:34 PM PDT 24 |
Jun 21 07:03:46 PM PDT 24 |
930660059 ps |
T975 |
/workspace/coverage/default/2.spi_device_tpm_read_hw_reg.1960087985 |
|
|
Jun 21 07:02:27 PM PDT 24 |
Jun 21 07:02:39 PM PDT 24 |
2692568333 ps |
T976 |
/workspace/coverage/default/46.spi_device_tpm_sts_read.3014151724 |
|
|
Jun 21 07:05:03 PM PDT 24 |
Jun 21 07:05:13 PM PDT 24 |
70805839 ps |
T977 |
/workspace/coverage/default/30.spi_device_tpm_sts_read.2690740294 |
|
|
Jun 21 07:04:00 PM PDT 24 |
Jun 21 07:04:11 PM PDT 24 |
27932560 ps |
T978 |
/workspace/coverage/default/19.spi_device_pass_addr_payload_swap.2747632863 |
|
|
Jun 21 07:03:29 PM PDT 24 |
Jun 21 07:03:43 PM PDT 24 |
1083102195 ps |
T979 |
/workspace/coverage/default/32.spi_device_stress_all.3540445375 |
|
|
Jun 21 07:04:21 PM PDT 24 |
Jun 21 07:04:56 PM PDT 24 |
1238651891 ps |
T980 |
/workspace/coverage/default/7.spi_device_tpm_all.487131313 |
|
|
Jun 21 07:02:43 PM PDT 24 |
Jun 21 07:02:49 PM PDT 24 |
14872696 ps |
T80 |
/workspace/coverage/cover_reg_top/14.spi_device_csr_mem_rw_with_rand_reset.2547111016 |
|
|
Jun 21 06:58:50 PM PDT 24 |
Jun 21 06:58:57 PM PDT 24 |
47567276 ps |
T127 |
/workspace/coverage/cover_reg_top/10.spi_device_same_csr_outstanding.2002680908 |
|
|
Jun 21 06:58:57 PM PDT 24 |
Jun 21 06:59:02 PM PDT 24 |
220804410 ps |
T81 |
/workspace/coverage/cover_reg_top/11.spi_device_tl_intg_err.2419284139 |
|
|
Jun 21 06:58:46 PM PDT 24 |
Jun 21 06:58:57 PM PDT 24 |
519806537 ps |
T981 |
/workspace/coverage/cover_reg_top/8.spi_device_intr_test.1061960376 |
|
|
Jun 21 06:58:38 PM PDT 24 |
Jun 21 06:58:44 PM PDT 24 |
107027188 ps |
T982 |
/workspace/coverage/cover_reg_top/2.spi_device_mem_walk.4278993679 |
|
|
Jun 21 06:58:38 PM PDT 24 |
Jun 21 06:58:43 PM PDT 24 |
22272257 ps |
T983 |
/workspace/coverage/cover_reg_top/7.spi_device_intr_test.2069603996 |
|
|
Jun 21 06:58:41 PM PDT 24 |
Jun 21 06:58:47 PM PDT 24 |
18391157 ps |
T82 |
/workspace/coverage/cover_reg_top/8.spi_device_tl_errors.3328709638 |
|
|
Jun 21 06:58:36 PM PDT 24 |
Jun 21 06:58:44 PM PDT 24 |
240174313 ps |
T83 |
/workspace/coverage/cover_reg_top/7.spi_device_csr_mem_rw_with_rand_reset.2601972292 |
|
|
Jun 21 06:58:37 PM PDT 24 |
Jun 21 06:58:44 PM PDT 24 |
160372330 ps |
T84 |
/workspace/coverage/cover_reg_top/4.spi_device_tl_intg_err.2559849183 |
|
|
Jun 21 06:58:31 PM PDT 24 |
Jun 21 06:58:54 PM PDT 24 |
289606226 ps |
T85 |
/workspace/coverage/cover_reg_top/10.spi_device_tl_intg_err.4065799792 |
|
|
Jun 21 06:58:50 PM PDT 24 |
Jun 21 06:59:13 PM PDT 24 |
582897965 ps |
T984 |
/workspace/coverage/cover_reg_top/29.spi_device_intr_test.2700963150 |
|
|
Jun 21 06:59:01 PM PDT 24 |
Jun 21 06:59:06 PM PDT 24 |
22070528 ps |
T99 |
/workspace/coverage/cover_reg_top/19.spi_device_tl_intg_err.3592574411 |
|
|
Jun 21 06:58:58 PM PDT 24 |
Jun 21 06:59:08 PM PDT 24 |
1231021022 ps |
T87 |
/workspace/coverage/cover_reg_top/17.spi_device_tl_errors.1006367963 |
|
|
Jun 21 06:58:51 PM PDT 24 |
Jun 21 06:58:58 PM PDT 24 |
28476629 ps |
T98 |
/workspace/coverage/cover_reg_top/6.spi_device_tl_intg_err.3043206409 |
|
|
Jun 21 06:58:39 PM PDT 24 |
Jun 21 06:58:51 PM PDT 24 |
423613773 ps |
T102 |
/workspace/coverage/cover_reg_top/1.spi_device_csr_hw_reset.3729083496 |
|
|
Jun 21 06:58:20 PM PDT 24 |
Jun 21 06:58:33 PM PDT 24 |
17304255 ps |
T985 |
/workspace/coverage/cover_reg_top/37.spi_device_intr_test.1018884827 |
|
|
Jun 21 06:59:03 PM PDT 24 |
Jun 21 06:59:08 PM PDT 24 |
24146429 ps |
T103 |
/workspace/coverage/cover_reg_top/1.spi_device_csr_aliasing.3433179308 |
|
|
Jun 21 06:58:19 PM PDT 24 |
Jun 21 06:58:40 PM PDT 24 |
1308965271 ps |
T986 |
/workspace/coverage/cover_reg_top/17.spi_device_intr_test.2193364867 |
|
|
Jun 21 06:58:50 PM PDT 24 |
Jun 21 06:58:55 PM PDT 24 |
40652911 ps |
T104 |
/workspace/coverage/cover_reg_top/0.spi_device_mem_partial_access.1075186908 |
|
|
Jun 21 06:58:19 PM PDT 24 |
Jun 21 06:58:33 PM PDT 24 |
53173151 ps |
T128 |
/workspace/coverage/cover_reg_top/4.spi_device_same_csr_outstanding.1969608622 |
|
|
Jun 21 06:58:30 PM PDT 24 |
Jun 21 06:58:39 PM PDT 24 |
104067893 ps |
T987 |
/workspace/coverage/cover_reg_top/11.spi_device_intr_test.424817831 |
|
|
Jun 21 06:58:51 PM PDT 24 |
Jun 21 06:58:57 PM PDT 24 |
89887161 ps |
T988 |
/workspace/coverage/cover_reg_top/2.spi_device_csr_aliasing.663342186 |
|
|
Jun 21 06:58:28 PM PDT 24 |
Jun 21 06:58:43 PM PDT 24 |
118037483 ps |
T989 |
/workspace/coverage/cover_reg_top/34.spi_device_intr_test.1895075225 |
|
|
Jun 21 06:58:58 PM PDT 24 |
Jun 21 06:59:01 PM PDT 24 |
27147960 ps |
T129 |
/workspace/coverage/cover_reg_top/7.spi_device_csr_rw.1443987986 |
|
|
Jun 21 06:58:37 PM PDT 24 |
Jun 21 06:58:43 PM PDT 24 |
37237716 ps |
T990 |
/workspace/coverage/cover_reg_top/14.spi_device_intr_test.349662514 |
|
|
Jun 21 06:58:49 PM PDT 24 |
Jun 21 06:58:54 PM PDT 24 |
39477421 ps |
T86 |
/workspace/coverage/cover_reg_top/6.spi_device_csr_mem_rw_with_rand_reset.777038902 |
|
|
Jun 21 06:58:39 PM PDT 24 |
Jun 21 06:58:46 PM PDT 24 |
151550519 ps |
T68 |
/workspace/coverage/cover_reg_top/0.spi_device_csr_hw_reset.1962720850 |
|
|
Jun 21 06:58:23 PM PDT 24 |
Jun 21 06:58:34 PM PDT 24 |
32223344 ps |
T96 |
/workspace/coverage/cover_reg_top/16.spi_device_tl_intg_err.1669689468 |
|
|
Jun 21 06:58:49 PM PDT 24 |
Jun 21 06:59:08 PM PDT 24 |
1935457639 ps |
T105 |
/workspace/coverage/cover_reg_top/0.spi_device_csr_aliasing.3098678585 |
|
|
Jun 21 06:58:21 PM PDT 24 |
Jun 21 06:58:41 PM PDT 24 |
2256842590 ps |
T88 |
/workspace/coverage/cover_reg_top/9.spi_device_tl_errors.3211337821 |
|
|
Jun 21 06:58:43 PM PDT 24 |
Jun 21 06:58:52 PM PDT 24 |
150358011 ps |
T97 |
/workspace/coverage/cover_reg_top/17.spi_device_csr_mem_rw_with_rand_reset.458769093 |
|
|
Jun 21 06:58:50 PM PDT 24 |
Jun 21 06:58:56 PM PDT 24 |
371927075 ps |
T91 |
/workspace/coverage/cover_reg_top/18.spi_device_tl_errors.1900276403 |
|
|
Jun 21 06:58:52 PM PDT 24 |
Jun 21 06:59:01 PM PDT 24 |
64031705 ps |
T100 |
/workspace/coverage/cover_reg_top/17.spi_device_tl_intg_err.3072222207 |
|
|
Jun 21 06:58:48 PM PDT 24 |
Jun 21 06:59:14 PM PDT 24 |
2030361645 ps |
T991 |
/workspace/coverage/cover_reg_top/2.spi_device_intr_test.2793079874 |
|
|
Jun 21 06:58:22 PM PDT 24 |
Jun 21 06:58:33 PM PDT 24 |
13785962 ps |
T137 |
/workspace/coverage/cover_reg_top/2.spi_device_same_csr_outstanding.2727768756 |
|
|
Jun 21 06:58:30 PM PDT 24 |
Jun 21 06:58:41 PM PDT 24 |
216742443 ps |
T992 |
/workspace/coverage/cover_reg_top/18.spi_device_csr_mem_rw_with_rand_reset.528255253 |
|
|
Jun 21 06:58:59 PM PDT 24 |
Jun 21 06:59:04 PM PDT 24 |
25437630 ps |
T89 |
/workspace/coverage/cover_reg_top/15.spi_device_tl_errors.202722362 |
|
|
Jun 21 06:58:49 PM PDT 24 |
Jun 21 06:58:55 PM PDT 24 |
51244398 ps |
T993 |
/workspace/coverage/cover_reg_top/31.spi_device_intr_test.3199578245 |
|
|
Jun 21 06:58:57 PM PDT 24 |
Jun 21 06:58:59 PM PDT 24 |
37903007 ps |
T994 |
/workspace/coverage/cover_reg_top/12.spi_device_same_csr_outstanding.4020663307 |
|
|
Jun 21 06:58:51 PM PDT 24 |
Jun 21 06:59:00 PM PDT 24 |
163473445 ps |
T106 |
/workspace/coverage/cover_reg_top/2.spi_device_mem_partial_access.237018321 |
|
|
Jun 21 06:58:27 PM PDT 24 |
Jun 21 06:58:36 PM PDT 24 |
22822338 ps |
T92 |
/workspace/coverage/cover_reg_top/10.spi_device_tl_errors.546282427 |
|
|
Jun 21 06:58:48 PM PDT 24 |
Jun 21 06:58:54 PM PDT 24 |
77707276 ps |
T107 |
/workspace/coverage/cover_reg_top/13.spi_device_csr_rw.1833394942 |
|
|
Jun 21 06:58:52 PM PDT 24 |
Jun 21 06:58:59 PM PDT 24 |
278754046 ps |
T995 |
/workspace/coverage/cover_reg_top/36.spi_device_intr_test.1864036380 |
|
|
Jun 21 06:59:02 PM PDT 24 |
Jun 21 06:59:07 PM PDT 24 |
20724448 ps |
T95 |
/workspace/coverage/cover_reg_top/5.spi_device_tl_errors.4247037452 |
|
|
Jun 21 06:58:30 PM PDT 24 |
Jun 21 06:58:40 PM PDT 24 |
223508225 ps |
T138 |
/workspace/coverage/cover_reg_top/8.spi_device_tl_intg_err.3056818309 |
|
|
Jun 21 06:58:37 PM PDT 24 |
Jun 21 06:58:50 PM PDT 24 |
1394457932 ps |
T996 |
/workspace/coverage/cover_reg_top/21.spi_device_intr_test.2443824387 |
|
|
Jun 21 06:58:59 PM PDT 24 |
Jun 21 06:59:03 PM PDT 24 |
117862345 ps |
T997 |
/workspace/coverage/cover_reg_top/6.spi_device_intr_test.3757299237 |
|
|
Jun 21 06:58:36 PM PDT 24 |
Jun 21 06:58:42 PM PDT 24 |
60280185 ps |
T90 |
/workspace/coverage/cover_reg_top/2.spi_device_tl_errors.1575244339 |
|
|
Jun 21 06:58:19 PM PDT 24 |
Jun 21 06:58:36 PM PDT 24 |
710391772 ps |
T139 |
/workspace/coverage/cover_reg_top/2.spi_device_csr_mem_rw_with_rand_reset.3843948903 |
|
|
Jun 21 06:58:32 PM PDT 24 |
Jun 21 06:58:39 PM PDT 24 |
106852267 ps |
T998 |
/workspace/coverage/cover_reg_top/12.spi_device_csr_mem_rw_with_rand_reset.4100379202 |
|
|
Jun 21 06:58:50 PM PDT 24 |
Jun 21 06:58:58 PM PDT 24 |
163692345 ps |
T140 |
/workspace/coverage/cover_reg_top/4.spi_device_csr_mem_rw_with_rand_reset.3727930435 |
|
|
Jun 21 06:58:29 PM PDT 24 |
Jun 21 06:58:37 PM PDT 24 |
177788284 ps |
T999 |
/workspace/coverage/cover_reg_top/44.spi_device_intr_test.1711342180 |
|
|
Jun 21 06:59:01 PM PDT 24 |
Jun 21 06:59:06 PM PDT 24 |
14562645 ps |
T108 |
/workspace/coverage/cover_reg_top/1.spi_device_csr_rw.3198065826 |
|
|
Jun 21 06:58:21 PM PDT 24 |
Jun 21 06:58:33 PM PDT 24 |
189158256 ps |
T237 |
/workspace/coverage/cover_reg_top/9.spi_device_tl_intg_err.2456550857 |
|
|
Jun 21 06:58:38 PM PDT 24 |
Jun 21 06:58:49 PM PDT 24 |
2606284831 ps |
T1000 |
/workspace/coverage/cover_reg_top/8.spi_device_same_csr_outstanding.703899506 |
|
|
Jun 21 06:58:36 PM PDT 24 |
Jun 21 06:58:43 PM PDT 24 |
30627098 ps |
T1001 |
/workspace/coverage/cover_reg_top/13.spi_device_intr_test.69913831 |
|
|
Jun 21 06:58:49 PM PDT 24 |
Jun 21 06:58:54 PM PDT 24 |
48966943 ps |
T238 |
/workspace/coverage/cover_reg_top/18.spi_device_tl_intg_err.4147320645 |
|
|
Jun 21 06:58:48 PM PDT 24 |
Jun 21 06:59:06 PM PDT 24 |
2066212166 ps |
T1002 |
/workspace/coverage/cover_reg_top/9.spi_device_csr_mem_rw_with_rand_reset.2698788210 |
|
|
Jun 21 06:58:49 PM PDT 24 |
Jun 21 06:58:56 PM PDT 24 |
40598992 ps |
T109 |
/workspace/coverage/cover_reg_top/1.spi_device_mem_partial_access.2939652618 |
|
|
Jun 21 06:58:20 PM PDT 24 |
Jun 21 06:58:34 PM PDT 24 |
58960957 ps |
T1003 |
/workspace/coverage/cover_reg_top/20.spi_device_intr_test.283046379 |
|
|
Jun 21 06:59:02 PM PDT 24 |
Jun 21 06:59:07 PM PDT 24 |
40072422 ps |
T239 |
/workspace/coverage/cover_reg_top/15.spi_device_tl_intg_err.1949039521 |
|
|
Jun 21 06:58:51 PM PDT 24 |
Jun 21 06:59:16 PM PDT 24 |
720472434 ps |
T141 |
/workspace/coverage/cover_reg_top/18.spi_device_same_csr_outstanding.2152516241 |
|
|
Jun 21 06:59:01 PM PDT 24 |
Jun 21 06:59:08 PM PDT 24 |
139438685 ps |
T1004 |
/workspace/coverage/cover_reg_top/16.spi_device_csr_rw.1679144980 |
|
|
Jun 21 06:58:57 PM PDT 24 |
Jun 21 06:59:00 PM PDT 24 |
19676922 ps |
T142 |
/workspace/coverage/cover_reg_top/16.spi_device_same_csr_outstanding.1329122160 |
|
|
Jun 21 06:58:48 PM PDT 24 |
Jun 21 06:58:56 PM PDT 24 |
1012421223 ps |
T1005 |
/workspace/coverage/cover_reg_top/1.spi_device_mem_walk.1324059699 |
|
|
Jun 21 06:58:21 PM PDT 24 |
Jun 21 06:58:32 PM PDT 24 |
20405698 ps |
T1006 |
/workspace/coverage/cover_reg_top/15.spi_device_csr_mem_rw_with_rand_reset.3834662556 |
|
|
Jun 21 06:58:48 PM PDT 24 |
Jun 21 06:58:55 PM PDT 24 |
244804292 ps |
T1007 |
/workspace/coverage/cover_reg_top/4.spi_device_csr_bit_bash.3411143243 |
|
|
Jun 21 06:58:28 PM PDT 24 |
Jun 21 06:59:10 PM PDT 24 |
1908942791 ps |
T1008 |
/workspace/coverage/cover_reg_top/7.spi_device_tl_errors.124954729 |
|
|
Jun 21 06:58:38 PM PDT 24 |
Jun 21 06:58:46 PM PDT 24 |
134616440 ps |
T153 |
/workspace/coverage/cover_reg_top/4.spi_device_csr_rw.3474590563 |
|
|
Jun 21 06:58:30 PM PDT 24 |
Jun 21 06:58:38 PM PDT 24 |
98594237 ps |
T235 |
/workspace/coverage/cover_reg_top/1.spi_device_tl_intg_err.4016414839 |
|
|
Jun 21 06:58:24 PM PDT 24 |
Jun 21 06:58:52 PM PDT 24 |
617927412 ps |
T1009 |
/workspace/coverage/cover_reg_top/12.spi_device_intr_test.172632472 |
|
|
Jun 21 06:58:48 PM PDT 24 |
Jun 21 06:58:53 PM PDT 24 |
67875504 ps |
T1010 |
/workspace/coverage/cover_reg_top/3.spi_device_csr_mem_rw_with_rand_reset.3866587598 |
|
|
Jun 21 06:58:31 PM PDT 24 |
Jun 21 06:58:40 PM PDT 24 |
119550338 ps |
T110 |
/workspace/coverage/cover_reg_top/4.spi_device_csr_aliasing.2837959469 |
|
|
Jun 21 06:58:32 PM PDT 24 |
Jun 21 06:58:57 PM PDT 24 |
597930423 ps |
T1011 |
/workspace/coverage/cover_reg_top/35.spi_device_intr_test.42242013 |
|
|
Jun 21 06:59:00 PM PDT 24 |
Jun 21 06:59:05 PM PDT 24 |
13465071 ps |