T805 |
/workspace/coverage/default/46.spi_device_tpm_all.2541253138 |
|
|
Jun 24 05:14:04 PM PDT 24 |
Jun 24 05:14:19 PM PDT 24 |
1925383026 ps |
T806 |
/workspace/coverage/default/33.spi_device_read_buffer_direct.1627868444 |
|
|
Jun 24 05:13:01 PM PDT 24 |
Jun 24 05:13:11 PM PDT 24 |
1330917278 ps |
T807 |
/workspace/coverage/default/31.spi_device_intercept.287389334 |
|
|
Jun 24 05:12:47 PM PDT 24 |
Jun 24 05:12:59 PM PDT 24 |
1627558001 ps |
T808 |
/workspace/coverage/default/2.spi_device_flash_and_tpm.2620003769 |
|
|
Jun 24 05:10:16 PM PDT 24 |
Jun 24 05:17:45 PM PDT 24 |
55335635331 ps |
T809 |
/workspace/coverage/default/17.spi_device_tpm_rw.208541167 |
|
|
Jun 24 05:11:40 PM PDT 24 |
Jun 24 05:11:46 PM PDT 24 |
114159065 ps |
T810 |
/workspace/coverage/default/36.spi_device_read_buffer_direct.3591988797 |
|
|
Jun 24 05:13:10 PM PDT 24 |
Jun 24 05:13:16 PM PDT 24 |
639370324 ps |
T811 |
/workspace/coverage/default/16.spi_device_flash_and_tpm.1493909276 |
|
|
Jun 24 05:11:31 PM PDT 24 |
Jun 24 05:12:54 PM PDT 24 |
5550484234 ps |
T812 |
/workspace/coverage/default/43.spi_device_csb_read.1219659254 |
|
|
Jun 24 05:13:47 PM PDT 24 |
Jun 24 05:13:50 PM PDT 24 |
14126189 ps |
T813 |
/workspace/coverage/default/40.spi_device_cfg_cmd.2915137912 |
|
|
Jun 24 05:13:34 PM PDT 24 |
Jun 24 05:13:40 PM PDT 24 |
254466928 ps |
T814 |
/workspace/coverage/default/14.spi_device_pass_addr_payload_swap.10653533 |
|
|
Jun 24 05:11:16 PM PDT 24 |
Jun 24 05:11:21 PM PDT 24 |
311420419 ps |
T815 |
/workspace/coverage/default/5.spi_device_cfg_cmd.4218605865 |
|
|
Jun 24 05:10:34 PM PDT 24 |
Jun 24 05:10:39 PM PDT 24 |
32093405 ps |
T816 |
/workspace/coverage/default/31.spi_device_flash_all.2117422031 |
|
|
Jun 24 05:12:48 PM PDT 24 |
Jun 24 05:13:17 PM PDT 24 |
2298620268 ps |
T817 |
/workspace/coverage/default/7.spi_device_read_buffer_direct.4000430817 |
|
|
Jun 24 05:10:48 PM PDT 24 |
Jun 24 05:10:57 PM PDT 24 |
360173172 ps |
T818 |
/workspace/coverage/default/28.spi_device_tpm_all.3925453910 |
|
|
Jun 24 05:12:31 PM PDT 24 |
Jun 24 05:12:45 PM PDT 24 |
1909800733 ps |
T819 |
/workspace/coverage/default/16.spi_device_mailbox.3556181920 |
|
|
Jun 24 05:11:31 PM PDT 24 |
Jun 24 05:12:18 PM PDT 24 |
9456291632 ps |
T820 |
/workspace/coverage/default/2.spi_device_tpm_read_hw_reg.2840308562 |
|
|
Jun 24 05:10:19 PM PDT 24 |
Jun 24 05:10:22 PM PDT 24 |
189239026 ps |
T821 |
/workspace/coverage/default/21.spi_device_alert_test.3761082627 |
|
|
Jun 24 05:11:54 PM PDT 24 |
Jun 24 05:11:57 PM PDT 24 |
45051706 ps |
T822 |
/workspace/coverage/default/24.spi_device_flash_and_tpm_min_idle.3652073678 |
|
|
Jun 24 05:12:17 PM PDT 24 |
Jun 24 05:14:47 PM PDT 24 |
173760354597 ps |
T823 |
/workspace/coverage/default/40.spi_device_pass_cmd_filtering.2661722584 |
|
|
Jun 24 05:13:35 PM PDT 24 |
Jun 24 05:13:45 PM PDT 24 |
6433347871 ps |
T824 |
/workspace/coverage/default/0.spi_device_stress_all.604617316 |
|
|
Jun 24 05:10:12 PM PDT 24 |
Jun 24 05:12:10 PM PDT 24 |
58833340508 ps |
T825 |
/workspace/coverage/default/25.spi_device_upload.1067195628 |
|
|
Jun 24 05:12:17 PM PDT 24 |
Jun 24 05:12:50 PM PDT 24 |
39665489502 ps |
T826 |
/workspace/coverage/default/38.spi_device_pass_cmd_filtering.2829703873 |
|
|
Jun 24 05:13:25 PM PDT 24 |
Jun 24 05:13:29 PM PDT 24 |
143390000 ps |
T827 |
/workspace/coverage/default/45.spi_device_flash_and_tpm_min_idle.1693524619 |
|
|
Jun 24 05:14:06 PM PDT 24 |
Jun 24 05:18:42 PM PDT 24 |
237507760962 ps |
T828 |
/workspace/coverage/default/40.spi_device_flash_all.1000765140 |
|
|
Jun 24 05:13:34 PM PDT 24 |
Jun 24 05:14:07 PM PDT 24 |
2764109845 ps |
T829 |
/workspace/coverage/default/13.spi_device_mem_parity.1446165012 |
|
|
Jun 24 05:11:11 PM PDT 24 |
Jun 24 05:11:13 PM PDT 24 |
59303791 ps |
T830 |
/workspace/coverage/default/36.spi_device_pass_cmd_filtering.2965123864 |
|
|
Jun 24 05:13:11 PM PDT 24 |
Jun 24 05:13:26 PM PDT 24 |
3757637246 ps |
T831 |
/workspace/coverage/default/25.spi_device_tpm_all.387781006 |
|
|
Jun 24 05:12:20 PM PDT 24 |
Jun 24 05:12:24 PM PDT 24 |
1695125421 ps |
T832 |
/workspace/coverage/default/23.spi_device_flash_mode.821763790 |
|
|
Jun 24 05:12:09 PM PDT 24 |
Jun 24 05:12:20 PM PDT 24 |
571196723 ps |
T833 |
/workspace/coverage/default/20.spi_device_tpm_all.3076757039 |
|
|
Jun 24 05:11:49 PM PDT 24 |
Jun 24 05:12:08 PM PDT 24 |
4229739571 ps |
T834 |
/workspace/coverage/default/28.spi_device_intercept.2903880495 |
|
|
Jun 24 05:12:32 PM PDT 24 |
Jun 24 05:12:41 PM PDT 24 |
1032711602 ps |
T835 |
/workspace/coverage/default/45.spi_device_tpm_rw.3066571868 |
|
|
Jun 24 05:13:56 PM PDT 24 |
Jun 24 05:14:01 PM PDT 24 |
546661647 ps |
T836 |
/workspace/coverage/default/20.spi_device_mailbox.3038448096 |
|
|
Jun 24 05:11:52 PM PDT 24 |
Jun 24 05:13:16 PM PDT 24 |
23138736361 ps |
T837 |
/workspace/coverage/default/10.spi_device_flash_mode.1927558940 |
|
|
Jun 24 05:11:02 PM PDT 24 |
Jun 24 05:11:11 PM PDT 24 |
374902163 ps |
T838 |
/workspace/coverage/default/42.spi_device_pass_cmd_filtering.373267420 |
|
|
Jun 24 05:13:49 PM PDT 24 |
Jun 24 05:14:03 PM PDT 24 |
3053550951 ps |
T839 |
/workspace/coverage/default/32.spi_device_pass_cmd_filtering.4190383737 |
|
|
Jun 24 05:12:56 PM PDT 24 |
Jun 24 05:13:06 PM PDT 24 |
7579696699 ps |
T840 |
/workspace/coverage/default/30.spi_device_csb_read.224815066 |
|
|
Jun 24 05:12:42 PM PDT 24 |
Jun 24 05:12:43 PM PDT 24 |
94597547 ps |
T841 |
/workspace/coverage/default/43.spi_device_alert_test.2371105426 |
|
|
Jun 24 05:13:56 PM PDT 24 |
Jun 24 05:14:00 PM PDT 24 |
28345099 ps |
T842 |
/workspace/coverage/default/46.spi_device_flash_and_tpm.1007848550 |
|
|
Jun 24 05:14:02 PM PDT 24 |
Jun 24 05:15:31 PM PDT 24 |
46191677592 ps |
T843 |
/workspace/coverage/default/18.spi_device_tpm_read_hw_reg.3032935735 |
|
|
Jun 24 05:11:45 PM PDT 24 |
Jun 24 05:11:55 PM PDT 24 |
9019937856 ps |
T844 |
/workspace/coverage/default/45.spi_device_intercept.3048199938 |
|
|
Jun 24 05:13:58 PM PDT 24 |
Jun 24 05:14:06 PM PDT 24 |
851128746 ps |
T845 |
/workspace/coverage/default/9.spi_device_tpm_rw.433699918 |
|
|
Jun 24 05:10:54 PM PDT 24 |
Jun 24 05:10:57 PM PDT 24 |
46126903 ps |
T846 |
/workspace/coverage/default/12.spi_device_pass_cmd_filtering.2234778389 |
|
|
Jun 24 05:11:08 PM PDT 24 |
Jun 24 05:11:12 PM PDT 24 |
54074261 ps |
T847 |
/workspace/coverage/default/38.spi_device_tpm_read_hw_reg.1870696538 |
|
|
Jun 24 05:13:23 PM PDT 24 |
Jun 24 05:13:25 PM PDT 24 |
1447665997 ps |
T848 |
/workspace/coverage/default/12.spi_device_tpm_read_hw_reg.1721932464 |
|
|
Jun 24 05:11:02 PM PDT 24 |
Jun 24 05:11:05 PM PDT 24 |
179725489 ps |
T849 |
/workspace/coverage/default/15.spi_device_upload.2128795727 |
|
|
Jun 24 05:11:22 PM PDT 24 |
Jun 24 05:11:26 PM PDT 24 |
106410735 ps |
T850 |
/workspace/coverage/default/42.spi_device_flash_mode.656083284 |
|
|
Jun 24 05:13:48 PM PDT 24 |
Jun 24 05:13:57 PM PDT 24 |
844964990 ps |
T851 |
/workspace/coverage/default/20.spi_device_flash_and_tpm_min_idle.1591920980 |
|
|
Jun 24 05:12:01 PM PDT 24 |
Jun 24 05:15:13 PM PDT 24 |
97397789143 ps |
T852 |
/workspace/coverage/default/20.spi_device_cfg_cmd.3141307923 |
|
|
Jun 24 05:11:48 PM PDT 24 |
Jun 24 05:11:57 PM PDT 24 |
1068378710 ps |
T853 |
/workspace/coverage/default/49.spi_device_tpm_rw.1968316330 |
|
|
Jun 24 05:14:19 PM PDT 24 |
Jun 24 05:14:26 PM PDT 24 |
1583033580 ps |
T854 |
/workspace/coverage/default/15.spi_device_tpm_all.2697301502 |
|
|
Jun 24 05:11:23 PM PDT 24 |
Jun 24 05:11:48 PM PDT 24 |
1494348976 ps |
T855 |
/workspace/coverage/default/26.spi_device_mailbox.3540597494 |
|
|
Jun 24 05:12:25 PM PDT 24 |
Jun 24 05:12:36 PM PDT 24 |
3647351476 ps |
T856 |
/workspace/coverage/default/26.spi_device_cfg_cmd.3617983388 |
|
|
Jun 24 05:12:26 PM PDT 24 |
Jun 24 05:12:31 PM PDT 24 |
171624301 ps |
T857 |
/workspace/coverage/default/44.spi_device_tpm_all.3526527411 |
|
|
Jun 24 05:13:58 PM PDT 24 |
Jun 24 05:14:32 PM PDT 24 |
2887327764 ps |
T858 |
/workspace/coverage/default/38.spi_device_intercept.1063728386 |
|
|
Jun 24 05:13:19 PM PDT 24 |
Jun 24 05:13:38 PM PDT 24 |
3100162292 ps |
T859 |
/workspace/coverage/default/19.spi_device_flash_all.1296026003 |
|
|
Jun 24 05:11:47 PM PDT 24 |
Jun 24 05:13:42 PM PDT 24 |
36107666276 ps |
T860 |
/workspace/coverage/default/33.spi_device_flash_mode.2894252647 |
|
|
Jun 24 05:12:55 PM PDT 24 |
Jun 24 05:13:04 PM PDT 24 |
208803906 ps |
T861 |
/workspace/coverage/default/30.spi_device_alert_test.3568050478 |
|
|
Jun 24 05:12:51 PM PDT 24 |
Jun 24 05:12:53 PM PDT 24 |
45315496 ps |
T862 |
/workspace/coverage/default/24.spi_device_cfg_cmd.2417295874 |
|
|
Jun 24 05:12:18 PM PDT 24 |
Jun 24 05:12:23 PM PDT 24 |
291508582 ps |
T863 |
/workspace/coverage/default/23.spi_device_mailbox.4044347617 |
|
|
Jun 24 05:12:10 PM PDT 24 |
Jun 24 05:12:19 PM PDT 24 |
476108972 ps |
T864 |
/workspace/coverage/default/24.spi_device_pass_cmd_filtering.350762500 |
|
|
Jun 24 05:12:08 PM PDT 24 |
Jun 24 05:12:13 PM PDT 24 |
2237031666 ps |
T865 |
/workspace/coverage/default/18.spi_device_upload.2001658558 |
|
|
Jun 24 05:11:41 PM PDT 24 |
Jun 24 05:11:50 PM PDT 24 |
849328572 ps |
T866 |
/workspace/coverage/default/27.spi_device_flash_and_tpm.3399507600 |
|
|
Jun 24 05:12:32 PM PDT 24 |
Jun 24 05:13:04 PM PDT 24 |
1241471833 ps |
T867 |
/workspace/coverage/default/28.spi_device_flash_and_tpm_min_idle.3358764432 |
|
|
Jun 24 05:12:33 PM PDT 24 |
Jun 24 05:15:14 PM PDT 24 |
36428845426 ps |
T868 |
/workspace/coverage/default/25.spi_device_pass_addr_payload_swap.1177987543 |
|
|
Jun 24 05:12:18 PM PDT 24 |
Jun 24 05:12:22 PM PDT 24 |
114974057 ps |
T869 |
/workspace/coverage/default/34.spi_device_tpm_all.37997569 |
|
|
Jun 24 05:12:54 PM PDT 24 |
Jun 24 05:13:02 PM PDT 24 |
1153922096 ps |
T870 |
/workspace/coverage/default/8.spi_device_flash_and_tpm_min_idle.3324105726 |
|
|
Jun 24 05:10:48 PM PDT 24 |
Jun 24 05:17:29 PM PDT 24 |
202395145237 ps |
T871 |
/workspace/coverage/default/11.spi_device_cfg_cmd.3202177764 |
|
|
Jun 24 05:11:03 PM PDT 24 |
Jun 24 05:11:23 PM PDT 24 |
23362749176 ps |
T872 |
/workspace/coverage/default/21.spi_device_tpm_rw.3581697690 |
|
|
Jun 24 05:11:51 PM PDT 24 |
Jun 24 05:11:54 PM PDT 24 |
169735677 ps |
T873 |
/workspace/coverage/default/17.spi_device_csb_read.2527774621 |
|
|
Jun 24 05:11:31 PM PDT 24 |
Jun 24 05:11:34 PM PDT 24 |
18029949 ps |
T874 |
/workspace/coverage/default/11.spi_device_flash_and_tpm_min_idle.1047825425 |
|
|
Jun 24 05:11:04 PM PDT 24 |
Jun 24 05:15:44 PM PDT 24 |
35709225740 ps |
T875 |
/workspace/coverage/default/48.spi_device_tpm_rw.3049452414 |
|
|
Jun 24 05:14:11 PM PDT 24 |
Jun 24 05:14:13 PM PDT 24 |
116326345 ps |
T133 |
/workspace/coverage/default/47.spi_device_flash_and_tpm_min_idle.2964083700 |
|
|
Jun 24 05:14:15 PM PDT 24 |
Jun 24 05:18:58 PM PDT 24 |
70820582053 ps |
T876 |
/workspace/coverage/default/0.spi_device_tpm_read_hw_reg.1511922151 |
|
|
Jun 24 05:10:11 PM PDT 24 |
Jun 24 05:10:16 PM PDT 24 |
520652716 ps |
T877 |
/workspace/coverage/default/17.spi_device_cfg_cmd.2604122154 |
|
|
Jun 24 05:11:41 PM PDT 24 |
Jun 24 05:11:46 PM PDT 24 |
635860851 ps |
T878 |
/workspace/coverage/default/9.spi_device_flash_all.334649473 |
|
|
Jun 24 05:10:56 PM PDT 24 |
Jun 24 05:11:45 PM PDT 24 |
28274609352 ps |
T879 |
/workspace/coverage/default/1.spi_device_tpm_sts_read.2520987564 |
|
|
Jun 24 05:10:12 PM PDT 24 |
Jun 24 05:10:14 PM PDT 24 |
20501346 ps |
T880 |
/workspace/coverage/default/15.spi_device_tpm_read_hw_reg.1045933920 |
|
|
Jun 24 05:11:24 PM PDT 24 |
Jun 24 05:11:27 PM PDT 24 |
13043180 ps |
T881 |
/workspace/coverage/default/36.spi_device_upload.1677593828 |
|
|
Jun 24 05:13:11 PM PDT 24 |
Jun 24 05:13:23 PM PDT 24 |
1836647917 ps |
T882 |
/workspace/coverage/default/12.spi_device_read_buffer_direct.2309843806 |
|
|
Jun 24 05:11:09 PM PDT 24 |
Jun 24 05:11:15 PM PDT 24 |
283482150 ps |
T883 |
/workspace/coverage/default/34.spi_device_flash_all.3258344054 |
|
|
Jun 24 05:13:04 PM PDT 24 |
Jun 24 05:13:06 PM PDT 24 |
38762769 ps |
T265 |
/workspace/coverage/default/41.spi_device_flash_and_tpm_min_idle.2252375685 |
|
|
Jun 24 05:13:47 PM PDT 24 |
Jun 24 05:20:18 PM PDT 24 |
38574314331 ps |
T884 |
/workspace/coverage/default/49.spi_device_flash_and_tpm_min_idle.958510904 |
|
|
Jun 24 05:14:27 PM PDT 24 |
Jun 24 05:17:08 PM PDT 24 |
11219754587 ps |
T885 |
/workspace/coverage/default/9.spi_device_pass_addr_payload_swap.3368117632 |
|
|
Jun 24 05:10:53 PM PDT 24 |
Jun 24 05:11:06 PM PDT 24 |
18034102354 ps |
T886 |
/workspace/coverage/default/33.spi_device_upload.658017062 |
|
|
Jun 24 05:12:55 PM PDT 24 |
Jun 24 05:13:02 PM PDT 24 |
6923525971 ps |
T887 |
/workspace/coverage/default/16.spi_device_alert_test.2365466721 |
|
|
Jun 24 05:11:33 PM PDT 24 |
Jun 24 05:11:36 PM PDT 24 |
13898962 ps |
T888 |
/workspace/coverage/default/15.spi_device_flash_and_tpm.2725599654 |
|
|
Jun 24 05:11:30 PM PDT 24 |
Jun 24 05:12:21 PM PDT 24 |
5976565583 ps |
T889 |
/workspace/coverage/default/22.spi_device_tpm_sts_read.2334743486 |
|
|
Jun 24 05:12:01 PM PDT 24 |
Jun 24 05:12:03 PM PDT 24 |
217613909 ps |
T890 |
/workspace/coverage/default/22.spi_device_tpm_read_hw_reg.1538398714 |
|
|
Jun 24 05:11:57 PM PDT 24 |
Jun 24 05:12:05 PM PDT 24 |
2550150199 ps |
T263 |
/workspace/coverage/default/5.spi_device_flash_and_tpm_min_idle.3689715253 |
|
|
Jun 24 05:10:34 PM PDT 24 |
Jun 24 05:14:11 PM PDT 24 |
48110943817 ps |
T891 |
/workspace/coverage/default/23.spi_device_upload.1630726927 |
|
|
Jun 24 05:12:12 PM PDT 24 |
Jun 24 05:12:19 PM PDT 24 |
1012210480 ps |
T892 |
/workspace/coverage/default/40.spi_device_read_buffer_direct.3326439721 |
|
|
Jun 24 05:13:35 PM PDT 24 |
Jun 24 05:13:41 PM PDT 24 |
1352369059 ps |
T893 |
/workspace/coverage/default/3.spi_device_intercept.1963128397 |
|
|
Jun 24 05:10:21 PM PDT 24 |
Jun 24 05:10:27 PM PDT 24 |
240088238 ps |
T894 |
/workspace/coverage/default/7.spi_device_tpm_rw.4284630041 |
|
|
Jun 24 05:10:49 PM PDT 24 |
Jun 24 05:10:51 PM PDT 24 |
35646551 ps |
T895 |
/workspace/coverage/default/11.spi_device_tpm_all.2613273849 |
|
|
Jun 24 05:11:00 PM PDT 24 |
Jun 24 05:11:29 PM PDT 24 |
6290683610 ps |
T896 |
/workspace/coverage/default/10.spi_device_flash_and_tpm_min_idle.1956863925 |
|
|
Jun 24 05:11:02 PM PDT 24 |
Jun 24 05:15:10 PM PDT 24 |
112938586183 ps |
T897 |
/workspace/coverage/default/28.spi_device_read_buffer_direct.1028185736 |
|
|
Jun 24 05:12:32 PM PDT 24 |
Jun 24 05:12:40 PM PDT 24 |
1792945672 ps |
T898 |
/workspace/coverage/default/5.spi_device_tpm_rw.3220280700 |
|
|
Jun 24 05:10:36 PM PDT 24 |
Jun 24 05:10:38 PM PDT 24 |
17754903 ps |
T899 |
/workspace/coverage/default/3.spi_device_alert_test.729548817 |
|
|
Jun 24 05:10:29 PM PDT 24 |
Jun 24 05:10:31 PM PDT 24 |
19834846 ps |
T900 |
/workspace/coverage/default/40.spi_device_intercept.1060897478 |
|
|
Jun 24 05:13:34 PM PDT 24 |
Jun 24 05:13:41 PM PDT 24 |
401097514 ps |
T901 |
/workspace/coverage/default/48.spi_device_tpm_read_hw_reg.1275196080 |
|
|
Jun 24 05:14:19 PM PDT 24 |
Jun 24 05:14:22 PM PDT 24 |
3561221134 ps |
T902 |
/workspace/coverage/default/16.spi_device_tpm_all.2263103276 |
|
|
Jun 24 05:11:33 PM PDT 24 |
Jun 24 05:11:52 PM PDT 24 |
935076847 ps |
T903 |
/workspace/coverage/default/37.spi_device_mailbox.814452199 |
|
|
Jun 24 05:13:26 PM PDT 24 |
Jun 24 05:13:33 PM PDT 24 |
541997937 ps |
T904 |
/workspace/coverage/default/18.spi_device_pass_addr_payload_swap.612994059 |
|
|
Jun 24 05:11:40 PM PDT 24 |
Jun 24 05:11:45 PM PDT 24 |
1149104929 ps |
T905 |
/workspace/coverage/default/32.spi_device_tpm_all.3539319435 |
|
|
Jun 24 05:12:49 PM PDT 24 |
Jun 24 05:13:04 PM PDT 24 |
1270915035 ps |
T906 |
/workspace/coverage/default/18.spi_device_mem_parity.3379855638 |
|
|
Jun 24 05:11:44 PM PDT 24 |
Jun 24 05:11:47 PM PDT 24 |
174436726 ps |
T907 |
/workspace/coverage/default/12.spi_device_flash_and_tpm_min_idle.2298985874 |
|
|
Jun 24 05:11:10 PM PDT 24 |
Jun 24 05:11:37 PM PDT 24 |
2010609186 ps |
T908 |
/workspace/coverage/default/43.spi_device_intercept.3564499205 |
|
|
Jun 24 05:13:54 PM PDT 24 |
Jun 24 05:13:58 PM PDT 24 |
466250765 ps |
T909 |
/workspace/coverage/default/11.spi_device_mem_parity.2381794492 |
|
|
Jun 24 05:11:03 PM PDT 24 |
Jun 24 05:11:06 PM PDT 24 |
228470320 ps |
T910 |
/workspace/coverage/default/12.spi_device_flash_mode.1210424055 |
|
|
Jun 24 05:11:09 PM PDT 24 |
Jun 24 05:11:13 PM PDT 24 |
220285375 ps |
T911 |
/workspace/coverage/default/11.spi_device_alert_test.1947610709 |
|
|
Jun 24 05:11:00 PM PDT 24 |
Jun 24 05:11:03 PM PDT 24 |
56966272 ps |
T912 |
/workspace/coverage/default/20.spi_device_tpm_read_hw_reg.683900497 |
|
|
Jun 24 05:11:51 PM PDT 24 |
Jun 24 05:12:05 PM PDT 24 |
4259482097 ps |
T913 |
/workspace/coverage/default/21.spi_device_tpm_sts_read.159553134 |
|
|
Jun 24 05:11:55 PM PDT 24 |
Jun 24 05:11:57 PM PDT 24 |
55811773 ps |
T914 |
/workspace/coverage/default/2.spi_device_mailbox.3923270662 |
|
|
Jun 24 05:10:16 PM PDT 24 |
Jun 24 05:10:21 PM PDT 24 |
185795269 ps |
T915 |
/workspace/coverage/default/9.spi_device_mailbox.4061319815 |
|
|
Jun 24 05:10:53 PM PDT 24 |
Jun 24 05:11:59 PM PDT 24 |
38130382299 ps |
T916 |
/workspace/coverage/default/44.spi_device_flash_and_tpm.213877744 |
|
|
Jun 24 05:14:00 PM PDT 24 |
Jun 24 05:14:23 PM PDT 24 |
2010482694 ps |
T917 |
/workspace/coverage/default/24.spi_device_stress_all.1658361214 |
|
|
Jun 24 05:12:18 PM PDT 24 |
Jun 24 05:19:51 PM PDT 24 |
60239046723 ps |
T918 |
/workspace/coverage/default/3.spi_device_pass_addr_payload_swap.3193434915 |
|
|
Jun 24 05:10:23 PM PDT 24 |
Jun 24 05:10:42 PM PDT 24 |
6498957673 ps |
T919 |
/workspace/coverage/default/13.spi_device_flash_all.4097771521 |
|
|
Jun 24 05:11:16 PM PDT 24 |
Jun 24 05:14:03 PM PDT 24 |
51051226298 ps |
T920 |
/workspace/coverage/default/7.spi_device_stress_all.2251146928 |
|
|
Jun 24 05:10:49 PM PDT 24 |
Jun 24 05:16:43 PM PDT 24 |
114077541900 ps |
T921 |
/workspace/coverage/default/36.spi_device_alert_test.2126292289 |
|
|
Jun 24 05:13:12 PM PDT 24 |
Jun 24 05:13:14 PM PDT 24 |
35003076 ps |
T922 |
/workspace/coverage/default/13.spi_device_tpm_sts_read.3289989412 |
|
|
Jun 24 05:11:06 PM PDT 24 |
Jun 24 05:11:09 PM PDT 24 |
18336855 ps |
T923 |
/workspace/coverage/default/30.spi_device_pass_addr_payload_swap.1968723326 |
|
|
Jun 24 05:12:41 PM PDT 24 |
Jun 24 05:12:46 PM PDT 24 |
231353179 ps |
T924 |
/workspace/coverage/default/39.spi_device_stress_all.1850805336 |
|
|
Jun 24 05:13:26 PM PDT 24 |
Jun 24 05:21:49 PM PDT 24 |
109352828573 ps |
T925 |
/workspace/coverage/default/37.spi_device_tpm_rw.158726267 |
|
|
Jun 24 05:13:24 PM PDT 24 |
Jun 24 05:13:27 PM PDT 24 |
200635308 ps |
T926 |
/workspace/coverage/default/11.spi_device_intercept.2298680166 |
|
|
Jun 24 05:11:04 PM PDT 24 |
Jun 24 05:11:35 PM PDT 24 |
15626627592 ps |
T927 |
/workspace/coverage/default/40.spi_device_tpm_all.430266608 |
|
|
Jun 24 05:13:27 PM PDT 24 |
Jun 24 05:13:47 PM PDT 24 |
1204718907 ps |
T928 |
/workspace/coverage/default/46.spi_device_pass_addr_payload_swap.681631628 |
|
|
Jun 24 05:14:04 PM PDT 24 |
Jun 24 05:14:15 PM PDT 24 |
1313572804 ps |
T929 |
/workspace/coverage/default/39.spi_device_upload.1656528494 |
|
|
Jun 24 05:13:24 PM PDT 24 |
Jun 24 05:13:32 PM PDT 24 |
2880763415 ps |
T930 |
/workspace/coverage/default/32.spi_device_cfg_cmd.744779927 |
|
|
Jun 24 05:12:57 PM PDT 24 |
Jun 24 05:13:08 PM PDT 24 |
2179124375 ps |
T931 |
/workspace/coverage/default/20.spi_device_tpm_rw.1012129465 |
|
|
Jun 24 05:11:48 PM PDT 24 |
Jun 24 05:11:52 PM PDT 24 |
52663477 ps |
T932 |
/workspace/coverage/default/22.spi_device_flash_all.3322553386 |
|
|
Jun 24 05:12:02 PM PDT 24 |
Jun 24 05:12:04 PM PDT 24 |
22609596 ps |
T933 |
/workspace/coverage/default/31.spi_device_tpm_all.2418834466 |
|
|
Jun 24 05:12:47 PM PDT 24 |
Jun 24 05:13:15 PM PDT 24 |
9078816219 ps |
T934 |
/workspace/coverage/default/13.spi_device_pass_cmd_filtering.172400097 |
|
|
Jun 24 05:11:24 PM PDT 24 |
Jun 24 05:11:38 PM PDT 24 |
6668065811 ps |
T935 |
/workspace/coverage/default/11.spi_device_flash_all.391008032 |
|
|
Jun 24 05:11:02 PM PDT 24 |
Jun 24 05:11:46 PM PDT 24 |
22635279849 ps |
T936 |
/workspace/coverage/default/13.spi_device_cfg_cmd.1606727441 |
|
|
Jun 24 05:11:16 PM PDT 24 |
Jun 24 05:11:21 PM PDT 24 |
638612705 ps |
T937 |
/workspace/coverage/default/2.spi_device_mem_parity.1376899263 |
|
|
Jun 24 05:10:19 PM PDT 24 |
Jun 24 05:10:21 PM PDT 24 |
28671344 ps |
T938 |
/workspace/coverage/default/23.spi_device_alert_test.2388814786 |
|
|
Jun 24 05:12:09 PM PDT 24 |
Jun 24 05:12:11 PM PDT 24 |
13927318 ps |
T939 |
/workspace/coverage/default/16.spi_device_stress_all.2766086932 |
|
|
Jun 24 05:11:35 PM PDT 24 |
Jun 24 05:16:28 PM PDT 24 |
15644413990 ps |
T940 |
/workspace/coverage/default/31.spi_device_mailbox.173425017 |
|
|
Jun 24 05:12:46 PM PDT 24 |
Jun 24 05:13:46 PM PDT 24 |
5634550213 ps |
T941 |
/workspace/coverage/default/6.spi_device_intercept.1282215676 |
|
|
Jun 24 05:10:43 PM PDT 24 |
Jun 24 05:11:07 PM PDT 24 |
15096133418 ps |
T942 |
/workspace/coverage/default/47.spi_device_csb_read.129292032 |
|
|
Jun 24 05:14:13 PM PDT 24 |
Jun 24 05:14:15 PM PDT 24 |
32585762 ps |
T943 |
/workspace/coverage/default/20.spi_device_tpm_sts_read.820771204 |
|
|
Jun 24 05:11:46 PM PDT 24 |
Jun 24 05:11:49 PM PDT 24 |
112545085 ps |
T944 |
/workspace/coverage/default/28.spi_device_csb_read.240408429 |
|
|
Jun 24 05:12:31 PM PDT 24 |
Jun 24 05:12:32 PM PDT 24 |
53316096 ps |
T945 |
/workspace/coverage/default/21.spi_device_upload.2791055708 |
|
|
Jun 24 05:11:56 PM PDT 24 |
Jun 24 05:12:08 PM PDT 24 |
6467718546 ps |
T134 |
/workspace/coverage/default/48.spi_device_flash_and_tpm_min_idle.1810803121 |
|
|
Jun 24 05:14:19 PM PDT 24 |
Jun 24 05:15:15 PM PDT 24 |
9755318691 ps |
T946 |
/workspace/coverage/default/2.spi_device_flash_and_tpm_min_idle.518131817 |
|
|
Jun 24 05:10:16 PM PDT 24 |
Jun 24 05:10:24 PM PDT 24 |
1332324895 ps |
T947 |
/workspace/coverage/default/32.spi_device_upload.1652757736 |
|
|
Jun 24 05:12:55 PM PDT 24 |
Jun 24 05:13:08 PM PDT 24 |
11865134187 ps |
T948 |
/workspace/coverage/default/5.spi_device_pass_addr_payload_swap.2223422949 |
|
|
Jun 24 05:10:33 PM PDT 24 |
Jun 24 05:11:07 PM PDT 24 |
48369072687 ps |
T949 |
/workspace/coverage/default/11.spi_device_tpm_read_hw_reg.2641784713 |
|
|
Jun 24 05:11:01 PM PDT 24 |
Jun 24 05:11:05 PM PDT 24 |
537307623 ps |
T950 |
/workspace/coverage/default/30.spi_device_tpm_all.3344747276 |
|
|
Jun 24 05:12:40 PM PDT 24 |
Jun 24 05:12:54 PM PDT 24 |
2460086717 ps |
T951 |
/workspace/coverage/default/16.spi_device_read_buffer_direct.1405981101 |
|
|
Jun 24 05:11:31 PM PDT 24 |
Jun 24 05:11:47 PM PDT 24 |
4858822593 ps |
T952 |
/workspace/coverage/default/17.spi_device_flash_and_tpm.2783760702 |
|
|
Jun 24 05:11:41 PM PDT 24 |
Jun 24 05:12:11 PM PDT 24 |
5538397438 ps |
T953 |
/workspace/coverage/default/14.spi_device_flash_mode.3278979153 |
|
|
Jun 24 05:11:22 PM PDT 24 |
Jun 24 05:11:38 PM PDT 24 |
2410768241 ps |
T272 |
/workspace/coverage/default/43.spi_device_stress_all.2214641620 |
|
|
Jun 24 05:13:56 PM PDT 24 |
Jun 24 05:23:40 PM PDT 24 |
60189070456 ps |
T954 |
/workspace/coverage/default/7.spi_device_pass_addr_payload_swap.532749226 |
|
|
Jun 24 05:10:48 PM PDT 24 |
Jun 24 05:10:53 PM PDT 24 |
31774737 ps |
T955 |
/workspace/coverage/default/17.spi_device_flash_all.623663590 |
|
|
Jun 24 05:11:44 PM PDT 24 |
Jun 24 05:14:42 PM PDT 24 |
79415009592 ps |
T956 |
/workspace/coverage/default/33.spi_device_intercept.131723415 |
|
|
Jun 24 05:12:55 PM PDT 24 |
Jun 24 05:13:05 PM PDT 24 |
1148229383 ps |
T957 |
/workspace/coverage/default/49.spi_device_alert_test.3239440688 |
|
|
Jun 24 05:14:28 PM PDT 24 |
Jun 24 05:14:30 PM PDT 24 |
11456568 ps |
T958 |
/workspace/coverage/default/6.spi_device_cfg_cmd.1418933256 |
|
|
Jun 24 05:10:40 PM PDT 24 |
Jun 24 05:10:54 PM PDT 24 |
883449667 ps |
T959 |
/workspace/coverage/default/5.spi_device_stress_all.2755251327 |
|
|
Jun 24 05:10:37 PM PDT 24 |
Jun 24 05:11:31 PM PDT 24 |
13065764389 ps |
T960 |
/workspace/coverage/default/0.spi_device_pass_cmd_filtering.3228734553 |
|
|
Jun 24 05:10:12 PM PDT 24 |
Jun 24 05:10:25 PM PDT 24 |
3456125915 ps |
T961 |
/workspace/coverage/default/44.spi_device_stress_all.92240254 |
|
|
Jun 24 05:13:58 PM PDT 24 |
Jun 24 05:18:00 PM PDT 24 |
43690143102 ps |
T962 |
/workspace/coverage/default/14.spi_device_read_buffer_direct.2367599024 |
|
|
Jun 24 05:11:24 PM PDT 24 |
Jun 24 05:11:30 PM PDT 24 |
641425592 ps |
T963 |
/workspace/coverage/default/13.spi_device_upload.2037304861 |
|
|
Jun 24 05:11:24 PM PDT 24 |
Jun 24 05:11:39 PM PDT 24 |
2705573698 ps |
T964 |
/workspace/coverage/default/37.spi_device_read_buffer_direct.2147370856 |
|
|
Jun 24 05:13:24 PM PDT 24 |
Jun 24 05:13:30 PM PDT 24 |
380305205 ps |
T965 |
/workspace/coverage/default/32.spi_device_read_buffer_direct.4101296546 |
|
|
Jun 24 05:12:54 PM PDT 24 |
Jun 24 05:13:14 PM PDT 24 |
1659255376 ps |
T966 |
/workspace/coverage/default/18.spi_device_tpm_all.3872327600 |
|
|
Jun 24 05:11:40 PM PDT 24 |
Jun 24 05:11:57 PM PDT 24 |
1623977007 ps |
T967 |
/workspace/coverage/default/35.spi_device_flash_and_tpm_min_idle.582700925 |
|
|
Jun 24 05:13:12 PM PDT 24 |
Jun 24 05:14:40 PM PDT 24 |
7535647933 ps |
T968 |
/workspace/coverage/default/33.spi_device_csb_read.4278317803 |
|
|
Jun 24 05:13:01 PM PDT 24 |
Jun 24 05:13:02 PM PDT 24 |
16521866 ps |
T969 |
/workspace/coverage/default/35.spi_device_alert_test.1975520338 |
|
|
Jun 24 05:13:11 PM PDT 24 |
Jun 24 05:13:13 PM PDT 24 |
15808925 ps |
T970 |
/workspace/coverage/default/8.spi_device_pass_cmd_filtering.161654521 |
|
|
Jun 24 05:10:49 PM PDT 24 |
Jun 24 05:11:04 PM PDT 24 |
8411406826 ps |
T971 |
/workspace/coverage/default/8.spi_device_tpm_read_hw_reg.2759345683 |
|
|
Jun 24 05:10:47 PM PDT 24 |
Jun 24 05:11:05 PM PDT 24 |
10455207774 ps |
T972 |
/workspace/coverage/default/7.spi_device_flash_mode.1148082235 |
|
|
Jun 24 05:10:46 PM PDT 24 |
Jun 24 05:11:25 PM PDT 24 |
4451742561 ps |
T973 |
/workspace/coverage/default/39.spi_device_tpm_rw.4126967377 |
|
|
Jun 24 05:13:28 PM PDT 24 |
Jun 24 05:13:31 PM PDT 24 |
410723772 ps |
T974 |
/workspace/coverage/default/23.spi_device_stress_all.3123245214 |
|
|
Jun 24 05:12:08 PM PDT 24 |
Jun 24 05:14:13 PM PDT 24 |
12979616871 ps |
T91 |
/workspace/coverage/cover_reg_top/12.spi_device_csr_mem_rw_with_rand_reset.3304530586 |
|
|
Jun 24 05:04:39 PM PDT 24 |
Jun 24 05:04:42 PM PDT 24 |
30081631 ps |
T975 |
/workspace/coverage/cover_reg_top/26.spi_device_intr_test.1755870084 |
|
|
Jun 24 05:04:59 PM PDT 24 |
Jun 24 05:05:01 PM PDT 24 |
17176482 ps |
T92 |
/workspace/coverage/cover_reg_top/3.spi_device_tl_errors.980571536 |
|
|
Jun 24 05:04:13 PM PDT 24 |
Jun 24 05:04:18 PM PDT 24 |
51268605 ps |
T93 |
/workspace/coverage/cover_reg_top/1.spi_device_csr_mem_rw_with_rand_reset.2029076419 |
|
|
Jun 24 05:04:08 PM PDT 24 |
Jun 24 05:04:13 PM PDT 24 |
152662128 ps |
T94 |
/workspace/coverage/cover_reg_top/19.spi_device_tl_errors.3651535197 |
|
|
Jun 24 05:04:51 PM PDT 24 |
Jun 24 05:04:55 PM PDT 24 |
205110550 ps |
T976 |
/workspace/coverage/cover_reg_top/30.spi_device_intr_test.2572897993 |
|
|
Jun 24 05:04:56 PM PDT 24 |
Jun 24 05:04:58 PM PDT 24 |
13713531 ps |
T135 |
/workspace/coverage/cover_reg_top/3.spi_device_same_csr_outstanding.878205964 |
|
|
Jun 24 05:04:14 PM PDT 24 |
Jun 24 05:04:20 PM PDT 24 |
210707298 ps |
T79 |
/workspace/coverage/cover_reg_top/4.spi_device_csr_hw_reset.3948520079 |
|
|
Jun 24 05:04:20 PM PDT 24 |
Jun 24 05:04:22 PM PDT 24 |
233697150 ps |
T95 |
/workspace/coverage/cover_reg_top/3.spi_device_tl_intg_err.1589141534 |
|
|
Jun 24 05:04:15 PM PDT 24 |
Jun 24 05:04:25 PM PDT 24 |
1643607280 ps |
T977 |
/workspace/coverage/cover_reg_top/2.spi_device_csr_bit_bash.971490210 |
|
|
Jun 24 05:04:15 PM PDT 24 |
Jun 24 05:04:29 PM PDT 24 |
371921404 ps |
T98 |
/workspace/coverage/cover_reg_top/5.spi_device_tl_errors.3281885463 |
|
|
Jun 24 05:04:20 PM PDT 24 |
Jun 24 05:04:25 PM PDT 24 |
563263765 ps |
T978 |
/workspace/coverage/cover_reg_top/47.spi_device_intr_test.1060263315 |
|
|
Jun 24 05:05:05 PM PDT 24 |
Jun 24 05:05:07 PM PDT 24 |
14636905 ps |
T136 |
/workspace/coverage/cover_reg_top/18.spi_device_same_csr_outstanding.1151522248 |
|
|
Jun 24 05:04:51 PM PDT 24 |
Jun 24 05:04:54 PM PDT 24 |
117286692 ps |
T111 |
/workspace/coverage/cover_reg_top/0.spi_device_csr_rw.2846204755 |
|
|
Jun 24 05:04:09 PM PDT 24 |
Jun 24 05:04:13 PM PDT 24 |
88357432 ps |
T80 |
/workspace/coverage/cover_reg_top/0.spi_device_csr_hw_reset.3347651032 |
|
|
Jun 24 05:04:08 PM PDT 24 |
Jun 24 05:04:11 PM PDT 24 |
163525476 ps |
T979 |
/workspace/coverage/cover_reg_top/36.spi_device_intr_test.3541451038 |
|
|
Jun 24 05:04:58 PM PDT 24 |
Jun 24 05:05:00 PM PDT 24 |
13696482 ps |
T107 |
/workspace/coverage/cover_reg_top/2.spi_device_csr_mem_rw_with_rand_reset.530804502 |
|
|
Jun 24 05:04:12 PM PDT 24 |
Jun 24 05:04:15 PM PDT 24 |
142990369 ps |
T112 |
/workspace/coverage/cover_reg_top/13.spi_device_csr_rw.1401639953 |
|
|
Jun 24 05:04:41 PM PDT 24 |
Jun 24 05:04:44 PM PDT 24 |
301363409 ps |
T113 |
/workspace/coverage/cover_reg_top/18.spi_device_csr_rw.2517589999 |
|
|
Jun 24 05:04:51 PM PDT 24 |
Jun 24 05:04:55 PM PDT 24 |
217212049 ps |
T980 |
/workspace/coverage/cover_reg_top/9.spi_device_intr_test.3261500597 |
|
|
Jun 24 05:04:40 PM PDT 24 |
Jun 24 05:04:41 PM PDT 24 |
14117241 ps |
T981 |
/workspace/coverage/cover_reg_top/12.spi_device_same_csr_outstanding.1340073324 |
|
|
Jun 24 05:04:40 PM PDT 24 |
Jun 24 05:04:45 PM PDT 24 |
229312922 ps |
T982 |
/workspace/coverage/cover_reg_top/45.spi_device_intr_test.3612642936 |
|
|
Jun 24 05:04:57 PM PDT 24 |
Jun 24 05:04:58 PM PDT 24 |
43730182 ps |
T983 |
/workspace/coverage/cover_reg_top/22.spi_device_intr_test.1629121766 |
|
|
Jun 24 05:04:51 PM PDT 24 |
Jun 24 05:04:53 PM PDT 24 |
25699421 ps |
T984 |
/workspace/coverage/cover_reg_top/21.spi_device_intr_test.458971170 |
|
|
Jun 24 05:04:54 PM PDT 24 |
Jun 24 05:04:55 PM PDT 24 |
18406355 ps |
T985 |
/workspace/coverage/cover_reg_top/11.spi_device_same_csr_outstanding.2130029469 |
|
|
Jun 24 05:04:37 PM PDT 24 |
Jun 24 05:04:40 PM PDT 24 |
78622429 ps |
T986 |
/workspace/coverage/cover_reg_top/13.spi_device_intr_test.3498396833 |
|
|
Jun 24 05:04:41 PM PDT 24 |
Jun 24 05:04:43 PM PDT 24 |
41992785 ps |
T987 |
/workspace/coverage/cover_reg_top/43.spi_device_intr_test.225213437 |
|
|
Jun 24 05:04:57 PM PDT 24 |
Jun 24 05:04:59 PM PDT 24 |
18768966 ps |
T988 |
/workspace/coverage/cover_reg_top/2.spi_device_csr_rw.3840985864 |
|
|
Jun 24 05:04:14 PM PDT 24 |
Jun 24 05:04:16 PM PDT 24 |
41330428 ps |
T103 |
/workspace/coverage/cover_reg_top/18.spi_device_tl_errors.3570281010 |
|
|
Jun 24 05:04:50 PM PDT 24 |
Jun 24 05:04:53 PM PDT 24 |
123668653 ps |
T108 |
/workspace/coverage/cover_reg_top/4.spi_device_csr_mem_rw_with_rand_reset.652295056 |
|
|
Jun 24 05:04:23 PM PDT 24 |
Jun 24 05:04:27 PM PDT 24 |
1485330408 ps |
T96 |
/workspace/coverage/cover_reg_top/15.spi_device_tl_intg_err.1357839088 |
|
|
Jun 24 05:04:42 PM PDT 24 |
Jun 24 05:04:56 PM PDT 24 |
834308948 ps |
T97 |
/workspace/coverage/cover_reg_top/7.spi_device_tl_intg_err.3208731283 |
|
|
Jun 24 05:04:26 PM PDT 24 |
Jun 24 05:04:34 PM PDT 24 |
416883835 ps |
T99 |
/workspace/coverage/cover_reg_top/4.spi_device_tl_errors.1654475739 |
|
|
Jun 24 05:04:13 PM PDT 24 |
Jun 24 05:04:18 PM PDT 24 |
375184589 ps |
T989 |
/workspace/coverage/cover_reg_top/6.spi_device_same_csr_outstanding.2768210719 |
|
|
Jun 24 05:04:26 PM PDT 24 |
Jun 24 05:04:31 PM PDT 24 |
208180233 ps |
T114 |
/workspace/coverage/cover_reg_top/6.spi_device_csr_rw.2366223225 |
|
|
Jun 24 05:04:26 PM PDT 24 |
Jun 24 05:04:30 PM PDT 24 |
456343214 ps |
T990 |
/workspace/coverage/cover_reg_top/42.spi_device_intr_test.626983170 |
|
|
Jun 24 05:04:57 PM PDT 24 |
Jun 24 05:04:58 PM PDT 24 |
20113126 ps |
T109 |
/workspace/coverage/cover_reg_top/8.spi_device_tl_intg_err.69176088 |
|
|
Jun 24 05:04:40 PM PDT 24 |
Jun 24 05:04:49 PM PDT 24 |
303459842 ps |
T102 |
/workspace/coverage/cover_reg_top/17.spi_device_tl_errors.3968491843 |
|
|
Jun 24 05:04:54 PM PDT 24 |
Jun 24 05:04:58 PM PDT 24 |
418720237 ps |
T115 |
/workspace/coverage/cover_reg_top/3.spi_device_csr_aliasing.43597131 |
|
|
Jun 24 05:04:14 PM PDT 24 |
Jun 24 05:04:31 PM PDT 24 |
660827829 ps |
T991 |
/workspace/coverage/cover_reg_top/34.spi_device_intr_test.2782118687 |
|
|
Jun 24 05:04:59 PM PDT 24 |
Jun 24 05:05:01 PM PDT 24 |
11979004 ps |
T992 |
/workspace/coverage/cover_reg_top/17.spi_device_intr_test.67533473 |
|
|
Jun 24 05:04:51 PM PDT 24 |
Jun 24 05:04:53 PM PDT 24 |
62014324 ps |
T116 |
/workspace/coverage/cover_reg_top/0.spi_device_csr_aliasing.219124887 |
|
|
Jun 24 05:04:08 PM PDT 24 |
Jun 24 05:04:18 PM PDT 24 |
411921803 ps |
T993 |
/workspace/coverage/cover_reg_top/17.spi_device_csr_mem_rw_with_rand_reset.3658545261 |
|
|
Jun 24 05:04:51 PM PDT 24 |
Jun 24 05:04:54 PM PDT 24 |
28927482 ps |
T100 |
/workspace/coverage/cover_reg_top/2.spi_device_tl_errors.2786076995 |
|
|
Jun 24 05:04:07 PM PDT 24 |
Jun 24 05:04:12 PM PDT 24 |
252343609 ps |
T994 |
/workspace/coverage/cover_reg_top/8.spi_device_intr_test.346432481 |
|
|
Jun 24 05:04:28 PM PDT 24 |
Jun 24 05:04:29 PM PDT 24 |
45102226 ps |
T995 |
/workspace/coverage/cover_reg_top/19.spi_device_csr_rw.3234428159 |
|
|
Jun 24 05:04:49 PM PDT 24 |
Jun 24 05:04:51 PM PDT 24 |
36256922 ps |
T996 |
/workspace/coverage/cover_reg_top/4.spi_device_intr_test.2669738947 |
|
|
Jun 24 05:04:15 PM PDT 24 |
Jun 24 05:04:17 PM PDT 24 |
23105107 ps |
T997 |
/workspace/coverage/cover_reg_top/0.spi_device_mem_walk.3073844037 |
|
|
Jun 24 05:04:05 PM PDT 24 |
Jun 24 05:04:07 PM PDT 24 |
13029274 ps |
T117 |
/workspace/coverage/cover_reg_top/4.spi_device_mem_partial_access.1517160372 |
|
|
Jun 24 05:04:20 PM PDT 24 |
Jun 24 05:04:23 PM PDT 24 |
33979901 ps |
T998 |
/workspace/coverage/cover_reg_top/5.spi_device_intr_test.1246508001 |
|
|
Jun 24 05:04:22 PM PDT 24 |
Jun 24 05:04:23 PM PDT 24 |
25301203 ps |
T999 |
/workspace/coverage/cover_reg_top/18.spi_device_intr_test.3063733855 |
|
|
Jun 24 05:04:50 PM PDT 24 |
Jun 24 05:04:52 PM PDT 24 |
29967281 ps |
T101 |
/workspace/coverage/cover_reg_top/0.spi_device_tl_errors.1698918000 |
|
|
Jun 24 05:04:04 PM PDT 24 |
Jun 24 05:04:07 PM PDT 24 |
27154936 ps |
T1000 |
/workspace/coverage/cover_reg_top/27.spi_device_intr_test.3933221562 |
|
|
Jun 24 05:05:02 PM PDT 24 |
Jun 24 05:05:04 PM PDT 24 |
15519503 ps |
T168 |
/workspace/coverage/cover_reg_top/9.spi_device_tl_intg_err.3186549164 |
|
|
Jun 24 05:04:27 PM PDT 24 |
Jun 24 05:04:46 PM PDT 24 |
568125306 ps |
T81 |
/workspace/coverage/cover_reg_top/3.spi_device_csr_hw_reset.1579519127 |
|
|
Jun 24 05:04:14 PM PDT 24 |
Jun 24 05:04:16 PM PDT 24 |
28457522 ps |
T1001 |
/workspace/coverage/cover_reg_top/11.spi_device_intr_test.3380517967 |
|
|
Jun 24 05:04:37 PM PDT 24 |
Jun 24 05:04:38 PM PDT 24 |
13465034 ps |
T1002 |
/workspace/coverage/cover_reg_top/32.spi_device_intr_test.2155136804 |
|
|
Jun 24 05:05:02 PM PDT 24 |
Jun 24 05:05:03 PM PDT 24 |
36484538 ps |
T105 |
/workspace/coverage/cover_reg_top/14.spi_device_tl_errors.455714227 |
|
|
Jun 24 05:04:44 PM PDT 24 |
Jun 24 05:04:49 PM PDT 24 |
95641391 ps |
T1003 |
/workspace/coverage/cover_reg_top/25.spi_device_intr_test.3015249653 |
|
|
Jun 24 05:04:59 PM PDT 24 |
Jun 24 05:05:01 PM PDT 24 |
32129023 ps |
T1004 |
/workspace/coverage/cover_reg_top/6.spi_device_intr_test.2217128023 |
|
|
Jun 24 05:04:22 PM PDT 24 |
Jun 24 05:04:23 PM PDT 24 |
13066626 ps |
T118 |
/workspace/coverage/cover_reg_top/17.spi_device_csr_rw.1808380815 |
|
|
Jun 24 05:04:52 PM PDT 24 |
Jun 24 05:04:55 PM PDT 24 |
130014899 ps |
T1005 |
/workspace/coverage/cover_reg_top/23.spi_device_intr_test.3125976347 |
|
|
Jun 24 05:04:58 PM PDT 24 |
Jun 24 05:05:00 PM PDT 24 |
10493365 ps |
T1006 |
/workspace/coverage/cover_reg_top/14.spi_device_intr_test.713803606 |
|
|
Jun 24 05:04:42 PM PDT 24 |
Jun 24 05:04:44 PM PDT 24 |
24175535 ps |
T1007 |
/workspace/coverage/cover_reg_top/29.spi_device_intr_test.2228482951 |
|
|
Jun 24 05:04:58 PM PDT 24 |
Jun 24 05:05:00 PM PDT 24 |
13720085 ps |
T1008 |
/workspace/coverage/cover_reg_top/9.spi_device_same_csr_outstanding.3072668888 |
|
|
Jun 24 05:04:27 PM PDT 24 |
Jun 24 05:04:31 PM PDT 24 |
45599316 ps |
T1009 |
/workspace/coverage/cover_reg_top/44.spi_device_intr_test.3234439599 |
|
|
Jun 24 05:05:05 PM PDT 24 |
Jun 24 05:05:07 PM PDT 24 |
26652172 ps |
T143 |
/workspace/coverage/cover_reg_top/3.spi_device_csr_rw.1762456083 |
|
|
Jun 24 05:04:15 PM PDT 24 |
Jun 24 05:04:18 PM PDT 24 |
88216131 ps |
T120 |
/workspace/coverage/cover_reg_top/3.spi_device_mem_partial_access.3881942056 |
|
|
Jun 24 05:04:16 PM PDT 24 |
Jun 24 05:04:19 PM PDT 24 |
46572638 ps |
T1010 |
/workspace/coverage/cover_reg_top/1.spi_device_csr_rw.3830138918 |
|
|
Jun 24 05:04:13 PM PDT 24 |
Jun 24 05:04:17 PM PDT 24 |
242276190 ps |
T1011 |
/workspace/coverage/cover_reg_top/9.spi_device_tl_errors.801144927 |
|
|
Jun 24 05:04:27 PM PDT 24 |
Jun 24 05:04:31 PM PDT 24 |
205022929 ps |
T1012 |
/workspace/coverage/cover_reg_top/35.spi_device_intr_test.4129724493 |
|
|
Jun 24 05:05:02 PM PDT 24 |
Jun 24 05:05:03 PM PDT 24 |
41307137 ps |
T1013 |
/workspace/coverage/cover_reg_top/4.spi_device_csr_bit_bash.4020662720 |
|
|
Jun 24 05:04:22 PM PDT 24 |
Jun 24 05:04:55 PM PDT 24 |
1043168799 ps |
T1014 |
/workspace/coverage/cover_reg_top/7.spi_device_csr_mem_rw_with_rand_reset.210910589 |
|
|
Jun 24 05:04:26 PM PDT 24 |
Jun 24 05:04:29 PM PDT 24 |
147916158 ps |
T1015 |
/workspace/coverage/cover_reg_top/28.spi_device_intr_test.3308597029 |
|
|
Jun 24 05:04:57 PM PDT 24 |
Jun 24 05:04:59 PM PDT 24 |
14257746 ps |
T1016 |
/workspace/coverage/cover_reg_top/1.spi_device_intr_test.3190034986 |
|
|
Jun 24 05:04:05 PM PDT 24 |
Jun 24 05:04:06 PM PDT 24 |
55220604 ps |