Tests
dashboard | hierarchy | modlist | groups | tests | asserts
Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
96.06 98.44 94.07 98.62 89.36 97.28 95.43 99.25


Total test records in report: 1101
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html | tests21.html | tests22.html

T827 /workspace/coverage/default/18.spi_device_tpm_read_hw_reg.367316207 Jun 25 06:49:04 PM PDT 24 Jun 25 06:49:11 PM PDT 24 10083565108 ps
T828 /workspace/coverage/default/12.spi_device_intercept.2325313223 Jun 25 06:47:54 PM PDT 24 Jun 25 06:48:02 PM PDT 24 1296649262 ps
T829 /workspace/coverage/default/42.spi_device_read_buffer_direct.1066052443 Jun 25 06:52:36 PM PDT 24 Jun 25 06:52:41 PM PDT 24 233889496 ps
T830 /workspace/coverage/default/16.spi_device_intercept.1951830062 Jun 25 06:48:50 PM PDT 24 Jun 25 06:48:55 PM PDT 24 217066696 ps
T831 /workspace/coverage/default/19.spi_device_mem_parity.2747791196 Jun 25 06:49:19 PM PDT 24 Jun 25 06:49:22 PM PDT 24 29740260 ps
T308 /workspace/coverage/default/20.spi_device_pass_addr_payload_swap.4245043894 Jun 25 06:49:27 PM PDT 24 Jun 25 06:49:39 PM PDT 24 2619087786 ps
T832 /workspace/coverage/default/42.spi_device_upload.2841682177 Jun 25 06:52:36 PM PDT 24 Jun 25 06:52:50 PM PDT 24 7611909958 ps
T833 /workspace/coverage/default/38.spi_device_tpm_rw.320068036 Jun 25 06:52:07 PM PDT 24 Jun 25 06:52:08 PM PDT 24 304944331 ps
T834 /workspace/coverage/default/7.spi_device_flash_and_tpm.608401373 Jun 25 06:47:01 PM PDT 24 Jun 25 06:48:03 PM PDT 24 8310094433 ps
T835 /workspace/coverage/default/20.spi_device_tpm_sts_read.1365537962 Jun 25 06:49:27 PM PDT 24 Jun 25 06:49:30 PM PDT 24 32020713 ps
T836 /workspace/coverage/default/26.spi_device_pass_addr_payload_swap.1692950573 Jun 25 06:50:25 PM PDT 24 Jun 25 06:50:31 PM PDT 24 2366811784 ps
T837 /workspace/coverage/default/3.spi_device_pass_addr_payload_swap.1512202886 Jun 25 06:45:53 PM PDT 24 Jun 25 06:45:57 PM PDT 24 145549827 ps
T838 /workspace/coverage/default/34.spi_device_flash_and_tpm.3922218523 Jun 25 06:51:38 PM PDT 24 Jun 25 06:53:04 PM PDT 24 33419925252 ps
T839 /workspace/coverage/default/19.spi_device_alert_test.4069044891 Jun 25 06:49:27 PM PDT 24 Jun 25 06:49:30 PM PDT 24 29850664 ps
T840 /workspace/coverage/default/7.spi_device_read_buffer_direct.1866109299 Jun 25 06:46:59 PM PDT 24 Jun 25 06:47:07 PM PDT 24 795359344 ps
T841 /workspace/coverage/default/23.spi_device_flash_and_tpm_min_idle.1421917925 Jun 25 06:49:56 PM PDT 24 Jun 25 06:53:52 PM PDT 24 26130542072 ps
T842 /workspace/coverage/default/39.spi_device_intercept.1115985049 Jun 25 06:52:15 PM PDT 24 Jun 25 06:52:19 PM PDT 24 122984662 ps
T843 /workspace/coverage/default/17.spi_device_tpm_all.828012874 Jun 25 06:48:55 PM PDT 24 Jun 25 06:48:57 PM PDT 24 29425913 ps
T844 /workspace/coverage/default/2.spi_device_flash_and_tpm.2347814081 Jun 25 06:45:33 PM PDT 24 Jun 25 06:51:42 PM PDT 24 331807556904 ps
T845 /workspace/coverage/default/45.spi_device_pass_cmd_filtering.2208256739 Jun 25 06:53:02 PM PDT 24 Jun 25 06:53:05 PM PDT 24 95473446 ps
T846 /workspace/coverage/default/7.spi_device_upload.2858525105 Jun 25 06:47:00 PM PDT 24 Jun 25 06:47:04 PM PDT 24 107500922 ps
T847 /workspace/coverage/default/46.spi_device_flash_and_tpm_min_idle.673782406 Jun 25 06:53:16 PM PDT 24 Jun 25 06:54:19 PM PDT 24 6209730516 ps
T848 /workspace/coverage/default/21.spi_device_flash_mode.3627326769 Jun 25 06:49:42 PM PDT 24 Jun 25 06:49:47 PM PDT 24 427790340 ps
T849 /workspace/coverage/default/39.spi_device_flash_all.2007029118 Jun 25 06:52:14 PM PDT 24 Jun 25 06:52:37 PM PDT 24 911200435 ps
T850 /workspace/coverage/default/15.spi_device_flash_and_tpm.1235186576 Jun 25 06:48:42 PM PDT 24 Jun 25 06:49:40 PM PDT 24 33985749640 ps
T851 /workspace/coverage/default/23.spi_device_pass_addr_payload_swap.4292550673 Jun 25 06:49:48 PM PDT 24 Jun 25 06:50:05 PM PDT 24 4789410396 ps
T852 /workspace/coverage/default/15.spi_device_mailbox.2191326825 Jun 25 06:48:41 PM PDT 24 Jun 25 06:49:11 PM PDT 24 9779527534 ps
T853 /workspace/coverage/default/17.spi_device_stress_all.2695263452 Jun 25 06:49:04 PM PDT 24 Jun 25 06:51:07 PM PDT 24 6730619554 ps
T854 /workspace/coverage/default/10.spi_device_mailbox.349981737 Jun 25 06:47:31 PM PDT 24 Jun 25 06:47:45 PM PDT 24 1237581751 ps
T855 /workspace/coverage/default/35.spi_device_intercept.1020029378 Jun 25 06:51:44 PM PDT 24 Jun 25 06:51:51 PM PDT 24 1833491180 ps
T856 /workspace/coverage/default/6.spi_device_read_buffer_direct.444383733 Jun 25 06:46:40 PM PDT 24 Jun 25 06:46:46 PM PDT 24 742267167 ps
T857 /workspace/coverage/default/4.spi_device_cfg_cmd.1903790532 Jun 25 06:46:07 PM PDT 24 Jun 25 06:46:11 PM PDT 24 301830465 ps
T858 /workspace/coverage/default/6.spi_device_pass_cmd_filtering.3582181589 Jun 25 06:46:40 PM PDT 24 Jun 25 06:46:48 PM PDT 24 281931554 ps
T859 /workspace/coverage/default/31.spi_device_intercept.3366723028 Jun 25 06:51:06 PM PDT 24 Jun 25 06:51:27 PM PDT 24 17977259792 ps
T860 /workspace/coverage/default/28.spi_device_upload.154725363 Jun 25 06:50:45 PM PDT 24 Jun 25 06:50:55 PM PDT 24 1820011180 ps
T861 /workspace/coverage/default/18.spi_device_upload.1020096977 Jun 25 06:49:10 PM PDT 24 Jun 25 06:49:30 PM PDT 24 5163602024 ps
T862 /workspace/coverage/default/11.spi_device_alert_test.554564719 Jun 25 06:47:45 PM PDT 24 Jun 25 06:47:47 PM PDT 24 17502457 ps
T863 /workspace/coverage/default/16.spi_device_alert_test.1272044801 Jun 25 06:48:47 PM PDT 24 Jun 25 06:48:49 PM PDT 24 19884812 ps
T864 /workspace/coverage/default/32.spi_device_flash_and_tpm_min_idle.1482223002 Jun 25 06:51:13 PM PDT 24 Jun 25 06:55:29 PM PDT 24 121525944940 ps
T865 /workspace/coverage/default/46.spi_device_pass_cmd_filtering.3489187653 Jun 25 06:53:09 PM PDT 24 Jun 25 06:53:13 PM PDT 24 1691562381 ps
T866 /workspace/coverage/default/10.spi_device_upload.2667744966 Jun 25 06:47:28 PM PDT 24 Jun 25 06:47:52 PM PDT 24 3656412134 ps
T867 /workspace/coverage/default/19.spi_device_tpm_read_hw_reg.1182846356 Jun 25 06:49:19 PM PDT 24 Jun 25 06:49:22 PM PDT 24 1808647439 ps
T868 /workspace/coverage/default/42.spi_device_flash_and_tpm_min_idle.2574004685 Jun 25 06:52:45 PM PDT 24 Jun 25 06:53:18 PM PDT 24 2712202549 ps
T869 /workspace/coverage/default/10.spi_device_tpm_rw.2085841194 Jun 25 06:47:29 PM PDT 24 Jun 25 06:47:36 PM PDT 24 908008862 ps
T315 /workspace/coverage/default/10.spi_device_stress_all.3394244824 Jun 25 06:47:39 PM PDT 24 Jun 25 06:54:08 PM PDT 24 676433748176 ps
T870 /workspace/coverage/default/12.spi_device_tpm_all.3304418517 Jun 25 06:47:53 PM PDT 24 Jun 25 06:48:18 PM PDT 24 4129219639 ps
T871 /workspace/coverage/default/34.spi_device_flash_mode.1669198953 Jun 25 06:51:36 PM PDT 24 Jun 25 06:52:11 PM PDT 24 3349957646 ps
T872 /workspace/coverage/default/18.spi_device_tpm_rw.1289936786 Jun 25 06:49:04 PM PDT 24 Jun 25 06:49:07 PM PDT 24 185188292 ps
T873 /workspace/coverage/default/44.spi_device_flash_and_tpm_min_idle.2931205625 Jun 25 06:52:58 PM PDT 24 Jun 25 06:55:06 PM PDT 24 20250528424 ps
T874 /workspace/coverage/default/47.spi_device_flash_and_tpm.487137096 Jun 25 06:53:23 PM PDT 24 Jun 25 07:03:36 PM PDT 24 62278787637 ps
T875 /workspace/coverage/default/17.spi_device_flash_all.2576898977 Jun 25 06:48:56 PM PDT 24 Jun 25 06:52:08 PM PDT 24 104337709709 ps
T876 /workspace/coverage/default/47.spi_device_flash_and_tpm_min_idle.2764797516 Jun 25 06:53:24 PM PDT 24 Jun 25 06:55:45 PM PDT 24 66005931163 ps
T877 /workspace/coverage/default/26.spi_device_tpm_all.3679134334 Jun 25 06:50:23 PM PDT 24 Jun 25 06:50:25 PM PDT 24 204510367 ps
T878 /workspace/coverage/default/2.spi_device_tpm_all.2165792730 Jun 25 06:45:26 PM PDT 24 Jun 25 06:45:49 PM PDT 24 3644578155 ps
T879 /workspace/coverage/default/25.spi_device_tpm_sts_read.622049934 Jun 25 06:50:14 PM PDT 24 Jun 25 06:50:16 PM PDT 24 20917218 ps
T880 /workspace/coverage/default/30.spi_device_read_buffer_direct.4205963455 Jun 25 06:50:59 PM PDT 24 Jun 25 06:51:06 PM PDT 24 1218144480 ps
T881 /workspace/coverage/default/31.spi_device_alert_test.220385096 Jun 25 06:51:07 PM PDT 24 Jun 25 06:51:09 PM PDT 24 18261425 ps
T154 /workspace/coverage/default/12.spi_device_stress_all.3707600455 Jun 25 06:48:07 PM PDT 24 Jun 25 06:54:28 PM PDT 24 870945719102 ps
T882 /workspace/coverage/default/22.spi_device_pass_cmd_filtering.1593224669 Jun 25 06:49:40 PM PDT 24 Jun 25 06:49:45 PM PDT 24 415368897 ps
T883 /workspace/coverage/default/14.spi_device_alert_test.988052107 Jun 25 06:48:33 PM PDT 24 Jun 25 06:48:36 PM PDT 24 15145802 ps
T884 /workspace/coverage/default/3.spi_device_cfg_cmd.2089704547 Jun 25 06:45:51 PM PDT 24 Jun 25 06:46:02 PM PDT 24 3623220835 ps
T885 /workspace/coverage/default/40.spi_device_pass_cmd_filtering.2599336187 Jun 25 06:52:21 PM PDT 24 Jun 25 06:52:24 PM PDT 24 181247591 ps
T886 /workspace/coverage/default/43.spi_device_alert_test.3328766685 Jun 25 06:52:58 PM PDT 24 Jun 25 06:53:00 PM PDT 24 13676756 ps
T887 /workspace/coverage/default/22.spi_device_flash_mode.2198909938 Jun 25 06:49:48 PM PDT 24 Jun 25 06:49:57 PM PDT 24 370968778 ps
T888 /workspace/coverage/default/12.spi_device_csb_read.1541711091 Jun 25 06:47:54 PM PDT 24 Jun 25 06:47:56 PM PDT 24 38181378 ps
T889 /workspace/coverage/default/9.spi_device_tpm_sts_read.86916668 Jun 25 06:47:16 PM PDT 24 Jun 25 06:47:18 PM PDT 24 76104207 ps
T890 /workspace/coverage/default/24.spi_device_pass_cmd_filtering.2636136076 Jun 25 06:50:03 PM PDT 24 Jun 25 06:50:13 PM PDT 24 15633766493 ps
T891 /workspace/coverage/default/27.spi_device_flash_all.3718860558 Jun 25 06:50:36 PM PDT 24 Jun 25 06:50:38 PM PDT 24 19095494 ps
T892 /workspace/coverage/default/27.spi_device_tpm_rw.3964171460 Jun 25 06:50:28 PM PDT 24 Jun 25 06:50:31 PM PDT 24 157736094 ps
T893 /workspace/coverage/default/49.spi_device_pass_addr_payload_swap.3196610185 Jun 25 06:53:32 PM PDT 24 Jun 25 06:53:37 PM PDT 24 1445741684 ps
T894 /workspace/coverage/default/38.spi_device_flash_and_tpm.1541941310 Jun 25 06:52:06 PM PDT 24 Jun 25 06:52:28 PM PDT 24 9392881694 ps
T895 /workspace/coverage/default/34.spi_device_tpm_all.2646687271 Jun 25 06:51:28 PM PDT 24 Jun 25 06:51:43 PM PDT 24 1346796565 ps
T61 /workspace/coverage/default/1.spi_device_sec_cm.1818716332 Jun 25 06:45:21 PM PDT 24 Jun 25 06:45:23 PM PDT 24 116193975 ps
T896 /workspace/coverage/default/13.spi_device_tpm_read_hw_reg.3657469796 Jun 25 06:48:07 PM PDT 24 Jun 25 06:48:12 PM PDT 24 626825178 ps
T897 /workspace/coverage/default/26.spi_device_alert_test.3287067904 Jun 25 06:50:27 PM PDT 24 Jun 25 06:50:29 PM PDT 24 11853632 ps
T898 /workspace/coverage/default/44.spi_device_pass_cmd_filtering.280614033 Jun 25 06:52:57 PM PDT 24 Jun 25 06:53:02 PM PDT 24 1204049546 ps
T899 /workspace/coverage/default/11.spi_device_csb_read.2436720967 Jun 25 06:47:39 PM PDT 24 Jun 25 06:47:41 PM PDT 24 40984358 ps
T900 /workspace/coverage/default/40.spi_device_intercept.1179490045 Jun 25 06:52:24 PM PDT 24 Jun 25 06:52:27 PM PDT 24 130299737 ps
T901 /workspace/coverage/default/15.spi_device_upload.458283855 Jun 25 06:48:42 PM PDT 24 Jun 25 06:48:52 PM PDT 24 2442958266 ps
T902 /workspace/coverage/default/37.spi_device_tpm_read_hw_reg.2118951242 Jun 25 06:52:00 PM PDT 24 Jun 25 06:52:06 PM PDT 24 2038152572 ps
T903 /workspace/coverage/default/8.spi_device_pass_cmd_filtering.3229203874 Jun 25 06:47:04 PM PDT 24 Jun 25 06:47:07 PM PDT 24 407431726 ps
T904 /workspace/coverage/default/41.spi_device_read_buffer_direct.4006175551 Jun 25 06:52:30 PM PDT 24 Jun 25 06:52:38 PM PDT 24 1274162064 ps
T905 /workspace/coverage/default/9.spi_device_alert_test.615047273 Jun 25 06:47:30 PM PDT 24 Jun 25 06:47:34 PM PDT 24 69893582 ps
T906 /workspace/coverage/default/28.spi_device_read_buffer_direct.1222060229 Jun 25 06:50:43 PM PDT 24 Jun 25 06:50:48 PM PDT 24 195402921 ps
T907 /workspace/coverage/default/1.spi_device_flash_all.3801807310 Jun 25 06:45:18 PM PDT 24 Jun 25 06:45:26 PM PDT 24 754296491 ps
T908 /workspace/coverage/default/43.spi_device_stress_all.559430778 Jun 25 06:52:47 PM PDT 24 Jun 25 06:53:17 PM PDT 24 2488345387 ps
T909 /workspace/coverage/default/32.spi_device_intercept.2943116683 Jun 25 06:51:15 PM PDT 24 Jun 25 06:51:35 PM PDT 24 2166062261 ps
T910 /workspace/coverage/default/8.spi_device_tpm_all.2146106779 Jun 25 06:47:06 PM PDT 24 Jun 25 06:47:11 PM PDT 24 291852370 ps
T911 /workspace/coverage/default/19.spi_device_cfg_cmd.2481087908 Jun 25 06:49:17 PM PDT 24 Jun 25 06:49:21 PM PDT 24 54279674 ps
T316 /workspace/coverage/default/0.spi_device_flash_all.3471141269 Jun 25 06:44:55 PM PDT 24 Jun 25 06:50:34 PM PDT 24 95054261142 ps
T912 /workspace/coverage/default/43.spi_device_cfg_cmd.3763746051 Jun 25 06:52:45 PM PDT 24 Jun 25 06:52:50 PM PDT 24 116750371 ps
T913 /workspace/coverage/default/45.spi_device_pass_addr_payload_swap.3406156090 Jun 25 06:53:01 PM PDT 24 Jun 25 06:53:08 PM PDT 24 3812257720 ps
T914 /workspace/coverage/default/13.spi_device_flash_mode.730484885 Jun 25 06:48:15 PM PDT 24 Jun 25 06:48:23 PM PDT 24 391746374 ps
T915 /workspace/coverage/default/30.spi_device_tpm_all.4222148888 Jun 25 06:50:57 PM PDT 24 Jun 25 06:51:22 PM PDT 24 1850184327 ps
T916 /workspace/coverage/default/20.spi_device_tpm_read_hw_reg.2814787136 Jun 25 06:49:25 PM PDT 24 Jun 25 06:49:32 PM PDT 24 766734827 ps
T917 /workspace/coverage/default/16.spi_device_upload.168131416 Jun 25 06:48:48 PM PDT 24 Jun 25 06:48:55 PM PDT 24 1303351678 ps
T918 /workspace/coverage/default/35.spi_device_cfg_cmd.3262151067 Jun 25 06:51:50 PM PDT 24 Jun 25 06:52:02 PM PDT 24 4722408858 ps
T919 /workspace/coverage/default/39.spi_device_flash_and_tpm_min_idle.3235217306 Jun 25 06:52:15 PM PDT 24 Jun 25 06:55:29 PM PDT 24 53499993935 ps
T920 /workspace/coverage/default/31.spi_device_cfg_cmd.2758741373 Jun 25 06:51:06 PM PDT 24 Jun 25 06:51:10 PM PDT 24 57253475 ps
T921 /workspace/coverage/default/16.spi_device_tpm_read_hw_reg.395497150 Jun 25 06:48:48 PM PDT 24 Jun 25 06:49:07 PM PDT 24 19938308659 ps
T922 /workspace/coverage/default/20.spi_device_intercept.2245504125 Jun 25 06:49:28 PM PDT 24 Jun 25 06:49:36 PM PDT 24 380563892 ps
T923 /workspace/coverage/default/2.spi_device_flash_and_tpm_min_idle.2482428494 Jun 25 06:45:46 PM PDT 24 Jun 25 06:47:30 PM PDT 24 9913171705 ps
T924 /workspace/coverage/default/40.spi_device_flash_all.1276421784 Jun 25 06:52:32 PM PDT 24 Jun 25 06:55:09 PM PDT 24 111438879193 ps
T925 /workspace/coverage/default/1.spi_device_pass_cmd_filtering.2648267527 Jun 25 06:45:10 PM PDT 24 Jun 25 06:45:24 PM PDT 24 3459677351 ps
T926 /workspace/coverage/default/37.spi_device_cfg_cmd.4273904207 Jun 25 06:52:00 PM PDT 24 Jun 25 06:52:04 PM PDT 24 98866335 ps
T134 /workspace/coverage/default/33.spi_device_stress_all.2932681937 Jun 25 06:51:27 PM PDT 24 Jun 25 06:54:43 PM PDT 24 271270182599 ps
T927 /workspace/coverage/default/23.spi_device_alert_test.3477119277 Jun 25 06:50:04 PM PDT 24 Jun 25 06:50:06 PM PDT 24 12958770 ps
T928 /workspace/coverage/default/1.spi_device_stress_all.2851320219 Jun 25 06:45:20 PM PDT 24 Jun 25 06:45:22 PM PDT 24 33909332 ps
T929 /workspace/coverage/default/35.spi_device_stress_all.1483231548 Jun 25 06:51:46 PM PDT 24 Jun 25 06:55:58 PM PDT 24 10637509370 ps
T930 /workspace/coverage/default/10.spi_device_flash_mode.2889698327 Jun 25 06:47:37 PM PDT 24 Jun 25 06:47:45 PM PDT 24 801593465 ps
T931 /workspace/coverage/default/26.spi_device_upload.2640115269 Jun 25 06:50:20 PM PDT 24 Jun 25 06:50:25 PM PDT 24 868892817 ps
T932 /workspace/coverage/default/9.spi_device_tpm_rw.3996216424 Jun 25 06:47:21 PM PDT 24 Jun 25 06:47:29 PM PDT 24 247893415 ps
T933 /workspace/coverage/default/11.spi_device_intercept.3203616190 Jun 25 06:47:45 PM PDT 24 Jun 25 06:48:04 PM PDT 24 2124859899 ps
T934 /workspace/coverage/default/47.spi_device_csb_read.3539881632 Jun 25 06:53:18 PM PDT 24 Jun 25 06:53:20 PM PDT 24 27733244 ps
T935 /workspace/coverage/default/39.spi_device_tpm_rw.210363921 Jun 25 06:52:14 PM PDT 24 Jun 25 06:52:21 PM PDT 24 645916136 ps
T936 /workspace/coverage/default/17.spi_device_pass_cmd_filtering.3438841120 Jun 25 06:48:56 PM PDT 24 Jun 25 06:49:04 PM PDT 24 1523748877 ps
T937 /workspace/coverage/default/6.spi_device_mailbox.3632652517 Jun 25 06:46:40 PM PDT 24 Jun 25 06:47:29 PM PDT 24 5997886387 ps
T938 /workspace/coverage/default/3.spi_device_flash_mode.2134613614 Jun 25 06:45:51 PM PDT 24 Jun 25 06:46:11 PM PDT 24 1677269622 ps
T939 /workspace/coverage/default/41.spi_device_cfg_cmd.2174232086 Jun 25 06:52:30 PM PDT 24 Jun 25 06:52:34 PM PDT 24 212315230 ps
T940 /workspace/coverage/default/2.spi_device_tpm_read_hw_reg.1739471905 Jun 25 06:45:26 PM PDT 24 Jun 25 06:45:35 PM PDT 24 9676274519 ps
T941 /workspace/coverage/default/32.spi_device_tpm_sts_read.1814428144 Jun 25 06:51:06 PM PDT 24 Jun 25 06:51:09 PM PDT 24 426134836 ps
T942 /workspace/coverage/default/42.spi_device_mailbox.16531678 Jun 25 06:52:36 PM PDT 24 Jun 25 06:52:56 PM PDT 24 2895819130 ps
T943 /workspace/coverage/default/18.spi_device_flash_all.2612109228 Jun 25 06:49:15 PM PDT 24 Jun 25 06:49:31 PM PDT 24 2088646635 ps
T944 /workspace/coverage/default/10.spi_device_tpm_all.1025278939 Jun 25 06:47:31 PM PDT 24 Jun 25 06:48:09 PM PDT 24 24528780025 ps
T945 /workspace/coverage/default/24.spi_device_mailbox.409567201 Jun 25 06:50:03 PM PDT 24 Jun 25 06:50:25 PM PDT 24 15485057325 ps
T946 /workspace/coverage/default/42.spi_device_pass_cmd_filtering.3332570995 Jun 25 06:52:36 PM PDT 24 Jun 25 06:52:48 PM PDT 24 3561687273 ps
T947 /workspace/coverage/default/36.spi_device_read_buffer_direct.4251719729 Jun 25 06:51:53 PM PDT 24 Jun 25 06:51:58 PM PDT 24 258154285 ps
T948 /workspace/coverage/default/20.spi_device_csb_read.2253300596 Jun 25 06:49:26 PM PDT 24 Jun 25 06:49:29 PM PDT 24 15328150 ps
T949 /workspace/coverage/default/10.spi_device_alert_test.727964320 Jun 25 06:47:38 PM PDT 24 Jun 25 06:47:40 PM PDT 24 32371565 ps
T950 /workspace/coverage/default/35.spi_device_alert_test.62636136 Jun 25 06:51:47 PM PDT 24 Jun 25 06:51:49 PM PDT 24 19577397 ps
T951 /workspace/coverage/default/6.spi_device_mem_parity.3955220439 Jun 25 06:46:40 PM PDT 24 Jun 25 06:46:43 PM PDT 24 25584879 ps
T952 /workspace/coverage/default/0.spi_device_tpm_read_hw_reg.2108596685 Jun 25 06:44:32 PM PDT 24 Jun 25 06:44:39 PM PDT 24 1065303461 ps
T953 /workspace/coverage/default/11.spi_device_tpm_rw.4232383455 Jun 25 06:47:45 PM PDT 24 Jun 25 06:47:48 PM PDT 24 53223725 ps
T954 /workspace/coverage/default/16.spi_device_flash_all.2360576217 Jun 25 06:48:50 PM PDT 24 Jun 25 06:55:21 PM PDT 24 203889759828 ps
T955 /workspace/coverage/default/18.spi_device_tpm_all.1483283507 Jun 25 06:49:04 PM PDT 24 Jun 25 06:49:40 PM PDT 24 20873482944 ps
T956 /workspace/coverage/default/49.spi_device_upload.1979259092 Jun 25 06:53:31 PM PDT 24 Jun 25 06:53:49 PM PDT 24 3653755441 ps
T957 /workspace/coverage/default/8.spi_device_tpm_rw.556069905 Jun 25 06:47:07 PM PDT 24 Jun 25 06:47:15 PM PDT 24 956736457 ps
T958 /workspace/coverage/default/14.spi_device_pass_cmd_filtering.925507343 Jun 25 06:48:23 PM PDT 24 Jun 25 06:48:41 PM PDT 24 11577475905 ps
T326 /workspace/coverage/default/18.spi_device_flash_mode.31927882 Jun 25 06:49:16 PM PDT 24 Jun 25 06:49:27 PM PDT 24 223902987 ps
T959 /workspace/coverage/default/45.spi_device_tpm_all.3197510562 Jun 25 06:53:01 PM PDT 24 Jun 25 06:53:18 PM PDT 24 6639883249 ps
T960 /workspace/coverage/default/39.spi_device_tpm_all.411140466 Jun 25 06:52:14 PM PDT 24 Jun 25 06:52:17 PM PDT 24 603597335 ps
T961 /workspace/coverage/default/33.spi_device_cfg_cmd.1492323679 Jun 25 06:51:22 PM PDT 24 Jun 25 06:51:34 PM PDT 24 700133151 ps
T962 /workspace/coverage/default/10.spi_device_flash_and_tpm_min_idle.3481264686 Jun 25 06:47:38 PM PDT 24 Jun 25 06:55:45 PM PDT 24 185476163808 ps
T963 /workspace/coverage/default/49.spi_device_cfg_cmd.1705237503 Jun 25 06:53:31 PM PDT 24 Jun 25 06:53:34 PM PDT 24 34606521 ps
T964 /workspace/coverage/default/37.spi_device_read_buffer_direct.1308344114 Jun 25 06:51:59 PM PDT 24 Jun 25 06:52:14 PM PDT 24 858315173 ps
T965 /workspace/coverage/default/9.spi_device_flash_all.4067622073 Jun 25 06:47:22 PM PDT 24 Jun 25 06:47:25 PM PDT 24 73555371 ps
T966 /workspace/coverage/default/1.spi_device_flash_and_tpm_min_idle.2257355282 Jun 25 06:45:19 PM PDT 24 Jun 25 06:46:12 PM PDT 24 14046608405 ps
T62 /workspace/coverage/default/0.spi_device_sec_cm.690079712 Jun 25 06:44:53 PM PDT 24 Jun 25 06:44:55 PM PDT 24 117941215 ps
T967 /workspace/coverage/default/13.spi_device_tpm_sts_read.1604188409 Jun 25 06:48:08 PM PDT 24 Jun 25 06:48:10 PM PDT 24 195715752 ps
T968 /workspace/coverage/default/4.spi_device_pass_addr_payload_swap.3044852287 Jun 25 06:46:04 PM PDT 24 Jun 25 06:46:10 PM PDT 24 1171611836 ps
T969 /workspace/coverage/default/5.spi_device_mem_parity.3506391488 Jun 25 06:46:24 PM PDT 24 Jun 25 06:46:27 PM PDT 24 25601944 ps
T970 /workspace/coverage/default/35.spi_device_flash_all.2093487011 Jun 25 06:51:45 PM PDT 24 Jun 25 06:53:10 PM PDT 24 12498078132 ps
T971 /workspace/coverage/default/32.spi_device_tpm_all.3206069150 Jun 25 06:51:05 PM PDT 24 Jun 25 06:51:25 PM PDT 24 4448922430 ps
T972 /workspace/coverage/default/20.spi_device_mailbox.1745788432 Jun 25 06:49:28 PM PDT 24 Jun 25 06:49:57 PM PDT 24 20189862638 ps
T973 /workspace/coverage/default/15.spi_device_flash_all.3803312383 Jun 25 06:48:42 PM PDT 24 Jun 25 06:56:54 PM PDT 24 292952102972 ps
T974 /workspace/coverage/default/48.spi_device_cfg_cmd.2652100253 Jun 25 06:53:24 PM PDT 24 Jun 25 06:53:29 PM PDT 24 299979866 ps
T975 /workspace/coverage/default/25.spi_device_intercept.1514656352 Jun 25 06:50:13 PM PDT 24 Jun 25 06:50:20 PM PDT 24 1016756426 ps
T327 /workspace/coverage/default/39.spi_device_flash_mode.2778520255 Jun 25 06:52:16 PM PDT 24 Jun 25 06:52:24 PM PDT 24 407142969 ps
T976 /workspace/coverage/default/19.spi_device_flash_mode.1241847043 Jun 25 06:49:25 PM PDT 24 Jun 25 06:49:34 PM PDT 24 484948653 ps
T977 /workspace/coverage/default/13.spi_device_pass_addr_payload_swap.2361823617 Jun 25 06:48:29 PM PDT 24 Jun 25 06:48:48 PM PDT 24 4661635630 ps
T978 /workspace/coverage/default/17.spi_device_cfg_cmd.2420752850 Jun 25 06:48:56 PM PDT 24 Jun 25 06:49:02 PM PDT 24 906120421 ps
T979 /workspace/coverage/default/46.spi_device_tpm_rw.4105075135 Jun 25 06:53:09 PM PDT 24 Jun 25 06:53:10 PM PDT 24 71681993 ps
T980 /workspace/coverage/default/12.spi_device_mem_parity.3055020185 Jun 25 06:47:53 PM PDT 24 Jun 25 06:47:56 PM PDT 24 45618497 ps
T981 /workspace/coverage/default/0.spi_device_alert_test.714310102 Jun 25 06:44:54 PM PDT 24 Jun 25 06:44:56 PM PDT 24 173666085 ps
T982 /workspace/coverage/default/41.spi_device_flash_and_tpm_min_idle.412865996 Jun 25 06:52:38 PM PDT 24 Jun 25 06:53:27 PM PDT 24 60247433090 ps
T983 /workspace/coverage/default/14.spi_device_tpm_all.3634832713 Jun 25 06:48:16 PM PDT 24 Jun 25 06:48:33 PM PDT 24 2440013026 ps
T984 /workspace/coverage/default/49.spi_device_tpm_rw.84055891 Jun 25 06:53:32 PM PDT 24 Jun 25 06:53:35 PM PDT 24 233649201 ps
T985 /workspace/coverage/default/7.spi_device_pass_addr_payload_swap.2395033936 Jun 25 06:46:50 PM PDT 24 Jun 25 06:46:55 PM PDT 24 82071105 ps
T986 /workspace/coverage/default/37.spi_device_flash_and_tpm_min_idle.3391995035 Jun 25 06:51:59 PM PDT 24 Jun 25 06:52:52 PM PDT 24 5361041096 ps
T987 /workspace/coverage/default/4.spi_device_csb_read.3442914801 Jun 25 06:45:59 PM PDT 24 Jun 25 06:46:00 PM PDT 24 33467755 ps
T988 /workspace/coverage/default/20.spi_device_upload.2358440231 Jun 25 06:49:27 PM PDT 24 Jun 25 06:50:28 PM PDT 24 72194240298 ps
T989 /workspace/coverage/default/42.spi_device_flash_and_tpm.149791879 Jun 25 06:52:46 PM PDT 24 Jun 25 06:54:22 PM PDT 24 20699402269 ps
T990 /workspace/coverage/default/26.spi_device_flash_and_tpm_min_idle.295692455 Jun 25 06:50:28 PM PDT 24 Jun 25 06:55:03 PM PDT 24 28025970719 ps
T991 /workspace/coverage/default/23.spi_device_tpm_rw.1990372260 Jun 25 06:49:47 PM PDT 24 Jun 25 06:49:50 PM PDT 24 213295489 ps
T992 /workspace/coverage/default/36.spi_device_tpm_rw.2964599549 Jun 25 06:51:44 PM PDT 24 Jun 25 06:51:49 PM PDT 24 119588482 ps
T993 /workspace/coverage/default/15.spi_device_pass_cmd_filtering.1787323390 Jun 25 06:48:33 PM PDT 24 Jun 25 06:48:42 PM PDT 24 3446348572 ps
T135 /workspace/coverage/cover_reg_top/5.spi_device_same_csr_outstanding.523526938 Jun 25 06:30:13 PM PDT 24 Jun 25 06:30:18 PM PDT 24 44099927 ps
T994 /workspace/coverage/cover_reg_top/4.spi_device_mem_walk.3378920807 Jun 25 06:30:13 PM PDT 24 Jun 25 06:30:15 PM PDT 24 27755755 ps
T115 /workspace/coverage/cover_reg_top/7.spi_device_csr_rw.2570107856 Jun 25 06:30:39 PM PDT 24 Jun 25 06:30:42 PM PDT 24 151205735 ps
T86 /workspace/coverage/cover_reg_top/14.spi_device_tl_intg_err.3491370642 Jun 25 06:30:27 PM PDT 24 Jun 25 06:30:50 PM PDT 24 3250564107 ps
T995 /workspace/coverage/cover_reg_top/0.spi_device_mem_walk.3409134771 Jun 25 06:30:08 PM PDT 24 Jun 25 06:30:10 PM PDT 24 74783064 ps
T87 /workspace/coverage/cover_reg_top/9.spi_device_tl_intg_err.2373973247 Jun 25 06:30:23 PM PDT 24 Jun 25 06:30:38 PM PDT 24 328785463 ps
T136 /workspace/coverage/cover_reg_top/8.spi_device_same_csr_outstanding.1881744060 Jun 25 06:30:21 PM PDT 24 Jun 25 06:30:27 PM PDT 24 593887129 ps
T137 /workspace/coverage/cover_reg_top/11.spi_device_same_csr_outstanding.1305957864 Jun 25 06:30:29 PM PDT 24 Jun 25 06:30:33 PM PDT 24 155970550 ps
T116 /workspace/coverage/cover_reg_top/15.spi_device_csr_rw.1139843358 Jun 25 06:30:37 PM PDT 24 Jun 25 06:30:41 PM PDT 24 71168231 ps
T117 /workspace/coverage/cover_reg_top/19.spi_device_csr_rw.3939564397 Jun 25 06:30:46 PM PDT 24 Jun 25 06:30:49 PM PDT 24 21203744 ps
T118 /workspace/coverage/cover_reg_top/3.spi_device_csr_bit_bash.458440069 Jun 25 06:30:15 PM PDT 24 Jun 25 06:30:41 PM PDT 24 1607425657 ps
T119 /workspace/coverage/cover_reg_top/1.spi_device_csr_rw.1711033613 Jun 25 06:30:06 PM PDT 24 Jun 25 06:30:09 PM PDT 24 123560217 ps
T996 /workspace/coverage/cover_reg_top/31.spi_device_intr_test.1038851124 Jun 25 06:30:44 PM PDT 24 Jun 25 06:30:47 PM PDT 24 24038683 ps
T997 /workspace/coverage/cover_reg_top/41.spi_device_intr_test.2965115228 Jun 25 06:30:44 PM PDT 24 Jun 25 06:30:47 PM PDT 24 97455970 ps
T998 /workspace/coverage/cover_reg_top/24.spi_device_intr_test.2005686003 Jun 25 06:30:58 PM PDT 24 Jun 25 06:31:02 PM PDT 24 16192570 ps
T88 /workspace/coverage/cover_reg_top/19.spi_device_csr_mem_rw_with_rand_reset.2713219495 Jun 25 06:30:44 PM PDT 24 Jun 25 06:30:48 PM PDT 24 467123131 ps
T999 /workspace/coverage/cover_reg_top/0.spi_device_intr_test.1797408990 Jun 25 06:30:07 PM PDT 24 Jun 25 06:30:09 PM PDT 24 12602275 ps
T142 /workspace/coverage/cover_reg_top/7.spi_device_same_csr_outstanding.4221502910 Jun 25 06:30:20 PM PDT 24 Jun 25 06:30:24 PM PDT 24 275888980 ps
T120 /workspace/coverage/cover_reg_top/10.spi_device_csr_rw.2597363045 Jun 25 06:30:21 PM PDT 24 Jun 25 06:30:24 PM PDT 24 146140608 ps
T1000 /workspace/coverage/cover_reg_top/2.spi_device_intr_test.3158074108 Jun 25 06:30:06 PM PDT 24 Jun 25 06:30:08 PM PDT 24 14969868 ps
T121 /workspace/coverage/cover_reg_top/17.spi_device_csr_rw.529757851 Jun 25 06:30:38 PM PDT 24 Jun 25 06:30:43 PM PDT 24 183531684 ps
T1001 /workspace/coverage/cover_reg_top/28.spi_device_intr_test.2047475727 Jun 25 06:30:44 PM PDT 24 Jun 25 06:30:45 PM PDT 24 15483056 ps
T1002 /workspace/coverage/cover_reg_top/23.spi_device_intr_test.1882756589 Jun 25 06:30:58 PM PDT 24 Jun 25 06:31:02 PM PDT 24 59404763 ps
T71 /workspace/coverage/cover_reg_top/3.spi_device_csr_hw_reset.1364268560 Jun 25 06:30:15 PM PDT 24 Jun 25 06:30:19 PM PDT 24 25698985 ps
T1003 /workspace/coverage/cover_reg_top/9.spi_device_same_csr_outstanding.2851717570 Jun 25 06:30:20 PM PDT 24 Jun 25 06:30:25 PM PDT 24 63186019 ps
T143 /workspace/coverage/cover_reg_top/3.spi_device_same_csr_outstanding.1926870415 Jun 25 06:30:13 PM PDT 24 Jun 25 06:30:19 PM PDT 24 206876832 ps
T122 /workspace/coverage/cover_reg_top/12.spi_device_csr_rw.4192419067 Jun 25 06:30:28 PM PDT 24 Jun 25 06:30:30 PM PDT 24 47701103 ps
T1004 /workspace/coverage/cover_reg_top/6.spi_device_intr_test.2787206915 Jun 25 06:30:20 PM PDT 24 Jun 25 06:30:22 PM PDT 24 44920778 ps
T89 /workspace/coverage/cover_reg_top/0.spi_device_csr_mem_rw_with_rand_reset.1994023339 Jun 25 06:30:08 PM PDT 24 Jun 25 06:30:12 PM PDT 24 163843112 ps
T1005 /workspace/coverage/cover_reg_top/37.spi_device_intr_test.126911180 Jun 25 06:31:01 PM PDT 24 Jun 25 06:31:04 PM PDT 24 12384819 ps
T1006 /workspace/coverage/cover_reg_top/46.spi_device_intr_test.84005374 Jun 25 06:30:56 PM PDT 24 Jun 25 06:30:58 PM PDT 24 23651618 ps
T90 /workspace/coverage/cover_reg_top/5.spi_device_csr_mem_rw_with_rand_reset.254866290 Jun 25 06:30:15 PM PDT 24 Jun 25 06:30:21 PM PDT 24 59841804 ps
T123 /workspace/coverage/cover_reg_top/2.spi_device_csr_rw.4056126686 Jun 25 06:30:13 PM PDT 24 Jun 25 06:30:16 PM PDT 24 86851422 ps
T93 /workspace/coverage/cover_reg_top/8.spi_device_tl_errors.431337222 Jun 25 06:30:20 PM PDT 24 Jun 25 06:30:23 PM PDT 24 54673564 ps
T1007 /workspace/coverage/cover_reg_top/40.spi_device_intr_test.2398886191 Jun 25 06:30:45 PM PDT 24 Jun 25 06:30:47 PM PDT 24 13624691 ps
T1008 /workspace/coverage/cover_reg_top/25.spi_device_intr_test.2915505415 Jun 25 06:30:45 PM PDT 24 Jun 25 06:30:48 PM PDT 24 46688174 ps
T1009 /workspace/coverage/cover_reg_top/22.spi_device_intr_test.2720866843 Jun 25 06:31:01 PM PDT 24 Jun 25 06:31:04 PM PDT 24 58954661 ps
T94 /workspace/coverage/cover_reg_top/11.spi_device_csr_mem_rw_with_rand_reset.4205330979 Jun 25 06:30:29 PM PDT 24 Jun 25 06:30:32 PM PDT 24 91399352 ps
T1010 /workspace/coverage/cover_reg_top/1.spi_device_same_csr_outstanding.1482685552 Jun 25 06:30:10 PM PDT 24 Jun 25 06:30:16 PM PDT 24 170267784 ps
T1011 /workspace/coverage/cover_reg_top/1.spi_device_intr_test.3925800525 Jun 25 06:30:10 PM PDT 24 Jun 25 06:30:12 PM PDT 24 17306428 ps
T125 /workspace/coverage/cover_reg_top/9.spi_device_csr_rw.3015134384 Jun 25 06:30:33 PM PDT 24 Jun 25 06:30:37 PM PDT 24 92569972 ps
T1012 /workspace/coverage/cover_reg_top/1.spi_device_csr_aliasing.4167022663 Jun 25 06:30:09 PM PDT 24 Jun 25 06:30:19 PM PDT 24 312657333 ps
T114 /workspace/coverage/cover_reg_top/2.spi_device_csr_mem_rw_with_rand_reset.2338879994 Jun 25 06:30:15 PM PDT 24 Jun 25 06:30:19 PM PDT 24 52089560 ps
T1013 /workspace/coverage/cover_reg_top/4.spi_device_intr_test.3334663642 Jun 25 06:30:13 PM PDT 24 Jun 25 06:30:14 PM PDT 24 56503134 ps
T144 /workspace/coverage/cover_reg_top/17.spi_device_same_csr_outstanding.3422428817 Jun 25 06:30:36 PM PDT 24 Jun 25 06:30:41 PM PDT 24 1544546676 ps
T145 /workspace/coverage/cover_reg_top/14.spi_device_same_csr_outstanding.3657040333 Jun 25 06:30:31 PM PDT 24 Jun 25 06:30:35 PM PDT 24 1657968394 ps
T103 /workspace/coverage/cover_reg_top/12.spi_device_csr_mem_rw_with_rand_reset.4262534033 Jun 25 06:30:28 PM PDT 24 Jun 25 06:30:33 PM PDT 24 186704824 ps
T124 /workspace/coverage/cover_reg_top/1.spi_device_mem_partial_access.4071531232 Jun 25 06:30:06 PM PDT 24 Jun 25 06:30:09 PM PDT 24 194795236 ps
T1014 /workspace/coverage/cover_reg_top/14.spi_device_intr_test.2258447059 Jun 25 06:30:30 PM PDT 24 Jun 25 06:30:32 PM PDT 24 14056160 ps
T110 /workspace/coverage/cover_reg_top/16.spi_device_csr_mem_rw_with_rand_reset.1559229157 Jun 25 06:30:37 PM PDT 24 Jun 25 06:30:40 PM PDT 24 251101009 ps
T91 /workspace/coverage/cover_reg_top/7.spi_device_tl_intg_err.3953566230 Jun 25 06:30:20 PM PDT 24 Jun 25 06:30:35 PM PDT 24 440646725 ps
T126 /workspace/coverage/cover_reg_top/4.spi_device_csr_rw.1588655767 Jun 25 06:30:13 PM PDT 24 Jun 25 06:30:18 PM PDT 24 129011028 ps
T146 /workspace/coverage/cover_reg_top/4.spi_device_csr_aliasing.1106737728 Jun 25 06:30:15 PM PDT 24 Jun 25 06:30:25 PM PDT 24 390700367 ps
T1015 /workspace/coverage/cover_reg_top/21.spi_device_intr_test.189351664 Jun 25 06:30:45 PM PDT 24 Jun 25 06:30:48 PM PDT 24 17417865 ps
T127 /workspace/coverage/cover_reg_top/14.spi_device_csr_rw.474463735 Jun 25 06:30:28 PM PDT 24 Jun 25 06:30:31 PM PDT 24 66231742 ps
T92 /workspace/coverage/cover_reg_top/8.spi_device_tl_intg_err.1008736179 Jun 25 06:30:20 PM PDT 24 Jun 25 06:30:34 PM PDT 24 202166277 ps
T1016 /workspace/coverage/cover_reg_top/1.spi_device_mem_walk.4078638642 Jun 25 06:30:11 PM PDT 24 Jun 25 06:30:13 PM PDT 24 13334329 ps
T111 /workspace/coverage/cover_reg_top/7.spi_device_csr_mem_rw_with_rand_reset.4068808610 Jun 25 06:30:25 PM PDT 24 Jun 25 06:30:29 PM PDT 24 289256938 ps
T95 /workspace/coverage/cover_reg_top/17.spi_device_tl_errors.830149703 Jun 25 06:30:36 PM PDT 24 Jun 25 06:30:39 PM PDT 24 164394690 ps
T1017 /workspace/coverage/cover_reg_top/48.spi_device_intr_test.834748292 Jun 25 06:30:56 PM PDT 24 Jun 25 06:30:59 PM PDT 24 13872564 ps
T1018 /workspace/coverage/cover_reg_top/13.spi_device_csr_mem_rw_with_rand_reset.3850411633 Jun 25 06:30:40 PM PDT 24 Jun 25 06:30:43 PM PDT 24 164795079 ps
T1019 /workspace/coverage/cover_reg_top/10.spi_device_csr_mem_rw_with_rand_reset.3459067335 Jun 25 06:30:22 PM PDT 24 Jun 25 06:30:27 PM PDT 24 118901456 ps
T101 /workspace/coverage/cover_reg_top/13.spi_device_tl_errors.4109330811 Jun 25 06:30:34 PM PDT 24 Jun 25 06:30:39 PM PDT 24 144309252 ps
T1020 /workspace/coverage/cover_reg_top/3.spi_device_csr_rw.834340238 Jun 25 06:30:14 PM PDT 24 Jun 25 06:30:17 PM PDT 24 176975919 ps
T109 /workspace/coverage/cover_reg_top/4.spi_device_csr_mem_rw_with_rand_reset.1029729392 Jun 25 06:30:14 PM PDT 24 Jun 25 06:30:19 PM PDT 24 245341167 ps
T182 /workspace/coverage/cover_reg_top/6.spi_device_tl_intg_err.3735860133 Jun 25 06:30:21 PM PDT 24 Jun 25 06:30:41 PM PDT 24 575585342 ps
T96 /workspace/coverage/cover_reg_top/1.spi_device_tl_errors.61249980 Jun 25 06:30:05 PM PDT 24 Jun 25 06:30:11 PM PDT 24 67166976 ps
T1021 /workspace/coverage/cover_reg_top/2.spi_device_csr_bit_bash.4268163985 Jun 25 06:30:16 PM PDT 24 Jun 25 06:30:30 PM PDT 24 189695032 ps
T1022 /workspace/coverage/cover_reg_top/16.spi_device_intr_test.1775736875 Jun 25 06:30:38 PM PDT 24 Jun 25 06:30:41 PM PDT 24 24357517 ps
T1023 /workspace/coverage/cover_reg_top/0.spi_device_csr_bit_bash.3181618448 Jun 25 06:30:07 PM PDT 24 Jun 25 06:30:22 PM PDT 24 2538321347 ps
T106 /workspace/coverage/cover_reg_top/12.spi_device_tl_errors.3031586772 Jun 25 06:30:30 PM PDT 24 Jun 25 06:30:34 PM PDT 24 405944260 ps
T1024 /workspace/coverage/cover_reg_top/0.spi_device_csr_hw_reset.3034083425 Jun 25 06:30:08 PM PDT 24 Jun 25 06:30:11 PM PDT 24 52093944 ps
T177 /workspace/coverage/cover_reg_top/16.spi_device_tl_intg_err.2526898372 Jun 25 06:30:35 PM PDT 24 Jun 25 06:30:57 PM PDT 24 3332673988 ps
T1025 /workspace/coverage/cover_reg_top/10.spi_device_same_csr_outstanding.1024376902 Jun 25 06:30:21 PM PDT 24 Jun 25 06:30:25 PM PDT 24 42642073 ps
0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%