Unified Coverage Report :: Module :: spi_device_csr_assert_fpv

Module : spi_device_csr_assert_fpv

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_fpv_spi_device_csr_assert_0/spi_device_csr_assert_fpv.sv

Module self-instances :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
tb.dut.spi_device_csr_assert	100.00						100.00

---

Module Instance : tb.dut.spi_device_csr_assert

Instance :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Instance's subtree :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Parent :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	NAME
92.52	95.20	84.31	97.00		90.62	95.45	dut

Subtrees :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
no children

---

Since this is the module's only instance, the coverage report is the same as for the module.

Assert Coverage for Module : spi_device_csr_assert_fpv

	Total	Attempted	Percent	Succeeded/Matched	Percent
Assertions	58	58	100.00	58	100.00
Cover properties	0	0		0
Cover sequences	0	0		0
Total	58	58	100.00	58	100.00

---

Assertion Details

Name	Attempts	Real Successes	Failures	Incomplete
TlulOOBAddrErr_A	484990045	2871	0	0
addr_swap_data_rd_A	484990045	2521	0	0
addr_swap_mask_rd_A	484990045	2594	0	0
cfg_rd_A	484990045	2920	0	0
cmd_filter_0_rd_A	484990045	10245	0	0
cmd_filter_1_rd_A	484990045	8876	0	0
cmd_filter_2_rd_A	484990045	10853	0	0
cmd_filter_3_rd_A	484990045	9337	0	0
cmd_filter_4_rd_A	484990045	10540	0	0
cmd_filter_5_rd_A	484990045	9623	0	0
cmd_filter_6_rd_A	484990045	9289	0	0
cmd_filter_7_rd_A	484990045	9497	0	0
cmd_info_0_rd_A	484990045	5473	0	0
cmd_info_10_rd_A	484990045	5408	0	0
cmd_info_11_rd_A	484990045	5225	0	0
cmd_info_12_rd_A	484990045	5003	0	0
cmd_info_13_rd_A	484990045	5379	0	0
cmd_info_14_rd_A	484990045	5560	0	0
cmd_info_15_rd_A	484990045	5022	0	0
cmd_info_16_rd_A	484990045	5184	0	0
cmd_info_17_rd_A	484990045	5017	0	0
cmd_info_18_rd_A	484990045	4866	0	0
cmd_info_19_rd_A	484990045	5433	0	0
cmd_info_1_rd_A	484990045	5398	0	0
cmd_info_20_rd_A	484990045	5491	0	0
cmd_info_21_rd_A	484990045	5589	0	0
cmd_info_22_rd_A	484990045	5213	0	0
cmd_info_23_rd_A	484990045	5220	0	0
cmd_info_2_rd_A	484990045	5071	0	0
cmd_info_3_rd_A	484990045	5524	0	0
cmd_info_4_rd_A	484990045	5593	0	0
cmd_info_5_rd_A	484990045	5136	0	0
cmd_info_6_rd_A	484990045	5697	0	0
cmd_info_7_rd_A	484990045	5387	0	0
cmd_info_8_rd_A	484990045	5605	0	0
cmd_info_9_rd_A	484990045	4985	0	0
cmd_info_en4b_rd_A	484990045	2502	0	0
cmd_info_ex4b_rd_A	484990045	2682	0	0
cmd_info_wrdi_rd_A	484990045	2580	0	0
cmd_info_wren_rd_A	484990045	2651	0	0
intercept_en_rd_A	484990045	3343	0	0
intr_enable_rd_A	484990045	5002	0	0
jedec_cc_rd_A	484990045	2768	0	0
jedec_id_rd_A	484990045	2682	0	0
mailbox_addr_rd_A	484990045	2657	0	0
payload_swap_data_rd_A	484990045	2391	0	0
payload_swap_mask_rd_A	484990045	2559	0	0
read_threshold_rd_A	484990045	2512	0	0
tpm_access_0_rd_A	484990045	3268	0	0
tpm_access_1_rd_A	484990045	2418	0	0
tpm_cfg_rd_A	484990045	3575	0	0
tpm_did_vid_rd_A	484990045	2894	0	0
tpm_int_enable_rd_A	484990045	2645	0	0
tpm_int_status_rd_A	484990045	2392	0	0
tpm_int_vector_rd_A	484990045	2498	0	0
tpm_intf_capability_rd_A	484990045	2424	0	0
tpm_rid_rd_A	484990045	2709	0	0
tpm_sts_rd_A	484990045	2392	0	0

TlulOOBAddrErr_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	484990045	2871	0	0
T94	19481	245	0	0
T96	7545	75	0	0
T97	14087	274	0	0
T98	27745	3	0	0
T99	96688	2	0	0
T100	81910	4	0	0
T114	11134	13	0	0
T117	5666	12	0	0
T118	19349	2	0	0
T120	36865	1	0	0

addr_swap_data_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	484990045	2521	0	0
T99	96688	74	0	0
T108	8957	5	0	0
T120	36865	29	0	0
T125	10658	12	0	0
T127	10030	12	0	0
T161	8015	8	0	0
T162	9916	15	0	0
T163	14649	52	0	0
T164	12308	52	0	0
T165	17425	35	0	0

addr_swap_mask_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	484990045	2594	0	0
T99	96688	49	0	0
T108	8957	8	0	0
T120	36865	42	0	0
T125	10658	2	0	0
T127	10030	3	0	0
T161	8015	5	0	0
T162	9916	2	0	0
T163	14649	39	0	0
T164	12308	32	0	0
T165	17425	10	0	0

cfg_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	484990045	2920	0	0
T99	96688	108	0	0
T108	8957	9	0	0
T120	36865	50	0	0
T125	10658	3	0	0
T127	10030	29	0	0
T161	8015	12	0	0
T162	9916	23	0	0
T163	14649	35	0	0
T164	12308	44	0	0
T165	17425	58	0	0

cmd_filter_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	484990045	10245	0	0
T99	96688	919	0	0
T108	8957	13	0	0
T120	36865	598	0	0
T125	10658	91	0	0
T127	10030	264	0	0
T161	8015	254	0	0
T162	9916	11	0	0
T163	14649	23	0	0
T164	12308	45	0	0
T165	17425	30	0	0

cmd_filter_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	484990045	8876	0	0
T99	96688	1017	0	0
T108	8957	166	0	0
T113	6239	1	0	0
T120	36865	859	0	0
T125	10658	108	0	0
T127	10030	12	0	0
T161	8015	144	0	0
T162	9916	57	0	0
T163	14649	21	0	0
T164	12308	41	0	0

cmd_filter_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	484990045	10853	0	0
T99	96688	737	0	0
T108	8957	81	0	0
T120	36865	1026	0	0
T125	10658	248	0	0
T127	10030	140	0	0
T161	8015	7	0	0
T162	9916	81	0	0
T163	14649	55	0	0
T164	12308	84	0	0
T165	17425	72	0	0

cmd_filter_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	484990045	9337	0	0
T99	96688	1215	0	0
T108	8957	5	0	0
T120	36865	881	0	0
T125	10658	146	0	0
T127	10030	181	0	0
T161	8015	122	0	0
T162	9916	127	0	0
T163	14649	21	0	0
T164	12308	29	0	0
T165	17425	24	0	0

cmd_filter_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	484990045	10540	0	0
T99	96688	1013	0	0
T108	8957	58	0	0
T113	6239	6	0	0
T120	36865	794	0	0
T125	10658	38	0	0
T127	10030	245	0	0
T161	8015	260	0	0
T162	9916	127	0	0
T163	14649	63	0	0
T164	12308	93	0	0

cmd_filter_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	484990045	9623	0	0
T99	96688	1016	0	0
T108	8957	194	0	0
T120	36865	844	0	0
T125	10658	182	0	0
T127	10030	115	0	0
T161	8015	135	0	0
T162	9916	155	0	0
T163	14649	76	0	0
T164	12308	5	0	0
T165	17425	14	0	0

cmd_filter_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	484990045	9289	0	0
T99	96688	876	0	0
T108	8957	74	0	0
T120	36865	622	0	0
T125	10658	246	0	0
T127	10030	92	0	0
T161	8015	169	0	0
T162	9916	21	0	0
T163	14649	53	0	0
T164	12308	38	0	0
T165	17425	27	0	0

cmd_filter_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	484990045	9497	0	0
T99	96688	1116	0	0
T108	8957	15	0	0
T120	36865	536	0	0
T125	10658	111	0	0
T127	10030	225	0	0
T161	8015	6	0	0
T162	9916	155	0	0
T163	14649	45	0	0
T164	12308	11	0	0
T165	17425	34	0	0

cmd_info_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	484990045	5473	0	0
T99	96688	401	0	0
T108	8957	83	0	0
T120	36865	341	0	0
T125	10658	55	0	0
T127	10030	96	0	0
T161	8015	1	0	0
T162	9916	13	0	0
T163	14649	27	0	0
T164	12308	6	0	0
T165	17425	44	0	0

cmd_info_10_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	484990045	5408	0	0
T99	96688	605	0	0
T108	8957	41	0	0
T120	36865	305	0	0
T125	10658	47	0	0
T127	10030	7	0	0
T161	8015	17	0	0
T162	9916	11	0	0
T163	14649	35	0	0
T164	12308	27	0	0
T165	17425	56	0	0

cmd_info_11_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	484990045	5225	0	0
T99	96688	418	0	0
T108	8957	32	0	0
T120	36865	369	0	0
T125	10658	45	0	0
T127	10030	12	0	0
T161	8015	61	0	0
T162	9916	3	0	0
T163	14649	48	0	0
T164	12308	37	0	0
T165	17425	25	0	0

cmd_info_12_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	484990045	5003	0	0
T94	19481	4	0	0
T96	7545	6	0	0
T99	96688	475	0	0
T108	8957	6	0	0
T120	36865	309	0	0
T125	10658	42	0	0
T127	10030	113	0	0
T161	8015	14	0	0
T162	9916	28	0	0
T163	14649	24	0	0

cmd_info_13_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	484990045	5379	0	0
T94	19481	1	0	0
T99	96688	526	0	0
T108	8957	57	0	0
T120	36865	321	0	0
T125	10658	64	0	0
T127	10030	66	0	0
T161	8015	12	0	0
T162	9916	72	0	0
T163	14649	29	0	0
T164	12308	14	0	0

cmd_info_14_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	484990045	5560	0	0
T99	96688	456	0	0
T108	8957	13	0	0
T120	36865	274	0	0
T125	10658	61	0	0
T127	10030	80	0	0
T161	8015	107	0	0
T162	9916	18	0	0
T163	14649	37	0	0
T164	12308	78	0	0
T165	17425	26	0	0

cmd_info_15_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	484990045	5022	0	0
T99	96688	388	0	0
T108	8957	25	0	0
T120	36865	367	0	0
T125	10658	40	0	0
T127	10030	39	0	0
T161	8015	83	0	0
T162	9916	31	0	0
T163	14649	49	0	0
T164	12308	45	0	0
T165	17425	30	0	0

cmd_info_16_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	484990045	5184	0	0
T99	96688	530	0	0
T108	8957	50	0	0
T113	6239	4	0	0
T120	36865	162	0	0
T125	10658	44	0	0
T127	10030	13	0	0
T161	8015	9	0	0
T162	9916	26	0	0
T163	14649	33	0	0
T164	12308	41	0	0

cmd_info_17_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	484990045	5017	0	0
T99	96688	346	0	0
T108	8957	13	0	0
T120	36865	356	0	0
T125	10658	33	0	0
T127	10030	71	0	0
T161	8015	13	0	0
T162	9916	44	0	0
T163	14649	55	0	0
T164	12308	64	0	0
T165	17425	44	0	0

cmd_info_18_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	484990045	4866	0	0
T99	96688	351	0	0
T108	8957	8	0	0
T120	36865	373	0	0
T125	10658	42	0	0
T127	10030	170	0	0
T161	8015	6	0	0
T162	9916	22	0	0
T163	14649	28	0	0
T164	12308	39	0	0
T165	17425	24	0	0

cmd_info_19_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	484990045	5433	0	0
T99	96688	449	0	0
T108	8957	47	0	0
T120	36865	367	0	0
T125	10658	23	0	0
T127	10030	60	0	0
T161	8015	55	0	0
T162	9916	54	0	0
T163	14649	86	0	0
T164	12308	36	0	0
T165	17425	30	0	0

cmd_info_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	484990045	5398	0	0
T99	96688	677	0	0
T108	8957	5	0	0
T120	36865	165	0	0
T125	10658	60	0	0
T127	10030	144	0	0
T161	8015	114	0	0
T162	9916	68	0	0
T163	14649	46	0	0
T164	12308	8	0	0
T165	17425	63	0	0

cmd_info_20_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	484990045	5491	0	0
T99	96688	334	0	0
T108	8957	37	0	0
T120	36865	173	0	0
T125	10658	102	0	0
T127	10030	109	0	0
T161	8015	91	0	0
T162	9916	6	0	0
T163	14649	19	0	0
T164	12308	39	0	0
T165	17425	8	0	0

cmd_info_21_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	484990045	5589	0	0
T99	96688	297	0	0
T108	8957	32	0	0
T120	36865	320	0	0
T125	10658	55	0	0
T127	10030	62	0	0
T161	8015	58	0	0
T162	9916	29	0	0
T163	14649	47	0	0
T164	12308	44	0	0
T165	17425	40	0	0

cmd_info_22_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	484990045	5213	0	0
T99	96688	457	0	0
T108	8957	54	0	0
T120	36865	262	0	0
T125	10658	68	0	0
T127	10030	17	0	0
T161	8015	37	0	0
T162	9916	33	0	0
T163	14649	54	0	0
T164	12308	17	0	0
T165	17425	34	0	0

cmd_info_23_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	484990045	5220	0	0
T99	96688	484	0	0
T108	8957	5	0	0
T120	36865	287	0	0
T125	10658	50	0	0
T127	10030	152	0	0
T161	8015	8	0	0
T162	9916	75	0	0
T163	14649	65	0	0
T164	12308	51	0	0
T165	17425	35	0	0

cmd_info_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	484990045	5071	0	0
T99	96688	424	0	0
T108	8957	64	0	0
T120	36865	239	0	0
T125	10658	16	0	0
T127	10030	81	0	0
T161	8015	8	0	0
T162	9916	17	0	0
T163	14649	54	0	0
T164	12308	31	0	0
T165	17425	33	0	0

cmd_info_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	484990045	5524	0	0
T99	96688	388	0	0
T108	8957	10	0	0
T120	36865	293	0	0
T125	10658	72	0	0
T127	10030	132	0	0
T161	8015	53	0	0
T162	9916	93	0	0
T163	14649	82	0	0
T164	12308	90	0	0
T165	17425	56	0	0

cmd_info_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	484990045	5593	0	0
T99	96688	410	0	0
T108	8957	90	0	0
T120	36865	266	0	0
T125	10658	29	0	0
T127	10030	147	0	0
T161	8015	93	0	0
T162	9916	52	0	0
T163	14649	29	0	0
T164	12308	39	0	0
T165	17425	25	0	0

cmd_info_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	484990045	5136	0	0
T99	96688	560	0	0
T108	8957	39	0	0
T120	36865	165	0	0
T125	10658	28	0	0
T127	10030	51	0	0
T161	8015	53	0	0
T162	9916	25	0	0
T163	14649	66	0	0
T164	12308	27	0	0
T165	17425	37	0	0

cmd_info_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	484990045	5697	0	0
T99	96688	384	0	0
T108	8957	18	0	0
T120	36865	272	0	0
T125	10658	100	0	0
T127	10030	90	0	0
T161	8015	117	0	0
T162	9916	43	0	0
T163	14649	31	0	0
T164	12308	32	0	0
T165	17425	5	0	0

cmd_info_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	484990045	5387	0	0
T99	96688	388	0	0
T108	8957	7	0	0
T120	36865	312	0	0
T125	10658	96	0	0
T127	10030	97	0	0
T161	8015	55	0	0
T162	9916	29	0	0
T163	14649	34	0	0
T164	12308	25	0	0
T165	17425	27	0	0

cmd_info_8_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	484990045	5605	0	0
T99	96688	359	0	0
T108	8957	10	0	0
T120	36865	345	0	0
T125	10658	43	0	0
T127	10030	22	0	0
T161	8015	67	0	0
T162	9916	34	0	0
T163	14649	39	0	0
T164	12308	33	0	0
T165	17425	24	0	0

cmd_info_9_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	484990045	4985	0	0
T99	96688	379	0	0
T108	8957	19	0	0
T120	36865	284	0	0
T125	10658	25	0	0
T127	10030	62	0	0
T161	8015	64	0	0
T162	9916	37	0	0
T163	14649	41	0	0
T164	12308	60	0	0
T165	17425	53	0	0

cmd_info_en4b_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	484990045	2502	0	0
T99	96688	48	0	0
T108	8957	16	0	0
T120	36865	50	0	0
T125	10658	9	0	0
T127	10030	16	0	0
T161	8015	16	0	0
T162	9916	13	0	0
T163	14649	21	0	0
T164	12308	27	0	0
T165	17425	33	0	0

cmd_info_ex4b_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	484990045	2682	0	0
T99	96688	77	0	0
T108	8957	9	0	0
T120	36865	70	0	0
T125	10658	6	0	0
T127	10030	20	0	0
T161	8015	14	0	0
T162	9916	7	0	0
T163	14649	62	0	0
T164	12308	23	0	0
T165	17425	48	0	0

cmd_info_wrdi_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	484990045	2580	0	0
T99	96688	50	0	0
T101	17129	2	0	0
T108	8957	3	0	0
T120	36865	58	0	0
T125	10658	13	0	0
T127	10030	10	0	0
T161	8015	11	0	0
T162	9916	17	0	0
T163	14649	24	0	0
T164	12308	12	0	0

cmd_info_wren_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	484990045	2651	0	0
T99	96688	82	0	0
T108	8957	16	0	0
T120	36865	77	0	0
T125	10658	6	0	0
T127	10030	17	0	0
T161	8015	13	0	0
T162	9916	10	0	0
T163	14649	38	0	0
T164	12308	27	0	0
T165	17425	47	0	0

intercept_en_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	484990045	3343	0	0
T99	96688	193	0	0
T108	8957	1	0	0
T120	36865	63	0	0
T125	10658	18	0	0
T127	10030	14	0	0
T161	8015	17	0	0
T162	9916	15	0	0
T163	14649	10	0	0
T164	12308	56	0	0
T165	17425	23	0	0

intr_enable_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	484990045	5002	0	0
T9	306225	27	0	0
T10	5644	0	0	0
T11	2326	0	0	0
T12	390821	0	0	0
T13	199590	0	0	0
T14	46646	0	0	0
T15	5367	0	0	0
T16	3096	0	0	0
T18	0	61	0	0
T19	0	61	0	0
T20	0	35	0	0
T21	0	23	0	0
T22	0	11	0	0
T23	1700	0	0	0
T64	864	0	0	0
T141	0	29	0	0
T166	0	26	0	0
T167	0	25	0	0
T168	0	4	0	0

jedec_cc_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	484990045	2768	0	0
T99	96688	96	0	0
T108	8957	17	0	0
T120	36865	29	0	0
T125	10658	10	0	0
T127	10030	5	0	0
T161	8015	8	0	0
T162	9916	15	0	0
T163	14649	58	0	0
T164	12308	26	0	0
T165	17425	20	0	0

jedec_id_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	484990045	2682	0	0
T99	96688	112	0	0
T102	12360	7	0	0
T108	8957	16	0	0
T120	36865	64	0	0
T125	10658	11	0	0
T127	10030	10	0	0
T161	8015	15	0	0
T162	9916	14	0	0
T163	14649	87	0	0
T164	12308	38	0	0

mailbox_addr_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	484990045	2657	0	0
T94	19481	4	0	0
T99	96688	65	0	0
T108	8957	19	0	0
T120	36865	22	0	0
T125	10658	1	0	0
T127	10030	12	0	0
T161	8015	6	0	0
T162	9916	11	0	0
T163	14649	32	0	0
T164	12308	33	0	0

payload_swap_data_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	484990045	2391	0	0
T99	96688	33	0	0
T108	8957	4	0	0
T120	36865	49	0	0
T125	10658	3	0	0
T127	10030	10	0	0
T161	8015	3	0	0
T162	9916	1	0	0
T163	14649	27	0	0
T164	12308	51	0	0
T165	17425	15	0	0

payload_swap_mask_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	484990045	2559	0	0
T99	96688	64	0	0
T108	8957	9	0	0
T120	36865	37	0	0
T125	10658	6	0	0
T127	10030	11	0	0
T161	8015	4	0	0
T162	9916	13	0	0
T163	14649	51	0	0
T164	12308	67	0	0
T165	17425	38	0	0

read_threshold_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	484990045	2512	0	0
T99	96688	43	0	0
T108	8957	17	0	0
T120	36865	40	0	0
T125	10658	15	0	0
T127	10030	19	0	0
T161	8015	2	0	0
T162	9916	16	0	0
T163	14649	26	0	0
T164	12308	17	0	0
T165	17425	6	0	0

tpm_access_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	484990045	3268	0	0
T99	96688	150	0	0
T108	8957	16	0	0
T120	36865	100	0	0
T125	10658	27	0	0
T127	10030	17	0	0
T161	8015	18	0	0
T162	9916	12	0	0
T163	14649	66	0	0
T164	12308	36	0	0
T165	17425	57	0	0

tpm_access_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	484990045	2418	0	0
T99	96688	71	0	0
T108	8957	2	0	0
T120	36865	30	0	0
T125	10658	4	0	0
T127	10030	9	0	0
T161	8015	7	0	0
T163	14649	38	0	0
T164	12308	22	0	0
T165	17425	70	0	0
T169	14030	40	0	0

tpm_cfg_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	484990045	3575	0	0
T99	96688	132	0	0
T108	8957	23	0	0
T120	36865	121	0	0
T125	10658	20	0	0
T127	10030	20	0	0
T161	8015	11	0	0
T162	9916	29	0	0
T163	14649	42	0	0
T164	12308	46	0	0
T165	17425	55	0	0

tpm_did_vid_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	484990045	2894	0	0
T99	96688	88	0	0
T120	36865	68	0	0
T125	10658	5	0	0
T127	10030	10	0	0
T161	8015	8	0	0
T162	9916	14	0	0
T163	14649	51	0	0
T164	12308	50	0	0
T165	17425	35	0	0
T169	14030	51	0	0

tpm_int_enable_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	484990045	2645	0	0
T99	96688	53	0	0
T108	8957	6	0	0
T120	36865	31	0	0
T125	10658	6	0	0
T127	10030	11	0	0
T161	8015	6	0	0
T162	9916	13	0	0
T163	14649	55	0	0
T164	12308	106	0	0
T165	17425	46	0	0

tpm_int_status_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	484990045	2392	0	0
T99	96688	66	0	0
T120	36865	39	0	0
T125	10658	5	0	0
T127	10030	12	0	0
T161	8015	6	0	0
T162	9916	17	0	0
T163	14649	72	0	0
T164	12308	47	0	0
T165	17425	37	0	0
T169	14030	16	0	0

tpm_int_vector_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	484990045	2498	0	0
T99	96688	72	0	0
T108	8957	10	0	0
T120	36865	26	0	0
T125	10658	4	0	0
T127	10030	17	0	0
T161	8015	11	0	0
T162	9916	11	0	0
T163	14649	21	0	0
T164	12308	96	0	0
T165	17425	24	0	0

tpm_intf_capability_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	484990045	2424	0	0
T99	96688	49	0	0
T108	8957	13	0	0
T120	36865	40	0	0
T125	10658	5	0	0
T127	10030	9	0	0
T161	8015	11	0	0
T162	9916	13	0	0
T163	14649	57	0	0
T164	12308	17	0	0
T165	17425	15	0	0

tpm_rid_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	484990045	2709	0	0
T99	96688	73	0	0
T108	8957	5	0	0
T120	36865	43	0	0
T125	10658	7	0	0
T127	10030	8	0	0
T161	8015	8	0	0
T162	9916	11	0	0
T163	14649	30	0	0
T164	12308	78	0	0
T165	17425	29	0	0

tpm_sts_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	484990045	2392	0	0
T99	96688	84	0	0
T120	36865	30	0	0
T125	10658	6	0	0
T127	10030	12	0	0
T161	8015	5	0	0
T162	9916	4	0	0
T163	14649	30	0	0
T164	12308	22	0	0
T165	17425	39	0	0
T169	14030	73	0	0