Assert Coverage for Module :
spi_device_csr_assert_fpv
Assertion Details
TlulOOBAddrErr_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
505358314 |
3978 |
0 |
0 |
T95 |
8522 |
330 |
0 |
0 |
T96 |
6121 |
283 |
0 |
0 |
T98 |
63117 |
3 |
0 |
0 |
T99 |
5441 |
3 |
0 |
0 |
T100 |
68778 |
3 |
0 |
0 |
T101 |
19430 |
325 |
0 |
0 |
T107 |
65826 |
3 |
0 |
0 |
T108 |
26856 |
1 |
0 |
0 |
T109 |
81686 |
2 |
0 |
0 |
T110 |
62450 |
1 |
0 |
0 |
addr_swap_data_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
505358314 |
2377 |
0 |
0 |
T87 |
4459 |
4 |
0 |
0 |
T98 |
63117 |
61 |
0 |
0 |
T99 |
5441 |
6 |
0 |
0 |
T100 |
68778 |
79 |
0 |
0 |
T107 |
65826 |
85 |
0 |
0 |
T110 |
62450 |
55 |
0 |
0 |
T113 |
3108 |
10 |
0 |
0 |
T114 |
76933 |
547 |
0 |
0 |
T131 |
14168 |
31 |
0 |
0 |
T144 |
11240 |
23 |
0 |
0 |
addr_swap_mask_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
505358314 |
2493 |
0 |
0 |
T87 |
4459 |
3 |
0 |
0 |
T98 |
63117 |
102 |
0 |
0 |
T99 |
5441 |
14 |
0 |
0 |
T100 |
68778 |
101 |
0 |
0 |
T107 |
65826 |
62 |
0 |
0 |
T110 |
62450 |
51 |
0 |
0 |
T113 |
3108 |
2 |
0 |
0 |
T114 |
76933 |
554 |
0 |
0 |
T131 |
14168 |
22 |
0 |
0 |
T144 |
11240 |
22 |
0 |
0 |
cfg_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
505358314 |
3280 |
0 |
0 |
T87 |
4459 |
11 |
0 |
0 |
T98 |
63117 |
208 |
0 |
0 |
T99 |
5441 |
7 |
0 |
0 |
T100 |
68778 |
157 |
0 |
0 |
T107 |
65826 |
104 |
0 |
0 |
T110 |
62450 |
61 |
0 |
0 |
T113 |
3108 |
6 |
0 |
0 |
T114 |
76933 |
610 |
0 |
0 |
T131 |
14168 |
53 |
0 |
0 |
T144 |
11240 |
28 |
0 |
0 |
cmd_filter_0_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
505358314 |
10273 |
0 |
0 |
T87 |
4459 |
8 |
0 |
0 |
T98 |
63117 |
784 |
0 |
0 |
T99 |
5441 |
5 |
0 |
0 |
T100 |
68778 |
956 |
0 |
0 |
T107 |
65826 |
1298 |
0 |
0 |
T110 |
62450 |
362 |
0 |
0 |
T113 |
3108 |
6 |
0 |
0 |
T114 |
76933 |
563 |
0 |
0 |
T131 |
14168 |
23 |
0 |
0 |
T144 |
11240 |
5 |
0 |
0 |
cmd_filter_1_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
505358314 |
12604 |
0 |
0 |
T98 |
63117 |
1146 |
0 |
0 |
T99 |
5441 |
101 |
0 |
0 |
T100 |
68778 |
1430 |
0 |
0 |
T107 |
65826 |
969 |
0 |
0 |
T110 |
62450 |
688 |
0 |
0 |
T113 |
3108 |
9 |
0 |
0 |
T114 |
76933 |
532 |
0 |
0 |
T131 |
14168 |
20 |
0 |
0 |
T144 |
11240 |
25 |
0 |
0 |
T145 |
15978 |
26 |
0 |
0 |
cmd_filter_2_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
505358314 |
12263 |
0 |
0 |
T87 |
4459 |
10 |
0 |
0 |
T98 |
63117 |
1058 |
0 |
0 |
T99 |
5441 |
8 |
0 |
0 |
T100 |
68778 |
1321 |
0 |
0 |
T107 |
65826 |
1156 |
0 |
0 |
T110 |
62450 |
643 |
0 |
0 |
T113 |
3108 |
5 |
0 |
0 |
T114 |
76933 |
577 |
0 |
0 |
T131 |
14168 |
33 |
0 |
0 |
T144 |
11240 |
26 |
0 |
0 |
cmd_filter_3_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
505358314 |
13342 |
0 |
0 |
T87 |
4459 |
16 |
0 |
0 |
T98 |
63117 |
1335 |
0 |
0 |
T99 |
5441 |
143 |
0 |
0 |
T100 |
68778 |
1449 |
0 |
0 |
T107 |
65826 |
1095 |
0 |
0 |
T110 |
62450 |
998 |
0 |
0 |
T113 |
3108 |
5 |
0 |
0 |
T114 |
76933 |
598 |
0 |
0 |
T131 |
14168 |
22 |
0 |
0 |
T144 |
11240 |
7 |
0 |
0 |
cmd_filter_4_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
505358314 |
12636 |
0 |
0 |
T87 |
4459 |
6 |
0 |
0 |
T98 |
63117 |
1171 |
0 |
0 |
T99 |
5441 |
5 |
0 |
0 |
T100 |
68778 |
1785 |
0 |
0 |
T107 |
65826 |
1354 |
0 |
0 |
T110 |
62450 |
433 |
0 |
0 |
T113 |
3108 |
111 |
0 |
0 |
T114 |
76933 |
513 |
0 |
0 |
T131 |
14168 |
80 |
0 |
0 |
T144 |
11240 |
26 |
0 |
0 |
cmd_filter_5_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
505358314 |
12817 |
0 |
0 |
T87 |
4459 |
5 |
0 |
0 |
T98 |
63117 |
1160 |
0 |
0 |
T99 |
5441 |
9 |
0 |
0 |
T100 |
68778 |
1665 |
0 |
0 |
T107 |
65826 |
869 |
0 |
0 |
T110 |
62450 |
996 |
0 |
0 |
T113 |
3108 |
4 |
0 |
0 |
T114 |
76933 |
569 |
0 |
0 |
T131 |
14168 |
55 |
0 |
0 |
T144 |
11240 |
8 |
0 |
0 |
cmd_filter_6_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
505358314 |
11591 |
0 |
0 |
T87 |
4459 |
4 |
0 |
0 |
T98 |
63117 |
869 |
0 |
0 |
T99 |
5441 |
145 |
0 |
0 |
T100 |
68778 |
1817 |
0 |
0 |
T107 |
65826 |
1071 |
0 |
0 |
T110 |
62450 |
842 |
0 |
0 |
T113 |
3108 |
5 |
0 |
0 |
T114 |
76933 |
555 |
0 |
0 |
T131 |
14168 |
21 |
0 |
0 |
T144 |
11240 |
7 |
0 |
0 |
cmd_filter_7_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
505358314 |
11364 |
0 |
0 |
T87 |
4459 |
4 |
0 |
0 |
T98 |
63117 |
1197 |
0 |
0 |
T99 |
5441 |
127 |
0 |
0 |
T100 |
68778 |
1073 |
0 |
0 |
T107 |
65826 |
1146 |
0 |
0 |
T110 |
62450 |
720 |
0 |
0 |
T114 |
76933 |
606 |
0 |
0 |
T131 |
14168 |
25 |
0 |
0 |
T144 |
11240 |
43 |
0 |
0 |
T145 |
15978 |
27 |
0 |
0 |
cmd_info_0_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
505358314 |
6288 |
0 |
0 |
T87 |
4459 |
5 |
0 |
0 |
T98 |
63117 |
340 |
0 |
0 |
T99 |
5441 |
9 |
0 |
0 |
T100 |
68778 |
494 |
0 |
0 |
T107 |
65826 |
664 |
0 |
0 |
T110 |
62450 |
320 |
0 |
0 |
T113 |
3108 |
51 |
0 |
0 |
T114 |
76933 |
564 |
0 |
0 |
T131 |
14168 |
65 |
0 |
0 |
T144 |
11240 |
42 |
0 |
0 |
cmd_info_10_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
505358314 |
6066 |
0 |
0 |
T87 |
4459 |
7 |
0 |
0 |
T98 |
63117 |
341 |
0 |
0 |
T99 |
5441 |
17 |
0 |
0 |
T100 |
68778 |
544 |
0 |
0 |
T107 |
65826 |
495 |
0 |
0 |
T110 |
62450 |
283 |
0 |
0 |
T113 |
3108 |
2 |
0 |
0 |
T114 |
76933 |
537 |
0 |
0 |
T131 |
14168 |
41 |
0 |
0 |
T144 |
11240 |
11 |
0 |
0 |
cmd_info_11_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
505358314 |
6876 |
0 |
0 |
T87 |
4459 |
7 |
0 |
0 |
T98 |
63117 |
576 |
0 |
0 |
T99 |
5441 |
14 |
0 |
0 |
T100 |
68778 |
705 |
0 |
0 |
T107 |
65826 |
534 |
0 |
0 |
T110 |
62450 |
273 |
0 |
0 |
T113 |
3108 |
35 |
0 |
0 |
T114 |
76933 |
555 |
0 |
0 |
T131 |
14168 |
44 |
0 |
0 |
T144 |
11240 |
39 |
0 |
0 |
cmd_info_12_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
505358314 |
6363 |
0 |
0 |
T98 |
63117 |
516 |
0 |
0 |
T99 |
5441 |
33 |
0 |
0 |
T100 |
68778 |
602 |
0 |
0 |
T107 |
65826 |
407 |
0 |
0 |
T110 |
62450 |
307 |
0 |
0 |
T113 |
3108 |
68 |
0 |
0 |
T114 |
76933 |
509 |
0 |
0 |
T131 |
14168 |
25 |
0 |
0 |
T144 |
11240 |
12 |
0 |
0 |
T145 |
15978 |
28 |
0 |
0 |
cmd_info_13_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
505358314 |
6936 |
0 |
0 |
T87 |
4459 |
4 |
0 |
0 |
T98 |
63117 |
581 |
0 |
0 |
T99 |
5441 |
10 |
0 |
0 |
T100 |
68778 |
457 |
0 |
0 |
T107 |
65826 |
575 |
0 |
0 |
T110 |
62450 |
292 |
0 |
0 |
T113 |
3108 |
1 |
0 |
0 |
T114 |
76933 |
514 |
0 |
0 |
T131 |
14168 |
88 |
0 |
0 |
T144 |
11240 |
3 |
0 |
0 |
cmd_info_14_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
505358314 |
6147 |
0 |
0 |
T87 |
4459 |
1 |
0 |
0 |
T98 |
63117 |
485 |
0 |
0 |
T99 |
5441 |
6 |
0 |
0 |
T100 |
68778 |
532 |
0 |
0 |
T107 |
65826 |
533 |
0 |
0 |
T110 |
62450 |
302 |
0 |
0 |
T113 |
3108 |
50 |
0 |
0 |
T114 |
76933 |
500 |
0 |
0 |
T131 |
14168 |
30 |
0 |
0 |
T144 |
11240 |
51 |
0 |
0 |
cmd_info_15_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
505358314 |
6251 |
0 |
0 |
T87 |
4459 |
6 |
0 |
0 |
T98 |
63117 |
614 |
0 |
0 |
T99 |
5441 |
9 |
0 |
0 |
T100 |
68778 |
649 |
0 |
0 |
T107 |
65826 |
425 |
0 |
0 |
T110 |
62450 |
222 |
0 |
0 |
T113 |
3108 |
33 |
0 |
0 |
T114 |
76933 |
567 |
0 |
0 |
T131 |
14168 |
34 |
0 |
0 |
T144 |
11240 |
6 |
0 |
0 |
cmd_info_16_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
505358314 |
6340 |
0 |
0 |
T87 |
4459 |
4 |
0 |
0 |
T98 |
63117 |
368 |
0 |
0 |
T99 |
5441 |
9 |
0 |
0 |
T100 |
68778 |
600 |
0 |
0 |
T107 |
65826 |
401 |
0 |
0 |
T110 |
62450 |
289 |
0 |
0 |
T113 |
3108 |
3 |
0 |
0 |
T114 |
76933 |
510 |
0 |
0 |
T131 |
14168 |
55 |
0 |
0 |
T144 |
11240 |
7 |
0 |
0 |
cmd_info_17_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
505358314 |
5922 |
0 |
0 |
T87 |
4459 |
3 |
0 |
0 |
T98 |
63117 |
553 |
0 |
0 |
T99 |
5441 |
7 |
0 |
0 |
T100 |
68778 |
569 |
0 |
0 |
T107 |
65826 |
485 |
0 |
0 |
T110 |
62450 |
300 |
0 |
0 |
T113 |
3108 |
64 |
0 |
0 |
T114 |
76933 |
514 |
0 |
0 |
T131 |
14168 |
29 |
0 |
0 |
T144 |
11240 |
12 |
0 |
0 |
cmd_info_18_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
505358314 |
6030 |
0 |
0 |
T87 |
4459 |
5 |
0 |
0 |
T98 |
63117 |
576 |
0 |
0 |
T100 |
68778 |
613 |
0 |
0 |
T107 |
65826 |
353 |
0 |
0 |
T110 |
62450 |
280 |
0 |
0 |
T113 |
3108 |
3 |
0 |
0 |
T114 |
76933 |
545 |
0 |
0 |
T131 |
14168 |
34 |
0 |
0 |
T144 |
11240 |
44 |
0 |
0 |
T145 |
15978 |
18 |
0 |
0 |
cmd_info_19_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
505358314 |
5706 |
0 |
0 |
T87 |
4459 |
12 |
0 |
0 |
T98 |
63117 |
307 |
0 |
0 |
T99 |
5441 |
40 |
0 |
0 |
T100 |
68778 |
309 |
0 |
0 |
T107 |
65826 |
349 |
0 |
0 |
T110 |
62450 |
133 |
0 |
0 |
T113 |
3108 |
58 |
0 |
0 |
T114 |
76933 |
564 |
0 |
0 |
T131 |
14168 |
83 |
0 |
0 |
T144 |
11240 |
19 |
0 |
0 |
cmd_info_1_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
505358314 |
6138 |
0 |
0 |
T87 |
4459 |
3 |
0 |
0 |
T98 |
63117 |
541 |
0 |
0 |
T99 |
5441 |
72 |
0 |
0 |
T100 |
68778 |
477 |
0 |
0 |
T107 |
65826 |
427 |
0 |
0 |
T110 |
62450 |
383 |
0 |
0 |
T113 |
3108 |
2 |
0 |
0 |
T114 |
76933 |
551 |
0 |
0 |
T131 |
14168 |
60 |
0 |
0 |
T144 |
11240 |
23 |
0 |
0 |
cmd_info_20_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
505358314 |
6537 |
0 |
0 |
T98 |
63117 |
559 |
0 |
0 |
T99 |
5441 |
56 |
0 |
0 |
T100 |
68778 |
385 |
0 |
0 |
T107 |
65826 |
436 |
0 |
0 |
T110 |
62450 |
427 |
0 |
0 |
T113 |
3108 |
6 |
0 |
0 |
T114 |
76933 |
526 |
0 |
0 |
T131 |
14168 |
78 |
0 |
0 |
T144 |
11240 |
29 |
0 |
0 |
T145 |
15978 |
15 |
0 |
0 |
cmd_info_21_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
505358314 |
6412 |
0 |
0 |
T87 |
4459 |
3 |
0 |
0 |
T98 |
63117 |
483 |
0 |
0 |
T99 |
5441 |
5 |
0 |
0 |
T100 |
68778 |
600 |
0 |
0 |
T107 |
65826 |
518 |
0 |
0 |
T110 |
62450 |
323 |
0 |
0 |
T113 |
3108 |
48 |
0 |
0 |
T114 |
76933 |
582 |
0 |
0 |
T131 |
14168 |
24 |
0 |
0 |
T144 |
11240 |
8 |
0 |
0 |
cmd_info_22_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
505358314 |
6047 |
0 |
0 |
T98 |
63117 |
518 |
0 |
0 |
T99 |
5441 |
75 |
0 |
0 |
T100 |
68778 |
481 |
0 |
0 |
T107 |
65826 |
523 |
0 |
0 |
T110 |
62450 |
178 |
0 |
0 |
T113 |
3108 |
9 |
0 |
0 |
T114 |
76933 |
509 |
0 |
0 |
T131 |
14168 |
38 |
0 |
0 |
T144 |
11240 |
7 |
0 |
0 |
T145 |
15978 |
5 |
0 |
0 |
cmd_info_23_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
505358314 |
6748 |
0 |
0 |
T87 |
4459 |
9 |
0 |
0 |
T98 |
63117 |
716 |
0 |
0 |
T99 |
5441 |
5 |
0 |
0 |
T100 |
68778 |
580 |
0 |
0 |
T101 |
19430 |
9 |
0 |
0 |
T107 |
65826 |
452 |
0 |
0 |
T110 |
62450 |
542 |
0 |
0 |
T113 |
3108 |
49 |
0 |
0 |
T114 |
76933 |
475 |
0 |
0 |
T131 |
14168 |
46 |
0 |
0 |
cmd_info_2_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
505358314 |
5969 |
0 |
0 |
T98 |
63117 |
435 |
0 |
0 |
T99 |
5441 |
7 |
0 |
0 |
T100 |
68778 |
519 |
0 |
0 |
T107 |
65826 |
290 |
0 |
0 |
T110 |
62450 |
320 |
0 |
0 |
T113 |
3108 |
6 |
0 |
0 |
T114 |
76933 |
531 |
0 |
0 |
T131 |
14168 |
63 |
0 |
0 |
T144 |
11240 |
37 |
0 |
0 |
T145 |
15978 |
10 |
0 |
0 |
cmd_info_3_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
505358314 |
6148 |
0 |
0 |
T87 |
4459 |
4 |
0 |
0 |
T98 |
63117 |
469 |
0 |
0 |
T99 |
5441 |
9 |
0 |
0 |
T100 |
68778 |
582 |
0 |
0 |
T107 |
65826 |
511 |
0 |
0 |
T110 |
62450 |
292 |
0 |
0 |
T113 |
3108 |
1 |
0 |
0 |
T114 |
76933 |
559 |
0 |
0 |
T131 |
14168 |
33 |
0 |
0 |
T144 |
11240 |
14 |
0 |
0 |
cmd_info_4_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
505358314 |
6325 |
0 |
0 |
T87 |
4459 |
2 |
0 |
0 |
T98 |
63117 |
602 |
0 |
0 |
T99 |
5441 |
57 |
0 |
0 |
T100 |
68778 |
537 |
0 |
0 |
T107 |
65826 |
298 |
0 |
0 |
T110 |
62450 |
376 |
0 |
0 |
T113 |
3108 |
52 |
0 |
0 |
T114 |
76933 |
568 |
0 |
0 |
T131 |
14168 |
79 |
0 |
0 |
T144 |
11240 |
27 |
0 |
0 |
cmd_info_5_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
505358314 |
6230 |
0 |
0 |
T87 |
4459 |
13 |
0 |
0 |
T98 |
63117 |
503 |
0 |
0 |
T99 |
5441 |
62 |
0 |
0 |
T100 |
68778 |
602 |
0 |
0 |
T107 |
65826 |
612 |
0 |
0 |
T110 |
62450 |
313 |
0 |
0 |
T113 |
3108 |
2 |
0 |
0 |
T114 |
76933 |
581 |
0 |
0 |
T131 |
14168 |
51 |
0 |
0 |
T144 |
11240 |
13 |
0 |
0 |
cmd_info_6_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
505358314 |
6268 |
0 |
0 |
T87 |
4459 |
3 |
0 |
0 |
T98 |
63117 |
558 |
0 |
0 |
T99 |
5441 |
41 |
0 |
0 |
T100 |
68778 |
521 |
0 |
0 |
T107 |
65826 |
577 |
0 |
0 |
T110 |
62450 |
266 |
0 |
0 |
T113 |
3108 |
1 |
0 |
0 |
T114 |
76933 |
551 |
0 |
0 |
T131 |
14168 |
25 |
0 |
0 |
T144 |
11240 |
22 |
0 |
0 |
cmd_info_7_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
505358314 |
6497 |
0 |
0 |
T87 |
4459 |
4 |
0 |
0 |
T98 |
63117 |
513 |
0 |
0 |
T99 |
5441 |
53 |
0 |
0 |
T100 |
68778 |
736 |
0 |
0 |
T107 |
65826 |
612 |
0 |
0 |
T110 |
62450 |
335 |
0 |
0 |
T113 |
3108 |
6 |
0 |
0 |
T114 |
76933 |
518 |
0 |
0 |
T131 |
14168 |
28 |
0 |
0 |
T144 |
11240 |
14 |
0 |
0 |
cmd_info_8_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
505358314 |
6414 |
0 |
0 |
T98 |
63117 |
602 |
0 |
0 |
T99 |
5441 |
12 |
0 |
0 |
T100 |
68778 |
461 |
0 |
0 |
T107 |
65826 |
449 |
0 |
0 |
T110 |
62450 |
240 |
0 |
0 |
T113 |
3108 |
51 |
0 |
0 |
T114 |
76933 |
548 |
0 |
0 |
T131 |
14168 |
44 |
0 |
0 |
T144 |
11240 |
36 |
0 |
0 |
T145 |
15978 |
59 |
0 |
0 |
cmd_info_9_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
505358314 |
5866 |
0 |
0 |
T87 |
4459 |
9 |
0 |
0 |
T98 |
63117 |
602 |
0 |
0 |
T99 |
5441 |
6 |
0 |
0 |
T100 |
68778 |
348 |
0 |
0 |
T107 |
65826 |
374 |
0 |
0 |
T110 |
62450 |
337 |
0 |
0 |
T113 |
3108 |
49 |
0 |
0 |
T114 |
76933 |
532 |
0 |
0 |
T131 |
14168 |
59 |
0 |
0 |
T144 |
11240 |
12 |
0 |
0 |
cmd_info_en4b_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
505358314 |
2783 |
0 |
0 |
T87 |
4459 |
7 |
0 |
0 |
T98 |
63117 |
99 |
0 |
0 |
T99 |
5441 |
20 |
0 |
0 |
T100 |
68778 |
94 |
0 |
0 |
T107 |
65826 |
136 |
0 |
0 |
T110 |
62450 |
26 |
0 |
0 |
T113 |
3108 |
6 |
0 |
0 |
T114 |
76933 |
586 |
0 |
0 |
T131 |
14168 |
66 |
0 |
0 |
T144 |
11240 |
9 |
0 |
0 |
cmd_info_ex4b_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
505358314 |
2928 |
0 |
0 |
T87 |
4459 |
16 |
0 |
0 |
T98 |
63117 |
122 |
0 |
0 |
T99 |
5441 |
11 |
0 |
0 |
T100 |
68778 |
146 |
0 |
0 |
T107 |
65826 |
91 |
0 |
0 |
T110 |
62450 |
72 |
0 |
0 |
T113 |
3108 |
9 |
0 |
0 |
T114 |
76933 |
526 |
0 |
0 |
T131 |
14168 |
33 |
0 |
0 |
T144 |
11240 |
45 |
0 |
0 |
cmd_info_wrdi_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
505358314 |
2677 |
0 |
0 |
T87 |
4459 |
9 |
0 |
0 |
T98 |
63117 |
125 |
0 |
0 |
T99 |
5441 |
4 |
0 |
0 |
T100 |
68778 |
111 |
0 |
0 |
T107 |
65826 |
125 |
0 |
0 |
T110 |
62450 |
53 |
0 |
0 |
T113 |
3108 |
6 |
0 |
0 |
T114 |
76933 |
542 |
0 |
0 |
T131 |
14168 |
60 |
0 |
0 |
T144 |
11240 |
33 |
0 |
0 |
cmd_info_wren_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
505358314 |
2740 |
0 |
0 |
T87 |
4459 |
5 |
0 |
0 |
T98 |
63117 |
107 |
0 |
0 |
T99 |
5441 |
19 |
0 |
0 |
T100 |
68778 |
126 |
0 |
0 |
T107 |
65826 |
110 |
0 |
0 |
T110 |
62450 |
51 |
0 |
0 |
T113 |
3108 |
2 |
0 |
0 |
T114 |
76933 |
519 |
0 |
0 |
T131 |
14168 |
20 |
0 |
0 |
T144 |
11240 |
59 |
0 |
0 |
intercept_en_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
505358314 |
3444 |
0 |
0 |
T87 |
4459 |
9 |
0 |
0 |
T98 |
63117 |
176 |
0 |
0 |
T99 |
5441 |
1 |
0 |
0 |
T100 |
68778 |
169 |
0 |
0 |
T101 |
19430 |
6 |
0 |
0 |
T110 |
62450 |
109 |
0 |
0 |
T113 |
3108 |
17 |
0 |
0 |
T114 |
76933 |
529 |
0 |
0 |
T131 |
14168 |
47 |
0 |
0 |
T144 |
11240 |
18 |
0 |
0 |
intr_enable_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
505358314 |
5265 |
0 |
0 |
T15 |
6338 |
47 |
0 |
0 |
T17 |
0 |
13 |
0 |
0 |
T28 |
608500 |
0 |
0 |
0 |
T29 |
193450 |
0 |
0 |
0 |
T30 |
4135 |
0 |
0 |
0 |
T31 |
352790 |
0 |
0 |
0 |
T32 |
127081 |
0 |
0 |
0 |
T40 |
673750 |
0 |
0 |
0 |
T41 |
236458 |
0 |
0 |
0 |
T45 |
141536 |
0 |
0 |
0 |
T52 |
0 |
6 |
0 |
0 |
T141 |
1120 |
0 |
0 |
0 |
T146 |
0 |
19 |
0 |
0 |
T147 |
0 |
5 |
0 |
0 |
T148 |
0 |
12 |
0 |
0 |
T149 |
0 |
21 |
0 |
0 |
T150 |
0 |
47 |
0 |
0 |
T151 |
0 |
11 |
0 |
0 |
T152 |
0 |
12 |
0 |
0 |
jedec_cc_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
505358314 |
2778 |
0 |
0 |
T87 |
4459 |
4 |
0 |
0 |
T98 |
63117 |
109 |
0 |
0 |
T99 |
5441 |
15 |
0 |
0 |
T100 |
68778 |
125 |
0 |
0 |
T107 |
65826 |
105 |
0 |
0 |
T110 |
62450 |
54 |
0 |
0 |
T113 |
3108 |
7 |
0 |
0 |
T114 |
76933 |
547 |
0 |
0 |
T131 |
14168 |
63 |
0 |
0 |
T144 |
11240 |
29 |
0 |
0 |
jedec_id_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
505358314 |
2709 |
0 |
0 |
T87 |
4459 |
5 |
0 |
0 |
T98 |
63117 |
93 |
0 |
0 |
T99 |
5441 |
11 |
0 |
0 |
T100 |
68778 |
116 |
0 |
0 |
T107 |
65826 |
112 |
0 |
0 |
T110 |
62450 |
46 |
0 |
0 |
T114 |
76933 |
483 |
0 |
0 |
T131 |
14168 |
38 |
0 |
0 |
T144 |
11240 |
29 |
0 |
0 |
T145 |
15978 |
15 |
0 |
0 |
mailbox_addr_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
505358314 |
2566 |
0 |
0 |
T87 |
4459 |
13 |
0 |
0 |
T98 |
63117 |
68 |
0 |
0 |
T99 |
5441 |
5 |
0 |
0 |
T100 |
68778 |
86 |
0 |
0 |
T107 |
65826 |
84 |
0 |
0 |
T110 |
62450 |
26 |
0 |
0 |
T114 |
76933 |
550 |
0 |
0 |
T131 |
14168 |
47 |
0 |
0 |
T144 |
11240 |
69 |
0 |
0 |
T145 |
15978 |
22 |
0 |
0 |
payload_swap_data_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
505358314 |
2501 |
0 |
0 |
T87 |
4459 |
10 |
0 |
0 |
T98 |
63117 |
92 |
0 |
0 |
T99 |
5441 |
5 |
0 |
0 |
T100 |
68778 |
61 |
0 |
0 |
T107 |
65826 |
61 |
0 |
0 |
T110 |
62450 |
33 |
0 |
0 |
T113 |
3108 |
7 |
0 |
0 |
T114 |
76933 |
510 |
0 |
0 |
T131 |
14168 |
74 |
0 |
0 |
T144 |
11240 |
26 |
0 |
0 |
payload_swap_mask_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
505358314 |
2464 |
0 |
0 |
T98 |
63117 |
75 |
0 |
0 |
T99 |
5441 |
7 |
0 |
0 |
T100 |
68778 |
79 |
0 |
0 |
T107 |
65826 |
67 |
0 |
0 |
T110 |
62450 |
39 |
0 |
0 |
T113 |
3108 |
4 |
0 |
0 |
T114 |
76933 |
568 |
0 |
0 |
T131 |
14168 |
39 |
0 |
0 |
T144 |
11240 |
19 |
0 |
0 |
T145 |
15978 |
46 |
0 |
0 |
read_threshold_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
505358314 |
2470 |
0 |
0 |
T87 |
4459 |
5 |
0 |
0 |
T98 |
63117 |
83 |
0 |
0 |
T99 |
5441 |
5 |
0 |
0 |
T100 |
68778 |
64 |
0 |
0 |
T107 |
65826 |
70 |
0 |
0 |
T110 |
62450 |
60 |
0 |
0 |
T113 |
3108 |
6 |
0 |
0 |
T114 |
76933 |
520 |
0 |
0 |
T131 |
14168 |
16 |
0 |
0 |
T144 |
11240 |
33 |
0 |
0 |
tpm_access_0_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
505358314 |
3442 |
0 |
0 |
T98 |
63117 |
215 |
0 |
0 |
T99 |
5441 |
17 |
0 |
0 |
T100 |
68778 |
232 |
0 |
0 |
T107 |
65826 |
145 |
0 |
0 |
T110 |
62450 |
64 |
0 |
0 |
T113 |
3108 |
21 |
0 |
0 |
T114 |
76933 |
532 |
0 |
0 |
T131 |
14168 |
56 |
0 |
0 |
T144 |
11240 |
16 |
0 |
0 |
T145 |
15978 |
62 |
0 |
0 |
tpm_access_1_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
505358314 |
2460 |
0 |
0 |
T87 |
4459 |
8 |
0 |
0 |
T98 |
63117 |
83 |
0 |
0 |
T99 |
5441 |
2 |
0 |
0 |
T100 |
68778 |
90 |
0 |
0 |
T107 |
65826 |
58 |
0 |
0 |
T110 |
62450 |
13 |
0 |
0 |
T113 |
3108 |
5 |
0 |
0 |
T114 |
76933 |
537 |
0 |
0 |
T131 |
14168 |
97 |
0 |
0 |
T144 |
11240 |
30 |
0 |
0 |
tpm_cfg_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
505358314 |
3731 |
0 |
0 |
T87 |
4459 |
7 |
0 |
0 |
T98 |
63117 |
233 |
0 |
0 |
T99 |
5441 |
25 |
0 |
0 |
T100 |
68778 |
249 |
0 |
0 |
T107 |
65826 |
209 |
0 |
0 |
T110 |
62450 |
135 |
0 |
0 |
T113 |
3108 |
14 |
0 |
0 |
T114 |
76933 |
548 |
0 |
0 |
T131 |
14168 |
26 |
0 |
0 |
T144 |
11240 |
5 |
0 |
0 |
tpm_did_vid_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
505358314 |
2732 |
0 |
0 |
T87 |
4459 |
2 |
0 |
0 |
T98 |
63117 |
101 |
0 |
0 |
T99 |
5441 |
3 |
0 |
0 |
T100 |
68778 |
99 |
0 |
0 |
T107 |
65826 |
131 |
0 |
0 |
T110 |
62450 |
52 |
0 |
0 |
T113 |
3108 |
6 |
0 |
0 |
T114 |
76933 |
508 |
0 |
0 |
T131 |
14168 |
13 |
0 |
0 |
T144 |
11240 |
18 |
0 |
0 |
tpm_int_enable_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
505358314 |
2277 |
0 |
0 |
T87 |
4459 |
1 |
0 |
0 |
T98 |
63117 |
81 |
0 |
0 |
T99 |
5441 |
10 |
0 |
0 |
T100 |
68778 |
81 |
0 |
0 |
T107 |
65826 |
69 |
0 |
0 |
T110 |
62450 |
48 |
0 |
0 |
T113 |
3108 |
5 |
0 |
0 |
T114 |
76933 |
495 |
0 |
0 |
T131 |
14168 |
35 |
0 |
0 |
T144 |
11240 |
11 |
0 |
0 |
tpm_int_status_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
505358314 |
2462 |
0 |
0 |
T87 |
4459 |
4 |
0 |
0 |
T98 |
63117 |
87 |
0 |
0 |
T99 |
5441 |
9 |
0 |
0 |
T100 |
68778 |
93 |
0 |
0 |
T107 |
65826 |
45 |
0 |
0 |
T110 |
62450 |
70 |
0 |
0 |
T113 |
3108 |
6 |
0 |
0 |
T114 |
76933 |
509 |
0 |
0 |
T131 |
14168 |
21 |
0 |
0 |
T144 |
11240 |
18 |
0 |
0 |
tpm_int_vector_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
505358314 |
2653 |
0 |
0 |
T87 |
4459 |
4 |
0 |
0 |
T98 |
63117 |
98 |
0 |
0 |
T99 |
5441 |
7 |
0 |
0 |
T100 |
68778 |
112 |
0 |
0 |
T107 |
65826 |
87 |
0 |
0 |
T110 |
62450 |
31 |
0 |
0 |
T114 |
76933 |
559 |
0 |
0 |
T131 |
14168 |
39 |
0 |
0 |
T144 |
11240 |
31 |
0 |
0 |
T145 |
15978 |
48 |
0 |
0 |
tpm_intf_capability_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
505358314 |
2553 |
0 |
0 |
T87 |
4459 |
9 |
0 |
0 |
T98 |
63117 |
59 |
0 |
0 |
T99 |
5441 |
3 |
0 |
0 |
T100 |
68778 |
81 |
0 |
0 |
T101 |
19430 |
9 |
0 |
0 |
T110 |
62450 |
37 |
0 |
0 |
T113 |
3108 |
4 |
0 |
0 |
T114 |
76933 |
593 |
0 |
0 |
T131 |
14168 |
38 |
0 |
0 |
T144 |
11240 |
14 |
0 |
0 |
tpm_rid_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
505358314 |
2305 |
0 |
0 |
T98 |
63117 |
89 |
0 |
0 |
T99 |
5441 |
3 |
0 |
0 |
T100 |
68778 |
93 |
0 |
0 |
T107 |
65826 |
82 |
0 |
0 |
T110 |
62450 |
33 |
0 |
0 |
T113 |
3108 |
1 |
0 |
0 |
T114 |
76933 |
507 |
0 |
0 |
T131 |
14168 |
47 |
0 |
0 |
T144 |
11240 |
11 |
0 |
0 |
T145 |
15978 |
38 |
0 |
0 |
tpm_sts_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
505358314 |
2596 |
0 |
0 |
T87 |
4459 |
6 |
0 |
0 |
T98 |
63117 |
100 |
0 |
0 |
T99 |
5441 |
3 |
0 |
0 |
T100 |
68778 |
85 |
0 |
0 |
T107 |
65826 |
75 |
0 |
0 |
T110 |
62450 |
32 |
0 |
0 |
T114 |
76933 |
561 |
0 |
0 |
T131 |
14168 |
57 |
0 |
0 |
T144 |
11240 |
23 |
0 |
0 |
T145 |
15978 |
28 |
0 |
0 |