Assert Coverage for Module :
spi_device_csr_assert_fpv
Assertion Details
TlulOOBAddrErr_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
502805815 |
3782 |
0 |
0 |
T98 |
21389 |
440 |
0 |
0 |
T99 |
3614 |
4 |
0 |
0 |
T100 |
5566 |
2 |
0 |
0 |
T101 |
10616 |
1 |
0 |
0 |
T102 |
29010 |
3 |
0 |
0 |
T104 |
4022 |
44 |
0 |
0 |
T105 |
16457 |
287 |
0 |
0 |
T106 |
16598 |
252 |
0 |
0 |
T113 |
5150 |
61 |
0 |
0 |
T114 |
12330 |
9 |
0 |
0 |
addr_swap_data_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
502805815 |
730 |
0 |
0 |
T100 |
5566 |
10 |
0 |
0 |
T112 |
9096 |
15 |
0 |
0 |
T118 |
10807 |
3 |
0 |
0 |
T125 |
13651 |
14 |
0 |
0 |
T154 |
31620 |
37 |
0 |
0 |
T155 |
16353 |
18 |
0 |
0 |
T156 |
20661 |
30 |
0 |
0 |
T157 |
5711 |
12 |
0 |
0 |
T158 |
34659 |
41 |
0 |
0 |
T159 |
37190 |
101 |
0 |
0 |
addr_swap_mask_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
502805815 |
808 |
0 |
0 |
T100 |
5566 |
2 |
0 |
0 |
T112 |
9096 |
17 |
0 |
0 |
T118 |
10807 |
11 |
0 |
0 |
T125 |
13651 |
14 |
0 |
0 |
T154 |
31620 |
47 |
0 |
0 |
T155 |
16353 |
19 |
0 |
0 |
T156 |
20661 |
62 |
0 |
0 |
T157 |
5711 |
14 |
0 |
0 |
T158 |
34659 |
31 |
0 |
0 |
T159 |
37190 |
138 |
0 |
0 |
cfg_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
502805815 |
922 |
0 |
0 |
T100 |
5566 |
3 |
0 |
0 |
T112 |
9096 |
37 |
0 |
0 |
T118 |
10807 |
23 |
0 |
0 |
T125 |
13651 |
13 |
0 |
0 |
T154 |
31620 |
72 |
0 |
0 |
T155 |
16353 |
44 |
0 |
0 |
T156 |
20661 |
24 |
0 |
0 |
T157 |
5711 |
10 |
0 |
0 |
T158 |
34659 |
49 |
0 |
0 |
T159 |
37190 |
119 |
0 |
0 |
cmd_filter_0_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
502805815 |
4088 |
0 |
0 |
T100 |
5566 |
7 |
0 |
0 |
T112 |
9096 |
18 |
0 |
0 |
T118 |
10807 |
170 |
0 |
0 |
T125 |
13651 |
252 |
0 |
0 |
T154 |
31620 |
806 |
0 |
0 |
T155 |
16353 |
134 |
0 |
0 |
T156 |
20661 |
48 |
0 |
0 |
T157 |
5711 |
6 |
0 |
0 |
T158 |
34659 |
899 |
0 |
0 |
T159 |
37190 |
137 |
0 |
0 |
cmd_filter_1_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
502805815 |
4163 |
0 |
0 |
T100 |
5566 |
129 |
0 |
0 |
T112 |
9096 |
106 |
0 |
0 |
T118 |
10807 |
165 |
0 |
0 |
T125 |
13651 |
164 |
0 |
0 |
T154 |
31620 |
910 |
0 |
0 |
T155 |
16353 |
262 |
0 |
0 |
T156 |
20661 |
48 |
0 |
0 |
T157 |
5711 |
154 |
0 |
0 |
T158 |
34659 |
935 |
0 |
0 |
T159 |
37190 |
125 |
0 |
0 |
cmd_filter_2_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
502805815 |
3760 |
0 |
0 |
T100 |
5566 |
139 |
0 |
0 |
T112 |
9096 |
146 |
0 |
0 |
T118 |
10807 |
125 |
0 |
0 |
T125 |
13651 |
282 |
0 |
0 |
T154 |
31620 |
623 |
0 |
0 |
T155 |
16353 |
101 |
0 |
0 |
T156 |
20661 |
55 |
0 |
0 |
T157 |
5711 |
137 |
0 |
0 |
T158 |
34659 |
601 |
0 |
0 |
T159 |
37190 |
119 |
0 |
0 |
cmd_filter_3_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
502805815 |
3284 |
0 |
0 |
T100 |
5566 |
8 |
0 |
0 |
T112 |
9096 |
23 |
0 |
0 |
T118 |
10807 |
94 |
0 |
0 |
T125 |
13651 |
349 |
0 |
0 |
T154 |
31620 |
394 |
0 |
0 |
T155 |
16353 |
139 |
0 |
0 |
T156 |
20661 |
82 |
0 |
0 |
T157 |
5711 |
157 |
0 |
0 |
T158 |
34659 |
400 |
0 |
0 |
T159 |
37190 |
127 |
0 |
0 |
cmd_filter_4_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
502805815 |
4258 |
0 |
0 |
T100 |
5566 |
154 |
0 |
0 |
T112 |
9096 |
163 |
0 |
0 |
T118 |
10807 |
128 |
0 |
0 |
T125 |
13651 |
413 |
0 |
0 |
T154 |
31620 |
508 |
0 |
0 |
T155 |
16353 |
291 |
0 |
0 |
T156 |
20661 |
52 |
0 |
0 |
T157 |
5711 |
4 |
0 |
0 |
T158 |
34659 |
1069 |
0 |
0 |
T159 |
37190 |
128 |
0 |
0 |
cmd_filter_5_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
502805815 |
3150 |
0 |
0 |
T100 |
5566 |
11 |
0 |
0 |
T112 |
9096 |
10 |
0 |
0 |
T118 |
10807 |
141 |
0 |
0 |
T125 |
13651 |
235 |
0 |
0 |
T154 |
31620 |
340 |
0 |
0 |
T155 |
16353 |
293 |
0 |
0 |
T156 |
20661 |
37 |
0 |
0 |
T157 |
5711 |
139 |
0 |
0 |
T158 |
34659 |
677 |
0 |
0 |
T159 |
37190 |
104 |
0 |
0 |
cmd_filter_6_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
502805815 |
3286 |
0 |
0 |
T100 |
5566 |
102 |
0 |
0 |
T112 |
9096 |
148 |
0 |
0 |
T118 |
10807 |
128 |
0 |
0 |
T125 |
13651 |
368 |
0 |
0 |
T154 |
31620 |
378 |
0 |
0 |
T155 |
16353 |
272 |
0 |
0 |
T156 |
20661 |
52 |
0 |
0 |
T157 |
5711 |
1 |
0 |
0 |
T158 |
34659 |
560 |
0 |
0 |
T159 |
37190 |
129 |
0 |
0 |
cmd_filter_7_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
502805815 |
3888 |
0 |
0 |
T100 |
5566 |
3 |
0 |
0 |
T112 |
9096 |
157 |
0 |
0 |
T118 |
10807 |
205 |
0 |
0 |
T125 |
13651 |
368 |
0 |
0 |
T154 |
31620 |
386 |
0 |
0 |
T155 |
16353 |
383 |
0 |
0 |
T156 |
20661 |
65 |
0 |
0 |
T157 |
5711 |
9 |
0 |
0 |
T158 |
34659 |
608 |
0 |
0 |
T160 |
11981 |
6 |
0 |
0 |
cmd_info_0_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
502805815 |
1901 |
0 |
0 |
T100 |
5566 |
64 |
0 |
0 |
T112 |
9096 |
61 |
0 |
0 |
T118 |
10807 |
33 |
0 |
0 |
T125 |
13651 |
135 |
0 |
0 |
T154 |
31620 |
276 |
0 |
0 |
T155 |
16353 |
165 |
0 |
0 |
T156 |
20661 |
76 |
0 |
0 |
T157 |
5711 |
63 |
0 |
0 |
T158 |
34659 |
246 |
0 |
0 |
T159 |
37190 |
106 |
0 |
0 |
cmd_info_10_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
502805815 |
2201 |
0 |
0 |
T100 |
5566 |
3 |
0 |
0 |
T112 |
9096 |
71 |
0 |
0 |
T118 |
10807 |
63 |
0 |
0 |
T125 |
13651 |
55 |
0 |
0 |
T154 |
31620 |
368 |
0 |
0 |
T155 |
16353 |
111 |
0 |
0 |
T156 |
20661 |
59 |
0 |
0 |
T157 |
5711 |
69 |
0 |
0 |
T158 |
34659 |
411 |
0 |
0 |
T159 |
37190 |
110 |
0 |
0 |
cmd_info_11_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
502805815 |
1799 |
0 |
0 |
T100 |
5566 |
52 |
0 |
0 |
T112 |
9096 |
9 |
0 |
0 |
T118 |
10807 |
15 |
0 |
0 |
T125 |
13651 |
172 |
0 |
0 |
T154 |
31620 |
258 |
0 |
0 |
T155 |
16353 |
58 |
0 |
0 |
T156 |
20661 |
66 |
0 |
0 |
T157 |
5711 |
4 |
0 |
0 |
T158 |
34659 |
162 |
0 |
0 |
T159 |
37190 |
132 |
0 |
0 |
cmd_info_12_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
502805815 |
2125 |
0 |
0 |
T100 |
5566 |
49 |
0 |
0 |
T112 |
9096 |
29 |
0 |
0 |
T118 |
10807 |
23 |
0 |
0 |
T125 |
13651 |
75 |
0 |
0 |
T154 |
31620 |
333 |
0 |
0 |
T155 |
16353 |
142 |
0 |
0 |
T156 |
20661 |
118 |
0 |
0 |
T157 |
5711 |
7 |
0 |
0 |
T158 |
34659 |
238 |
0 |
0 |
T159 |
37190 |
191 |
0 |
0 |
cmd_info_13_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
502805815 |
1796 |
0 |
0 |
T100 |
5566 |
54 |
0 |
0 |
T112 |
9096 |
71 |
0 |
0 |
T118 |
10807 |
76 |
0 |
0 |
T125 |
13651 |
39 |
0 |
0 |
T154 |
31620 |
219 |
0 |
0 |
T155 |
16353 |
19 |
0 |
0 |
T156 |
20661 |
101 |
0 |
0 |
T157 |
5711 |
4 |
0 |
0 |
T158 |
34659 |
228 |
0 |
0 |
T159 |
37190 |
120 |
0 |
0 |
cmd_info_14_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
502805815 |
1895 |
0 |
0 |
T100 |
5566 |
15 |
0 |
0 |
T112 |
9096 |
100 |
0 |
0 |
T118 |
10807 |
21 |
0 |
0 |
T125 |
13651 |
37 |
0 |
0 |
T154 |
31620 |
253 |
0 |
0 |
T155 |
16353 |
127 |
0 |
0 |
T156 |
20661 |
45 |
0 |
0 |
T157 |
5711 |
5 |
0 |
0 |
T158 |
34659 |
191 |
0 |
0 |
T159 |
37190 |
136 |
0 |
0 |
cmd_info_15_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
502805815 |
1794 |
0 |
0 |
T100 |
5566 |
14 |
0 |
0 |
T112 |
9096 |
21 |
0 |
0 |
T118 |
10807 |
33 |
0 |
0 |
T125 |
13651 |
95 |
0 |
0 |
T154 |
31620 |
171 |
0 |
0 |
T155 |
16353 |
139 |
0 |
0 |
T156 |
20661 |
71 |
0 |
0 |
T157 |
5711 |
53 |
0 |
0 |
T158 |
34659 |
132 |
0 |
0 |
T159 |
37190 |
134 |
0 |
0 |
cmd_info_16_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
502805815 |
2090 |
0 |
0 |
T100 |
5566 |
6 |
0 |
0 |
T108 |
14206 |
6 |
0 |
0 |
T112 |
9096 |
58 |
0 |
0 |
T118 |
10807 |
86 |
0 |
0 |
T125 |
13651 |
94 |
0 |
0 |
T154 |
31620 |
332 |
0 |
0 |
T155 |
16353 |
167 |
0 |
0 |
T156 |
20661 |
101 |
0 |
0 |
T157 |
5711 |
7 |
0 |
0 |
T158 |
34659 |
229 |
0 |
0 |
cmd_info_17_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
502805815 |
1672 |
0 |
0 |
T100 |
5566 |
52 |
0 |
0 |
T112 |
9096 |
8 |
0 |
0 |
T118 |
10807 |
64 |
0 |
0 |
T125 |
13651 |
92 |
0 |
0 |
T154 |
31620 |
183 |
0 |
0 |
T155 |
16353 |
107 |
0 |
0 |
T156 |
20661 |
27 |
0 |
0 |
T157 |
5711 |
43 |
0 |
0 |
T158 |
34659 |
214 |
0 |
0 |
T159 |
37190 |
137 |
0 |
0 |
cmd_info_18_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
502805815 |
1771 |
0 |
0 |
T100 |
5566 |
11 |
0 |
0 |
T112 |
9096 |
57 |
0 |
0 |
T118 |
10807 |
79 |
0 |
0 |
T125 |
13651 |
16 |
0 |
0 |
T154 |
31620 |
229 |
0 |
0 |
T155 |
16353 |
60 |
0 |
0 |
T156 |
20661 |
94 |
0 |
0 |
T157 |
5711 |
70 |
0 |
0 |
T158 |
34659 |
220 |
0 |
0 |
T159 |
37190 |
160 |
0 |
0 |
cmd_info_19_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
502805815 |
1810 |
0 |
0 |
T100 |
5566 |
63 |
0 |
0 |
T112 |
9096 |
111 |
0 |
0 |
T118 |
10807 |
43 |
0 |
0 |
T125 |
13651 |
39 |
0 |
0 |
T154 |
31620 |
206 |
0 |
0 |
T155 |
16353 |
27 |
0 |
0 |
T156 |
20661 |
71 |
0 |
0 |
T157 |
5711 |
8 |
0 |
0 |
T158 |
34659 |
244 |
0 |
0 |
T159 |
37190 |
151 |
0 |
0 |
cmd_info_1_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
502805815 |
1883 |
0 |
0 |
T100 |
5566 |
5 |
0 |
0 |
T112 |
9096 |
82 |
0 |
0 |
T118 |
10807 |
59 |
0 |
0 |
T125 |
13651 |
57 |
0 |
0 |
T154 |
31620 |
204 |
0 |
0 |
T155 |
16353 |
156 |
0 |
0 |
T156 |
20661 |
56 |
0 |
0 |
T157 |
5711 |
10 |
0 |
0 |
T158 |
34659 |
265 |
0 |
0 |
T159 |
37190 |
164 |
0 |
0 |
cmd_info_20_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
502805815 |
2090 |
0 |
0 |
T100 |
5566 |
42 |
0 |
0 |
T112 |
9096 |
69 |
0 |
0 |
T118 |
10807 |
19 |
0 |
0 |
T125 |
13651 |
109 |
0 |
0 |
T154 |
31620 |
200 |
0 |
0 |
T155 |
16353 |
55 |
0 |
0 |
T156 |
20661 |
62 |
0 |
0 |
T157 |
5711 |
4 |
0 |
0 |
T158 |
34659 |
263 |
0 |
0 |
T159 |
37190 |
165 |
0 |
0 |
cmd_info_21_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
502805815 |
2048 |
0 |
0 |
T100 |
5566 |
49 |
0 |
0 |
T112 |
9096 |
72 |
0 |
0 |
T118 |
10807 |
62 |
0 |
0 |
T125 |
13651 |
7 |
0 |
0 |
T154 |
31620 |
422 |
0 |
0 |
T155 |
16353 |
117 |
0 |
0 |
T156 |
20661 |
52 |
0 |
0 |
T157 |
5711 |
3 |
0 |
0 |
T158 |
34659 |
329 |
0 |
0 |
T159 |
37190 |
167 |
0 |
0 |
cmd_info_22_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
502805815 |
1809 |
0 |
0 |
T100 |
5566 |
15 |
0 |
0 |
T112 |
9096 |
126 |
0 |
0 |
T118 |
10807 |
3 |
0 |
0 |
T125 |
13651 |
130 |
0 |
0 |
T154 |
31620 |
224 |
0 |
0 |
T155 |
16353 |
17 |
0 |
0 |
T156 |
20661 |
62 |
0 |
0 |
T157 |
5711 |
5 |
0 |
0 |
T158 |
34659 |
243 |
0 |
0 |
T159 |
37190 |
130 |
0 |
0 |
cmd_info_23_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
502805815 |
1814 |
0 |
0 |
T100 |
5566 |
54 |
0 |
0 |
T112 |
9096 |
53 |
0 |
0 |
T118 |
10807 |
59 |
0 |
0 |
T125 |
13651 |
117 |
0 |
0 |
T154 |
31620 |
267 |
0 |
0 |
T155 |
16353 |
57 |
0 |
0 |
T156 |
20661 |
68 |
0 |
0 |
T157 |
5711 |
2 |
0 |
0 |
T158 |
34659 |
339 |
0 |
0 |
T159 |
37190 |
129 |
0 |
0 |
cmd_info_2_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
502805815 |
1816 |
0 |
0 |
T100 |
5566 |
23 |
0 |
0 |
T108 |
14206 |
9 |
0 |
0 |
T112 |
9096 |
22 |
0 |
0 |
T118 |
10807 |
21 |
0 |
0 |
T125 |
13651 |
61 |
0 |
0 |
T154 |
31620 |
263 |
0 |
0 |
T155 |
16353 |
32 |
0 |
0 |
T156 |
20661 |
78 |
0 |
0 |
T157 |
5711 |
59 |
0 |
0 |
T158 |
34659 |
150 |
0 |
0 |
cmd_info_3_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
502805815 |
1586 |
0 |
0 |
T100 |
5566 |
12 |
0 |
0 |
T112 |
9096 |
66 |
0 |
0 |
T118 |
10807 |
32 |
0 |
0 |
T125 |
13651 |
52 |
0 |
0 |
T154 |
31620 |
298 |
0 |
0 |
T155 |
16353 |
136 |
0 |
0 |
T156 |
20661 |
39 |
0 |
0 |
T157 |
5711 |
36 |
0 |
0 |
T158 |
34659 |
185 |
0 |
0 |
T159 |
37190 |
144 |
0 |
0 |
cmd_info_4_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
502805815 |
2082 |
0 |
0 |
T100 |
5566 |
52 |
0 |
0 |
T112 |
9096 |
84 |
0 |
0 |
T118 |
10807 |
43 |
0 |
0 |
T125 |
13651 |
112 |
0 |
0 |
T154 |
31620 |
242 |
0 |
0 |
T155 |
16353 |
65 |
0 |
0 |
T156 |
20661 |
91 |
0 |
0 |
T157 |
5711 |
17 |
0 |
0 |
T158 |
34659 |
310 |
0 |
0 |
T159 |
37190 |
181 |
0 |
0 |
cmd_info_5_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
502805815 |
2032 |
0 |
0 |
T100 |
5566 |
57 |
0 |
0 |
T112 |
9096 |
67 |
0 |
0 |
T118 |
10807 |
5 |
0 |
0 |
T125 |
13651 |
171 |
0 |
0 |
T154 |
31620 |
151 |
0 |
0 |
T155 |
16353 |
177 |
0 |
0 |
T156 |
20661 |
84 |
0 |
0 |
T157 |
5711 |
46 |
0 |
0 |
T158 |
34659 |
172 |
0 |
0 |
T159 |
37190 |
114 |
0 |
0 |
cmd_info_6_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
502805815 |
1990 |
0 |
0 |
T100 |
5566 |
4 |
0 |
0 |
T112 |
9096 |
55 |
0 |
0 |
T118 |
10807 |
56 |
0 |
0 |
T125 |
13651 |
102 |
0 |
0 |
T154 |
31620 |
249 |
0 |
0 |
T155 |
16353 |
26 |
0 |
0 |
T156 |
20661 |
77 |
0 |
0 |
T157 |
5711 |
15 |
0 |
0 |
T158 |
34659 |
351 |
0 |
0 |
T159 |
37190 |
170 |
0 |
0 |
cmd_info_7_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
502805815 |
1449 |
0 |
0 |
T100 |
5566 |
49 |
0 |
0 |
T112 |
9096 |
14 |
0 |
0 |
T118 |
10807 |
8 |
0 |
0 |
T125 |
13651 |
113 |
0 |
0 |
T154 |
31620 |
188 |
0 |
0 |
T155 |
16353 |
108 |
0 |
0 |
T156 |
20661 |
62 |
0 |
0 |
T157 |
5711 |
12 |
0 |
0 |
T158 |
34659 |
139 |
0 |
0 |
T159 |
37190 |
109 |
0 |
0 |
cmd_info_8_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
502805815 |
1819 |
0 |
0 |
T100 |
5566 |
10 |
0 |
0 |
T112 |
9096 |
65 |
0 |
0 |
T118 |
10807 |
22 |
0 |
0 |
T125 |
13651 |
69 |
0 |
0 |
T154 |
31620 |
263 |
0 |
0 |
T155 |
16353 |
130 |
0 |
0 |
T156 |
20661 |
68 |
0 |
0 |
T157 |
5711 |
12 |
0 |
0 |
T158 |
34659 |
270 |
0 |
0 |
T159 |
37190 |
142 |
0 |
0 |
cmd_info_9_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
502805815 |
1813 |
0 |
0 |
T100 |
5566 |
10 |
0 |
0 |
T112 |
9096 |
22 |
0 |
0 |
T118 |
10807 |
45 |
0 |
0 |
T125 |
13651 |
107 |
0 |
0 |
T154 |
31620 |
189 |
0 |
0 |
T155 |
16353 |
178 |
0 |
0 |
T156 |
20661 |
55 |
0 |
0 |
T157 |
5711 |
70 |
0 |
0 |
T158 |
34659 |
225 |
0 |
0 |
T159 |
37190 |
151 |
0 |
0 |
cmd_info_en4b_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
502805815 |
1049 |
0 |
0 |
T100 |
5566 |
7 |
0 |
0 |
T112 |
9096 |
21 |
0 |
0 |
T118 |
10807 |
4 |
0 |
0 |
T125 |
13651 |
25 |
0 |
0 |
T154 |
31620 |
61 |
0 |
0 |
T155 |
16353 |
43 |
0 |
0 |
T156 |
20661 |
51 |
0 |
0 |
T157 |
5711 |
8 |
0 |
0 |
T158 |
34659 |
58 |
0 |
0 |
T159 |
37190 |
197 |
0 |
0 |
cmd_info_ex4b_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
502805815 |
796 |
0 |
0 |
T100 |
5566 |
7 |
0 |
0 |
T112 |
9096 |
27 |
0 |
0 |
T118 |
10807 |
16 |
0 |
0 |
T125 |
13651 |
8 |
0 |
0 |
T154 |
31620 |
52 |
0 |
0 |
T155 |
16353 |
27 |
0 |
0 |
T156 |
20661 |
48 |
0 |
0 |
T157 |
5711 |
3 |
0 |
0 |
T158 |
34659 |
59 |
0 |
0 |
T159 |
37190 |
123 |
0 |
0 |
cmd_info_wrdi_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
502805815 |
885 |
0 |
0 |
T100 |
5566 |
5 |
0 |
0 |
T112 |
9096 |
28 |
0 |
0 |
T118 |
10807 |
8 |
0 |
0 |
T125 |
13651 |
12 |
0 |
0 |
T154 |
31620 |
56 |
0 |
0 |
T155 |
16353 |
23 |
0 |
0 |
T156 |
20661 |
63 |
0 |
0 |
T157 |
5711 |
4 |
0 |
0 |
T158 |
34659 |
64 |
0 |
0 |
T159 |
37190 |
105 |
0 |
0 |
cmd_info_wren_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
502805815 |
916 |
0 |
0 |
T100 |
5566 |
10 |
0 |
0 |
T112 |
9096 |
20 |
0 |
0 |
T118 |
10807 |
19 |
0 |
0 |
T125 |
13651 |
27 |
0 |
0 |
T154 |
31620 |
56 |
0 |
0 |
T155 |
16353 |
15 |
0 |
0 |
T156 |
20661 |
83 |
0 |
0 |
T157 |
5711 |
4 |
0 |
0 |
T158 |
34659 |
69 |
0 |
0 |
T159 |
37190 |
85 |
0 |
0 |
intercept_en_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
502805815 |
1046 |
0 |
0 |
T100 |
5566 |
6 |
0 |
0 |
T112 |
9096 |
52 |
0 |
0 |
T118 |
10807 |
6 |
0 |
0 |
T125 |
13651 |
35 |
0 |
0 |
T154 |
31620 |
79 |
0 |
0 |
T155 |
16353 |
62 |
0 |
0 |
T156 |
20661 |
48 |
0 |
0 |
T157 |
5711 |
3 |
0 |
0 |
T158 |
34659 |
81 |
0 |
0 |
T159 |
37190 |
108 |
0 |
0 |
intr_enable_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
502805815 |
2082 |
0 |
0 |
T22 |
116885 |
8 |
0 |
0 |
T76 |
1683 |
0 |
0 |
0 |
T77 |
184062 |
49 |
0 |
0 |
T78 |
96084 |
0 |
0 |
0 |
T94 |
759181 |
0 |
0 |
0 |
T134 |
0 |
20 |
0 |
0 |
T161 |
0 |
3 |
0 |
0 |
T162 |
0 |
13 |
0 |
0 |
T163 |
0 |
38 |
0 |
0 |
T164 |
0 |
10 |
0 |
0 |
T165 |
0 |
19 |
0 |
0 |
T166 |
0 |
7 |
0 |
0 |
T167 |
0 |
44 |
0 |
0 |
T168 |
470376 |
0 |
0 |
0 |
T169 |
140520 |
0 |
0 |
0 |
T170 |
249241 |
0 |
0 |
0 |
T171 |
1129 |
0 |
0 |
0 |
T172 |
187996 |
0 |
0 |
0 |
jedec_cc_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
502805815 |
886 |
0 |
0 |
T100 |
5566 |
11 |
0 |
0 |
T112 |
9096 |
9 |
0 |
0 |
T118 |
10807 |
5 |
0 |
0 |
T125 |
13651 |
25 |
0 |
0 |
T154 |
31620 |
78 |
0 |
0 |
T155 |
16353 |
23 |
0 |
0 |
T156 |
20661 |
90 |
0 |
0 |
T157 |
5711 |
11 |
0 |
0 |
T158 |
34659 |
57 |
0 |
0 |
T159 |
37190 |
82 |
0 |
0 |
jedec_id_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
502805815 |
917 |
0 |
0 |
T100 |
5566 |
10 |
0 |
0 |
T108 |
14206 |
6 |
0 |
0 |
T112 |
9096 |
16 |
0 |
0 |
T118 |
10807 |
7 |
0 |
0 |
T125 |
13651 |
25 |
0 |
0 |
T154 |
31620 |
35 |
0 |
0 |
T155 |
16353 |
35 |
0 |
0 |
T156 |
20661 |
103 |
0 |
0 |
T157 |
5711 |
14 |
0 |
0 |
T158 |
34659 |
53 |
0 |
0 |
mailbox_addr_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
502805815 |
911 |
0 |
0 |
T100 |
5566 |
14 |
0 |
0 |
T112 |
9096 |
26 |
0 |
0 |
T118 |
10807 |
4 |
0 |
0 |
T125 |
13651 |
7 |
0 |
0 |
T154 |
31620 |
53 |
0 |
0 |
T155 |
16353 |
12 |
0 |
0 |
T156 |
20661 |
104 |
0 |
0 |
T157 |
5711 |
8 |
0 |
0 |
T158 |
34659 |
41 |
0 |
0 |
T159 |
37190 |
127 |
0 |
0 |
payload_swap_data_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
502805815 |
849 |
0 |
0 |
T100 |
5566 |
9 |
0 |
0 |
T112 |
9096 |
20 |
0 |
0 |
T118 |
10807 |
11 |
0 |
0 |
T125 |
13651 |
13 |
0 |
0 |
T154 |
31620 |
29 |
0 |
0 |
T155 |
16353 |
10 |
0 |
0 |
T156 |
20661 |
23 |
0 |
0 |
T157 |
5711 |
10 |
0 |
0 |
T158 |
34659 |
33 |
0 |
0 |
T160 |
11981 |
8 |
0 |
0 |
payload_swap_mask_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
502805815 |
795 |
0 |
0 |
T100 |
5566 |
13 |
0 |
0 |
T112 |
9096 |
18 |
0 |
0 |
T118 |
10807 |
4 |
0 |
0 |
T125 |
13651 |
13 |
0 |
0 |
T154 |
31620 |
47 |
0 |
0 |
T155 |
16353 |
11 |
0 |
0 |
T156 |
20661 |
26 |
0 |
0 |
T157 |
5711 |
7 |
0 |
0 |
T158 |
34659 |
48 |
0 |
0 |
T159 |
37190 |
148 |
0 |
0 |
read_threshold_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
502805815 |
804 |
0 |
0 |
T100 |
5566 |
2 |
0 |
0 |
T112 |
9096 |
18 |
0 |
0 |
T118 |
10807 |
11 |
0 |
0 |
T125 |
13651 |
10 |
0 |
0 |
T154 |
31620 |
41 |
0 |
0 |
T155 |
16353 |
28 |
0 |
0 |
T156 |
20661 |
51 |
0 |
0 |
T157 |
5711 |
8 |
0 |
0 |
T158 |
34659 |
36 |
0 |
0 |
T159 |
37190 |
151 |
0 |
0 |
tpm_access_0_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
502805815 |
1001 |
0 |
0 |
T100 |
5566 |
13 |
0 |
0 |
T112 |
9096 |
11 |
0 |
0 |
T118 |
10807 |
30 |
0 |
0 |
T125 |
13651 |
25 |
0 |
0 |
T154 |
31620 |
146 |
0 |
0 |
T155 |
16353 |
46 |
0 |
0 |
T156 |
20661 |
34 |
0 |
0 |
T157 |
5711 |
11 |
0 |
0 |
T158 |
34659 |
99 |
0 |
0 |
T159 |
37190 |
137 |
0 |
0 |
tpm_access_1_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
502805815 |
866 |
0 |
0 |
T100 |
5566 |
14 |
0 |
0 |
T112 |
9096 |
20 |
0 |
0 |
T125 |
13651 |
22 |
0 |
0 |
T128 |
7010 |
10 |
0 |
0 |
T154 |
31620 |
16 |
0 |
0 |
T155 |
16353 |
30 |
0 |
0 |
T156 |
20661 |
50 |
0 |
0 |
T157 |
5711 |
12 |
0 |
0 |
T158 |
34659 |
43 |
0 |
0 |
T159 |
37190 |
108 |
0 |
0 |
tpm_cfg_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
502805815 |
1257 |
0 |
0 |
T100 |
5566 |
3 |
0 |
0 |
T112 |
9096 |
33 |
0 |
0 |
T118 |
10807 |
28 |
0 |
0 |
T125 |
13651 |
64 |
0 |
0 |
T154 |
31620 |
149 |
0 |
0 |
T155 |
16353 |
30 |
0 |
0 |
T156 |
20661 |
69 |
0 |
0 |
T157 |
5711 |
23 |
0 |
0 |
T158 |
34659 |
108 |
0 |
0 |
T159 |
37190 |
141 |
0 |
0 |
tpm_did_vid_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
502805815 |
1045 |
0 |
0 |
T100 |
5566 |
7 |
0 |
0 |
T112 |
9096 |
18 |
0 |
0 |
T118 |
10807 |
8 |
0 |
0 |
T125 |
13651 |
26 |
0 |
0 |
T154 |
31620 |
57 |
0 |
0 |
T155 |
16353 |
22 |
0 |
0 |
T156 |
20661 |
96 |
0 |
0 |
T157 |
5711 |
8 |
0 |
0 |
T158 |
34659 |
38 |
0 |
0 |
T159 |
37190 |
177 |
0 |
0 |
tpm_int_enable_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
502805815 |
763 |
0 |
0 |
T100 |
5566 |
8 |
0 |
0 |
T112 |
9096 |
21 |
0 |
0 |
T118 |
10807 |
7 |
0 |
0 |
T125 |
13651 |
8 |
0 |
0 |
T154 |
31620 |
39 |
0 |
0 |
T155 |
16353 |
16 |
0 |
0 |
T156 |
20661 |
34 |
0 |
0 |
T157 |
5711 |
7 |
0 |
0 |
T158 |
34659 |
52 |
0 |
0 |
T159 |
37190 |
127 |
0 |
0 |
tpm_int_status_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
502805815 |
755 |
0 |
0 |
T100 |
5566 |
9 |
0 |
0 |
T108 |
14206 |
5 |
0 |
0 |
T112 |
9096 |
7 |
0 |
0 |
T118 |
10807 |
5 |
0 |
0 |
T125 |
13651 |
12 |
0 |
0 |
T154 |
31620 |
40 |
0 |
0 |
T155 |
16353 |
27 |
0 |
0 |
T156 |
20661 |
39 |
0 |
0 |
T157 |
5711 |
3 |
0 |
0 |
T158 |
34659 |
29 |
0 |
0 |
tpm_int_vector_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
502805815 |
882 |
0 |
0 |
T100 |
5566 |
6 |
0 |
0 |
T112 |
9096 |
13 |
0 |
0 |
T118 |
10807 |
1 |
0 |
0 |
T125 |
13651 |
9 |
0 |
0 |
T154 |
31620 |
37 |
0 |
0 |
T155 |
16353 |
25 |
0 |
0 |
T156 |
20661 |
100 |
0 |
0 |
T157 |
5711 |
14 |
0 |
0 |
T158 |
34659 |
40 |
0 |
0 |
T159 |
37190 |
156 |
0 |
0 |
tpm_intf_capability_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
502805815 |
916 |
0 |
0 |
T100 |
5566 |
9 |
0 |
0 |
T112 |
9096 |
6 |
0 |
0 |
T118 |
10807 |
8 |
0 |
0 |
T125 |
13651 |
18 |
0 |
0 |
T154 |
31620 |
25 |
0 |
0 |
T155 |
16353 |
17 |
0 |
0 |
T156 |
20661 |
91 |
0 |
0 |
T157 |
5711 |
3 |
0 |
0 |
T158 |
34659 |
52 |
0 |
0 |
T159 |
37190 |
146 |
0 |
0 |
tpm_rid_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
502805815 |
776 |
0 |
0 |
T100 |
5566 |
1 |
0 |
0 |
T112 |
9096 |
13 |
0 |
0 |
T125 |
13651 |
13 |
0 |
0 |
T154 |
31620 |
32 |
0 |
0 |
T155 |
16353 |
32 |
0 |
0 |
T156 |
20661 |
54 |
0 |
0 |
T157 |
5711 |
9 |
0 |
0 |
T158 |
34659 |
42 |
0 |
0 |
T159 |
37190 |
160 |
0 |
0 |
T173 |
6325 |
6 |
0 |
0 |
tpm_sts_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
502805815 |
818 |
0 |
0 |
T100 |
5566 |
9 |
0 |
0 |
T112 |
9096 |
28 |
0 |
0 |
T118 |
10807 |
11 |
0 |
0 |
T125 |
13651 |
12 |
0 |
0 |
T154 |
31620 |
34 |
0 |
0 |
T155 |
16353 |
18 |
0 |
0 |
T156 |
20661 |
77 |
0 |
0 |
T157 |
5711 |
6 |
0 |
0 |
T158 |
34659 |
42 |
0 |
0 |
T159 |
37190 |
92 |
0 |
0 |