Assert Coverage for Module :
spi_device_csr_assert_fpv
Assertion Details
TlulOOBAddrErr_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
380228285 |
3002 |
0 |
0 |
T108 |
14882 |
173 |
0 |
0 |
T109 |
5563 |
57 |
0 |
0 |
T110 |
9995 |
1 |
0 |
0 |
T111 |
8507 |
4 |
0 |
0 |
T112 |
6437 |
255 |
0 |
0 |
T113 |
29255 |
3 |
0 |
0 |
T115 |
2147 |
4 |
0 |
0 |
T126 |
12092 |
7 |
0 |
0 |
T127 |
4388 |
79 |
0 |
0 |
T129 |
67414 |
1 |
0 |
0 |
addr_swap_data_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
380228285 |
1735 |
0 |
0 |
T128 |
34248 |
42 |
0 |
0 |
T129 |
67414 |
76 |
0 |
0 |
T135 |
6642 |
1 |
0 |
0 |
T166 |
21244 |
57 |
0 |
0 |
T167 |
6875 |
34 |
0 |
0 |
T168 |
12409 |
7 |
0 |
0 |
T169 |
14326 |
35 |
0 |
0 |
T170 |
6518 |
19 |
0 |
0 |
T171 |
4462 |
2 |
0 |
0 |
T172 |
35705 |
22 |
0 |
0 |
addr_swap_mask_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
380228285 |
1822 |
0 |
0 |
T128 |
34248 |
41 |
0 |
0 |
T129 |
67414 |
106 |
0 |
0 |
T166 |
21244 |
37 |
0 |
0 |
T168 |
12409 |
17 |
0 |
0 |
T169 |
14326 |
7 |
0 |
0 |
T170 |
6518 |
4 |
0 |
0 |
T171 |
4462 |
4 |
0 |
0 |
T172 |
35705 |
41 |
0 |
0 |
T173 |
30000 |
20 |
0 |
0 |
T174 |
90824 |
203 |
0 |
0 |
cfg_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
380228285 |
2336 |
0 |
0 |
T128 |
34248 |
67 |
0 |
0 |
T129 |
67414 |
132 |
0 |
0 |
T135 |
6642 |
6 |
0 |
0 |
T166 |
21244 |
65 |
0 |
0 |
T167 |
6875 |
16 |
0 |
0 |
T168 |
12409 |
14 |
0 |
0 |
T169 |
14326 |
44 |
0 |
0 |
T170 |
6518 |
22 |
0 |
0 |
T171 |
4462 |
7 |
0 |
0 |
T172 |
35705 |
88 |
0 |
0 |
cmd_filter_0_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
380228285 |
7358 |
0 |
0 |
T108 |
14882 |
3 |
0 |
0 |
T128 |
34248 |
365 |
0 |
0 |
T129 |
67414 |
1159 |
0 |
0 |
T135 |
6642 |
79 |
0 |
0 |
T166 |
21244 |
23 |
0 |
0 |
T167 |
6875 |
1 |
0 |
0 |
T168 |
12409 |
149 |
0 |
0 |
T169 |
14326 |
43 |
0 |
0 |
T170 |
6518 |
25 |
0 |
0 |
T171 |
4462 |
8 |
0 |
0 |
cmd_filter_1_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
380228285 |
8118 |
0 |
0 |
T128 |
34248 |
672 |
0 |
0 |
T129 |
67414 |
656 |
0 |
0 |
T135 |
6642 |
121 |
0 |
0 |
T166 |
21244 |
86 |
0 |
0 |
T167 |
6875 |
3 |
0 |
0 |
T168 |
12409 |
250 |
0 |
0 |
T169 |
14326 |
3 |
0 |
0 |
T170 |
6518 |
18 |
0 |
0 |
T171 |
4462 |
101 |
0 |
0 |
T172 |
35705 |
465 |
0 |
0 |
cmd_filter_2_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
380228285 |
8136 |
0 |
0 |
T128 |
34248 |
750 |
0 |
0 |
T129 |
67414 |
1135 |
0 |
0 |
T166 |
21244 |
50 |
0 |
0 |
T167 |
6875 |
12 |
0 |
0 |
T168 |
12409 |
349 |
0 |
0 |
T169 |
14326 |
41 |
0 |
0 |
T170 |
6518 |
45 |
0 |
0 |
T171 |
4462 |
97 |
0 |
0 |
T172 |
35705 |
795 |
0 |
0 |
T173 |
30000 |
221 |
0 |
0 |
cmd_filter_3_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
380228285 |
8739 |
0 |
0 |
T128 |
34248 |
763 |
0 |
0 |
T129 |
67414 |
1205 |
0 |
0 |
T166 |
21244 |
112 |
0 |
0 |
T167 |
6875 |
6 |
0 |
0 |
T168 |
12409 |
301 |
0 |
0 |
T169 |
14326 |
65 |
0 |
0 |
T170 |
6518 |
38 |
0 |
0 |
T171 |
4462 |
4 |
0 |
0 |
T172 |
35705 |
587 |
0 |
0 |
T173 |
30000 |
251 |
0 |
0 |
cmd_filter_4_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
380228285 |
8315 |
0 |
0 |
T128 |
34248 |
593 |
0 |
0 |
T129 |
67414 |
1366 |
0 |
0 |
T135 |
6642 |
9 |
0 |
0 |
T166 |
21244 |
97 |
0 |
0 |
T167 |
6875 |
19 |
0 |
0 |
T168 |
12409 |
371 |
0 |
0 |
T169 |
14326 |
39 |
0 |
0 |
T170 |
6518 |
40 |
0 |
0 |
T171 |
4462 |
8 |
0 |
0 |
T172 |
35705 |
263 |
0 |
0 |
cmd_filter_5_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
380228285 |
8246 |
0 |
0 |
T128 |
34248 |
702 |
0 |
0 |
T129 |
67414 |
1008 |
0 |
0 |
T135 |
6642 |
86 |
0 |
0 |
T166 |
21244 |
77 |
0 |
0 |
T167 |
6875 |
2 |
0 |
0 |
T168 |
12409 |
237 |
0 |
0 |
T169 |
14326 |
55 |
0 |
0 |
T171 |
4462 |
5 |
0 |
0 |
T172 |
35705 |
567 |
0 |
0 |
T173 |
30000 |
327 |
0 |
0 |
cmd_filter_6_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
380228285 |
8250 |
0 |
0 |
T128 |
34248 |
609 |
0 |
0 |
T129 |
67414 |
1530 |
0 |
0 |
T135 |
6642 |
125 |
0 |
0 |
T166 |
21244 |
55 |
0 |
0 |
T167 |
6875 |
15 |
0 |
0 |
T168 |
12409 |
10 |
0 |
0 |
T169 |
14326 |
63 |
0 |
0 |
T171 |
4462 |
140 |
0 |
0 |
T172 |
35705 |
578 |
0 |
0 |
T173 |
30000 |
373 |
0 |
0 |
cmd_filter_7_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
380228285 |
8758 |
0 |
0 |
T128 |
34248 |
607 |
0 |
0 |
T129 |
67414 |
1541 |
0 |
0 |
T135 |
6642 |
69 |
0 |
0 |
T166 |
21244 |
76 |
0 |
0 |
T167 |
6875 |
6 |
0 |
0 |
T168 |
12409 |
170 |
0 |
0 |
T169 |
14326 |
36 |
0 |
0 |
T170 |
6518 |
12 |
0 |
0 |
T171 |
4462 |
142 |
0 |
0 |
T172 |
35705 |
509 |
0 |
0 |
cmd_info_0_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
380228285 |
4628 |
0 |
0 |
T128 |
34248 |
271 |
0 |
0 |
T129 |
67414 |
658 |
0 |
0 |
T135 |
6642 |
41 |
0 |
0 |
T166 |
21244 |
93 |
0 |
0 |
T167 |
6875 |
3 |
0 |
0 |
T168 |
12409 |
53 |
0 |
0 |
T169 |
14326 |
28 |
0 |
0 |
T170 |
6518 |
35 |
0 |
0 |
T171 |
4462 |
5 |
0 |
0 |
T172 |
35705 |
229 |
0 |
0 |
cmd_info_10_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
380228285 |
4397 |
0 |
0 |
T128 |
34248 |
238 |
0 |
0 |
T129 |
67414 |
437 |
0 |
0 |
T135 |
6642 |
22 |
0 |
0 |
T166 |
21244 |
52 |
0 |
0 |
T167 |
6875 |
36 |
0 |
0 |
T168 |
12409 |
69 |
0 |
0 |
T169 |
14326 |
26 |
0 |
0 |
T170 |
6518 |
20 |
0 |
0 |
T171 |
4462 |
48 |
0 |
0 |
T172 |
35705 |
374 |
0 |
0 |
cmd_info_11_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
380228285 |
4305 |
0 |
0 |
T108 |
14882 |
5 |
0 |
0 |
T128 |
34248 |
138 |
0 |
0 |
T129 |
67414 |
546 |
0 |
0 |
T135 |
6642 |
39 |
0 |
0 |
T166 |
21244 |
65 |
0 |
0 |
T167 |
6875 |
4 |
0 |
0 |
T168 |
12409 |
57 |
0 |
0 |
T169 |
14326 |
86 |
0 |
0 |
T170 |
6518 |
9 |
0 |
0 |
T171 |
4462 |
35 |
0 |
0 |
cmd_info_12_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
380228285 |
4595 |
0 |
0 |
T128 |
34248 |
292 |
0 |
0 |
T129 |
67414 |
687 |
0 |
0 |
T135 |
6642 |
28 |
0 |
0 |
T166 |
21244 |
80 |
0 |
0 |
T167 |
6875 |
6 |
0 |
0 |
T168 |
12409 |
110 |
0 |
0 |
T169 |
14326 |
91 |
0 |
0 |
T170 |
6518 |
11 |
0 |
0 |
T172 |
35705 |
157 |
0 |
0 |
T173 |
30000 |
72 |
0 |
0 |
cmd_info_13_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
380228285 |
4241 |
0 |
0 |
T128 |
34248 |
294 |
0 |
0 |
T129 |
67414 |
374 |
0 |
0 |
T135 |
6642 |
53 |
0 |
0 |
T166 |
21244 |
55 |
0 |
0 |
T168 |
12409 |
8 |
0 |
0 |
T169 |
14326 |
20 |
0 |
0 |
T170 |
6518 |
5 |
0 |
0 |
T171 |
4462 |
60 |
0 |
0 |
T172 |
35705 |
195 |
0 |
0 |
T173 |
30000 |
179 |
0 |
0 |
cmd_info_14_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
380228285 |
4763 |
0 |
0 |
T128 |
34248 |
359 |
0 |
0 |
T129 |
67414 |
502 |
0 |
0 |
T135 |
6642 |
34 |
0 |
0 |
T166 |
21244 |
125 |
0 |
0 |
T167 |
6875 |
6 |
0 |
0 |
T168 |
12409 |
112 |
0 |
0 |
T169 |
14326 |
37 |
0 |
0 |
T170 |
6518 |
61 |
0 |
0 |
T171 |
4462 |
9 |
0 |
0 |
T172 |
35705 |
417 |
0 |
0 |
cmd_info_15_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
380228285 |
4479 |
0 |
0 |
T128 |
34248 |
248 |
0 |
0 |
T129 |
67414 |
648 |
0 |
0 |
T135 |
6642 |
39 |
0 |
0 |
T166 |
21244 |
61 |
0 |
0 |
T167 |
6875 |
2 |
0 |
0 |
T168 |
12409 |
104 |
0 |
0 |
T169 |
14326 |
24 |
0 |
0 |
T170 |
6518 |
38 |
0 |
0 |
T171 |
4462 |
40 |
0 |
0 |
T172 |
35705 |
155 |
0 |
0 |
cmd_info_16_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
380228285 |
4521 |
0 |
0 |
T128 |
34248 |
254 |
0 |
0 |
T129 |
67414 |
570 |
0 |
0 |
T135 |
6642 |
27 |
0 |
0 |
T166 |
21244 |
118 |
0 |
0 |
T167 |
6875 |
28 |
0 |
0 |
T168 |
12409 |
163 |
0 |
0 |
T169 |
14326 |
70 |
0 |
0 |
T170 |
6518 |
12 |
0 |
0 |
T171 |
4462 |
5 |
0 |
0 |
T172 |
35705 |
361 |
0 |
0 |
cmd_info_17_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
380228285 |
4541 |
0 |
0 |
T128 |
34248 |
208 |
0 |
0 |
T129 |
67414 |
621 |
0 |
0 |
T135 |
6642 |
52 |
0 |
0 |
T166 |
21244 |
42 |
0 |
0 |
T167 |
6875 |
7 |
0 |
0 |
T168 |
12409 |
59 |
0 |
0 |
T169 |
14326 |
44 |
0 |
0 |
T170 |
6518 |
8 |
0 |
0 |
T171 |
4462 |
34 |
0 |
0 |
T172 |
35705 |
302 |
0 |
0 |
cmd_info_18_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
380228285 |
4724 |
0 |
0 |
T128 |
34248 |
264 |
0 |
0 |
T129 |
67414 |
566 |
0 |
0 |
T135 |
6642 |
25 |
0 |
0 |
T166 |
21244 |
67 |
0 |
0 |
T167 |
6875 |
2 |
0 |
0 |
T168 |
12409 |
96 |
0 |
0 |
T169 |
14326 |
27 |
0 |
0 |
T170 |
6518 |
30 |
0 |
0 |
T171 |
4462 |
37 |
0 |
0 |
T172 |
35705 |
364 |
0 |
0 |
cmd_info_19_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
380228285 |
3847 |
0 |
0 |
T128 |
34248 |
186 |
0 |
0 |
T129 |
67414 |
435 |
0 |
0 |
T135 |
6642 |
5 |
0 |
0 |
T166 |
21244 |
69 |
0 |
0 |
T167 |
6875 |
21 |
0 |
0 |
T168 |
12409 |
93 |
0 |
0 |
T169 |
14326 |
35 |
0 |
0 |
T170 |
6518 |
24 |
0 |
0 |
T171 |
4462 |
63 |
0 |
0 |
T172 |
35705 |
253 |
0 |
0 |
cmd_info_1_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
380228285 |
4188 |
0 |
0 |
T128 |
34248 |
159 |
0 |
0 |
T129 |
67414 |
323 |
0 |
0 |
T135 |
6642 |
49 |
0 |
0 |
T166 |
21244 |
44 |
0 |
0 |
T167 |
6875 |
18 |
0 |
0 |
T168 |
12409 |
140 |
0 |
0 |
T169 |
14326 |
47 |
0 |
0 |
T170 |
6518 |
5 |
0 |
0 |
T171 |
4462 |
8 |
0 |
0 |
T172 |
35705 |
232 |
0 |
0 |
cmd_info_20_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
380228285 |
4551 |
0 |
0 |
T128 |
34248 |
293 |
0 |
0 |
T129 |
67414 |
628 |
0 |
0 |
T135 |
6642 |
5 |
0 |
0 |
T166 |
21244 |
61 |
0 |
0 |
T167 |
6875 |
8 |
0 |
0 |
T168 |
12409 |
144 |
0 |
0 |
T169 |
14326 |
69 |
0 |
0 |
T170 |
6518 |
18 |
0 |
0 |
T171 |
4462 |
3 |
0 |
0 |
T172 |
35705 |
306 |
0 |
0 |
cmd_info_21_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
380228285 |
4649 |
0 |
0 |
T128 |
34248 |
150 |
0 |
0 |
T129 |
67414 |
785 |
0 |
0 |
T135 |
6642 |
29 |
0 |
0 |
T166 |
21244 |
60 |
0 |
0 |
T167 |
6875 |
26 |
0 |
0 |
T168 |
12409 |
82 |
0 |
0 |
T169 |
14326 |
39 |
0 |
0 |
T170 |
6518 |
21 |
0 |
0 |
T171 |
4462 |
4 |
0 |
0 |
T172 |
35705 |
247 |
0 |
0 |
cmd_info_22_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
380228285 |
4355 |
0 |
0 |
T128 |
34248 |
252 |
0 |
0 |
T129 |
67414 |
720 |
0 |
0 |
T135 |
6642 |
36 |
0 |
0 |
T166 |
21244 |
64 |
0 |
0 |
T167 |
6875 |
1 |
0 |
0 |
T168 |
12409 |
102 |
0 |
0 |
T169 |
14326 |
62 |
0 |
0 |
T170 |
6518 |
27 |
0 |
0 |
T171 |
4462 |
52 |
0 |
0 |
T172 |
35705 |
173 |
0 |
0 |
cmd_info_23_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
380228285 |
4184 |
0 |
0 |
T108 |
14882 |
1 |
0 |
0 |
T128 |
34248 |
215 |
0 |
0 |
T129 |
67414 |
532 |
0 |
0 |
T135 |
6642 |
5 |
0 |
0 |
T166 |
21244 |
35 |
0 |
0 |
T167 |
6875 |
11 |
0 |
0 |
T168 |
12409 |
119 |
0 |
0 |
T169 |
14326 |
26 |
0 |
0 |
T170 |
6518 |
5 |
0 |
0 |
T171 |
4462 |
2 |
0 |
0 |
cmd_info_2_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
380228285 |
4438 |
0 |
0 |
T128 |
34248 |
328 |
0 |
0 |
T129 |
67414 |
655 |
0 |
0 |
T166 |
21244 |
69 |
0 |
0 |
T167 |
6875 |
12 |
0 |
0 |
T168 |
12409 |
61 |
0 |
0 |
T169 |
14326 |
36 |
0 |
0 |
T170 |
6518 |
31 |
0 |
0 |
T171 |
4462 |
49 |
0 |
0 |
T172 |
35705 |
315 |
0 |
0 |
T173 |
30000 |
158 |
0 |
0 |
cmd_info_3_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
380228285 |
4323 |
0 |
0 |
T128 |
34248 |
258 |
0 |
0 |
T129 |
67414 |
649 |
0 |
0 |
T135 |
6642 |
32 |
0 |
0 |
T166 |
21244 |
73 |
0 |
0 |
T167 |
6875 |
5 |
0 |
0 |
T168 |
12409 |
91 |
0 |
0 |
T169 |
14326 |
40 |
0 |
0 |
T170 |
6518 |
13 |
0 |
0 |
T171 |
4462 |
67 |
0 |
0 |
T172 |
35705 |
234 |
0 |
0 |
cmd_info_4_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
380228285 |
4274 |
0 |
0 |
T128 |
34248 |
252 |
0 |
0 |
T129 |
67414 |
486 |
0 |
0 |
T135 |
6642 |
24 |
0 |
0 |
T166 |
21244 |
42 |
0 |
0 |
T167 |
6875 |
5 |
0 |
0 |
T168 |
12409 |
112 |
0 |
0 |
T169 |
14326 |
38 |
0 |
0 |
T170 |
6518 |
50 |
0 |
0 |
T171 |
4462 |
2 |
0 |
0 |
T172 |
35705 |
403 |
0 |
0 |
cmd_info_5_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
380228285 |
3832 |
0 |
0 |
T128 |
34248 |
108 |
0 |
0 |
T129 |
67414 |
384 |
0 |
0 |
T166 |
21244 |
20 |
0 |
0 |
T167 |
6875 |
13 |
0 |
0 |
T168 |
12409 |
55 |
0 |
0 |
T169 |
14326 |
56 |
0 |
0 |
T170 |
6518 |
19 |
0 |
0 |
T171 |
4462 |
6 |
0 |
0 |
T172 |
35705 |
255 |
0 |
0 |
T173 |
30000 |
144 |
0 |
0 |
cmd_info_6_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
380228285 |
4549 |
0 |
0 |
T128 |
34248 |
258 |
0 |
0 |
T129 |
67414 |
635 |
0 |
0 |
T135 |
6642 |
39 |
0 |
0 |
T166 |
21244 |
63 |
0 |
0 |
T167 |
6875 |
8 |
0 |
0 |
T168 |
12409 |
106 |
0 |
0 |
T169 |
14326 |
30 |
0 |
0 |
T170 |
6518 |
16 |
0 |
0 |
T171 |
4462 |
1 |
0 |
0 |
T172 |
35705 |
211 |
0 |
0 |
cmd_info_7_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
380228285 |
4572 |
0 |
0 |
T109 |
5563 |
3 |
0 |
0 |
T128 |
34248 |
155 |
0 |
0 |
T129 |
67414 |
618 |
0 |
0 |
T166 |
21244 |
62 |
0 |
0 |
T167 |
6875 |
14 |
0 |
0 |
T168 |
12409 |
50 |
0 |
0 |
T169 |
14326 |
32 |
0 |
0 |
T170 |
6518 |
3 |
0 |
0 |
T171 |
4462 |
8 |
0 |
0 |
T172 |
35705 |
362 |
0 |
0 |
cmd_info_8_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
380228285 |
4295 |
0 |
0 |
T128 |
34248 |
170 |
0 |
0 |
T129 |
67414 |
688 |
0 |
0 |
T135 |
6642 |
14 |
0 |
0 |
T166 |
21244 |
54 |
0 |
0 |
T167 |
6875 |
15 |
0 |
0 |
T168 |
12409 |
15 |
0 |
0 |
T169 |
14326 |
40 |
0 |
0 |
T171 |
4462 |
52 |
0 |
0 |
T172 |
35705 |
249 |
0 |
0 |
T173 |
30000 |
261 |
0 |
0 |
cmd_info_9_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
380228285 |
4941 |
0 |
0 |
T128 |
34248 |
292 |
0 |
0 |
T129 |
67414 |
656 |
0 |
0 |
T135 |
6642 |
22 |
0 |
0 |
T166 |
21244 |
78 |
0 |
0 |
T167 |
6875 |
14 |
0 |
0 |
T168 |
12409 |
82 |
0 |
0 |
T169 |
14326 |
50 |
0 |
0 |
T170 |
6518 |
16 |
0 |
0 |
T172 |
35705 |
282 |
0 |
0 |
T173 |
30000 |
144 |
0 |
0 |
cmd_info_en4b_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
380228285 |
2193 |
0 |
0 |
T128 |
34248 |
64 |
0 |
0 |
T129 |
67414 |
147 |
0 |
0 |
T135 |
6642 |
3 |
0 |
0 |
T166 |
21244 |
53 |
0 |
0 |
T167 |
6875 |
7 |
0 |
0 |
T168 |
12409 |
28 |
0 |
0 |
T169 |
14326 |
58 |
0 |
0 |
T170 |
6518 |
21 |
0 |
0 |
T171 |
4462 |
2 |
0 |
0 |
T172 |
35705 |
53 |
0 |
0 |
cmd_info_ex4b_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
380228285 |
1922 |
0 |
0 |
T128 |
34248 |
61 |
0 |
0 |
T129 |
67414 |
101 |
0 |
0 |
T135 |
6642 |
14 |
0 |
0 |
T166 |
21244 |
59 |
0 |
0 |
T167 |
6875 |
20 |
0 |
0 |
T168 |
12409 |
19 |
0 |
0 |
T169 |
14326 |
21 |
0 |
0 |
T170 |
6518 |
7 |
0 |
0 |
T171 |
4462 |
14 |
0 |
0 |
T172 |
35705 |
41 |
0 |
0 |
cmd_info_wrdi_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
380228285 |
2064 |
0 |
0 |
T128 |
34248 |
63 |
0 |
0 |
T129 |
67414 |
101 |
0 |
0 |
T135 |
6642 |
9 |
0 |
0 |
T166 |
21244 |
40 |
0 |
0 |
T167 |
6875 |
11 |
0 |
0 |
T168 |
12409 |
16 |
0 |
0 |
T169 |
14326 |
40 |
0 |
0 |
T170 |
6518 |
1 |
0 |
0 |
T171 |
4462 |
7 |
0 |
0 |
T172 |
35705 |
76 |
0 |
0 |
cmd_info_wren_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
380228285 |
2022 |
0 |
0 |
T128 |
34248 |
64 |
0 |
0 |
T129 |
67414 |
113 |
0 |
0 |
T135 |
6642 |
9 |
0 |
0 |
T166 |
21244 |
61 |
0 |
0 |
T168 |
12409 |
5 |
0 |
0 |
T169 |
14326 |
30 |
0 |
0 |
T170 |
6518 |
13 |
0 |
0 |
T171 |
4462 |
5 |
0 |
0 |
T172 |
35705 |
50 |
0 |
0 |
T173 |
30000 |
28 |
0 |
0 |
intercept_en_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
380228285 |
2477 |
0 |
0 |
T128 |
34248 |
112 |
0 |
0 |
T129 |
67414 |
244 |
0 |
0 |
T135 |
6642 |
22 |
0 |
0 |
T166 |
21244 |
68 |
0 |
0 |
T167 |
6875 |
4 |
0 |
0 |
T168 |
12409 |
32 |
0 |
0 |
T169 |
14326 |
26 |
0 |
0 |
T170 |
6518 |
25 |
0 |
0 |
T171 |
4462 |
7 |
0 |
0 |
T172 |
35705 |
69 |
0 |
0 |
intr_enable_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
380228285 |
4174 |
0 |
0 |
T20 |
110903 |
36 |
0 |
0 |
T21 |
4619 |
0 |
0 |
0 |
T34 |
0 |
22 |
0 |
0 |
T42 |
0 |
17 |
0 |
0 |
T74 |
330338 |
0 |
0 |
0 |
T157 |
0 |
50 |
0 |
0 |
T160 |
198197 |
9 |
0 |
0 |
T175 |
0 |
37 |
0 |
0 |
T176 |
0 |
11 |
0 |
0 |
T177 |
0 |
27 |
0 |
0 |
T178 |
0 |
10 |
0 |
0 |
T179 |
0 |
38 |
0 |
0 |
T180 |
78116 |
0 |
0 |
0 |
T181 |
416684 |
0 |
0 |
0 |
T182 |
191581 |
0 |
0 |
0 |
T183 |
94662 |
0 |
0 |
0 |
T184 |
108346 |
0 |
0 |
0 |
T185 |
28812 |
0 |
0 |
0 |
jedec_cc_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
380228285 |
2105 |
0 |
0 |
T109 |
5563 |
9 |
0 |
0 |
T128 |
34248 |
47 |
0 |
0 |
T129 |
67414 |
104 |
0 |
0 |
T135 |
6642 |
4 |
0 |
0 |
T166 |
21244 |
34 |
0 |
0 |
T167 |
6875 |
8 |
0 |
0 |
T168 |
12409 |
13 |
0 |
0 |
T169 |
14326 |
63 |
0 |
0 |
T170 |
6518 |
16 |
0 |
0 |
T171 |
4462 |
6 |
0 |
0 |
jedec_id_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
380228285 |
2132 |
0 |
0 |
T128 |
34248 |
71 |
0 |
0 |
T129 |
67414 |
90 |
0 |
0 |
T135 |
6642 |
10 |
0 |
0 |
T166 |
21244 |
58 |
0 |
0 |
T167 |
6875 |
3 |
0 |
0 |
T168 |
12409 |
4 |
0 |
0 |
T169 |
14326 |
83 |
0 |
0 |
T170 |
6518 |
6 |
0 |
0 |
T172 |
35705 |
51 |
0 |
0 |
T173 |
30000 |
22 |
0 |
0 |
mailbox_addr_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
380228285 |
1914 |
0 |
0 |
T128 |
34248 |
23 |
0 |
0 |
T129 |
67414 |
81 |
0 |
0 |
T135 |
6642 |
2 |
0 |
0 |
T166 |
21244 |
46 |
0 |
0 |
T167 |
6875 |
9 |
0 |
0 |
T168 |
12409 |
12 |
0 |
0 |
T169 |
14326 |
55 |
0 |
0 |
T170 |
6518 |
36 |
0 |
0 |
T171 |
4462 |
4 |
0 |
0 |
T172 |
35705 |
37 |
0 |
0 |
payload_swap_data_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
380228285 |
1816 |
0 |
0 |
T128 |
34248 |
37 |
0 |
0 |
T129 |
67414 |
57 |
0 |
0 |
T135 |
6642 |
5 |
0 |
0 |
T166 |
21244 |
67 |
0 |
0 |
T167 |
6875 |
22 |
0 |
0 |
T168 |
12409 |
6 |
0 |
0 |
T169 |
14326 |
13 |
0 |
0 |
T170 |
6518 |
29 |
0 |
0 |
T172 |
35705 |
28 |
0 |
0 |
T173 |
30000 |
8 |
0 |
0 |
payload_swap_mask_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
380228285 |
1960 |
0 |
0 |
T128 |
34248 |
31 |
0 |
0 |
T129 |
67414 |
58 |
0 |
0 |
T135 |
6642 |
2 |
0 |
0 |
T166 |
21244 |
80 |
0 |
0 |
T167 |
6875 |
11 |
0 |
0 |
T168 |
12409 |
2 |
0 |
0 |
T169 |
14326 |
60 |
0 |
0 |
T170 |
6518 |
16 |
0 |
0 |
T172 |
35705 |
38 |
0 |
0 |
T173 |
30000 |
19 |
0 |
0 |
read_threshold_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
380228285 |
1845 |
0 |
0 |
T128 |
34248 |
36 |
0 |
0 |
T129 |
67414 |
86 |
0 |
0 |
T135 |
6642 |
5 |
0 |
0 |
T166 |
21244 |
60 |
0 |
0 |
T167 |
6875 |
10 |
0 |
0 |
T168 |
12409 |
9 |
0 |
0 |
T169 |
14326 |
14 |
0 |
0 |
T170 |
6518 |
3 |
0 |
0 |
T172 |
35705 |
33 |
0 |
0 |
T173 |
30000 |
17 |
0 |
0 |
tpm_access_0_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
380228285 |
2656 |
0 |
0 |
T128 |
34248 |
70 |
0 |
0 |
T129 |
67414 |
198 |
0 |
0 |
T135 |
6642 |
8 |
0 |
0 |
T166 |
21244 |
32 |
0 |
0 |
T167 |
6875 |
8 |
0 |
0 |
T168 |
12409 |
25 |
0 |
0 |
T169 |
14326 |
52 |
0 |
0 |
T170 |
6518 |
46 |
0 |
0 |
T171 |
4462 |
3 |
0 |
0 |
T172 |
35705 |
97 |
0 |
0 |
tpm_access_1_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
380228285 |
2087 |
0 |
0 |
T128 |
34248 |
38 |
0 |
0 |
T129 |
67414 |
74 |
0 |
0 |
T135 |
6642 |
1 |
0 |
0 |
T166 |
21244 |
92 |
0 |
0 |
T167 |
6875 |
14 |
0 |
0 |
T168 |
12409 |
11 |
0 |
0 |
T169 |
14326 |
25 |
0 |
0 |
T170 |
6518 |
12 |
0 |
0 |
T171 |
4462 |
5 |
0 |
0 |
T172 |
35705 |
38 |
0 |
0 |
tpm_cfg_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
380228285 |
2672 |
0 |
0 |
T128 |
34248 |
126 |
0 |
0 |
T129 |
67414 |
227 |
0 |
0 |
T135 |
6642 |
17 |
0 |
0 |
T166 |
21244 |
32 |
0 |
0 |
T167 |
6875 |
11 |
0 |
0 |
T168 |
12409 |
35 |
0 |
0 |
T169 |
14326 |
24 |
0 |
0 |
T170 |
6518 |
19 |
0 |
0 |
T171 |
4462 |
3 |
0 |
0 |
T172 |
35705 |
112 |
0 |
0 |
tpm_did_vid_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
380228285 |
2217 |
0 |
0 |
T128 |
34248 |
72 |
0 |
0 |
T129 |
67414 |
85 |
0 |
0 |
T135 |
6642 |
4 |
0 |
0 |
T166 |
21244 |
34 |
0 |
0 |
T167 |
6875 |
14 |
0 |
0 |
T168 |
12409 |
24 |
0 |
0 |
T169 |
14326 |
21 |
0 |
0 |
T170 |
6518 |
25 |
0 |
0 |
T172 |
35705 |
69 |
0 |
0 |
T173 |
30000 |
38 |
0 |
0 |
tpm_int_enable_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
380228285 |
1990 |
0 |
0 |
T128 |
34248 |
29 |
0 |
0 |
T129 |
67414 |
86 |
0 |
0 |
T135 |
6642 |
5 |
0 |
0 |
T166 |
21244 |
64 |
0 |
0 |
T167 |
6875 |
23 |
0 |
0 |
T168 |
12409 |
23 |
0 |
0 |
T169 |
14326 |
78 |
0 |
0 |
T170 |
6518 |
38 |
0 |
0 |
T171 |
4462 |
8 |
0 |
0 |
T172 |
35705 |
40 |
0 |
0 |
tpm_int_status_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
380228285 |
1939 |
0 |
0 |
T128 |
34248 |
23 |
0 |
0 |
T129 |
67414 |
96 |
0 |
0 |
T166 |
21244 |
41 |
0 |
0 |
T167 |
6875 |
21 |
0 |
0 |
T168 |
12409 |
26 |
0 |
0 |
T169 |
14326 |
11 |
0 |
0 |
T170 |
6518 |
31 |
0 |
0 |
T171 |
4462 |
5 |
0 |
0 |
T172 |
35705 |
39 |
0 |
0 |
T173 |
30000 |
12 |
0 |
0 |
tpm_int_vector_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
380228285 |
1808 |
0 |
0 |
T128 |
34248 |
37 |
0 |
0 |
T129 |
67414 |
72 |
0 |
0 |
T135 |
6642 |
1 |
0 |
0 |
T166 |
21244 |
46 |
0 |
0 |
T167 |
6875 |
4 |
0 |
0 |
T168 |
12409 |
10 |
0 |
0 |
T169 |
14326 |
54 |
0 |
0 |
T170 |
6518 |
17 |
0 |
0 |
T171 |
4462 |
4 |
0 |
0 |
T172 |
35705 |
45 |
0 |
0 |
tpm_intf_capability_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
380228285 |
1858 |
0 |
0 |
T128 |
34248 |
32 |
0 |
0 |
T129 |
67414 |
87 |
0 |
0 |
T135 |
6642 |
4 |
0 |
0 |
T166 |
21244 |
62 |
0 |
0 |
T167 |
6875 |
13 |
0 |
0 |
T168 |
12409 |
14 |
0 |
0 |
T169 |
14326 |
56 |
0 |
0 |
T170 |
6518 |
6 |
0 |
0 |
T171 |
4462 |
1 |
0 |
0 |
T172 |
35705 |
32 |
0 |
0 |
tpm_rid_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
380228285 |
1798 |
0 |
0 |
T128 |
34248 |
23 |
0 |
0 |
T129 |
67414 |
63 |
0 |
0 |
T166 |
21244 |
99 |
0 |
0 |
T167 |
6875 |
2 |
0 |
0 |
T168 |
12409 |
10 |
0 |
0 |
T169 |
14326 |
30 |
0 |
0 |
T170 |
6518 |
13 |
0 |
0 |
T171 |
4462 |
7 |
0 |
0 |
T172 |
35705 |
38 |
0 |
0 |
T173 |
30000 |
7 |
0 |
0 |
tpm_sts_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
380228285 |
1914 |
0 |
0 |
T128 |
34248 |
46 |
0 |
0 |
T129 |
67414 |
64 |
0 |
0 |
T135 |
6642 |
6 |
0 |
0 |
T166 |
21244 |
59 |
0 |
0 |
T167 |
6875 |
2 |
0 |
0 |
T168 |
12409 |
17 |
0 |
0 |
T169 |
14326 |
63 |
0 |
0 |
T170 |
6518 |
5 |
0 |
0 |
T171 |
4462 |
9 |
0 |
0 |
T172 |
35705 |
39 |
0 |
0 |