Assert Coverage for Module :
spi_device_csr_assert_fpv
Assertion Details
TlulOOBAddrErr_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
504049421 |
3506 |
0 |
0 |
T92 |
14527 |
227 |
0 |
0 |
T94 |
56285 |
3 |
0 |
0 |
T95 |
15741 |
7 |
0 |
0 |
T96 |
8545 |
9 |
0 |
0 |
T97 |
4215 |
113 |
0 |
0 |
T98 |
36198 |
1 |
0 |
0 |
T99 |
9174 |
148 |
0 |
0 |
T100 |
16401 |
212 |
0 |
0 |
T107 |
6213 |
2 |
0 |
0 |
T108 |
2312 |
2 |
0 |
0 |
addr_swap_data_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
504049421 |
2122 |
0 |
0 |
T95 |
15741 |
21 |
0 |
0 |
T96 |
8545 |
2 |
0 |
0 |
T98 |
36198 |
35 |
0 |
0 |
T109 |
69031 |
61 |
0 |
0 |
T114 |
11559 |
20 |
0 |
0 |
T115 |
102510 |
350 |
0 |
0 |
T116 |
7741 |
10 |
0 |
0 |
T117 |
6303 |
12 |
0 |
0 |
T143 |
13924 |
72 |
0 |
0 |
T144 |
32589 |
5 |
0 |
0 |
addr_swap_mask_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
504049421 |
2247 |
0 |
0 |
T95 |
15741 |
25 |
0 |
0 |
T96 |
8545 |
5 |
0 |
0 |
T98 |
36198 |
46 |
0 |
0 |
T109 |
69031 |
75 |
0 |
0 |
T114 |
11559 |
14 |
0 |
0 |
T115 |
102510 |
401 |
0 |
0 |
T116 |
7741 |
15 |
0 |
0 |
T117 |
6303 |
13 |
0 |
0 |
T143 |
13924 |
27 |
0 |
0 |
T144 |
32589 |
26 |
0 |
0 |
cfg_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
504049421 |
2860 |
0 |
0 |
T95 |
15741 |
16 |
0 |
0 |
T96 |
8545 |
2 |
0 |
0 |
T98 |
36198 |
115 |
0 |
0 |
T109 |
69031 |
127 |
0 |
0 |
T114 |
11559 |
23 |
0 |
0 |
T115 |
102510 |
409 |
0 |
0 |
T116 |
7741 |
19 |
0 |
0 |
T117 |
6303 |
15 |
0 |
0 |
T143 |
13924 |
13 |
0 |
0 |
T144 |
32589 |
52 |
0 |
0 |
cmd_filter_0_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
504049421 |
11010 |
0 |
0 |
T95 |
15741 |
105 |
0 |
0 |
T96 |
8545 |
113 |
0 |
0 |
T98 |
36198 |
557 |
0 |
0 |
T109 |
69031 |
1221 |
0 |
0 |
T114 |
11559 |
19 |
0 |
0 |
T115 |
102510 |
376 |
0 |
0 |
T116 |
7741 |
119 |
0 |
0 |
T117 |
6303 |
14 |
0 |
0 |
T143 |
13924 |
14 |
0 |
0 |
T144 |
32589 |
301 |
0 |
0 |
cmd_filter_1_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
504049421 |
12304 |
0 |
0 |
T95 |
15741 |
281 |
0 |
0 |
T96 |
8545 |
80 |
0 |
0 |
T98 |
36198 |
534 |
0 |
0 |
T109 |
69031 |
1012 |
0 |
0 |
T114 |
11559 |
242 |
0 |
0 |
T115 |
102510 |
457 |
0 |
0 |
T116 |
7741 |
126 |
0 |
0 |
T117 |
6303 |
1 |
0 |
0 |
T143 |
13924 |
16 |
0 |
0 |
T144 |
32589 |
377 |
0 |
0 |
cmd_filter_2_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
504049421 |
12582 |
0 |
0 |
T95 |
15741 |
27 |
0 |
0 |
T96 |
8545 |
14 |
0 |
0 |
T98 |
36198 |
909 |
0 |
0 |
T109 |
69031 |
1245 |
0 |
0 |
T114 |
11559 |
237 |
0 |
0 |
T115 |
102510 |
436 |
0 |
0 |
T116 |
7741 |
7 |
0 |
0 |
T117 |
6303 |
97 |
0 |
0 |
T143 |
13924 |
18 |
0 |
0 |
T144 |
32589 |
320 |
0 |
0 |
cmd_filter_3_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
504049421 |
12313 |
0 |
0 |
T95 |
15741 |
337 |
0 |
0 |
T98 |
36198 |
459 |
0 |
0 |
T109 |
69031 |
1052 |
0 |
0 |
T114 |
11559 |
262 |
0 |
0 |
T115 |
102510 |
378 |
0 |
0 |
T116 |
7741 |
9 |
0 |
0 |
T117 |
6303 |
149 |
0 |
0 |
T120 |
3918 |
140 |
0 |
0 |
T143 |
13924 |
49 |
0 |
0 |
T144 |
32589 |
285 |
0 |
0 |
cmd_filter_4_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
504049421 |
10390 |
0 |
0 |
T95 |
15741 |
34 |
0 |
0 |
T96 |
8545 |
135 |
0 |
0 |
T98 |
36198 |
845 |
0 |
0 |
T109 |
69031 |
1234 |
0 |
0 |
T114 |
11559 |
222 |
0 |
0 |
T115 |
102510 |
375 |
0 |
0 |
T116 |
7741 |
3 |
0 |
0 |
T117 |
6303 |
11 |
0 |
0 |
T143 |
13924 |
52 |
0 |
0 |
T144 |
32589 |
300 |
0 |
0 |
cmd_filter_5_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
504049421 |
13749 |
0 |
0 |
T95 |
15741 |
343 |
0 |
0 |
T96 |
8545 |
6 |
0 |
0 |
T98 |
36198 |
925 |
0 |
0 |
T109 |
69031 |
1194 |
0 |
0 |
T114 |
11559 |
226 |
0 |
0 |
T115 |
102510 |
399 |
0 |
0 |
T116 |
7741 |
132 |
0 |
0 |
T117 |
6303 |
112 |
0 |
0 |
T143 |
13924 |
8 |
0 |
0 |
T144 |
32589 |
312 |
0 |
0 |
cmd_filter_6_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
504049421 |
11678 |
0 |
0 |
T95 |
15741 |
305 |
0 |
0 |
T98 |
36198 |
497 |
0 |
0 |
T109 |
69031 |
1433 |
0 |
0 |
T114 |
11559 |
253 |
0 |
0 |
T115 |
102510 |
523 |
0 |
0 |
T116 |
7741 |
243 |
0 |
0 |
T117 |
6303 |
118 |
0 |
0 |
T120 |
3918 |
3 |
0 |
0 |
T143 |
13924 |
36 |
0 |
0 |
T144 |
32589 |
287 |
0 |
0 |
cmd_filter_7_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
504049421 |
10972 |
0 |
0 |
T95 |
15741 |
20 |
0 |
0 |
T96 |
8545 |
10 |
0 |
0 |
T98 |
36198 |
561 |
0 |
0 |
T109 |
69031 |
1164 |
0 |
0 |
T114 |
11559 |
324 |
0 |
0 |
T115 |
102510 |
394 |
0 |
0 |
T116 |
7741 |
127 |
0 |
0 |
T117 |
6303 |
4 |
0 |
0 |
T143 |
13924 |
72 |
0 |
0 |
T144 |
32589 |
357 |
0 |
0 |
cmd_info_0_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
504049421 |
6198 |
0 |
0 |
T95 |
15741 |
114 |
0 |
0 |
T96 |
8545 |
36 |
0 |
0 |
T98 |
36198 |
229 |
0 |
0 |
T109 |
69031 |
343 |
0 |
0 |
T114 |
11559 |
172 |
0 |
0 |
T115 |
102510 |
471 |
0 |
0 |
T116 |
7741 |
36 |
0 |
0 |
T117 |
6303 |
114 |
0 |
0 |
T143 |
13924 |
56 |
0 |
0 |
T144 |
32589 |
196 |
0 |
0 |
cmd_info_10_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
504049421 |
6501 |
0 |
0 |
T95 |
15741 |
146 |
0 |
0 |
T96 |
8545 |
66 |
0 |
0 |
T98 |
36198 |
203 |
0 |
0 |
T109 |
69031 |
572 |
0 |
0 |
T114 |
11559 |
97 |
0 |
0 |
T115 |
102510 |
520 |
0 |
0 |
T116 |
7741 |
105 |
0 |
0 |
T117 |
6303 |
7 |
0 |
0 |
T143 |
13924 |
14 |
0 |
0 |
T144 |
32589 |
182 |
0 |
0 |
cmd_info_11_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
504049421 |
6629 |
0 |
0 |
T95 |
15741 |
126 |
0 |
0 |
T96 |
8545 |
28 |
0 |
0 |
T98 |
36198 |
241 |
0 |
0 |
T109 |
69031 |
429 |
0 |
0 |
T114 |
11559 |
128 |
0 |
0 |
T115 |
102510 |
408 |
0 |
0 |
T116 |
7741 |
97 |
0 |
0 |
T117 |
6303 |
97 |
0 |
0 |
T143 |
13924 |
61 |
0 |
0 |
T144 |
32589 |
187 |
0 |
0 |
cmd_info_12_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
504049421 |
6058 |
0 |
0 |
T95 |
15741 |
24 |
0 |
0 |
T96 |
8545 |
35 |
0 |
0 |
T98 |
36198 |
236 |
0 |
0 |
T109 |
69031 |
407 |
0 |
0 |
T114 |
11559 |
45 |
0 |
0 |
T115 |
102510 |
363 |
0 |
0 |
T116 |
7741 |
107 |
0 |
0 |
T117 |
6303 |
60 |
0 |
0 |
T143 |
13924 |
5 |
0 |
0 |
T144 |
32589 |
174 |
0 |
0 |
cmd_info_13_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
504049421 |
5469 |
0 |
0 |
T95 |
15741 |
162 |
0 |
0 |
T96 |
8545 |
11 |
0 |
0 |
T98 |
36198 |
235 |
0 |
0 |
T101 |
16324 |
5 |
0 |
0 |
T109 |
69031 |
356 |
0 |
0 |
T114 |
11559 |
93 |
0 |
0 |
T115 |
102510 |
405 |
0 |
0 |
T116 |
7741 |
9 |
0 |
0 |
T143 |
13924 |
36 |
0 |
0 |
T144 |
32589 |
133 |
0 |
0 |
cmd_info_14_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
504049421 |
5810 |
0 |
0 |
T95 |
15741 |
14 |
0 |
0 |
T96 |
8545 |
12 |
0 |
0 |
T98 |
36198 |
270 |
0 |
0 |
T109 |
69031 |
402 |
0 |
0 |
T114 |
11559 |
108 |
0 |
0 |
T115 |
102510 |
386 |
0 |
0 |
T116 |
7741 |
40 |
0 |
0 |
T117 |
6303 |
18 |
0 |
0 |
T143 |
13924 |
39 |
0 |
0 |
T144 |
32589 |
67 |
0 |
0 |
cmd_info_15_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
504049421 |
6051 |
0 |
0 |
T95 |
15741 |
23 |
0 |
0 |
T96 |
8545 |
40 |
0 |
0 |
T98 |
36198 |
209 |
0 |
0 |
T109 |
69031 |
450 |
0 |
0 |
T114 |
11559 |
153 |
0 |
0 |
T115 |
102510 |
389 |
0 |
0 |
T116 |
7741 |
38 |
0 |
0 |
T117 |
6303 |
47 |
0 |
0 |
T143 |
13924 |
63 |
0 |
0 |
T144 |
32589 |
160 |
0 |
0 |
cmd_info_16_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
504049421 |
6005 |
0 |
0 |
T95 |
15741 |
92 |
0 |
0 |
T96 |
8545 |
49 |
0 |
0 |
T98 |
36198 |
200 |
0 |
0 |
T100 |
16401 |
2 |
0 |
0 |
T109 |
69031 |
452 |
0 |
0 |
T114 |
11559 |
81 |
0 |
0 |
T115 |
102510 |
473 |
0 |
0 |
T116 |
7741 |
47 |
0 |
0 |
T143 |
13924 |
43 |
0 |
0 |
T144 |
32589 |
220 |
0 |
0 |
cmd_info_17_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
504049421 |
5948 |
0 |
0 |
T95 |
15741 |
68 |
0 |
0 |
T96 |
8545 |
6 |
0 |
0 |
T98 |
36198 |
234 |
0 |
0 |
T109 |
69031 |
633 |
0 |
0 |
T114 |
11559 |
41 |
0 |
0 |
T115 |
102510 |
445 |
0 |
0 |
T116 |
7741 |
83 |
0 |
0 |
T117 |
6303 |
5 |
0 |
0 |
T143 |
13924 |
68 |
0 |
0 |
T144 |
32589 |
112 |
0 |
0 |
cmd_info_18_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
504049421 |
5704 |
0 |
0 |
T95 |
15741 |
133 |
0 |
0 |
T96 |
8545 |
30 |
0 |
0 |
T98 |
36198 |
160 |
0 |
0 |
T109 |
69031 |
484 |
0 |
0 |
T114 |
11559 |
49 |
0 |
0 |
T115 |
102510 |
436 |
0 |
0 |
T116 |
7741 |
50 |
0 |
0 |
T117 |
6303 |
9 |
0 |
0 |
T143 |
13924 |
38 |
0 |
0 |
T144 |
32589 |
94 |
0 |
0 |
cmd_info_19_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
504049421 |
6473 |
0 |
0 |
T95 |
15741 |
110 |
0 |
0 |
T96 |
8545 |
36 |
0 |
0 |
T98 |
36198 |
307 |
0 |
0 |
T109 |
69031 |
883 |
0 |
0 |
T114 |
11559 |
113 |
0 |
0 |
T115 |
102510 |
362 |
0 |
0 |
T116 |
7741 |
9 |
0 |
0 |
T117 |
6303 |
43 |
0 |
0 |
T143 |
13924 |
23 |
0 |
0 |
T144 |
32589 |
123 |
0 |
0 |
cmd_info_1_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
504049421 |
5793 |
0 |
0 |
T95 |
15741 |
98 |
0 |
0 |
T96 |
8545 |
51 |
0 |
0 |
T98 |
36198 |
249 |
0 |
0 |
T109 |
69031 |
364 |
0 |
0 |
T114 |
11559 |
63 |
0 |
0 |
T115 |
102510 |
403 |
0 |
0 |
T116 |
7741 |
116 |
0 |
0 |
T117 |
6303 |
58 |
0 |
0 |
T143 |
13924 |
63 |
0 |
0 |
T144 |
32589 |
181 |
0 |
0 |
cmd_info_20_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
504049421 |
6546 |
0 |
0 |
T92 |
14527 |
6 |
0 |
0 |
T95 |
15741 |
27 |
0 |
0 |
T96 |
8545 |
31 |
0 |
0 |
T98 |
36198 |
284 |
0 |
0 |
T109 |
69031 |
671 |
0 |
0 |
T114 |
11559 |
61 |
0 |
0 |
T115 |
102510 |
420 |
0 |
0 |
T116 |
7741 |
52 |
0 |
0 |
T143 |
13924 |
32 |
0 |
0 |
T144 |
32589 |
174 |
0 |
0 |
cmd_info_21_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
504049421 |
6116 |
0 |
0 |
T95 |
15741 |
77 |
0 |
0 |
T96 |
8545 |
20 |
0 |
0 |
T98 |
36198 |
254 |
0 |
0 |
T109 |
69031 |
667 |
0 |
0 |
T114 |
11559 |
124 |
0 |
0 |
T115 |
102510 |
465 |
0 |
0 |
T116 |
7741 |
31 |
0 |
0 |
T117 |
6303 |
69 |
0 |
0 |
T143 |
13924 |
51 |
0 |
0 |
T144 |
32589 |
257 |
0 |
0 |
cmd_info_22_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
504049421 |
5850 |
0 |
0 |
T95 |
15741 |
13 |
0 |
0 |
T96 |
8545 |
64 |
0 |
0 |
T98 |
36198 |
352 |
0 |
0 |
T109 |
69031 |
385 |
0 |
0 |
T114 |
11559 |
86 |
0 |
0 |
T115 |
102510 |
431 |
0 |
0 |
T116 |
7741 |
48 |
0 |
0 |
T117 |
6303 |
9 |
0 |
0 |
T143 |
13924 |
34 |
0 |
0 |
T144 |
32589 |
136 |
0 |
0 |
cmd_info_23_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
504049421 |
6399 |
0 |
0 |
T95 |
15741 |
64 |
0 |
0 |
T96 |
8545 |
8 |
0 |
0 |
T98 |
36198 |
240 |
0 |
0 |
T109 |
69031 |
635 |
0 |
0 |
T114 |
11559 |
62 |
0 |
0 |
T115 |
102510 |
436 |
0 |
0 |
T116 |
7741 |
6 |
0 |
0 |
T117 |
6303 |
43 |
0 |
0 |
T143 |
13924 |
26 |
0 |
0 |
T144 |
32589 |
149 |
0 |
0 |
cmd_info_2_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
504049421 |
6092 |
0 |
0 |
T95 |
15741 |
140 |
0 |
0 |
T96 |
8545 |
23 |
0 |
0 |
T98 |
36198 |
326 |
0 |
0 |
T109 |
69031 |
492 |
0 |
0 |
T114 |
11559 |
82 |
0 |
0 |
T115 |
102510 |
378 |
0 |
0 |
T116 |
7741 |
53 |
0 |
0 |
T117 |
6303 |
6 |
0 |
0 |
T143 |
13924 |
77 |
0 |
0 |
T144 |
32589 |
147 |
0 |
0 |
cmd_info_3_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
504049421 |
6223 |
0 |
0 |
T95 |
15741 |
96 |
0 |
0 |
T96 |
8545 |
64 |
0 |
0 |
T98 |
36198 |
252 |
0 |
0 |
T109 |
69031 |
460 |
0 |
0 |
T114 |
11559 |
142 |
0 |
0 |
T115 |
102510 |
364 |
0 |
0 |
T116 |
7741 |
48 |
0 |
0 |
T117 |
6303 |
70 |
0 |
0 |
T143 |
13924 |
42 |
0 |
0 |
T144 |
32589 |
162 |
0 |
0 |
cmd_info_4_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
504049421 |
5834 |
0 |
0 |
T95 |
15741 |
181 |
0 |
0 |
T96 |
8545 |
6 |
0 |
0 |
T98 |
36198 |
197 |
0 |
0 |
T109 |
69031 |
455 |
0 |
0 |
T114 |
11559 |
56 |
0 |
0 |
T115 |
102510 |
381 |
0 |
0 |
T116 |
7741 |
57 |
0 |
0 |
T117 |
6303 |
49 |
0 |
0 |
T143 |
13924 |
47 |
0 |
0 |
T144 |
32589 |
87 |
0 |
0 |
cmd_info_5_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
504049421 |
6132 |
0 |
0 |
T95 |
15741 |
112 |
0 |
0 |
T96 |
8545 |
15 |
0 |
0 |
T98 |
36198 |
366 |
0 |
0 |
T109 |
69031 |
633 |
0 |
0 |
T114 |
11559 |
156 |
0 |
0 |
T115 |
102510 |
416 |
0 |
0 |
T116 |
7741 |
90 |
0 |
0 |
T117 |
6303 |
3 |
0 |
0 |
T143 |
13924 |
40 |
0 |
0 |
T144 |
32589 |
134 |
0 |
0 |
cmd_info_6_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
504049421 |
6156 |
0 |
0 |
T95 |
15741 |
93 |
0 |
0 |
T96 |
8545 |
41 |
0 |
0 |
T98 |
36198 |
308 |
0 |
0 |
T109 |
69031 |
683 |
0 |
0 |
T114 |
11559 |
104 |
0 |
0 |
T115 |
102510 |
345 |
0 |
0 |
T116 |
7741 |
101 |
0 |
0 |
T117 |
6303 |
13 |
0 |
0 |
T143 |
13924 |
33 |
0 |
0 |
T144 |
32589 |
164 |
0 |
0 |
cmd_info_7_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
504049421 |
6151 |
0 |
0 |
T95 |
15741 |
98 |
0 |
0 |
T96 |
8545 |
64 |
0 |
0 |
T98 |
36198 |
309 |
0 |
0 |
T109 |
69031 |
333 |
0 |
0 |
T114 |
11559 |
113 |
0 |
0 |
T115 |
102510 |
392 |
0 |
0 |
T116 |
7741 |
52 |
0 |
0 |
T117 |
6303 |
47 |
0 |
0 |
T143 |
13924 |
67 |
0 |
0 |
T144 |
32589 |
154 |
0 |
0 |
cmd_info_8_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
504049421 |
5369 |
0 |
0 |
T95 |
15741 |
124 |
0 |
0 |
T96 |
8545 |
47 |
0 |
0 |
T98 |
36198 |
135 |
0 |
0 |
T109 |
69031 |
516 |
0 |
0 |
T114 |
11559 |
48 |
0 |
0 |
T115 |
102510 |
474 |
0 |
0 |
T116 |
7741 |
38 |
0 |
0 |
T117 |
6303 |
99 |
0 |
0 |
T143 |
13924 |
30 |
0 |
0 |
T144 |
32589 |
150 |
0 |
0 |
cmd_info_9_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
504049421 |
6055 |
0 |
0 |
T95 |
15741 |
114 |
0 |
0 |
T96 |
8545 |
46 |
0 |
0 |
T98 |
36198 |
240 |
0 |
0 |
T109 |
69031 |
565 |
0 |
0 |
T114 |
11559 |
13 |
0 |
0 |
T115 |
102510 |
388 |
0 |
0 |
T116 |
7741 |
39 |
0 |
0 |
T117 |
6303 |
93 |
0 |
0 |
T143 |
13924 |
46 |
0 |
0 |
T144 |
32589 |
40 |
0 |
0 |
cmd_info_en4b_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
504049421 |
2619 |
0 |
0 |
T95 |
15741 |
27 |
0 |
0 |
T96 |
8545 |
6 |
0 |
0 |
T98 |
36198 |
60 |
0 |
0 |
T109 |
69031 |
123 |
0 |
0 |
T114 |
11559 |
11 |
0 |
0 |
T115 |
102510 |
425 |
0 |
0 |
T116 |
7741 |
1 |
0 |
0 |
T117 |
6303 |
4 |
0 |
0 |
T143 |
13924 |
60 |
0 |
0 |
T144 |
32589 |
44 |
0 |
0 |
cmd_info_ex4b_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
504049421 |
2543 |
0 |
0 |
T95 |
15741 |
28 |
0 |
0 |
T96 |
8545 |
8 |
0 |
0 |
T98 |
36198 |
49 |
0 |
0 |
T109 |
69031 |
106 |
0 |
0 |
T114 |
11559 |
17 |
0 |
0 |
T115 |
102510 |
438 |
0 |
0 |
T116 |
7741 |
15 |
0 |
0 |
T117 |
6303 |
11 |
0 |
0 |
T143 |
13924 |
44 |
0 |
0 |
T144 |
32589 |
40 |
0 |
0 |
cmd_info_wrdi_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
504049421 |
2551 |
0 |
0 |
T95 |
15741 |
35 |
0 |
0 |
T96 |
8545 |
3 |
0 |
0 |
T98 |
36198 |
74 |
0 |
0 |
T109 |
69031 |
151 |
0 |
0 |
T114 |
11559 |
17 |
0 |
0 |
T115 |
102510 |
433 |
0 |
0 |
T116 |
7741 |
9 |
0 |
0 |
T117 |
6303 |
8 |
0 |
0 |
T143 |
13924 |
65 |
0 |
0 |
T144 |
32589 |
25 |
0 |
0 |
cmd_info_wren_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
504049421 |
2624 |
0 |
0 |
T95 |
15741 |
33 |
0 |
0 |
T96 |
8545 |
6 |
0 |
0 |
T98 |
36198 |
55 |
0 |
0 |
T109 |
69031 |
109 |
0 |
0 |
T114 |
11559 |
19 |
0 |
0 |
T115 |
102510 |
409 |
0 |
0 |
T116 |
7741 |
7 |
0 |
0 |
T117 |
6303 |
4 |
0 |
0 |
T143 |
13924 |
69 |
0 |
0 |
T144 |
32589 |
37 |
0 |
0 |
intercept_en_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
504049421 |
3343 |
0 |
0 |
T95 |
15741 |
30 |
0 |
0 |
T96 |
8545 |
21 |
0 |
0 |
T98 |
36198 |
103 |
0 |
0 |
T109 |
69031 |
159 |
0 |
0 |
T114 |
11559 |
40 |
0 |
0 |
T115 |
102510 |
409 |
0 |
0 |
T116 |
7741 |
17 |
0 |
0 |
T117 |
6303 |
5 |
0 |
0 |
T143 |
13924 |
48 |
0 |
0 |
T144 |
32589 |
56 |
0 |
0 |
intr_enable_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
504049421 |
5403 |
0 |
0 |
T12 |
571058 |
50 |
0 |
0 |
T13 |
136204 |
0 |
0 |
0 |
T14 |
146793 |
0 |
0 |
0 |
T15 |
10398 |
0 |
0 |
0 |
T16 |
207458 |
0 |
0 |
0 |
T17 |
245010 |
0 |
0 |
0 |
T20 |
0 |
46 |
0 |
0 |
T21 |
0 |
27 |
0 |
0 |
T24 |
8515 |
0 |
0 |
0 |
T25 |
122423 |
0 |
0 |
0 |
T26 |
61936 |
0 |
0 |
0 |
T29 |
0 |
42 |
0 |
0 |
T32 |
7644 |
0 |
0 |
0 |
T145 |
0 |
58 |
0 |
0 |
T146 |
0 |
19 |
0 |
0 |
T147 |
0 |
16 |
0 |
0 |
T148 |
0 |
32 |
0 |
0 |
T149 |
0 |
17 |
0 |
0 |
T150 |
0 |
9 |
0 |
0 |
jedec_cc_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
504049421 |
2454 |
0 |
0 |
T95 |
15741 |
42 |
0 |
0 |
T96 |
8545 |
9 |
0 |
0 |
T98 |
36198 |
46 |
0 |
0 |
T109 |
69031 |
87 |
0 |
0 |
T114 |
11559 |
8 |
0 |
0 |
T115 |
102510 |
365 |
0 |
0 |
T116 |
7741 |
9 |
0 |
0 |
T117 |
6303 |
5 |
0 |
0 |
T143 |
13924 |
9 |
0 |
0 |
T144 |
32589 |
40 |
0 |
0 |
jedec_id_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
504049421 |
2509 |
0 |
0 |
T95 |
15741 |
36 |
0 |
0 |
T96 |
8545 |
9 |
0 |
0 |
T98 |
36198 |
72 |
0 |
0 |
T109 |
69031 |
88 |
0 |
0 |
T114 |
11559 |
17 |
0 |
0 |
T115 |
102510 |
422 |
0 |
0 |
T116 |
7741 |
15 |
0 |
0 |
T117 |
6303 |
12 |
0 |
0 |
T143 |
13924 |
21 |
0 |
0 |
T144 |
32589 |
28 |
0 |
0 |
mailbox_addr_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
504049421 |
2197 |
0 |
0 |
T95 |
15741 |
35 |
0 |
0 |
T96 |
8545 |
10 |
0 |
0 |
T98 |
36198 |
43 |
0 |
0 |
T109 |
69031 |
56 |
0 |
0 |
T114 |
11559 |
11 |
0 |
0 |
T115 |
102510 |
370 |
0 |
0 |
T116 |
7741 |
2 |
0 |
0 |
T117 |
6303 |
1 |
0 |
0 |
T143 |
13924 |
52 |
0 |
0 |
T144 |
32589 |
16 |
0 |
0 |
payload_swap_data_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
504049421 |
2121 |
0 |
0 |
T95 |
15741 |
36 |
0 |
0 |
T96 |
8545 |
11 |
0 |
0 |
T98 |
36198 |
33 |
0 |
0 |
T109 |
69031 |
71 |
0 |
0 |
T114 |
11559 |
12 |
0 |
0 |
T115 |
102510 |
381 |
0 |
0 |
T116 |
7741 |
10 |
0 |
0 |
T117 |
6303 |
6 |
0 |
0 |
T143 |
13924 |
57 |
0 |
0 |
T144 |
32589 |
32 |
0 |
0 |
payload_swap_mask_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
504049421 |
2102 |
0 |
0 |
T95 |
15741 |
26 |
0 |
0 |
T96 |
8545 |
9 |
0 |
0 |
T98 |
36198 |
45 |
0 |
0 |
T109 |
69031 |
81 |
0 |
0 |
T114 |
11559 |
22 |
0 |
0 |
T115 |
102510 |
358 |
0 |
0 |
T116 |
7741 |
15 |
0 |
0 |
T117 |
6303 |
3 |
0 |
0 |
T143 |
13924 |
34 |
0 |
0 |
T144 |
32589 |
21 |
0 |
0 |
read_threshold_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
504049421 |
2266 |
0 |
0 |
T95 |
15741 |
25 |
0 |
0 |
T96 |
8545 |
5 |
0 |
0 |
T98 |
36198 |
27 |
0 |
0 |
T109 |
69031 |
91 |
0 |
0 |
T114 |
11559 |
11 |
0 |
0 |
T115 |
102510 |
354 |
0 |
0 |
T116 |
7741 |
17 |
0 |
0 |
T117 |
6303 |
9 |
0 |
0 |
T143 |
13924 |
58 |
0 |
0 |
T144 |
32589 |
25 |
0 |
0 |
tpm_access_0_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
504049421 |
3212 |
0 |
0 |
T95 |
15741 |
52 |
0 |
0 |
T98 |
36198 |
142 |
0 |
0 |
T109 |
69031 |
128 |
0 |
0 |
T114 |
11559 |
35 |
0 |
0 |
T115 |
102510 |
401 |
0 |
0 |
T116 |
7741 |
20 |
0 |
0 |
T117 |
6303 |
12 |
0 |
0 |
T120 |
3918 |
3 |
0 |
0 |
T143 |
13924 |
85 |
0 |
0 |
T144 |
32589 |
44 |
0 |
0 |
tpm_access_1_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
504049421 |
2334 |
0 |
0 |
T95 |
15741 |
28 |
0 |
0 |
T98 |
36198 |
39 |
0 |
0 |
T109 |
69031 |
79 |
0 |
0 |
T114 |
11559 |
16 |
0 |
0 |
T115 |
102510 |
394 |
0 |
0 |
T116 |
7741 |
10 |
0 |
0 |
T117 |
6303 |
6 |
0 |
0 |
T120 |
3918 |
5 |
0 |
0 |
T143 |
13924 |
45 |
0 |
0 |
T144 |
32589 |
33 |
0 |
0 |
tpm_cfg_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
504049421 |
3457 |
0 |
0 |
T95 |
15741 |
86 |
0 |
0 |
T96 |
8545 |
8 |
0 |
0 |
T98 |
36198 |
101 |
0 |
0 |
T109 |
69031 |
233 |
0 |
0 |
T114 |
11559 |
6 |
0 |
0 |
T115 |
102510 |
406 |
0 |
0 |
T116 |
7741 |
34 |
0 |
0 |
T117 |
6303 |
33 |
0 |
0 |
T143 |
13924 |
85 |
0 |
0 |
T144 |
32589 |
37 |
0 |
0 |
tpm_did_vid_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
504049421 |
2562 |
0 |
0 |
T95 |
15741 |
47 |
0 |
0 |
T96 |
8545 |
18 |
0 |
0 |
T98 |
36198 |
48 |
0 |
0 |
T109 |
69031 |
114 |
0 |
0 |
T114 |
11559 |
9 |
0 |
0 |
T115 |
102510 |
407 |
0 |
0 |
T116 |
7741 |
5 |
0 |
0 |
T117 |
6303 |
12 |
0 |
0 |
T143 |
13924 |
33 |
0 |
0 |
T144 |
32589 |
36 |
0 |
0 |
tpm_int_enable_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
504049421 |
2230 |
0 |
0 |
T95 |
15741 |
21 |
0 |
0 |
T96 |
8545 |
2 |
0 |
0 |
T98 |
36198 |
36 |
0 |
0 |
T109 |
69031 |
72 |
0 |
0 |
T114 |
11559 |
13 |
0 |
0 |
T115 |
102510 |
433 |
0 |
0 |
T116 |
7741 |
7 |
0 |
0 |
T117 |
6303 |
3 |
0 |
0 |
T143 |
13924 |
52 |
0 |
0 |
T144 |
32589 |
7 |
0 |
0 |
tpm_int_status_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
504049421 |
2317 |
0 |
0 |
T95 |
15741 |
28 |
0 |
0 |
T96 |
8545 |
1 |
0 |
0 |
T98 |
36198 |
43 |
0 |
0 |
T109 |
69031 |
61 |
0 |
0 |
T114 |
11559 |
22 |
0 |
0 |
T115 |
102510 |
434 |
0 |
0 |
T116 |
7741 |
6 |
0 |
0 |
T117 |
6303 |
7 |
0 |
0 |
T143 |
13924 |
66 |
0 |
0 |
T144 |
32589 |
13 |
0 |
0 |
tpm_int_vector_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
504049421 |
2087 |
0 |
0 |
T95 |
15741 |
32 |
0 |
0 |
T96 |
8545 |
9 |
0 |
0 |
T98 |
36198 |
37 |
0 |
0 |
T109 |
69031 |
80 |
0 |
0 |
T114 |
11559 |
14 |
0 |
0 |
T115 |
102510 |
435 |
0 |
0 |
T116 |
7741 |
2 |
0 |
0 |
T120 |
3918 |
4 |
0 |
0 |
T143 |
13924 |
35 |
0 |
0 |
T144 |
32589 |
9 |
0 |
0 |
tpm_intf_capability_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
504049421 |
2480 |
0 |
0 |
T95 |
15741 |
35 |
0 |
0 |
T96 |
8545 |
5 |
0 |
0 |
T98 |
36198 |
36 |
0 |
0 |
T99 |
9174 |
2 |
0 |
0 |
T109 |
69031 |
107 |
0 |
0 |
T114 |
11559 |
9 |
0 |
0 |
T115 |
102510 |
434 |
0 |
0 |
T116 |
7741 |
5 |
0 |
0 |
T143 |
13924 |
83 |
0 |
0 |
T144 |
32589 |
17 |
0 |
0 |
tpm_rid_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
504049421 |
2295 |
0 |
0 |
T95 |
15741 |
19 |
0 |
0 |
T96 |
8545 |
17 |
0 |
0 |
T98 |
36198 |
26 |
0 |
0 |
T109 |
69031 |
55 |
0 |
0 |
T114 |
11559 |
10 |
0 |
0 |
T115 |
102510 |
454 |
0 |
0 |
T116 |
7741 |
5 |
0 |
0 |
T117 |
6303 |
13 |
0 |
0 |
T143 |
13924 |
30 |
0 |
0 |
T144 |
32589 |
20 |
0 |
0 |
tpm_sts_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
504049421 |
2205 |
0 |
0 |
T95 |
15741 |
18 |
0 |
0 |
T96 |
8545 |
8 |
0 |
0 |
T98 |
36198 |
32 |
0 |
0 |
T109 |
69031 |
78 |
0 |
0 |
T114 |
11559 |
14 |
0 |
0 |
T115 |
102510 |
395 |
0 |
0 |
T116 |
7741 |
7 |
0 |
0 |
T117 |
6303 |
9 |
0 |
0 |
T143 |
13924 |
38 |
0 |
0 |
T144 |
32589 |
7 |
0 |
0 |