Assert Coverage for Module :
spi_device_csr_assert_fpv
Assertion Details
TlulOOBAddrErr_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
467825371 |
3646 |
0 |
0 |
T94 |
3760 |
4 |
0 |
0 |
T95 |
2884 |
53 |
0 |
0 |
T96 |
78448 |
6 |
0 |
0 |
T97 |
9687 |
182 |
0 |
0 |
T98 |
10547 |
104 |
0 |
0 |
T99 |
28278 |
2 |
0 |
0 |
T103 |
5703 |
270 |
0 |
0 |
T104 |
6037 |
207 |
0 |
0 |
T108 |
10900 |
8 |
0 |
0 |
T112 |
4765 |
14 |
0 |
0 |
addr_swap_data_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
467825371 |
1467 |
0 |
0 |
T100 |
35401 |
34 |
0 |
0 |
T108 |
10900 |
19 |
0 |
0 |
T113 |
4617 |
6 |
0 |
0 |
T115 |
11295 |
9 |
0 |
0 |
T117 |
269424 |
639 |
0 |
0 |
T142 |
4663 |
7 |
0 |
0 |
T143 |
70441 |
56 |
0 |
0 |
T144 |
18759 |
37 |
0 |
0 |
T145 |
6710 |
16 |
0 |
0 |
T146 |
64822 |
76 |
0 |
0 |
addr_swap_mask_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
467825371 |
1598 |
0 |
0 |
T100 |
35401 |
39 |
0 |
0 |
T108 |
10900 |
13 |
0 |
0 |
T115 |
11295 |
19 |
0 |
0 |
T117 |
269424 |
680 |
0 |
0 |
T142 |
4663 |
1 |
0 |
0 |
T143 |
70441 |
96 |
0 |
0 |
T144 |
18759 |
63 |
0 |
0 |
T145 |
6710 |
6 |
0 |
0 |
T146 |
64822 |
106 |
0 |
0 |
T147 |
20712 |
50 |
0 |
0 |
cfg_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
467825371 |
1950 |
0 |
0 |
T78 |
2231 |
1 |
0 |
0 |
T100 |
35401 |
61 |
0 |
0 |
T108 |
10900 |
14 |
0 |
0 |
T113 |
4617 |
2 |
0 |
0 |
T115 |
11295 |
17 |
0 |
0 |
T117 |
269424 |
747 |
0 |
0 |
T142 |
4663 |
1 |
0 |
0 |
T143 |
70441 |
134 |
0 |
0 |
T144 |
18759 |
60 |
0 |
0 |
T145 |
6710 |
23 |
0 |
0 |
cmd_filter_0_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
467825371 |
8389 |
0 |
0 |
T78 |
2231 |
3 |
0 |
0 |
T100 |
35401 |
661 |
0 |
0 |
T108 |
10900 |
253 |
0 |
0 |
T113 |
4617 |
1 |
0 |
0 |
T115 |
11295 |
18 |
0 |
0 |
T117 |
269424 |
647 |
0 |
0 |
T142 |
4663 |
130 |
0 |
0 |
T143 |
70441 |
1369 |
0 |
0 |
T144 |
18759 |
22 |
0 |
0 |
T145 |
6710 |
115 |
0 |
0 |
cmd_filter_1_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
467825371 |
8078 |
0 |
0 |
T100 |
35401 |
456 |
0 |
0 |
T108 |
10900 |
15 |
0 |
0 |
T113 |
4617 |
79 |
0 |
0 |
T115 |
11295 |
272 |
0 |
0 |
T117 |
269424 |
670 |
0 |
0 |
T142 |
4663 |
3 |
0 |
0 |
T143 |
70441 |
970 |
0 |
0 |
T144 |
18759 |
71 |
0 |
0 |
T145 |
6710 |
152 |
0 |
0 |
T146 |
64822 |
1839 |
0 |
0 |
cmd_filter_2_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
467825371 |
7102 |
0 |
0 |
T100 |
35401 |
345 |
0 |
0 |
T108 |
10900 |
234 |
0 |
0 |
T113 |
4617 |
2 |
0 |
0 |
T115 |
11295 |
246 |
0 |
0 |
T117 |
269424 |
655 |
0 |
0 |
T142 |
4663 |
6 |
0 |
0 |
T143 |
70441 |
1155 |
0 |
0 |
T144 |
18759 |
55 |
0 |
0 |
T145 |
6710 |
110 |
0 |
0 |
T146 |
64822 |
1022 |
0 |
0 |
cmd_filter_3_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
467825371 |
8722 |
0 |
0 |
T78 |
2231 |
1 |
0 |
0 |
T100 |
35401 |
596 |
0 |
0 |
T108 |
10900 |
131 |
0 |
0 |
T115 |
11295 |
278 |
0 |
0 |
T117 |
269424 |
648 |
0 |
0 |
T142 |
4663 |
6 |
0 |
0 |
T143 |
70441 |
1639 |
0 |
0 |
T144 |
18759 |
59 |
0 |
0 |
T145 |
6710 |
9 |
0 |
0 |
T146 |
64822 |
1296 |
0 |
0 |
cmd_filter_4_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
467825371 |
7852 |
0 |
0 |
T100 |
35401 |
616 |
0 |
0 |
T108 |
10900 |
263 |
0 |
0 |
T113 |
4617 |
6 |
0 |
0 |
T115 |
11295 |
6 |
0 |
0 |
T117 |
269424 |
654 |
0 |
0 |
T142 |
4663 |
139 |
0 |
0 |
T143 |
70441 |
1886 |
0 |
0 |
T144 |
18759 |
40 |
0 |
0 |
T145 |
6710 |
118 |
0 |
0 |
T146 |
64822 |
849 |
0 |
0 |
cmd_filter_5_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
467825371 |
7365 |
0 |
0 |
T100 |
35401 |
776 |
0 |
0 |
T108 |
10900 |
283 |
0 |
0 |
T115 |
11295 |
242 |
0 |
0 |
T117 |
269424 |
672 |
0 |
0 |
T142 |
4663 |
128 |
0 |
0 |
T143 |
70441 |
657 |
0 |
0 |
T144 |
18759 |
51 |
0 |
0 |
T145 |
6710 |
8 |
0 |
0 |
T146 |
64822 |
990 |
0 |
0 |
T147 |
20712 |
49 |
0 |
0 |
cmd_filter_6_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
467825371 |
7847 |
0 |
0 |
T100 |
35401 |
948 |
0 |
0 |
T108 |
10900 |
115 |
0 |
0 |
T113 |
4617 |
2 |
0 |
0 |
T115 |
11295 |
224 |
0 |
0 |
T117 |
269424 |
622 |
0 |
0 |
T142 |
4663 |
108 |
0 |
0 |
T143 |
70441 |
1048 |
0 |
0 |
T144 |
18759 |
43 |
0 |
0 |
T145 |
6710 |
131 |
0 |
0 |
T146 |
64822 |
784 |
0 |
0 |
cmd_filter_7_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
467825371 |
8695 |
0 |
0 |
T100 |
35401 |
621 |
0 |
0 |
T108 |
10900 |
239 |
0 |
0 |
T113 |
4617 |
55 |
0 |
0 |
T115 |
11295 |
193 |
0 |
0 |
T117 |
269424 |
700 |
0 |
0 |
T143 |
70441 |
1164 |
0 |
0 |
T144 |
18759 |
47 |
0 |
0 |
T145 |
6710 |
130 |
0 |
0 |
T146 |
64822 |
1469 |
0 |
0 |
T147 |
20712 |
89 |
0 |
0 |
cmd_info_0_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
467825371 |
3885 |
0 |
0 |
T100 |
35401 |
167 |
0 |
0 |
T108 |
10900 |
44 |
0 |
0 |
T113 |
4617 |
9 |
0 |
0 |
T115 |
11295 |
64 |
0 |
0 |
T117 |
269424 |
676 |
0 |
0 |
T142 |
4663 |
3 |
0 |
0 |
T143 |
70441 |
431 |
0 |
0 |
T144 |
18759 |
54 |
0 |
0 |
T145 |
6710 |
48 |
0 |
0 |
T146 |
64822 |
532 |
0 |
0 |
cmd_info_10_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
467825371 |
3728 |
0 |
0 |
T100 |
35401 |
159 |
0 |
0 |
T108 |
10900 |
6 |
0 |
0 |
T113 |
4617 |
1 |
0 |
0 |
T115 |
11295 |
162 |
0 |
0 |
T117 |
269424 |
675 |
0 |
0 |
T142 |
4663 |
52 |
0 |
0 |
T143 |
70441 |
403 |
0 |
0 |
T144 |
18759 |
96 |
0 |
0 |
T145 |
6710 |
76 |
0 |
0 |
T146 |
64822 |
362 |
0 |
0 |
cmd_info_11_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
467825371 |
3969 |
0 |
0 |
T78 |
2231 |
10 |
0 |
0 |
T100 |
35401 |
206 |
0 |
0 |
T108 |
10900 |
46 |
0 |
0 |
T113 |
4617 |
34 |
0 |
0 |
T115 |
11295 |
74 |
0 |
0 |
T117 |
269424 |
659 |
0 |
0 |
T142 |
4663 |
40 |
0 |
0 |
T143 |
70441 |
476 |
0 |
0 |
T144 |
18759 |
52 |
0 |
0 |
T145 |
6710 |
19 |
0 |
0 |
cmd_info_12_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
467825371 |
4051 |
0 |
0 |
T100 |
35401 |
222 |
0 |
0 |
T108 |
10900 |
36 |
0 |
0 |
T113 |
4617 |
42 |
0 |
0 |
T115 |
11295 |
96 |
0 |
0 |
T117 |
269424 |
594 |
0 |
0 |
T142 |
4663 |
37 |
0 |
0 |
T143 |
70441 |
437 |
0 |
0 |
T144 |
18759 |
60 |
0 |
0 |
T145 |
6710 |
8 |
0 |
0 |
T146 |
64822 |
503 |
0 |
0 |
cmd_info_13_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
467825371 |
4170 |
0 |
0 |
T100 |
35401 |
318 |
0 |
0 |
T108 |
10900 |
66 |
0 |
0 |
T113 |
4617 |
38 |
0 |
0 |
T115 |
11295 |
7 |
0 |
0 |
T117 |
269424 |
697 |
0 |
0 |
T143 |
70441 |
589 |
0 |
0 |
T144 |
18759 |
89 |
0 |
0 |
T145 |
6710 |
51 |
0 |
0 |
T146 |
64822 |
603 |
0 |
0 |
T147 |
20712 |
79 |
0 |
0 |
cmd_info_14_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
467825371 |
3692 |
0 |
0 |
T78 |
2231 |
4 |
0 |
0 |
T100 |
35401 |
364 |
0 |
0 |
T108 |
10900 |
13 |
0 |
0 |
T113 |
4617 |
23 |
0 |
0 |
T115 |
11295 |
6 |
0 |
0 |
T117 |
269424 |
642 |
0 |
0 |
T142 |
4663 |
8 |
0 |
0 |
T143 |
70441 |
425 |
0 |
0 |
T144 |
18759 |
59 |
0 |
0 |
T145 |
6710 |
8 |
0 |
0 |
cmd_info_15_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
467825371 |
3542 |
0 |
0 |
T78 |
2231 |
2 |
0 |
0 |
T100 |
35401 |
232 |
0 |
0 |
T108 |
10900 |
55 |
0 |
0 |
T115 |
11295 |
144 |
0 |
0 |
T117 |
269424 |
708 |
0 |
0 |
T142 |
4663 |
6 |
0 |
0 |
T143 |
70441 |
339 |
0 |
0 |
T144 |
18759 |
33 |
0 |
0 |
T145 |
6710 |
48 |
0 |
0 |
T146 |
64822 |
551 |
0 |
0 |
cmd_info_16_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
467825371 |
4316 |
0 |
0 |
T100 |
35401 |
195 |
0 |
0 |
T108 |
10900 |
138 |
0 |
0 |
T113 |
4617 |
7 |
0 |
0 |
T115 |
11295 |
43 |
0 |
0 |
T117 |
269424 |
669 |
0 |
0 |
T142 |
4663 |
43 |
0 |
0 |
T143 |
70441 |
531 |
0 |
0 |
T144 |
18759 |
27 |
0 |
0 |
T145 |
6710 |
17 |
0 |
0 |
T146 |
64822 |
555 |
0 |
0 |
cmd_info_17_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
467825371 |
4305 |
0 |
0 |
T78 |
2231 |
6 |
0 |
0 |
T100 |
35401 |
142 |
0 |
0 |
T108 |
10900 |
127 |
0 |
0 |
T115 |
11295 |
163 |
0 |
0 |
T117 |
269424 |
620 |
0 |
0 |
T142 |
4663 |
62 |
0 |
0 |
T143 |
70441 |
685 |
0 |
0 |
T144 |
18759 |
12 |
0 |
0 |
T145 |
6710 |
11 |
0 |
0 |
T146 |
64822 |
420 |
0 |
0 |
cmd_info_18_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
467825371 |
4116 |
0 |
0 |
T100 |
35401 |
243 |
0 |
0 |
T108 |
10900 |
40 |
0 |
0 |
T113 |
4617 |
32 |
0 |
0 |
T115 |
11295 |
45 |
0 |
0 |
T117 |
269424 |
682 |
0 |
0 |
T142 |
4663 |
55 |
0 |
0 |
T143 |
70441 |
591 |
0 |
0 |
T144 |
18759 |
49 |
0 |
0 |
T145 |
6710 |
8 |
0 |
0 |
T146 |
64822 |
508 |
0 |
0 |
cmd_info_19_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
467825371 |
4322 |
0 |
0 |
T78 |
2231 |
7 |
0 |
0 |
T100 |
35401 |
226 |
0 |
0 |
T108 |
10900 |
92 |
0 |
0 |
T113 |
4617 |
8 |
0 |
0 |
T115 |
11295 |
126 |
0 |
0 |
T117 |
269424 |
623 |
0 |
0 |
T142 |
4663 |
63 |
0 |
0 |
T143 |
70441 |
347 |
0 |
0 |
T144 |
18759 |
47 |
0 |
0 |
T145 |
6710 |
45 |
0 |
0 |
cmd_info_1_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
467825371 |
4077 |
0 |
0 |
T100 |
35401 |
411 |
0 |
0 |
T108 |
10900 |
63 |
0 |
0 |
T113 |
4617 |
22 |
0 |
0 |
T115 |
11295 |
13 |
0 |
0 |
T117 |
269424 |
723 |
0 |
0 |
T142 |
4663 |
6 |
0 |
0 |
T143 |
70441 |
395 |
0 |
0 |
T144 |
18759 |
43 |
0 |
0 |
T145 |
6710 |
58 |
0 |
0 |
T146 |
64822 |
499 |
0 |
0 |
cmd_info_20_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
467825371 |
4474 |
0 |
0 |
T78 |
2231 |
1 |
0 |
0 |
T100 |
35401 |
263 |
0 |
0 |
T108 |
10900 |
126 |
0 |
0 |
T113 |
4617 |
26 |
0 |
0 |
T115 |
11295 |
59 |
0 |
0 |
T117 |
269424 |
679 |
0 |
0 |
T142 |
4663 |
57 |
0 |
0 |
T143 |
70441 |
571 |
0 |
0 |
T144 |
18759 |
114 |
0 |
0 |
T145 |
6710 |
58 |
0 |
0 |
cmd_info_21_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
467825371 |
3814 |
0 |
0 |
T78 |
2231 |
2 |
0 |
0 |
T100 |
35401 |
132 |
0 |
0 |
T108 |
10900 |
51 |
0 |
0 |
T113 |
4617 |
6 |
0 |
0 |
T115 |
11295 |
37 |
0 |
0 |
T117 |
269424 |
668 |
0 |
0 |
T142 |
4663 |
5 |
0 |
0 |
T143 |
70441 |
456 |
0 |
0 |
T144 |
18759 |
84 |
0 |
0 |
T145 |
6710 |
13 |
0 |
0 |
cmd_info_22_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
467825371 |
4071 |
0 |
0 |
T78 |
2231 |
1 |
0 |
0 |
T100 |
35401 |
227 |
0 |
0 |
T108 |
10900 |
121 |
0 |
0 |
T113 |
4617 |
30 |
0 |
0 |
T115 |
11295 |
57 |
0 |
0 |
T117 |
269424 |
665 |
0 |
0 |
T142 |
4663 |
51 |
0 |
0 |
T143 |
70441 |
564 |
0 |
0 |
T144 |
18759 |
47 |
0 |
0 |
T145 |
6710 |
50 |
0 |
0 |
cmd_info_23_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
467825371 |
4567 |
0 |
0 |
T100 |
35401 |
298 |
0 |
0 |
T108 |
10900 |
78 |
0 |
0 |
T113 |
4617 |
4 |
0 |
0 |
T115 |
11295 |
46 |
0 |
0 |
T117 |
269424 |
682 |
0 |
0 |
T142 |
4663 |
3 |
0 |
0 |
T143 |
70441 |
631 |
0 |
0 |
T144 |
18759 |
87 |
0 |
0 |
T145 |
6710 |
6 |
0 |
0 |
T146 |
64822 |
694 |
0 |
0 |
cmd_info_2_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
467825371 |
4163 |
0 |
0 |
T78 |
2231 |
3 |
0 |
0 |
T100 |
35401 |
244 |
0 |
0 |
T108 |
10900 |
13 |
0 |
0 |
T113 |
4617 |
27 |
0 |
0 |
T115 |
11295 |
8 |
0 |
0 |
T117 |
269424 |
630 |
0 |
0 |
T142 |
4663 |
74 |
0 |
0 |
T143 |
70441 |
604 |
0 |
0 |
T144 |
18759 |
123 |
0 |
0 |
T145 |
6710 |
15 |
0 |
0 |
cmd_info_3_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
467825371 |
4406 |
0 |
0 |
T78 |
2231 |
9 |
0 |
0 |
T100 |
35401 |
311 |
0 |
0 |
T108 |
10900 |
71 |
0 |
0 |
T113 |
4617 |
1 |
0 |
0 |
T115 |
11295 |
85 |
0 |
0 |
T117 |
269424 |
651 |
0 |
0 |
T142 |
4663 |
48 |
0 |
0 |
T143 |
70441 |
510 |
0 |
0 |
T144 |
18759 |
72 |
0 |
0 |
T145 |
6710 |
54 |
0 |
0 |
cmd_info_4_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
467825371 |
3923 |
0 |
0 |
T100 |
35401 |
296 |
0 |
0 |
T108 |
10900 |
106 |
0 |
0 |
T115 |
11295 |
59 |
0 |
0 |
T117 |
269424 |
620 |
0 |
0 |
T142 |
4663 |
54 |
0 |
0 |
T143 |
70441 |
445 |
0 |
0 |
T144 |
18759 |
31 |
0 |
0 |
T145 |
6710 |
63 |
0 |
0 |
T146 |
64822 |
583 |
0 |
0 |
T147 |
20712 |
41 |
0 |
0 |
cmd_info_5_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
467825371 |
3979 |
0 |
0 |
T78 |
2231 |
8 |
0 |
0 |
T100 |
35401 |
361 |
0 |
0 |
T108 |
10900 |
90 |
0 |
0 |
T113 |
4617 |
22 |
0 |
0 |
T115 |
11295 |
56 |
0 |
0 |
T117 |
269424 |
638 |
0 |
0 |
T142 |
4663 |
48 |
0 |
0 |
T143 |
70441 |
483 |
0 |
0 |
T144 |
18759 |
47 |
0 |
0 |
T145 |
6710 |
38 |
0 |
0 |
cmd_info_6_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
467825371 |
4262 |
0 |
0 |
T78 |
2231 |
7 |
0 |
0 |
T100 |
35401 |
224 |
0 |
0 |
T108 |
10900 |
74 |
0 |
0 |
T115 |
11295 |
60 |
0 |
0 |
T117 |
269424 |
642 |
0 |
0 |
T142 |
4663 |
5 |
0 |
0 |
T143 |
70441 |
657 |
0 |
0 |
T144 |
18759 |
68 |
0 |
0 |
T145 |
6710 |
15 |
0 |
0 |
T146 |
64822 |
612 |
0 |
0 |
cmd_info_7_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
467825371 |
3785 |
0 |
0 |
T100 |
35401 |
149 |
0 |
0 |
T105 |
8397 |
6 |
0 |
0 |
T108 |
10900 |
52 |
0 |
0 |
T113 |
4617 |
11 |
0 |
0 |
T115 |
11295 |
34 |
0 |
0 |
T117 |
269424 |
696 |
0 |
0 |
T142 |
4663 |
9 |
0 |
0 |
T143 |
70441 |
436 |
0 |
0 |
T144 |
18759 |
66 |
0 |
0 |
T145 |
6710 |
53 |
0 |
0 |
cmd_info_8_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
467825371 |
3950 |
0 |
0 |
T78 |
2231 |
2 |
0 |
0 |
T100 |
35401 |
224 |
0 |
0 |
T108 |
10900 |
25 |
0 |
0 |
T113 |
4617 |
7 |
0 |
0 |
T115 |
11295 |
141 |
0 |
0 |
T117 |
269424 |
674 |
0 |
0 |
T142 |
4663 |
7 |
0 |
0 |
T143 |
70441 |
536 |
0 |
0 |
T144 |
18759 |
91 |
0 |
0 |
T145 |
6710 |
13 |
0 |
0 |
cmd_info_9_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
467825371 |
3996 |
0 |
0 |
T100 |
35401 |
281 |
0 |
0 |
T108 |
10900 |
68 |
0 |
0 |
T113 |
4617 |
32 |
0 |
0 |
T115 |
11295 |
97 |
0 |
0 |
T117 |
269424 |
705 |
0 |
0 |
T142 |
4663 |
2 |
0 |
0 |
T143 |
70441 |
598 |
0 |
0 |
T144 |
18759 |
80 |
0 |
0 |
T145 |
6710 |
46 |
0 |
0 |
T146 |
64822 |
376 |
0 |
0 |
cmd_info_en4b_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
467825371 |
1759 |
0 |
0 |
T78 |
2231 |
3 |
0 |
0 |
T100 |
35401 |
43 |
0 |
0 |
T108 |
10900 |
14 |
0 |
0 |
T113 |
4617 |
1 |
0 |
0 |
T115 |
11295 |
13 |
0 |
0 |
T117 |
269424 |
633 |
0 |
0 |
T142 |
4663 |
2 |
0 |
0 |
T143 |
70441 |
140 |
0 |
0 |
T144 |
18759 |
65 |
0 |
0 |
T145 |
6710 |
12 |
0 |
0 |
cmd_info_ex4b_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
467825371 |
1750 |
0 |
0 |
T78 |
2231 |
8 |
0 |
0 |
T100 |
35401 |
45 |
0 |
0 |
T108 |
10900 |
30 |
0 |
0 |
T113 |
4617 |
5 |
0 |
0 |
T115 |
11295 |
18 |
0 |
0 |
T117 |
269424 |
666 |
0 |
0 |
T142 |
4663 |
1 |
0 |
0 |
T143 |
70441 |
117 |
0 |
0 |
T144 |
18759 |
62 |
0 |
0 |
T145 |
6710 |
20 |
0 |
0 |
cmd_info_wrdi_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
467825371 |
1898 |
0 |
0 |
T100 |
35401 |
62 |
0 |
0 |
T108 |
10900 |
15 |
0 |
0 |
T113 |
4617 |
4 |
0 |
0 |
T115 |
11295 |
10 |
0 |
0 |
T117 |
269424 |
620 |
0 |
0 |
T142 |
4663 |
3 |
0 |
0 |
T143 |
70441 |
153 |
0 |
0 |
T144 |
18759 |
59 |
0 |
0 |
T145 |
6710 |
11 |
0 |
0 |
T146 |
64822 |
132 |
0 |
0 |
cmd_info_wren_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
467825371 |
1877 |
0 |
0 |
T100 |
35401 |
49 |
0 |
0 |
T108 |
10900 |
26 |
0 |
0 |
T113 |
4617 |
8 |
0 |
0 |
T115 |
11295 |
18 |
0 |
0 |
T117 |
269424 |
785 |
0 |
0 |
T142 |
4663 |
8 |
0 |
0 |
T143 |
70441 |
99 |
0 |
0 |
T144 |
18759 |
76 |
0 |
0 |
T145 |
6710 |
8 |
0 |
0 |
T146 |
64822 |
127 |
0 |
0 |
intercept_en_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
467825371 |
2314 |
0 |
0 |
T78 |
2231 |
5 |
0 |
0 |
T100 |
35401 |
95 |
0 |
0 |
T108 |
10900 |
29 |
0 |
0 |
T113 |
4617 |
12 |
0 |
0 |
T115 |
11295 |
39 |
0 |
0 |
T117 |
269424 |
638 |
0 |
0 |
T142 |
4663 |
21 |
0 |
0 |
T143 |
70441 |
242 |
0 |
0 |
T144 |
18759 |
64 |
0 |
0 |
T145 |
6710 |
12 |
0 |
0 |
intr_enable_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
467825371 |
3690 |
0 |
0 |
T18 |
207121 |
1 |
0 |
0 |
T20 |
0 |
32 |
0 |
0 |
T36 |
3450 |
0 |
0 |
0 |
T128 |
0 |
18 |
0 |
0 |
T148 |
0 |
32 |
0 |
0 |
T149 |
0 |
19 |
0 |
0 |
T150 |
0 |
10 |
0 |
0 |
T151 |
0 |
15 |
0 |
0 |
T152 |
0 |
11 |
0 |
0 |
T153 |
0 |
44 |
0 |
0 |
T154 |
0 |
15 |
0 |
0 |
T155 |
207374 |
0 |
0 |
0 |
T156 |
4294 |
0 |
0 |
0 |
T157 |
352145 |
0 |
0 |
0 |
T158 |
439555 |
0 |
0 |
0 |
T159 |
459650 |
0 |
0 |
0 |
T160 |
1634 |
0 |
0 |
0 |
T161 |
205673 |
0 |
0 |
0 |
T162 |
757830 |
0 |
0 |
0 |
jedec_cc_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
467825371 |
1786 |
0 |
0 |
T78 |
2231 |
3 |
0 |
0 |
T100 |
35401 |
38 |
0 |
0 |
T108 |
10900 |
18 |
0 |
0 |
T115 |
11295 |
15 |
0 |
0 |
T117 |
269424 |
646 |
0 |
0 |
T142 |
4663 |
14 |
0 |
0 |
T143 |
70441 |
104 |
0 |
0 |
T144 |
18759 |
60 |
0 |
0 |
T145 |
6710 |
9 |
0 |
0 |
T146 |
64822 |
143 |
0 |
0 |
jedec_id_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
467825371 |
1679 |
0 |
0 |
T78 |
2231 |
4 |
0 |
0 |
T100 |
35401 |
71 |
0 |
0 |
T108 |
10900 |
15 |
0 |
0 |
T113 |
4617 |
8 |
0 |
0 |
T115 |
11295 |
19 |
0 |
0 |
T117 |
269424 |
661 |
0 |
0 |
T142 |
4663 |
10 |
0 |
0 |
T143 |
70441 |
118 |
0 |
0 |
T144 |
18759 |
38 |
0 |
0 |
T145 |
6710 |
3 |
0 |
0 |
mailbox_addr_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
467825371 |
1513 |
0 |
0 |
T100 |
35401 |
35 |
0 |
0 |
T108 |
10900 |
10 |
0 |
0 |
T113 |
4617 |
16 |
0 |
0 |
T115 |
11295 |
5 |
0 |
0 |
T117 |
269424 |
616 |
0 |
0 |
T143 |
70441 |
82 |
0 |
0 |
T144 |
18759 |
83 |
0 |
0 |
T145 |
6710 |
8 |
0 |
0 |
T146 |
64822 |
68 |
0 |
0 |
T147 |
20712 |
112 |
0 |
0 |
payload_swap_data_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
467825371 |
1602 |
0 |
0 |
T100 |
35401 |
35 |
0 |
0 |
T108 |
10900 |
13 |
0 |
0 |
T115 |
11295 |
8 |
0 |
0 |
T117 |
269424 |
668 |
0 |
0 |
T143 |
70441 |
89 |
0 |
0 |
T144 |
18759 |
47 |
0 |
0 |
T145 |
6710 |
9 |
0 |
0 |
T146 |
64822 |
95 |
0 |
0 |
T147 |
20712 |
71 |
0 |
0 |
T163 |
4324 |
7 |
0 |
0 |
payload_swap_mask_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
467825371 |
1537 |
0 |
0 |
T100 |
35401 |
35 |
0 |
0 |
T108 |
10900 |
17 |
0 |
0 |
T113 |
4617 |
14 |
0 |
0 |
T115 |
11295 |
20 |
0 |
0 |
T117 |
269424 |
610 |
0 |
0 |
T143 |
70441 |
80 |
0 |
0 |
T144 |
18759 |
85 |
0 |
0 |
T145 |
6710 |
6 |
0 |
0 |
T146 |
64822 |
75 |
0 |
0 |
T147 |
20712 |
66 |
0 |
0 |
read_threshold_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
467825371 |
1622 |
0 |
0 |
T100 |
35401 |
54 |
0 |
0 |
T108 |
10900 |
10 |
0 |
0 |
T115 |
11295 |
17 |
0 |
0 |
T117 |
269424 |
679 |
0 |
0 |
T143 |
70441 |
64 |
0 |
0 |
T144 |
18759 |
71 |
0 |
0 |
T145 |
6710 |
10 |
0 |
0 |
T146 |
64822 |
86 |
0 |
0 |
T147 |
20712 |
46 |
0 |
0 |
T163 |
4324 |
10 |
0 |
0 |
tpm_access_0_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
467825371 |
2321 |
0 |
0 |
T78 |
2231 |
3 |
0 |
0 |
T100 |
35401 |
116 |
0 |
0 |
T108 |
10900 |
18 |
0 |
0 |
T113 |
4617 |
4 |
0 |
0 |
T115 |
11295 |
31 |
0 |
0 |
T117 |
269424 |
654 |
0 |
0 |
T142 |
4663 |
20 |
0 |
0 |
T143 |
70441 |
203 |
0 |
0 |
T144 |
18759 |
61 |
0 |
0 |
T145 |
6710 |
22 |
0 |
0 |
tpm_access_1_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
467825371 |
1518 |
0 |
0 |
T78 |
2231 |
8 |
0 |
0 |
T100 |
35401 |
31 |
0 |
0 |
T108 |
10900 |
20 |
0 |
0 |
T113 |
4617 |
8 |
0 |
0 |
T115 |
11295 |
7 |
0 |
0 |
T117 |
269424 |
657 |
0 |
0 |
T142 |
4663 |
2 |
0 |
0 |
T143 |
70441 |
95 |
0 |
0 |
T144 |
18759 |
55 |
0 |
0 |
T145 |
6710 |
5 |
0 |
0 |
tpm_cfg_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
467825371 |
2522 |
0 |
0 |
T78 |
2231 |
7 |
0 |
0 |
T100 |
35401 |
83 |
0 |
0 |
T108 |
10900 |
18 |
0 |
0 |
T113 |
4617 |
22 |
0 |
0 |
T115 |
11295 |
62 |
0 |
0 |
T117 |
269424 |
667 |
0 |
0 |
T142 |
4663 |
20 |
0 |
0 |
T143 |
70441 |
271 |
0 |
0 |
T144 |
18759 |
52 |
0 |
0 |
T145 |
6710 |
27 |
0 |
0 |
tpm_did_vid_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
467825371 |
1740 |
0 |
0 |
T78 |
2231 |
2 |
0 |
0 |
T100 |
35401 |
52 |
0 |
0 |
T108 |
10900 |
23 |
0 |
0 |
T113 |
4617 |
5 |
0 |
0 |
T115 |
11295 |
13 |
0 |
0 |
T117 |
269424 |
649 |
0 |
0 |
T142 |
4663 |
1 |
0 |
0 |
T143 |
70441 |
123 |
0 |
0 |
T144 |
18759 |
70 |
0 |
0 |
T145 |
6710 |
16 |
0 |
0 |
tpm_int_enable_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
467825371 |
1587 |
0 |
0 |
T100 |
35401 |
35 |
0 |
0 |
T108 |
10900 |
18 |
0 |
0 |
T113 |
4617 |
5 |
0 |
0 |
T115 |
11295 |
9 |
0 |
0 |
T117 |
269424 |
644 |
0 |
0 |
T142 |
4663 |
1 |
0 |
0 |
T143 |
70441 |
66 |
0 |
0 |
T144 |
18759 |
67 |
0 |
0 |
T145 |
6710 |
5 |
0 |
0 |
T146 |
64822 |
52 |
0 |
0 |
tpm_int_status_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
467825371 |
1603 |
0 |
0 |
T100 |
35401 |
53 |
0 |
0 |
T108 |
10900 |
21 |
0 |
0 |
T113 |
4617 |
11 |
0 |
0 |
T115 |
11295 |
3 |
0 |
0 |
T117 |
269424 |
627 |
0 |
0 |
T142 |
4663 |
5 |
0 |
0 |
T143 |
70441 |
76 |
0 |
0 |
T144 |
18759 |
64 |
0 |
0 |
T145 |
6710 |
6 |
0 |
0 |
T146 |
64822 |
64 |
0 |
0 |
tpm_int_vector_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
467825371 |
1583 |
0 |
0 |
T78 |
2231 |
1 |
0 |
0 |
T100 |
35401 |
39 |
0 |
0 |
T108 |
10900 |
24 |
0 |
0 |
T113 |
4617 |
5 |
0 |
0 |
T115 |
11295 |
14 |
0 |
0 |
T117 |
269424 |
637 |
0 |
0 |
T142 |
4663 |
8 |
0 |
0 |
T143 |
70441 |
92 |
0 |
0 |
T144 |
18759 |
87 |
0 |
0 |
T145 |
6710 |
7 |
0 |
0 |
tpm_intf_capability_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
467825371 |
1728 |
0 |
0 |
T78 |
2231 |
5 |
0 |
0 |
T100 |
35401 |
28 |
0 |
0 |
T108 |
10900 |
17 |
0 |
0 |
T113 |
4617 |
5 |
0 |
0 |
T115 |
11295 |
21 |
0 |
0 |
T117 |
269424 |
726 |
0 |
0 |
T142 |
4663 |
5 |
0 |
0 |
T143 |
70441 |
82 |
0 |
0 |
T144 |
18759 |
78 |
0 |
0 |
T145 |
6710 |
17 |
0 |
0 |
tpm_rid_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
467825371 |
1458 |
0 |
0 |
T78 |
2231 |
1 |
0 |
0 |
T100 |
35401 |
44 |
0 |
0 |
T108 |
10900 |
6 |
0 |
0 |
T113 |
4617 |
7 |
0 |
0 |
T115 |
11295 |
5 |
0 |
0 |
T117 |
269424 |
620 |
0 |
0 |
T142 |
4663 |
3 |
0 |
0 |
T143 |
70441 |
79 |
0 |
0 |
T144 |
18759 |
54 |
0 |
0 |
T145 |
6710 |
10 |
0 |
0 |
tpm_sts_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
467825371 |
1646 |
0 |
0 |
T100 |
35401 |
38 |
0 |
0 |
T108 |
10900 |
22 |
0 |
0 |
T113 |
4617 |
11 |
0 |
0 |
T115 |
11295 |
13 |
0 |
0 |
T117 |
269424 |
663 |
0 |
0 |
T142 |
4663 |
2 |
0 |
0 |
T143 |
70441 |
90 |
0 |
0 |
T144 |
18759 |
57 |
0 |
0 |
T145 |
6710 |
5 |
0 |
0 |
T146 |
64822 |
68 |
0 |
0 |