Assert Coverage for Module : 
spi_device_csr_assert_fpv
Assertion Details
TlulOOBAddrErr_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
444238720 | 
4233 | 
0 | 
0 | 
| T109 | 
34794 | 
1 | 
0 | 
0 | 
| T110 | 
10490 | 
4 | 
0 | 
0 | 
| T111 | 
28296 | 
8 | 
0 | 
0 | 
| T112 | 
26696 | 
2 | 
0 | 
0 | 
| T113 | 
5364 | 
211 | 
0 | 
0 | 
| T114 | 
8174 | 
331 | 
0 | 
0 | 
| T115 | 
66869 | 
2 | 
0 | 
0 | 
| T116 | 
14426 | 
3 | 
0 | 
0 | 
| T117 | 
24119 | 
352 | 
0 | 
0 | 
| T129 | 
33363 | 
2 | 
0 | 
0 | 
addr_swap_data_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
444238720 | 
835 | 
0 | 
0 | 
| T97 | 
4555 | 
11 | 
0 | 
0 | 
| T109 | 
34794 | 
36 | 
0 | 
0 | 
| T110 | 
10490 | 
19 | 
0 | 
0 | 
| T115 | 
66869 | 
93 | 
0 | 
0 | 
| T116 | 
14426 | 
37 | 
0 | 
0 | 
| T126 | 
64245 | 
53 | 
0 | 
0 | 
| T129 | 
33363 | 
37 | 
0 | 
0 | 
| T133 | 
4177 | 
10 | 
0 | 
0 | 
| T166 | 
13425 | 
20 | 
0 | 
0 | 
| T167 | 
4435 | 
1 | 
0 | 
0 | 
addr_swap_mask_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
444238720 | 
767 | 
0 | 
0 | 
| T96 | 
2223 | 
4 | 
0 | 
0 | 
| T97 | 
4555 | 
11 | 
0 | 
0 | 
| T109 | 
34794 | 
29 | 
0 | 
0 | 
| T110 | 
10490 | 
3 | 
0 | 
0 | 
| T115 | 
66869 | 
83 | 
0 | 
0 | 
| T116 | 
14426 | 
28 | 
0 | 
0 | 
| T126 | 
64245 | 
30 | 
0 | 
0 | 
| T129 | 
33363 | 
28 | 
0 | 
0 | 
| T166 | 
13425 | 
42 | 
0 | 
0 | 
| T168 | 
5220 | 
1 | 
0 | 
0 | 
cfg_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
444238720 | 
1132 | 
0 | 
0 | 
| T96 | 
2223 | 
3 | 
0 | 
0 | 
| T97 | 
4555 | 
13 | 
0 | 
0 | 
| T109 | 
34794 | 
69 | 
0 | 
0 | 
| T110 | 
10490 | 
13 | 
0 | 
0 | 
| T115 | 
66869 | 
107 | 
0 | 
0 | 
| T116 | 
14426 | 
42 | 
0 | 
0 | 
| T117 | 
24119 | 
9 | 
0 | 
0 | 
| T129 | 
33363 | 
87 | 
0 | 
0 | 
| T133 | 
4177 | 
10 | 
0 | 
0 | 
| T166 | 
13425 | 
38 | 
0 | 
0 | 
cmd_filter_0_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
444238720 | 
6519 | 
0 | 
0 | 
| T96 | 
2223 | 
2 | 
0 | 
0 | 
| T97 | 
4555 | 
7 | 
0 | 
0 | 
| T109 | 
34794 | 
851 | 
0 | 
0 | 
| T110 | 
10490 | 
11 | 
0 | 
0 | 
| T115 | 
66869 | 
970 | 
0 | 
0 | 
| T116 | 
14426 | 
130 | 
0 | 
0 | 
| T126 | 
64245 | 
701 | 
0 | 
0 | 
| T129 | 
33363 | 
484 | 
0 | 
0 | 
| T133 | 
4177 | 
62 | 
0 | 
0 | 
| T166 | 
13425 | 
48 | 
0 | 
0 | 
cmd_filter_1_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
444238720 | 
5951 | 
0 | 
0 | 
| T96 | 
2223 | 
2 | 
0 | 
0 | 
| T97 | 
4555 | 
6 | 
0 | 
0 | 
| T109 | 
34794 | 
747 | 
0 | 
0 | 
| T110 | 
10490 | 
147 | 
0 | 
0 | 
| T115 | 
66869 | 
1209 | 
0 | 
0 | 
| T116 | 
14426 | 
24 | 
0 | 
0 | 
| T126 | 
64245 | 
391 | 
0 | 
0 | 
| T129 | 
33363 | 
259 | 
0 | 
0 | 
| T133 | 
4177 | 
47 | 
0 | 
0 | 
| T166 | 
13425 | 
54 | 
0 | 
0 | 
cmd_filter_2_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
444238720 | 
5810 | 
0 | 
0 | 
| T96 | 
2223 | 
2 | 
0 | 
0 | 
| T97 | 
4555 | 
7 | 
0 | 
0 | 
| T109 | 
34794 | 
672 | 
0 | 
0 | 
| T110 | 
10490 | 
241 | 
0 | 
0 | 
| T115 | 
66869 | 
1098 | 
0 | 
0 | 
| T116 | 
14426 | 
218 | 
0 | 
0 | 
| T126 | 
64245 | 
584 | 
0 | 
0 | 
| T129 | 
33363 | 
492 | 
0 | 
0 | 
| T166 | 
13425 | 
14 | 
0 | 
0 | 
| T167 | 
4435 | 
78 | 
0 | 
0 | 
cmd_filter_3_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
444238720 | 
5685 | 
0 | 
0 | 
| T96 | 
2223 | 
6 | 
0 | 
0 | 
| T97 | 
4555 | 
14 | 
0 | 
0 | 
| T109 | 
34794 | 
399 | 
0 | 
0 | 
| T110 | 
10490 | 
142 | 
0 | 
0 | 
| T115 | 
66869 | 
719 | 
0 | 
0 | 
| T116 | 
14426 | 
253 | 
0 | 
0 | 
| T126 | 
64245 | 
769 | 
0 | 
0 | 
| T129 | 
33363 | 
538 | 
0 | 
0 | 
| T133 | 
4177 | 
39 | 
0 | 
0 | 
| T166 | 
13425 | 
33 | 
0 | 
0 | 
cmd_filter_4_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
444238720 | 
5975 | 
0 | 
0 | 
| T96 | 
2223 | 
7 | 
0 | 
0 | 
| T97 | 
4555 | 
21 | 
0 | 
0 | 
| T109 | 
34794 | 
722 | 
0 | 
0 | 
| T110 | 
10490 | 
164 | 
0 | 
0 | 
| T115 | 
66869 | 
885 | 
0 | 
0 | 
| T116 | 
14426 | 
119 | 
0 | 
0 | 
| T126 | 
64245 | 
933 | 
0 | 
0 | 
| T129 | 
33363 | 
403 | 
0 | 
0 | 
| T133 | 
4177 | 
58 | 
0 | 
0 | 
| T166 | 
13425 | 
69 | 
0 | 
0 | 
cmd_filter_5_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
444238720 | 
5643 | 
0 | 
0 | 
| T96 | 
2223 | 
6 | 
0 | 
0 | 
| T97 | 
4555 | 
16 | 
0 | 
0 | 
| T109 | 
34794 | 
394 | 
0 | 
0 | 
| T110 | 
10490 | 
113 | 
0 | 
0 | 
| T115 | 
66869 | 
1166 | 
0 | 
0 | 
| T116 | 
14426 | 
260 | 
0 | 
0 | 
| T126 | 
64245 | 
567 | 
0 | 
0 | 
| T129 | 
33363 | 
569 | 
0 | 
0 | 
| T133 | 
4177 | 
7 | 
0 | 
0 | 
| T166 | 
13425 | 
25 | 
0 | 
0 | 
cmd_filter_6_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
444238720 | 
5315 | 
0 | 
0 | 
| T96 | 
2223 | 
2 | 
0 | 
0 | 
| T97 | 
4555 | 
19 | 
0 | 
0 | 
| T109 | 
34794 | 
571 | 
0 | 
0 | 
| T110 | 
10490 | 
148 | 
0 | 
0 | 
| T115 | 
66869 | 
519 | 
0 | 
0 | 
| T116 | 
14426 | 
142 | 
0 | 
0 | 
| T126 | 
64245 | 
770 | 
0 | 
0 | 
| T129 | 
33363 | 
641 | 
0 | 
0 | 
| T133 | 
4177 | 
49 | 
0 | 
0 | 
| T166 | 
13425 | 
47 | 
0 | 
0 | 
cmd_filter_7_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
444238720 | 
5979 | 
0 | 
0 | 
| T96 | 
2223 | 
9 | 
0 | 
0 | 
| T97 | 
4555 | 
11 | 
0 | 
0 | 
| T109 | 
34794 | 
745 | 
0 | 
0 | 
| T110 | 
10490 | 
120 | 
0 | 
0 | 
| T115 | 
66869 | 
1266 | 
0 | 
0 | 
| T116 | 
14426 | 
153 | 
0 | 
0 | 
| T126 | 
64245 | 
603 | 
0 | 
0 | 
| T129 | 
33363 | 
634 | 
0 | 
0 | 
| T166 | 
13425 | 
35 | 
0 | 
0 | 
| T167 | 
4435 | 
78 | 
0 | 
0 | 
cmd_info_0_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
444238720 | 
2926 | 
0 | 
0 | 
| T96 | 
2223 | 
5 | 
0 | 
0 | 
| T97 | 
4555 | 
9 | 
0 | 
0 | 
| T109 | 
34794 | 
235 | 
0 | 
0 | 
| T110 | 
10490 | 
61 | 
0 | 
0 | 
| T115 | 
66869 | 
486 | 
0 | 
0 | 
| T116 | 
14426 | 
105 | 
0 | 
0 | 
| T126 | 
64245 | 
279 | 
0 | 
0 | 
| T129 | 
33363 | 
360 | 
0 | 
0 | 
| T133 | 
4177 | 
26 | 
0 | 
0 | 
| T167 | 
4435 | 
16 | 
0 | 
0 | 
cmd_info_10_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
444238720 | 
3271 | 
0 | 
0 | 
| T96 | 
2223 | 
2 | 
0 | 
0 | 
| T97 | 
4555 | 
10 | 
0 | 
0 | 
| T109 | 
34794 | 
212 | 
0 | 
0 | 
| T110 | 
10490 | 
18 | 
0 | 
0 | 
| T115 | 
66869 | 
798 | 
0 | 
0 | 
| T116 | 
14426 | 
29 | 
0 | 
0 | 
| T126 | 
64245 | 
268 | 
0 | 
0 | 
| T129 | 
33363 | 
299 | 
0 | 
0 | 
| T133 | 
4177 | 
5 | 
0 | 
0 | 
| T166 | 
13425 | 
95 | 
0 | 
0 | 
cmd_info_11_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
444238720 | 
2691 | 
0 | 
0 | 
| T96 | 
2223 | 
8 | 
0 | 
0 | 
| T109 | 
34794 | 
138 | 
0 | 
0 | 
| T110 | 
10490 | 
112 | 
0 | 
0 | 
| T115 | 
66869 | 
383 | 
0 | 
0 | 
| T116 | 
14426 | 
125 | 
0 | 
0 | 
| T126 | 
64245 | 
281 | 
0 | 
0 | 
| T129 | 
33363 | 
268 | 
0 | 
0 | 
| T133 | 
4177 | 
8 | 
0 | 
0 | 
| T166 | 
13425 | 
32 | 
0 | 
0 | 
| T167 | 
4435 | 
34 | 
0 | 
0 | 
cmd_info_12_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
444238720 | 
2923 | 
0 | 
0 | 
| T96 | 
2223 | 
3 | 
0 | 
0 | 
| T97 | 
4555 | 
9 | 
0 | 
0 | 
| T109 | 
34794 | 
199 | 
0 | 
0 | 
| T110 | 
10490 | 
55 | 
0 | 
0 | 
| T115 | 
66869 | 
584 | 
0 | 
0 | 
| T116 | 
14426 | 
70 | 
0 | 
0 | 
| T126 | 
64245 | 
334 | 
0 | 
0 | 
| T129 | 
33363 | 
311 | 
0 | 
0 | 
| T133 | 
4177 | 
11 | 
0 | 
0 | 
| T166 | 
13425 | 
52 | 
0 | 
0 | 
cmd_info_13_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
444238720 | 
2625 | 
0 | 
0 | 
| T96 | 
2223 | 
4 | 
0 | 
0 | 
| T97 | 
4555 | 
9 | 
0 | 
0 | 
| T109 | 
34794 | 
204 | 
0 | 
0 | 
| T110 | 
10490 | 
62 | 
0 | 
0 | 
| T115 | 
66869 | 
524 | 
0 | 
0 | 
| T116 | 
14426 | 
57 | 
0 | 
0 | 
| T126 | 
64245 | 
243 | 
0 | 
0 | 
| T129 | 
33363 | 
246 | 
0 | 
0 | 
| T166 | 
13425 | 
35 | 
0 | 
0 | 
| T168 | 
5220 | 
10 | 
0 | 
0 | 
cmd_info_14_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
444238720 | 
2913 | 
0 | 
0 | 
| T96 | 
2223 | 
9 | 
0 | 
0 | 
| T97 | 
4555 | 
6 | 
0 | 
0 | 
| T109 | 
34794 | 
310 | 
0 | 
0 | 
| T110 | 
10490 | 
58 | 
0 | 
0 | 
| T115 | 
66869 | 
523 | 
0 | 
0 | 
| T116 | 
14426 | 
28 | 
0 | 
0 | 
| T126 | 
64245 | 
255 | 
0 | 
0 | 
| T129 | 
33363 | 
284 | 
0 | 
0 | 
| T133 | 
4177 | 
24 | 
0 | 
0 | 
| T166 | 
13425 | 
27 | 
0 | 
0 | 
cmd_info_15_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
444238720 | 
2856 | 
0 | 
0 | 
| T97 | 
4555 | 
4 | 
0 | 
0 | 
| T109 | 
34794 | 
289 | 
0 | 
0 | 
| T110 | 
10490 | 
36 | 
0 | 
0 | 
| T115 | 
66869 | 
577 | 
0 | 
0 | 
| T116 | 
14426 | 
105 | 
0 | 
0 | 
| T126 | 
64245 | 
283 | 
0 | 
0 | 
| T129 | 
33363 | 
192 | 
0 | 
0 | 
| T166 | 
13425 | 
27 | 
0 | 
0 | 
| T167 | 
4435 | 
24 | 
0 | 
0 | 
| T169 | 
13681 | 
67 | 
0 | 
0 | 
cmd_info_16_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
444238720 | 
2960 | 
0 | 
0 | 
| T96 | 
2223 | 
1 | 
0 | 
0 | 
| T97 | 
4555 | 
3 | 
0 | 
0 | 
| T109 | 
34794 | 
188 | 
0 | 
0 | 
| T110 | 
10490 | 
72 | 
0 | 
0 | 
| T115 | 
66869 | 
548 | 
0 | 
0 | 
| T116 | 
14426 | 
104 | 
0 | 
0 | 
| T117 | 
24119 | 
8 | 
0 | 
0 | 
| T129 | 
33363 | 
260 | 
0 | 
0 | 
| T133 | 
4177 | 
4 | 
0 | 
0 | 
| T166 | 
13425 | 
53 | 
0 | 
0 | 
cmd_info_17_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
444238720 | 
2583 | 
0 | 
0 | 
| T96 | 
2223 | 
4 | 
0 | 
0 | 
| T97 | 
4555 | 
9 | 
0 | 
0 | 
| T109 | 
34794 | 
274 | 
0 | 
0 | 
| T110 | 
10490 | 
85 | 
0 | 
0 | 
| T115 | 
66869 | 
529 | 
0 | 
0 | 
| T116 | 
14426 | 
59 | 
0 | 
0 | 
| T126 | 
64245 | 
305 | 
0 | 
0 | 
| T129 | 
33363 | 
116 | 
0 | 
0 | 
| T133 | 
4177 | 
11 | 
0 | 
0 | 
| T166 | 
13425 | 
43 | 
0 | 
0 | 
cmd_info_18_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
444238720 | 
3103 | 
0 | 
0 | 
| T96 | 
2223 | 
1 | 
0 | 
0 | 
| T97 | 
4555 | 
3 | 
0 | 
0 | 
| T109 | 
34794 | 
313 | 
0 | 
0 | 
| T110 | 
10490 | 
103 | 
0 | 
0 | 
| T115 | 
66869 | 
661 | 
0 | 
0 | 
| T116 | 
14426 | 
62 | 
0 | 
0 | 
| T126 | 
64245 | 
196 | 
0 | 
0 | 
| T129 | 
33363 | 
285 | 
0 | 
0 | 
| T133 | 
4177 | 
6 | 
0 | 
0 | 
| T166 | 
13425 | 
14 | 
0 | 
0 | 
cmd_info_19_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
444238720 | 
2935 | 
0 | 
0 | 
| T96 | 
2223 | 
3 | 
0 | 
0 | 
| T97 | 
4555 | 
9 | 
0 | 
0 | 
| T109 | 
34794 | 
152 | 
0 | 
0 | 
| T110 | 
10490 | 
66 | 
0 | 
0 | 
| T115 | 
66869 | 
682 | 
0 | 
0 | 
| T116 | 
14426 | 
125 | 
0 | 
0 | 
| T126 | 
64245 | 
274 | 
0 | 
0 | 
| T129 | 
33363 | 
283 | 
0 | 
0 | 
| T133 | 
4177 | 
35 | 
0 | 
0 | 
| T166 | 
13425 | 
25 | 
0 | 
0 | 
cmd_info_1_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
444238720 | 
2441 | 
0 | 
0 | 
| T97 | 
4555 | 
9 | 
0 | 
0 | 
| T109 | 
34794 | 
128 | 
0 | 
0 | 
| T110 | 
10490 | 
111 | 
0 | 
0 | 
| T115 | 
66869 | 
479 | 
0 | 
0 | 
| T116 | 
14426 | 
64 | 
0 | 
0 | 
| T117 | 
24119 | 
7 | 
0 | 
0 | 
| T126 | 
64245 | 
237 | 
0 | 
0 | 
| T129 | 
33363 | 
212 | 
0 | 
0 | 
| T133 | 
4177 | 
1 | 
0 | 
0 | 
| T166 | 
13425 | 
64 | 
0 | 
0 | 
cmd_info_20_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
444238720 | 
2986 | 
0 | 
0 | 
| T96 | 
2223 | 
3 | 
0 | 
0 | 
| T97 | 
4555 | 
7 | 
0 | 
0 | 
| T109 | 
34794 | 
226 | 
0 | 
0 | 
| T110 | 
10490 | 
64 | 
0 | 
0 | 
| T115 | 
66869 | 
524 | 
0 | 
0 | 
| T116 | 
14426 | 
127 | 
0 | 
0 | 
| T126 | 
64245 | 
305 | 
0 | 
0 | 
| T129 | 
33363 | 
301 | 
0 | 
0 | 
| T133 | 
4177 | 
7 | 
0 | 
0 | 
| T166 | 
13425 | 
5 | 
0 | 
0 | 
cmd_info_21_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
444238720 | 
2816 | 
0 | 
0 | 
| T96 | 
2223 | 
2 | 
0 | 
0 | 
| T97 | 
4555 | 
13 | 
0 | 
0 | 
| T109 | 
34794 | 
388 | 
0 | 
0 | 
| T110 | 
10490 | 
75 | 
0 | 
0 | 
| T115 | 
66869 | 
443 | 
0 | 
0 | 
| T116 | 
14426 | 
109 | 
0 | 
0 | 
| T126 | 
64245 | 
203 | 
0 | 
0 | 
| T129 | 
33363 | 
289 | 
0 | 
0 | 
| T133 | 
4177 | 
22 | 
0 | 
0 | 
| T166 | 
13425 | 
45 | 
0 | 
0 | 
cmd_info_22_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
444238720 | 
2906 | 
0 | 
0 | 
| T96 | 
2223 | 
1 | 
0 | 
0 | 
| T97 | 
4555 | 
8 | 
0 | 
0 | 
| T109 | 
34794 | 
429 | 
0 | 
0 | 
| T110 | 
10490 | 
53 | 
0 | 
0 | 
| T115 | 
66869 | 
436 | 
0 | 
0 | 
| T116 | 
14426 | 
102 | 
0 | 
0 | 
| T126 | 
64245 | 
324 | 
0 | 
0 | 
| T129 | 
33363 | 
210 | 
0 | 
0 | 
| T133 | 
4177 | 
3 | 
0 | 
0 | 
| T166 | 
13425 | 
54 | 
0 | 
0 | 
cmd_info_23_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
444238720 | 
2911 | 
0 | 
0 | 
| T96 | 
2223 | 
5 | 
0 | 
0 | 
| T97 | 
4555 | 
10 | 
0 | 
0 | 
| T109 | 
34794 | 
192 | 
0 | 
0 | 
| T110 | 
10490 | 
18 | 
0 | 
0 | 
| T115 | 
66869 | 
491 | 
0 | 
0 | 
| T116 | 
14426 | 
69 | 
0 | 
0 | 
| T126 | 
64245 | 
324 | 
0 | 
0 | 
| T129 | 
33363 | 
310 | 
0 | 
0 | 
| T133 | 
4177 | 
2 | 
0 | 
0 | 
| T166 | 
13425 | 
66 | 
0 | 
0 | 
cmd_info_2_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
444238720 | 
2736 | 
0 | 
0 | 
| T96 | 
2223 | 
4 | 
0 | 
0 | 
| T97 | 
4555 | 
12 | 
0 | 
0 | 
| T109 | 
34794 | 
162 | 
0 | 
0 | 
| T110 | 
10490 | 
79 | 
0 | 
0 | 
| T115 | 
66869 | 
482 | 
0 | 
0 | 
| T116 | 
14426 | 
88 | 
0 | 
0 | 
| T126 | 
64245 | 
207 | 
0 | 
0 | 
| T129 | 
33363 | 
307 | 
0 | 
0 | 
| T133 | 
4177 | 
29 | 
0 | 
0 | 
| T166 | 
13425 | 
56 | 
0 | 
0 | 
cmd_info_3_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
444238720 | 
2972 | 
0 | 
0 | 
| T96 | 
2223 | 
2 | 
0 | 
0 | 
| T97 | 
4555 | 
16 | 
0 | 
0 | 
| T109 | 
34794 | 
196 | 
0 | 
0 | 
| T110 | 
10490 | 
15 | 
0 | 
0 | 
| T115 | 
66869 | 
735 | 
0 | 
0 | 
| T116 | 
14426 | 
99 | 
0 | 
0 | 
| T126 | 
64245 | 
275 | 
0 | 
0 | 
| T129 | 
33363 | 
297 | 
0 | 
0 | 
| T133 | 
4177 | 
4 | 
0 | 
0 | 
| T166 | 
13425 | 
48 | 
0 | 
0 | 
cmd_info_4_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
444238720 | 
3049 | 
0 | 
0 | 
| T96 | 
2223 | 
2 | 
0 | 
0 | 
| T97 | 
4555 | 
13 | 
0 | 
0 | 
| T109 | 
34794 | 
411 | 
0 | 
0 | 
| T110 | 
10490 | 
73 | 
0 | 
0 | 
| T115 | 
66869 | 
632 | 
0 | 
0 | 
| T116 | 
14426 | 
43 | 
0 | 
0 | 
| T126 | 
64245 | 
226 | 
0 | 
0 | 
| T129 | 
33363 | 
232 | 
0 | 
0 | 
| T133 | 
4177 | 
8 | 
0 | 
0 | 
| T166 | 
13425 | 
57 | 
0 | 
0 | 
cmd_info_5_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
444238720 | 
2970 | 
0 | 
0 | 
| T97 | 
4555 | 
14 | 
0 | 
0 | 
| T109 | 
34794 | 
301 | 
0 | 
0 | 
| T110 | 
10490 | 
20 | 
0 | 
0 | 
| T115 | 
66869 | 
591 | 
0 | 
0 | 
| T116 | 
14426 | 
110 | 
0 | 
0 | 
| T117 | 
24119 | 
6 | 
0 | 
0 | 
| T126 | 
64245 | 
263 | 
0 | 
0 | 
| T129 | 
33363 | 
222 | 
0 | 
0 | 
| T133 | 
4177 | 
4 | 
0 | 
0 | 
| T166 | 
13425 | 
15 | 
0 | 
0 | 
cmd_info_6_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
444238720 | 
2788 | 
0 | 
0 | 
| T96 | 
2223 | 
1 | 
0 | 
0 | 
| T97 | 
4555 | 
22 | 
0 | 
0 | 
| T109 | 
34794 | 
334 | 
0 | 
0 | 
| T110 | 
10490 | 
54 | 
0 | 
0 | 
| T115 | 
66869 | 
353 | 
0 | 
0 | 
| T116 | 
14426 | 
157 | 
0 | 
0 | 
| T126 | 
64245 | 
342 | 
0 | 
0 | 
| T129 | 
33363 | 
191 | 
0 | 
0 | 
| T133 | 
4177 | 
19 | 
0 | 
0 | 
| T166 | 
13425 | 
39 | 
0 | 
0 | 
cmd_info_7_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
444238720 | 
2794 | 
0 | 
0 | 
| T96 | 
2223 | 
3 | 
0 | 
0 | 
| T97 | 
4555 | 
15 | 
0 | 
0 | 
| T109 | 
34794 | 
398 | 
0 | 
0 | 
| T110 | 
10490 | 
40 | 
0 | 
0 | 
| T115 | 
66869 | 
560 | 
0 | 
0 | 
| T116 | 
14426 | 
113 | 
0 | 
0 | 
| T126 | 
64245 | 
333 | 
0 | 
0 | 
| T129 | 
33363 | 
288 | 
0 | 
0 | 
| T166 | 
13425 | 
42 | 
0 | 
0 | 
| T167 | 
4435 | 
2 | 
0 | 
0 | 
cmd_info_8_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
444238720 | 
3024 | 
0 | 
0 | 
| T96 | 
2223 | 
9 | 
0 | 
0 | 
| T97 | 
4555 | 
7 | 
0 | 
0 | 
| T109 | 
34794 | 
182 | 
0 | 
0 | 
| T110 | 
10490 | 
16 | 
0 | 
0 | 
| T115 | 
66869 | 
657 | 
0 | 
0 | 
| T116 | 
14426 | 
103 | 
0 | 
0 | 
| T126 | 
64245 | 
322 | 
0 | 
0 | 
| T129 | 
33363 | 
240 | 
0 | 
0 | 
| T166 | 
13425 | 
43 | 
0 | 
0 | 
| T167 | 
4435 | 
3 | 
0 | 
0 | 
cmd_info_9_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
444238720 | 
3183 | 
0 | 
0 | 
| T96 | 
2223 | 
3 | 
0 | 
0 | 
| T97 | 
4555 | 
6 | 
0 | 
0 | 
| T109 | 
34794 | 
224 | 
0 | 
0 | 
| T110 | 
10490 | 
112 | 
0 | 
0 | 
| T115 | 
66869 | 
504 | 
0 | 
0 | 
| T116 | 
14426 | 
47 | 
0 | 
0 | 
| T126 | 
64245 | 
429 | 
0 | 
0 | 
| T129 | 
33363 | 
257 | 
0 | 
0 | 
| T133 | 
4177 | 
19 | 
0 | 
0 | 
| T166 | 
13425 | 
51 | 
0 | 
0 | 
cmd_info_en4b_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
444238720 | 
981 | 
0 | 
0 | 
| T97 | 
4555 | 
10 | 
0 | 
0 | 
| T109 | 
34794 | 
52 | 
0 | 
0 | 
| T110 | 
10490 | 
17 | 
0 | 
0 | 
| T115 | 
66869 | 
109 | 
0 | 
0 | 
| T116 | 
14426 | 
13 | 
0 | 
0 | 
| T126 | 
64245 | 
24 | 
0 | 
0 | 
| T129 | 
33363 | 
52 | 
0 | 
0 | 
| T166 | 
13425 | 
56 | 
0 | 
0 | 
| T167 | 
4435 | 
6 | 
0 | 
0 | 
| T168 | 
5220 | 
5 | 
0 | 
0 | 
cmd_info_ex4b_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
444238720 | 
959 | 
0 | 
0 | 
| T96 | 
2223 | 
2 | 
0 | 
0 | 
| T97 | 
4555 | 
7 | 
0 | 
0 | 
| T109 | 
34794 | 
88 | 
0 | 
0 | 
| T110 | 
10490 | 
14 | 
0 | 
0 | 
| T115 | 
66869 | 
90 | 
0 | 
0 | 
| T116 | 
14426 | 
27 | 
0 | 
0 | 
| T126 | 
64245 | 
50 | 
0 | 
0 | 
| T129 | 
33363 | 
49 | 
0 | 
0 | 
| T166 | 
13425 | 
28 | 
0 | 
0 | 
| T167 | 
4435 | 
5 | 
0 | 
0 | 
cmd_info_wrdi_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
444238720 | 
935 | 
0 | 
0 | 
| T96 | 
2223 | 
2 | 
0 | 
0 | 
| T97 | 
4555 | 
15 | 
0 | 
0 | 
| T109 | 
34794 | 
64 | 
0 | 
0 | 
| T110 | 
10490 | 
21 | 
0 | 
0 | 
| T115 | 
66869 | 
77 | 
0 | 
0 | 
| T116 | 
14426 | 
25 | 
0 | 
0 | 
| T126 | 
64245 | 
78 | 
0 | 
0 | 
| T129 | 
33363 | 
47 | 
0 | 
0 | 
| T133 | 
4177 | 
7 | 
0 | 
0 | 
| T166 | 
13425 | 
43 | 
0 | 
0 | 
cmd_info_wren_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
444238720 | 
1054 | 
0 | 
0 | 
| T97 | 
4555 | 
15 | 
0 | 
0 | 
| T109 | 
34794 | 
44 | 
0 | 
0 | 
| T110 | 
10490 | 
6 | 
0 | 
0 | 
| T115 | 
66869 | 
89 | 
0 | 
0 | 
| T116 | 
14426 | 
34 | 
0 | 
0 | 
| T126 | 
64245 | 
54 | 
0 | 
0 | 
| T129 | 
33363 | 
69 | 
0 | 
0 | 
| T133 | 
4177 | 
1 | 
0 | 
0 | 
| T166 | 
13425 | 
26 | 
0 | 
0 | 
| T168 | 
5220 | 
9 | 
0 | 
0 | 
intercept_en_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
444238720 | 
1325 | 
0 | 
0 | 
| T96 | 
2223 | 
1 | 
0 | 
0 | 
| T97 | 
4555 | 
10 | 
0 | 
0 | 
| T109 | 
34794 | 
63 | 
0 | 
0 | 
| T110 | 
10490 | 
27 | 
0 | 
0 | 
| T115 | 
66869 | 
182 | 
0 | 
0 | 
| T116 | 
14426 | 
28 | 
0 | 
0 | 
| T126 | 
64245 | 
109 | 
0 | 
0 | 
| T129 | 
33363 | 
94 | 
0 | 
0 | 
| T133 | 
4177 | 
7 | 
0 | 
0 | 
| T166 | 
13425 | 
42 | 
0 | 
0 | 
intr_enable_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
444238720 | 
2527 | 
0 | 
0 | 
| T19 | 
154184 | 
33 | 
0 | 
0 | 
| T21 | 
0 | 
34 | 
0 | 
0 | 
| T32 | 
0 | 
20 | 
0 | 
0 | 
| T91 | 
241155 | 
0 | 
0 | 
0 | 
| T93 | 
0 | 
7 | 
0 | 
0 | 
| T170 | 
0 | 
19 | 
0 | 
0 | 
| T171 | 
0 | 
39 | 
0 | 
0 | 
| T172 | 
0 | 
41 | 
0 | 
0 | 
| T173 | 
0 | 
22 | 
0 | 
0 | 
| T174 | 
0 | 
45 | 
0 | 
0 | 
| T175 | 
0 | 
36 | 
0 | 
0 | 
| T176 | 
5868 | 
0 | 
0 | 
0 | 
| T177 | 
1299 | 
0 | 
0 | 
0 | 
| T178 | 
466589 | 
0 | 
0 | 
0 | 
| T179 | 
3720 | 
0 | 
0 | 
0 | 
| T180 | 
29032 | 
0 | 
0 | 
0 | 
| T181 | 
393926 | 
0 | 
0 | 
0 | 
| T182 | 
4137 | 
0 | 
0 | 
0 | 
| T183 | 
830 | 
0 | 
0 | 
0 | 
jedec_cc_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
444238720 | 
1064 | 
0 | 
0 | 
| T96 | 
2223 | 
2 | 
0 | 
0 | 
| T97 | 
4555 | 
6 | 
0 | 
0 | 
| T109 | 
34794 | 
36 | 
0 | 
0 | 
| T110 | 
10490 | 
29 | 
0 | 
0 | 
| T115 | 
66869 | 
102 | 
0 | 
0 | 
| T116 | 
14426 | 
31 | 
0 | 
0 | 
| T126 | 
64245 | 
40 | 
0 | 
0 | 
| T129 | 
33363 | 
71 | 
0 | 
0 | 
| T133 | 
4177 | 
10 | 
0 | 
0 | 
| T166 | 
13425 | 
45 | 
0 | 
0 | 
jedec_id_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
444238720 | 
1050 | 
0 | 
0 | 
| T96 | 
2223 | 
5 | 
0 | 
0 | 
| T97 | 
4555 | 
1 | 
0 | 
0 | 
| T109 | 
34794 | 
61 | 
0 | 
0 | 
| T110 | 
10490 | 
24 | 
0 | 
0 | 
| T115 | 
66869 | 
100 | 
0 | 
0 | 
| T116 | 
14426 | 
21 | 
0 | 
0 | 
| T126 | 
64245 | 
49 | 
0 | 
0 | 
| T129 | 
33363 | 
64 | 
0 | 
0 | 
| T166 | 
13425 | 
43 | 
0 | 
0 | 
| T167 | 
4435 | 
1 | 
0 | 
0 | 
mailbox_addr_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
444238720 | 
833 | 
0 | 
0 | 
| T96 | 
2223 | 
8 | 
0 | 
0 | 
| T97 | 
4555 | 
13 | 
0 | 
0 | 
| T109 | 
34794 | 
33 | 
0 | 
0 | 
| T110 | 
10490 | 
27 | 
0 | 
0 | 
| T115 | 
66869 | 
84 | 
0 | 
0 | 
| T116 | 
14426 | 
25 | 
0 | 
0 | 
| T126 | 
64245 | 
60 | 
0 | 
0 | 
| T129 | 
33363 | 
43 | 
0 | 
0 | 
| T133 | 
4177 | 
7 | 
0 | 
0 | 
| T166 | 
13425 | 
28 | 
0 | 
0 | 
payload_swap_data_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
444238720 | 
934 | 
0 | 
0 | 
| T96 | 
2223 | 
7 | 
0 | 
0 | 
| T97 | 
4555 | 
19 | 
0 | 
0 | 
| T109 | 
34794 | 
46 | 
0 | 
0 | 
| T110 | 
10490 | 
9 | 
0 | 
0 | 
| T115 | 
66869 | 
59 | 
0 | 
0 | 
| T116 | 
14426 | 
20 | 
0 | 
0 | 
| T126 | 
64245 | 
52 | 
0 | 
0 | 
| T129 | 
33363 | 
32 | 
0 | 
0 | 
| T166 | 
13425 | 
118 | 
0 | 
0 | 
| T167 | 
4435 | 
9 | 
0 | 
0 | 
payload_swap_mask_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
444238720 | 
786 | 
0 | 
0 | 
| T96 | 
2223 | 
2 | 
0 | 
0 | 
| T97 | 
4555 | 
9 | 
0 | 
0 | 
| T109 | 
34794 | 
25 | 
0 | 
0 | 
| T110 | 
10490 | 
22 | 
0 | 
0 | 
| T115 | 
66869 | 
64 | 
0 | 
0 | 
| T116 | 
14426 | 
30 | 
0 | 
0 | 
| T126 | 
64245 | 
41 | 
0 | 
0 | 
| T129 | 
33363 | 
32 | 
0 | 
0 | 
| T166 | 
13425 | 
53 | 
0 | 
0 | 
| T168 | 
5220 | 
9 | 
0 | 
0 | 
read_threshold_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
444238720 | 
908 | 
0 | 
0 | 
| T96 | 
2223 | 
5 | 
0 | 
0 | 
| T97 | 
4555 | 
11 | 
0 | 
0 | 
| T109 | 
34794 | 
53 | 
0 | 
0 | 
| T110 | 
10490 | 
12 | 
0 | 
0 | 
| T115 | 
66869 | 
72 | 
0 | 
0 | 
| T116 | 
14426 | 
30 | 
0 | 
0 | 
| T126 | 
64245 | 
43 | 
0 | 
0 | 
| T129 | 
33363 | 
53 | 
0 | 
0 | 
| T166 | 
13425 | 
40 | 
0 | 
0 | 
| T168 | 
5220 | 
2 | 
0 | 
0 | 
tpm_access_0_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
444238720 | 
1469 | 
0 | 
0 | 
| T96 | 
2223 | 
1 | 
0 | 
0 | 
| T97 | 
4555 | 
14 | 
0 | 
0 | 
| T109 | 
34794 | 
72 | 
0 | 
0 | 
| T110 | 
10490 | 
9 | 
0 | 
0 | 
| T115 | 
66869 | 
260 | 
0 | 
0 | 
| T116 | 
14426 | 
53 | 
0 | 
0 | 
| T126 | 
64245 | 
90 | 
0 | 
0 | 
| T129 | 
33363 | 
127 | 
0 | 
0 | 
| T133 | 
4177 | 
7 | 
0 | 
0 | 
| T166 | 
13425 | 
70 | 
0 | 
0 | 
tpm_access_1_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
444238720 | 
899 | 
0 | 
0 | 
| T96 | 
2223 | 
4 | 
0 | 
0 | 
| T97 | 
4555 | 
14 | 
0 | 
0 | 
| T109 | 
34794 | 
21 | 
0 | 
0 | 
| T110 | 
10490 | 
18 | 
0 | 
0 | 
| T115 | 
66869 | 
69 | 
0 | 
0 | 
| T116 | 
14426 | 
23 | 
0 | 
0 | 
| T126 | 
64245 | 
32 | 
0 | 
0 | 
| T129 | 
33363 | 
39 | 
0 | 
0 | 
| T166 | 
13425 | 
77 | 
0 | 
0 | 
| T167 | 
4435 | 
1 | 
0 | 
0 | 
tpm_cfg_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
444238720 | 
1388 | 
0 | 
0 | 
| T96 | 
2223 | 
1 | 
0 | 
0 | 
| T97 | 
4555 | 
11 | 
0 | 
0 | 
| T109 | 
34794 | 
72 | 
0 | 
0 | 
| T110 | 
10490 | 
27 | 
0 | 
0 | 
| T115 | 
66869 | 
241 | 
0 | 
0 | 
| T116 | 
14426 | 
53 | 
0 | 
0 | 
| T126 | 
64245 | 
142 | 
0 | 
0 | 
| T129 | 
33363 | 
40 | 
0 | 
0 | 
| T133 | 
4177 | 
11 | 
0 | 
0 | 
| T166 | 
13425 | 
23 | 
0 | 
0 | 
tpm_did_vid_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
444238720 | 
1026 | 
0 | 
0 | 
| T96 | 
2223 | 
7 | 
0 | 
0 | 
| T97 | 
4555 | 
11 | 
0 | 
0 | 
| T109 | 
34794 | 
37 | 
0 | 
0 | 
| T110 | 
10490 | 
8 | 
0 | 
0 | 
| T115 | 
66869 | 
118 | 
0 | 
0 | 
| T116 | 
14426 | 
33 | 
0 | 
0 | 
| T126 | 
64245 | 
28 | 
0 | 
0 | 
| T129 | 
33363 | 
52 | 
0 | 
0 | 
| T166 | 
13425 | 
40 | 
0 | 
0 | 
| T169 | 
13681 | 
9 | 
0 | 
0 | 
tpm_int_enable_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
444238720 | 
808 | 
0 | 
0 | 
| T96 | 
2223 | 
3 | 
0 | 
0 | 
| T97 | 
4555 | 
7 | 
0 | 
0 | 
| T109 | 
34794 | 
37 | 
0 | 
0 | 
| T110 | 
10490 | 
12 | 
0 | 
0 | 
| T115 | 
66869 | 
74 | 
0 | 
0 | 
| T116 | 
14426 | 
22 | 
0 | 
0 | 
| T117 | 
24119 | 
5 | 
0 | 
0 | 
| T129 | 
33363 | 
34 | 
0 | 
0 | 
| T133 | 
4177 | 
2 | 
0 | 
0 | 
| T166 | 
13425 | 
30 | 
0 | 
0 | 
tpm_int_status_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
444238720 | 
853 | 
0 | 
0 | 
| T96 | 
2223 | 
3 | 
0 | 
0 | 
| T97 | 
4555 | 
13 | 
0 | 
0 | 
| T109 | 
34794 | 
34 | 
0 | 
0 | 
| T110 | 
10490 | 
11 | 
0 | 
0 | 
| T115 | 
66869 | 
78 | 
0 | 
0 | 
| T116 | 
14426 | 
35 | 
0 | 
0 | 
| T126 | 
64245 | 
17 | 
0 | 
0 | 
| T129 | 
33363 | 
33 | 
0 | 
0 | 
| T166 | 
13425 | 
29 | 
0 | 
0 | 
| T168 | 
5220 | 
6 | 
0 | 
0 | 
tpm_int_vector_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
444238720 | 
877 | 
0 | 
0 | 
| T96 | 
2223 | 
1 | 
0 | 
0 | 
| T97 | 
4555 | 
3 | 
0 | 
0 | 
| T109 | 
34794 | 
43 | 
0 | 
0 | 
| T110 | 
10490 | 
8 | 
0 | 
0 | 
| T115 | 
66869 | 
89 | 
0 | 
0 | 
| T116 | 
14426 | 
20 | 
0 | 
0 | 
| T126 | 
64245 | 
44 | 
0 | 
0 | 
| T129 | 
33363 | 
40 | 
0 | 
0 | 
| T133 | 
4177 | 
2 | 
0 | 
0 | 
| T166 | 
13425 | 
46 | 
0 | 
0 | 
tpm_intf_capability_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
444238720 | 
908 | 
0 | 
0 | 
| T96 | 
2223 | 
6 | 
0 | 
0 | 
| T97 | 
4555 | 
5 | 
0 | 
0 | 
| T109 | 
34794 | 
31 | 
0 | 
0 | 
| T110 | 
10490 | 
16 | 
0 | 
0 | 
| T115 | 
66869 | 
69 | 
0 | 
0 | 
| T116 | 
14426 | 
16 | 
0 | 
0 | 
| T126 | 
64245 | 
35 | 
0 | 
0 | 
| T129 | 
33363 | 
32 | 
0 | 
0 | 
| T133 | 
4177 | 
3 | 
0 | 
0 | 
| T166 | 
13425 | 
46 | 
0 | 
0 | 
tpm_rid_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
444238720 | 
881 | 
0 | 
0 | 
| T96 | 
2223 | 
10 | 
0 | 
0 | 
| T97 | 
4555 | 
8 | 
0 | 
0 | 
| T109 | 
34794 | 
33 | 
0 | 
0 | 
| T110 | 
10490 | 
16 | 
0 | 
0 | 
| T115 | 
66869 | 
60 | 
0 | 
0 | 
| T116 | 
14426 | 
17 | 
0 | 
0 | 
| T126 | 
64245 | 
35 | 
0 | 
0 | 
| T129 | 
33363 | 
19 | 
0 | 
0 | 
| T133 | 
4177 | 
1 | 
0 | 
0 | 
| T166 | 
13425 | 
52 | 
0 | 
0 | 
tpm_sts_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
444238720 | 
858 | 
0 | 
0 | 
| T96 | 
2223 | 
6 | 
0 | 
0 | 
| T97 | 
4555 | 
9 | 
0 | 
0 | 
| T109 | 
34794 | 
35 | 
0 | 
0 | 
| T110 | 
10490 | 
9 | 
0 | 
0 | 
| T115 | 
66869 | 
80 | 
0 | 
0 | 
| T116 | 
14426 | 
15 | 
0 | 
0 | 
| T126 | 
64245 | 
46 | 
0 | 
0 | 
| T129 | 
33363 | 
47 | 
0 | 
0 | 
| T166 | 
13425 | 
39 | 
0 | 
0 | 
| T169 | 
13681 | 
44 | 
0 | 
0 |