Assert Coverage for Module :
spi_device_csr_assert_fpv
Assertion Details
TlulOOBAddrErr_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
401430123 |
3646 |
0 |
0 |
T97 |
14398 |
217 |
0 |
0 |
T98 |
96579 |
1 |
0 |
0 |
T99 |
4469 |
156 |
0 |
0 |
T100 |
20721 |
303 |
0 |
0 |
T102 |
10538 |
1 |
0 |
0 |
T105 |
5343 |
153 |
0 |
0 |
T106 |
11839 |
90 |
0 |
0 |
T111 |
13647 |
9 |
0 |
0 |
T113 |
5729 |
2 |
0 |
0 |
T114 |
8726 |
3 |
0 |
0 |
addr_swap_data_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
401430123 |
3212 |
0 |
0 |
T80 |
4631 |
11 |
0 |
0 |
T98 |
96579 |
55 |
0 |
0 |
T111 |
13647 |
33 |
0 |
0 |
T115 |
37741 |
28 |
0 |
0 |
T117 |
179537 |
475 |
0 |
0 |
T125 |
156387 |
290 |
0 |
0 |
T143 |
19865 |
43 |
0 |
0 |
T151 |
4362 |
1 |
0 |
0 |
T152 |
3982 |
2 |
0 |
0 |
T153 |
20940 |
43 |
0 |
0 |
addr_swap_mask_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
401430123 |
3280 |
0 |
0 |
T80 |
4631 |
5 |
0 |
0 |
T98 |
96579 |
78 |
0 |
0 |
T111 |
13647 |
24 |
0 |
0 |
T115 |
37741 |
25 |
0 |
0 |
T117 |
179537 |
460 |
0 |
0 |
T125 |
156387 |
270 |
0 |
0 |
T142 |
7509 |
49 |
0 |
0 |
T143 |
19865 |
39 |
0 |
0 |
T151 |
4362 |
6 |
0 |
0 |
T153 |
20940 |
39 |
0 |
0 |
cfg_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
401430123 |
4112 |
0 |
0 |
T80 |
4631 |
10 |
0 |
0 |
T98 |
96579 |
137 |
0 |
0 |
T111 |
13647 |
51 |
0 |
0 |
T115 |
37741 |
64 |
0 |
0 |
T117 |
179537 |
407 |
0 |
0 |
T125 |
156387 |
293 |
0 |
0 |
T142 |
7509 |
39 |
0 |
0 |
T143 |
19865 |
55 |
0 |
0 |
T151 |
4362 |
13 |
0 |
0 |
T152 |
3982 |
9 |
0 |
0 |
cmd_filter_0_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
401430123 |
12450 |
0 |
0 |
T80 |
4631 |
20 |
0 |
0 |
T98 |
96579 |
1378 |
0 |
0 |
T111 |
13647 |
255 |
0 |
0 |
T115 |
37741 |
859 |
0 |
0 |
T117 |
179537 |
460 |
0 |
0 |
T125 |
156387 |
270 |
0 |
0 |
T142 |
7509 |
22 |
0 |
0 |
T143 |
19865 |
59 |
0 |
0 |
T151 |
4362 |
1 |
0 |
0 |
T152 |
3982 |
75 |
0 |
0 |
cmd_filter_1_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
401430123 |
12030 |
0 |
0 |
T80 |
4631 |
17 |
0 |
0 |
T98 |
96579 |
965 |
0 |
0 |
T111 |
13647 |
372 |
0 |
0 |
T115 |
37741 |
706 |
0 |
0 |
T117 |
179537 |
430 |
0 |
0 |
T125 |
156387 |
314 |
0 |
0 |
T142 |
7509 |
20 |
0 |
0 |
T143 |
19865 |
71 |
0 |
0 |
T151 |
4362 |
4 |
0 |
0 |
T152 |
3982 |
90 |
0 |
0 |
cmd_filter_2_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
401430123 |
12013 |
0 |
0 |
T80 |
4631 |
6 |
0 |
0 |
T98 |
96579 |
787 |
0 |
0 |
T111 |
13647 |
14 |
0 |
0 |
T115 |
37741 |
730 |
0 |
0 |
T117 |
179537 |
417 |
0 |
0 |
T125 |
156387 |
296 |
0 |
0 |
T142 |
7509 |
7 |
0 |
0 |
T143 |
19865 |
58 |
0 |
0 |
T151 |
4362 |
8 |
0 |
0 |
T152 |
3982 |
6 |
0 |
0 |
cmd_filter_3_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
401430123 |
11375 |
0 |
0 |
T80 |
4631 |
1 |
0 |
0 |
T98 |
96579 |
986 |
0 |
0 |
T111 |
13647 |
128 |
0 |
0 |
T115 |
37741 |
688 |
0 |
0 |
T117 |
179537 |
502 |
0 |
0 |
T125 |
156387 |
271 |
0 |
0 |
T142 |
7509 |
5 |
0 |
0 |
T143 |
19865 |
83 |
0 |
0 |
T151 |
4362 |
50 |
0 |
0 |
T152 |
3982 |
77 |
0 |
0 |
cmd_filter_4_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
401430123 |
10820 |
0 |
0 |
T80 |
4631 |
12 |
0 |
0 |
T98 |
96579 |
1136 |
0 |
0 |
T111 |
13647 |
179 |
0 |
0 |
T115 |
37741 |
508 |
0 |
0 |
T117 |
179537 |
434 |
0 |
0 |
T125 |
156387 |
297 |
0 |
0 |
T142 |
7509 |
55 |
0 |
0 |
T143 |
19865 |
27 |
0 |
0 |
T151 |
4362 |
42 |
0 |
0 |
T152 |
3982 |
55 |
0 |
0 |
cmd_filter_5_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
401430123 |
10859 |
0 |
0 |
T80 |
4631 |
9 |
0 |
0 |
T98 |
96579 |
724 |
0 |
0 |
T111 |
13647 |
156 |
0 |
0 |
T115 |
37741 |
658 |
0 |
0 |
T117 |
179537 |
424 |
0 |
0 |
T125 |
156387 |
242 |
0 |
0 |
T142 |
7509 |
35 |
0 |
0 |
T143 |
19865 |
70 |
0 |
0 |
T151 |
4362 |
5 |
0 |
0 |
T152 |
3982 |
73 |
0 |
0 |
cmd_filter_6_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
401430123 |
12971 |
0 |
0 |
T80 |
4631 |
22 |
0 |
0 |
T98 |
96579 |
926 |
0 |
0 |
T111 |
13647 |
306 |
0 |
0 |
T115 |
37741 |
608 |
0 |
0 |
T117 |
179537 |
433 |
0 |
0 |
T125 |
156387 |
255 |
0 |
0 |
T142 |
7509 |
20 |
0 |
0 |
T143 |
19865 |
94 |
0 |
0 |
T151 |
4362 |
89 |
0 |
0 |
T153 |
20940 |
70 |
0 |
0 |
cmd_filter_7_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
401430123 |
13120 |
0 |
0 |
T80 |
4631 |
9 |
0 |
0 |
T98 |
96579 |
1309 |
0 |
0 |
T100 |
20721 |
4 |
0 |
0 |
T111 |
13647 |
231 |
0 |
0 |
T115 |
37741 |
929 |
0 |
0 |
T117 |
179537 |
445 |
0 |
0 |
T125 |
156387 |
230 |
0 |
0 |
T142 |
7509 |
21 |
0 |
0 |
T143 |
19865 |
59 |
0 |
0 |
T151 |
4362 |
71 |
0 |
0 |
cmd_info_0_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
401430123 |
6272 |
0 |
0 |
T80 |
4631 |
8 |
0 |
0 |
T98 |
96579 |
394 |
0 |
0 |
T111 |
13647 |
36 |
0 |
0 |
T115 |
37741 |
285 |
0 |
0 |
T117 |
179537 |
448 |
0 |
0 |
T125 |
156387 |
271 |
0 |
0 |
T142 |
7509 |
11 |
0 |
0 |
T143 |
19865 |
38 |
0 |
0 |
T151 |
4362 |
17 |
0 |
0 |
T153 |
20940 |
61 |
0 |
0 |
cmd_info_10_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
401430123 |
6592 |
0 |
0 |
T80 |
4631 |
7 |
0 |
0 |
T98 |
96579 |
524 |
0 |
0 |
T111 |
13647 |
75 |
0 |
0 |
T115 |
37741 |
248 |
0 |
0 |
T117 |
179537 |
472 |
0 |
0 |
T125 |
156387 |
253 |
0 |
0 |
T142 |
7509 |
33 |
0 |
0 |
T143 |
19865 |
78 |
0 |
0 |
T152 |
3982 |
22 |
0 |
0 |
T153 |
20940 |
81 |
0 |
0 |
cmd_info_11_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
401430123 |
6878 |
0 |
0 |
T80 |
4631 |
8 |
0 |
0 |
T98 |
96579 |
453 |
0 |
0 |
T111 |
13647 |
50 |
0 |
0 |
T115 |
37741 |
232 |
0 |
0 |
T117 |
179537 |
436 |
0 |
0 |
T125 |
156387 |
241 |
0 |
0 |
T142 |
7509 |
31 |
0 |
0 |
T143 |
19865 |
83 |
0 |
0 |
T151 |
4362 |
19 |
0 |
0 |
T153 |
20940 |
73 |
0 |
0 |
cmd_info_12_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
401430123 |
6496 |
0 |
0 |
T80 |
4631 |
10 |
0 |
0 |
T98 |
96579 |
477 |
0 |
0 |
T111 |
13647 |
29 |
0 |
0 |
T115 |
37741 |
357 |
0 |
0 |
T117 |
179537 |
420 |
0 |
0 |
T125 |
156387 |
280 |
0 |
0 |
T142 |
7509 |
39 |
0 |
0 |
T143 |
19865 |
74 |
0 |
0 |
T151 |
4362 |
12 |
0 |
0 |
T152 |
3982 |
13 |
0 |
0 |
cmd_info_13_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
401430123 |
6597 |
0 |
0 |
T80 |
4631 |
14 |
0 |
0 |
T98 |
96579 |
422 |
0 |
0 |
T111 |
13647 |
61 |
0 |
0 |
T115 |
37741 |
279 |
0 |
0 |
T117 |
179537 |
527 |
0 |
0 |
T125 |
156387 |
291 |
0 |
0 |
T142 |
7509 |
15 |
0 |
0 |
T143 |
19865 |
66 |
0 |
0 |
T151 |
4362 |
41 |
0 |
0 |
T152 |
3982 |
2 |
0 |
0 |
cmd_info_14_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
401430123 |
6451 |
0 |
0 |
T80 |
4631 |
10 |
0 |
0 |
T97 |
14398 |
7 |
0 |
0 |
T98 |
96579 |
422 |
0 |
0 |
T111 |
13647 |
55 |
0 |
0 |
T115 |
37741 |
392 |
0 |
0 |
T117 |
179537 |
409 |
0 |
0 |
T125 |
156387 |
257 |
0 |
0 |
T142 |
7509 |
15 |
0 |
0 |
T143 |
19865 |
34 |
0 |
0 |
T151 |
4362 |
22 |
0 |
0 |
cmd_info_15_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
401430123 |
6459 |
0 |
0 |
T80 |
4631 |
6 |
0 |
0 |
T98 |
96579 |
496 |
0 |
0 |
T111 |
13647 |
81 |
0 |
0 |
T115 |
37741 |
225 |
0 |
0 |
T117 |
179537 |
371 |
0 |
0 |
T125 |
156387 |
260 |
0 |
0 |
T142 |
7509 |
23 |
0 |
0 |
T143 |
19865 |
43 |
0 |
0 |
T151 |
4362 |
12 |
0 |
0 |
T152 |
3982 |
4 |
0 |
0 |
cmd_info_16_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
401430123 |
6779 |
0 |
0 |
T80 |
4631 |
16 |
0 |
0 |
T98 |
96579 |
488 |
0 |
0 |
T111 |
13647 |
118 |
0 |
0 |
T115 |
37741 |
386 |
0 |
0 |
T117 |
179537 |
429 |
0 |
0 |
T125 |
156387 |
291 |
0 |
0 |
T142 |
7509 |
10 |
0 |
0 |
T143 |
19865 |
41 |
0 |
0 |
T151 |
4362 |
13 |
0 |
0 |
T153 |
20940 |
41 |
0 |
0 |
cmd_info_17_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
401430123 |
6204 |
0 |
0 |
T80 |
4631 |
2 |
0 |
0 |
T98 |
96579 |
370 |
0 |
0 |
T111 |
13647 |
121 |
0 |
0 |
T115 |
37741 |
238 |
0 |
0 |
T117 |
179537 |
451 |
0 |
0 |
T125 |
156387 |
300 |
0 |
0 |
T142 |
7509 |
36 |
0 |
0 |
T143 |
19865 |
77 |
0 |
0 |
T151 |
4362 |
22 |
0 |
0 |
T152 |
3982 |
31 |
0 |
0 |
cmd_info_18_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
401430123 |
6406 |
0 |
0 |
T80 |
4631 |
10 |
0 |
0 |
T98 |
96579 |
361 |
0 |
0 |
T111 |
13647 |
55 |
0 |
0 |
T115 |
37741 |
249 |
0 |
0 |
T117 |
179537 |
413 |
0 |
0 |
T125 |
156387 |
223 |
0 |
0 |
T142 |
7509 |
36 |
0 |
0 |
T143 |
19865 |
38 |
0 |
0 |
T151 |
4362 |
29 |
0 |
0 |
T152 |
3982 |
29 |
0 |
0 |
cmd_info_19_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
401430123 |
6022 |
0 |
0 |
T80 |
4631 |
22 |
0 |
0 |
T98 |
96579 |
359 |
0 |
0 |
T111 |
13647 |
77 |
0 |
0 |
T115 |
37741 |
304 |
0 |
0 |
T117 |
179537 |
446 |
0 |
0 |
T125 |
156387 |
318 |
0 |
0 |
T142 |
7509 |
13 |
0 |
0 |
T143 |
19865 |
59 |
0 |
0 |
T151 |
4362 |
44 |
0 |
0 |
T152 |
3982 |
1 |
0 |
0 |
cmd_info_1_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
401430123 |
6331 |
0 |
0 |
T80 |
4631 |
12 |
0 |
0 |
T98 |
96579 |
313 |
0 |
0 |
T111 |
13647 |
134 |
0 |
0 |
T115 |
37741 |
115 |
0 |
0 |
T117 |
179537 |
457 |
0 |
0 |
T125 |
156387 |
219 |
0 |
0 |
T142 |
7509 |
50 |
0 |
0 |
T143 |
19865 |
37 |
0 |
0 |
T151 |
4362 |
26 |
0 |
0 |
T152 |
3982 |
41 |
0 |
0 |
cmd_info_20_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
401430123 |
5961 |
0 |
0 |
T80 |
4631 |
10 |
0 |
0 |
T98 |
96579 |
541 |
0 |
0 |
T111 |
13647 |
112 |
0 |
0 |
T115 |
37741 |
169 |
0 |
0 |
T117 |
179537 |
491 |
0 |
0 |
T125 |
156387 |
232 |
0 |
0 |
T142 |
7509 |
7 |
0 |
0 |
T143 |
19865 |
51 |
0 |
0 |
T152 |
3982 |
27 |
0 |
0 |
T153 |
20940 |
23 |
0 |
0 |
cmd_info_21_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
401430123 |
5951 |
0 |
0 |
T80 |
4631 |
9 |
0 |
0 |
T98 |
96579 |
463 |
0 |
0 |
T106 |
11839 |
2 |
0 |
0 |
T111 |
13647 |
10 |
0 |
0 |
T115 |
37741 |
192 |
0 |
0 |
T117 |
179537 |
390 |
0 |
0 |
T125 |
156387 |
288 |
0 |
0 |
T142 |
7509 |
36 |
0 |
0 |
T143 |
19865 |
49 |
0 |
0 |
T152 |
3982 |
16 |
0 |
0 |
cmd_info_22_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
401430123 |
6482 |
0 |
0 |
T80 |
4631 |
11 |
0 |
0 |
T98 |
96579 |
390 |
0 |
0 |
T111 |
13647 |
130 |
0 |
0 |
T115 |
37741 |
334 |
0 |
0 |
T117 |
179537 |
392 |
0 |
0 |
T125 |
156387 |
266 |
0 |
0 |
T142 |
7509 |
1 |
0 |
0 |
T143 |
19865 |
74 |
0 |
0 |
T151 |
4362 |
40 |
0 |
0 |
T153 |
20940 |
51 |
0 |
0 |
cmd_info_23_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
401430123 |
6284 |
0 |
0 |
T80 |
4631 |
8 |
0 |
0 |
T98 |
96579 |
446 |
0 |
0 |
T106 |
11839 |
6 |
0 |
0 |
T111 |
13647 |
131 |
0 |
0 |
T115 |
37741 |
368 |
0 |
0 |
T117 |
179537 |
404 |
0 |
0 |
T125 |
156387 |
309 |
0 |
0 |
T143 |
19865 |
48 |
0 |
0 |
T151 |
4362 |
1 |
0 |
0 |
T152 |
3982 |
38 |
0 |
0 |
cmd_info_2_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
401430123 |
6150 |
0 |
0 |
T80 |
4631 |
7 |
0 |
0 |
T98 |
96579 |
367 |
0 |
0 |
T111 |
13647 |
64 |
0 |
0 |
T115 |
37741 |
351 |
0 |
0 |
T117 |
179537 |
423 |
0 |
0 |
T125 |
156387 |
276 |
0 |
0 |
T142 |
7509 |
12 |
0 |
0 |
T143 |
19865 |
78 |
0 |
0 |
T152 |
3982 |
11 |
0 |
0 |
T153 |
20940 |
49 |
0 |
0 |
cmd_info_3_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
401430123 |
6494 |
0 |
0 |
T80 |
4631 |
11 |
0 |
0 |
T98 |
96579 |
364 |
0 |
0 |
T111 |
13647 |
80 |
0 |
0 |
T115 |
37741 |
296 |
0 |
0 |
T117 |
179537 |
425 |
0 |
0 |
T125 |
156387 |
301 |
0 |
0 |
T142 |
7509 |
16 |
0 |
0 |
T143 |
19865 |
98 |
0 |
0 |
T151 |
4362 |
9 |
0 |
0 |
T152 |
3982 |
4 |
0 |
0 |
cmd_info_4_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
401430123 |
6578 |
0 |
0 |
T80 |
4631 |
13 |
0 |
0 |
T97 |
14398 |
3 |
0 |
0 |
T98 |
96579 |
544 |
0 |
0 |
T111 |
13647 |
53 |
0 |
0 |
T115 |
37741 |
168 |
0 |
0 |
T117 |
179537 |
422 |
0 |
0 |
T125 |
156387 |
231 |
0 |
0 |
T142 |
7509 |
27 |
0 |
0 |
T143 |
19865 |
72 |
0 |
0 |
T151 |
4362 |
34 |
0 |
0 |
cmd_info_5_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
401430123 |
6341 |
0 |
0 |
T80 |
4631 |
4 |
0 |
0 |
T98 |
96579 |
377 |
0 |
0 |
T111 |
13647 |
77 |
0 |
0 |
T115 |
37741 |
265 |
0 |
0 |
T117 |
179537 |
447 |
0 |
0 |
T125 |
156387 |
297 |
0 |
0 |
T142 |
7509 |
31 |
0 |
0 |
T143 |
19865 |
106 |
0 |
0 |
T151 |
4362 |
5 |
0 |
0 |
T152 |
3982 |
3 |
0 |
0 |
cmd_info_6_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
401430123 |
5942 |
0 |
0 |
T80 |
4631 |
4 |
0 |
0 |
T98 |
96579 |
391 |
0 |
0 |
T111 |
13647 |
17 |
0 |
0 |
T115 |
37741 |
209 |
0 |
0 |
T117 |
179537 |
468 |
0 |
0 |
T125 |
156387 |
237 |
0 |
0 |
T142 |
7509 |
51 |
0 |
0 |
T143 |
19865 |
55 |
0 |
0 |
T151 |
4362 |
27 |
0 |
0 |
T152 |
3982 |
4 |
0 |
0 |
cmd_info_7_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
401430123 |
6554 |
0 |
0 |
T80 |
4631 |
16 |
0 |
0 |
T98 |
96579 |
472 |
0 |
0 |
T111 |
13647 |
78 |
0 |
0 |
T115 |
37741 |
354 |
0 |
0 |
T117 |
179537 |
410 |
0 |
0 |
T125 |
156387 |
248 |
0 |
0 |
T142 |
7509 |
9 |
0 |
0 |
T143 |
19865 |
71 |
0 |
0 |
T151 |
4362 |
20 |
0 |
0 |
T152 |
3982 |
36 |
0 |
0 |
cmd_info_8_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
401430123 |
6590 |
0 |
0 |
T80 |
4631 |
10 |
0 |
0 |
T98 |
96579 |
418 |
0 |
0 |
T111 |
13647 |
126 |
0 |
0 |
T115 |
37741 |
271 |
0 |
0 |
T117 |
179537 |
497 |
0 |
0 |
T125 |
156387 |
311 |
0 |
0 |
T142 |
7509 |
34 |
0 |
0 |
T143 |
19865 |
44 |
0 |
0 |
T151 |
4362 |
4 |
0 |
0 |
T152 |
3982 |
30 |
0 |
0 |
cmd_info_9_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
401430123 |
6440 |
0 |
0 |
T80 |
4631 |
15 |
0 |
0 |
T98 |
96579 |
467 |
0 |
0 |
T111 |
13647 |
72 |
0 |
0 |
T115 |
37741 |
141 |
0 |
0 |
T117 |
179537 |
414 |
0 |
0 |
T125 |
156387 |
255 |
0 |
0 |
T142 |
7509 |
35 |
0 |
0 |
T143 |
19865 |
75 |
0 |
0 |
T152 |
3982 |
20 |
0 |
0 |
T153 |
20940 |
110 |
0 |
0 |
cmd_info_en4b_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
401430123 |
3512 |
0 |
0 |
T80 |
4631 |
20 |
0 |
0 |
T98 |
96579 |
66 |
0 |
0 |
T111 |
13647 |
40 |
0 |
0 |
T115 |
37741 |
58 |
0 |
0 |
T117 |
179537 |
408 |
0 |
0 |
T125 |
156387 |
291 |
0 |
0 |
T142 |
7509 |
42 |
0 |
0 |
T143 |
19865 |
72 |
0 |
0 |
T152 |
3982 |
2 |
0 |
0 |
T153 |
20940 |
94 |
0 |
0 |
cmd_info_ex4b_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
401430123 |
3385 |
0 |
0 |
T80 |
4631 |
14 |
0 |
0 |
T98 |
96579 |
57 |
0 |
0 |
T111 |
13647 |
39 |
0 |
0 |
T115 |
37741 |
42 |
0 |
0 |
T117 |
179537 |
465 |
0 |
0 |
T125 |
156387 |
247 |
0 |
0 |
T143 |
19865 |
66 |
0 |
0 |
T151 |
4362 |
1 |
0 |
0 |
T152 |
3982 |
5 |
0 |
0 |
T153 |
20940 |
69 |
0 |
0 |
cmd_info_wrdi_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
401430123 |
3618 |
0 |
0 |
T80 |
4631 |
3 |
0 |
0 |
T97 |
14398 |
9 |
0 |
0 |
T98 |
96579 |
77 |
0 |
0 |
T111 |
13647 |
47 |
0 |
0 |
T115 |
37741 |
61 |
0 |
0 |
T117 |
179537 |
404 |
0 |
0 |
T125 |
156387 |
228 |
0 |
0 |
T142 |
7509 |
9 |
0 |
0 |
T143 |
19865 |
60 |
0 |
0 |
T153 |
20940 |
100 |
0 |
0 |
cmd_info_wren_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
401430123 |
3732 |
0 |
0 |
T80 |
4631 |
20 |
0 |
0 |
T98 |
96579 |
65 |
0 |
0 |
T111 |
13647 |
20 |
0 |
0 |
T115 |
37741 |
84 |
0 |
0 |
T117 |
179537 |
470 |
0 |
0 |
T125 |
156387 |
257 |
0 |
0 |
T142 |
7509 |
15 |
0 |
0 |
T143 |
19865 |
69 |
0 |
0 |
T151 |
4362 |
5 |
0 |
0 |
T153 |
20940 |
63 |
0 |
0 |
intercept_en_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
401430123 |
4242 |
0 |
0 |
T80 |
4631 |
21 |
0 |
0 |
T98 |
96579 |
149 |
0 |
0 |
T111 |
13647 |
43 |
0 |
0 |
T115 |
37741 |
86 |
0 |
0 |
T117 |
179537 |
446 |
0 |
0 |
T125 |
156387 |
277 |
0 |
0 |
T142 |
7509 |
2 |
0 |
0 |
T143 |
19865 |
55 |
0 |
0 |
T151 |
4362 |
3 |
0 |
0 |
T152 |
3982 |
17 |
0 |
0 |
intr_enable_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
401430123 |
5662 |
0 |
0 |
T34 |
826814 |
18 |
0 |
0 |
T57 |
0 |
33 |
0 |
0 |
T154 |
0 |
13 |
0 |
0 |
T155 |
0 |
14 |
0 |
0 |
T156 |
0 |
6 |
0 |
0 |
T157 |
0 |
16 |
0 |
0 |
T158 |
0 |
9 |
0 |
0 |
T159 |
0 |
20 |
0 |
0 |
T160 |
0 |
54 |
0 |
0 |
T161 |
0 |
7 |
0 |
0 |
T162 |
20954 |
0 |
0 |
0 |
T163 |
291472 |
0 |
0 |
0 |
T164 |
115647 |
0 |
0 |
0 |
T165 |
185725 |
0 |
0 |
0 |
T166 |
9928 |
0 |
0 |
0 |
T167 |
16574 |
0 |
0 |
0 |
T168 |
91759 |
0 |
0 |
0 |
T169 |
277552 |
0 |
0 |
0 |
T170 |
1021 |
0 |
0 |
0 |
jedec_cc_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
401430123 |
3604 |
0 |
0 |
T80 |
4631 |
8 |
0 |
0 |
T98 |
96579 |
130 |
0 |
0 |
T111 |
13647 |
49 |
0 |
0 |
T115 |
37741 |
65 |
0 |
0 |
T117 |
179537 |
454 |
0 |
0 |
T125 |
156387 |
265 |
0 |
0 |
T142 |
7509 |
5 |
0 |
0 |
T143 |
19865 |
82 |
0 |
0 |
T151 |
4362 |
7 |
0 |
0 |
T153 |
20940 |
35 |
0 |
0 |
jedec_id_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
401430123 |
3622 |
0 |
0 |
T80 |
4631 |
3 |
0 |
0 |
T98 |
96579 |
69 |
0 |
0 |
T106 |
11839 |
7 |
0 |
0 |
T111 |
13647 |
35 |
0 |
0 |
T115 |
37741 |
47 |
0 |
0 |
T117 |
179537 |
447 |
0 |
0 |
T125 |
156387 |
313 |
0 |
0 |
T142 |
7509 |
24 |
0 |
0 |
T143 |
19865 |
52 |
0 |
0 |
T151 |
4362 |
3 |
0 |
0 |
mailbox_addr_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
401430123 |
3134 |
0 |
0 |
T80 |
4631 |
12 |
0 |
0 |
T98 |
96579 |
64 |
0 |
0 |
T111 |
13647 |
17 |
0 |
0 |
T115 |
37741 |
26 |
0 |
0 |
T117 |
179537 |
459 |
0 |
0 |
T125 |
156387 |
247 |
0 |
0 |
T142 |
7509 |
9 |
0 |
0 |
T143 |
19865 |
48 |
0 |
0 |
T151 |
4362 |
1 |
0 |
0 |
T152 |
3982 |
3 |
0 |
0 |
payload_swap_data_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
401430123 |
3288 |
0 |
0 |
T80 |
4631 |
16 |
0 |
0 |
T98 |
96579 |
58 |
0 |
0 |
T111 |
13647 |
15 |
0 |
0 |
T115 |
37741 |
37 |
0 |
0 |
T117 |
179537 |
439 |
0 |
0 |
T125 |
156387 |
307 |
0 |
0 |
T142 |
7509 |
31 |
0 |
0 |
T143 |
19865 |
73 |
0 |
0 |
T152 |
3982 |
4 |
0 |
0 |
T153 |
20940 |
31 |
0 |
0 |
payload_swap_mask_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
401430123 |
3349 |
0 |
0 |
T80 |
4631 |
17 |
0 |
0 |
T98 |
96579 |
64 |
0 |
0 |
T111 |
13647 |
36 |
0 |
0 |
T115 |
37741 |
34 |
0 |
0 |
T117 |
179537 |
428 |
0 |
0 |
T125 |
156387 |
288 |
0 |
0 |
T142 |
7509 |
24 |
0 |
0 |
T143 |
19865 |
62 |
0 |
0 |
T151 |
4362 |
5 |
0 |
0 |
T152 |
3982 |
4 |
0 |
0 |
read_threshold_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
401430123 |
3258 |
0 |
0 |
T80 |
4631 |
7 |
0 |
0 |
T98 |
96579 |
71 |
0 |
0 |
T111 |
13647 |
36 |
0 |
0 |
T115 |
37741 |
40 |
0 |
0 |
T117 |
179537 |
437 |
0 |
0 |
T125 |
156387 |
232 |
0 |
0 |
T142 |
7509 |
24 |
0 |
0 |
T143 |
19865 |
40 |
0 |
0 |
T152 |
3982 |
4 |
0 |
0 |
T153 |
20940 |
34 |
0 |
0 |
tpm_access_0_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
401430123 |
3984 |
0 |
0 |
T80 |
4631 |
5 |
0 |
0 |
T98 |
96579 |
121 |
0 |
0 |
T111 |
13647 |
41 |
0 |
0 |
T115 |
37741 |
107 |
0 |
0 |
T117 |
179537 |
424 |
0 |
0 |
T125 |
156387 |
263 |
0 |
0 |
T143 |
19865 |
61 |
0 |
0 |
T151 |
4362 |
6 |
0 |
0 |
T152 |
3982 |
2 |
0 |
0 |
T153 |
20940 |
61 |
0 |
0 |
tpm_access_1_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
401430123 |
3128 |
0 |
0 |
T80 |
4631 |
9 |
0 |
0 |
T98 |
96579 |
80 |
0 |
0 |
T100 |
20721 |
6 |
0 |
0 |
T111 |
13647 |
8 |
0 |
0 |
T115 |
37741 |
38 |
0 |
0 |
T117 |
179537 |
432 |
0 |
0 |
T125 |
156387 |
225 |
0 |
0 |
T142 |
7509 |
17 |
0 |
0 |
T143 |
19865 |
43 |
0 |
0 |
T153 |
20940 |
96 |
0 |
0 |
tpm_cfg_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
401430123 |
4370 |
0 |
0 |
T80 |
4631 |
10 |
0 |
0 |
T98 |
96579 |
198 |
0 |
0 |
T111 |
13647 |
48 |
0 |
0 |
T115 |
37741 |
98 |
0 |
0 |
T117 |
179537 |
454 |
0 |
0 |
T125 |
156387 |
324 |
0 |
0 |
T142 |
7509 |
44 |
0 |
0 |
T143 |
19865 |
65 |
0 |
0 |
T152 |
3982 |
1 |
0 |
0 |
T153 |
20940 |
51 |
0 |
0 |
tpm_did_vid_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
401430123 |
3615 |
0 |
0 |
T80 |
4631 |
8 |
0 |
0 |
T98 |
96579 |
74 |
0 |
0 |
T111 |
13647 |
28 |
0 |
0 |
T115 |
37741 |
43 |
0 |
0 |
T117 |
179537 |
491 |
0 |
0 |
T125 |
156387 |
254 |
0 |
0 |
T142 |
7509 |
6 |
0 |
0 |
T143 |
19865 |
27 |
0 |
0 |
T151 |
4362 |
2 |
0 |
0 |
T152 |
3982 |
3 |
0 |
0 |
tpm_int_enable_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
401430123 |
3444 |
0 |
0 |
T80 |
4631 |
23 |
0 |
0 |
T98 |
96579 |
53 |
0 |
0 |
T111 |
13647 |
25 |
0 |
0 |
T115 |
37741 |
45 |
0 |
0 |
T117 |
179537 |
493 |
0 |
0 |
T125 |
156387 |
224 |
0 |
0 |
T142 |
7509 |
2 |
0 |
0 |
T143 |
19865 |
89 |
0 |
0 |
T153 |
20940 |
52 |
0 |
0 |
T171 |
64416 |
65 |
0 |
0 |
tpm_int_status_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
401430123 |
3305 |
0 |
0 |
T80 |
4631 |
6 |
0 |
0 |
T98 |
96579 |
55 |
0 |
0 |
T111 |
13647 |
33 |
0 |
0 |
T115 |
37741 |
44 |
0 |
0 |
T117 |
179537 |
480 |
0 |
0 |
T125 |
156387 |
202 |
0 |
0 |
T142 |
7509 |
33 |
0 |
0 |
T143 |
19865 |
71 |
0 |
0 |
T151 |
4362 |
8 |
0 |
0 |
T153 |
20940 |
54 |
0 |
0 |
tpm_int_vector_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
401430123 |
3433 |
0 |
0 |
T80 |
4631 |
13 |
0 |
0 |
T97 |
14398 |
3 |
0 |
0 |
T98 |
96579 |
76 |
0 |
0 |
T111 |
13647 |
19 |
0 |
0 |
T115 |
37741 |
39 |
0 |
0 |
T117 |
179537 |
455 |
0 |
0 |
T125 |
156387 |
330 |
0 |
0 |
T142 |
7509 |
16 |
0 |
0 |
T143 |
19865 |
127 |
0 |
0 |
T151 |
4362 |
7 |
0 |
0 |
tpm_intf_capability_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
401430123 |
3325 |
0 |
0 |
T80 |
4631 |
8 |
0 |
0 |
T98 |
96579 |
72 |
0 |
0 |
T111 |
13647 |
15 |
0 |
0 |
T115 |
37741 |
25 |
0 |
0 |
T117 |
179537 |
529 |
0 |
0 |
T125 |
156387 |
242 |
0 |
0 |
T142 |
7509 |
7 |
0 |
0 |
T143 |
19865 |
54 |
0 |
0 |
T151 |
4362 |
4 |
0 |
0 |
T153 |
20940 |
54 |
0 |
0 |
tpm_rid_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
401430123 |
3179 |
0 |
0 |
T80 |
4631 |
13 |
0 |
0 |
T98 |
96579 |
68 |
0 |
0 |
T111 |
13647 |
21 |
0 |
0 |
T115 |
37741 |
36 |
0 |
0 |
T117 |
179537 |
465 |
0 |
0 |
T125 |
156387 |
265 |
0 |
0 |
T142 |
7509 |
22 |
0 |
0 |
T143 |
19865 |
38 |
0 |
0 |
T151 |
4362 |
3 |
0 |
0 |
T152 |
3982 |
4 |
0 |
0 |
tpm_sts_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
401430123 |
3313 |
0 |
0 |
T80 |
4631 |
7 |
0 |
0 |
T98 |
96579 |
36 |
0 |
0 |
T111 |
13647 |
23 |
0 |
0 |
T115 |
37741 |
32 |
0 |
0 |
T117 |
179537 |
456 |
0 |
0 |
T125 |
156387 |
265 |
0 |
0 |
T142 |
7509 |
48 |
0 |
0 |
T143 |
19865 |
53 |
0 |
0 |
T151 |
4362 |
1 |
0 |
0 |
T153 |
20940 |
94 |
0 |
0 |