Assert Coverage for Module :
spi_device_csr_assert_fpv
Assertion Details
TlulOOBAddrErr_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
461676998 |
3769 |
0 |
0 |
T88 |
7812 |
4 |
0 |
0 |
T89 |
16114 |
286 |
0 |
0 |
T90 |
2120 |
7 |
0 |
0 |
T91 |
8387 |
103 |
0 |
0 |
T92 |
31228 |
2 |
0 |
0 |
T93 |
29691 |
4 |
0 |
0 |
T94 |
9774 |
1 |
0 |
0 |
T95 |
5935 |
230 |
0 |
0 |
T105 |
11745 |
5 |
0 |
0 |
T106 |
4696 |
2 |
0 |
0 |
addr_swap_data_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
461676998 |
1797 |
0 |
0 |
T72 |
3398 |
9 |
0 |
0 |
T73 |
3308 |
10 |
0 |
0 |
T92 |
31228 |
49 |
0 |
0 |
T101 |
5170 |
9 |
0 |
0 |
T110 |
9635 |
6 |
0 |
0 |
T114 |
13389 |
15 |
0 |
0 |
T137 |
20295 |
64 |
0 |
0 |
T138 |
14380 |
29 |
0 |
0 |
T145 |
39445 |
233 |
0 |
0 |
T146 |
12407 |
59 |
0 |
0 |
addr_swap_mask_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
461676998 |
1849 |
0 |
0 |
T72 |
3398 |
8 |
0 |
0 |
T92 |
31228 |
51 |
0 |
0 |
T101 |
5170 |
8 |
0 |
0 |
T110 |
9635 |
3 |
0 |
0 |
T111 |
7397 |
7 |
0 |
0 |
T114 |
13389 |
11 |
0 |
0 |
T137 |
20295 |
73 |
0 |
0 |
T138 |
14380 |
53 |
0 |
0 |
T145 |
39445 |
278 |
0 |
0 |
T146 |
12407 |
39 |
0 |
0 |
cfg_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
461676998 |
2282 |
0 |
0 |
T72 |
3398 |
1 |
0 |
0 |
T92 |
31228 |
67 |
0 |
0 |
T101 |
5170 |
4 |
0 |
0 |
T110 |
9635 |
33 |
0 |
0 |
T111 |
7397 |
7 |
0 |
0 |
T114 |
13389 |
27 |
0 |
0 |
T137 |
20295 |
92 |
0 |
0 |
T138 |
14380 |
50 |
0 |
0 |
T145 |
39445 |
274 |
0 |
0 |
T146 |
12407 |
26 |
0 |
0 |
cmd_filter_0_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
461676998 |
9066 |
0 |
0 |
T72 |
3398 |
6 |
0 |
0 |
T73 |
3308 |
5 |
0 |
0 |
T92 |
31228 |
600 |
0 |
0 |
T101 |
5170 |
3 |
0 |
0 |
T110 |
9635 |
130 |
0 |
0 |
T114 |
13389 |
250 |
0 |
0 |
T137 |
20295 |
62 |
0 |
0 |
T138 |
14380 |
34 |
0 |
0 |
T145 |
39445 |
264 |
0 |
0 |
T146 |
12407 |
8 |
0 |
0 |
cmd_filter_1_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
461676998 |
8521 |
0 |
0 |
T72 |
3398 |
10 |
0 |
0 |
T92 |
31228 |
396 |
0 |
0 |
T101 |
5170 |
103 |
0 |
0 |
T110 |
9635 |
145 |
0 |
0 |
T111 |
7397 |
98 |
0 |
0 |
T114 |
13389 |
281 |
0 |
0 |
T137 |
20295 |
50 |
0 |
0 |
T138 |
14380 |
53 |
0 |
0 |
T145 |
39445 |
283 |
0 |
0 |
T146 |
12407 |
49 |
0 |
0 |
cmd_filter_2_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
461676998 |
9297 |
0 |
0 |
T72 |
3398 |
7 |
0 |
0 |
T92 |
31228 |
724 |
0 |
0 |
T101 |
5170 |
9 |
0 |
0 |
T110 |
9635 |
130 |
0 |
0 |
T111 |
7397 |
49 |
0 |
0 |
T114 |
13389 |
244 |
0 |
0 |
T137 |
20295 |
63 |
0 |
0 |
T138 |
14380 |
58 |
0 |
0 |
T145 |
39445 |
290 |
0 |
0 |
T146 |
12407 |
42 |
0 |
0 |
cmd_filter_3_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
461676998 |
9545 |
0 |
0 |
T73 |
3308 |
7 |
0 |
0 |
T92 |
31228 |
735 |
0 |
0 |
T101 |
5170 |
9 |
0 |
0 |
T110 |
9635 |
94 |
0 |
0 |
T111 |
7397 |
43 |
0 |
0 |
T114 |
13389 |
216 |
0 |
0 |
T137 |
20295 |
81 |
0 |
0 |
T138 |
14380 |
24 |
0 |
0 |
T145 |
39445 |
317 |
0 |
0 |
T146 |
12407 |
17 |
0 |
0 |
cmd_filter_4_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
461676998 |
9132 |
0 |
0 |
T72 |
3398 |
15 |
0 |
0 |
T92 |
31228 |
392 |
0 |
0 |
T101 |
5170 |
15 |
0 |
0 |
T110 |
9635 |
92 |
0 |
0 |
T111 |
7397 |
74 |
0 |
0 |
T114 |
13389 |
104 |
0 |
0 |
T137 |
20295 |
57 |
0 |
0 |
T138 |
14380 |
33 |
0 |
0 |
T145 |
39445 |
260 |
0 |
0 |
T146 |
12407 |
24 |
0 |
0 |
cmd_filter_5_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
461676998 |
8856 |
0 |
0 |
T72 |
3398 |
11 |
0 |
0 |
T92 |
31228 |
243 |
0 |
0 |
T101 |
5170 |
4 |
0 |
0 |
T110 |
9635 |
289 |
0 |
0 |
T111 |
7397 |
43 |
0 |
0 |
T114 |
13389 |
381 |
0 |
0 |
T137 |
20295 |
65 |
0 |
0 |
T138 |
14380 |
78 |
0 |
0 |
T145 |
39445 |
265 |
0 |
0 |
T146 |
12407 |
53 |
0 |
0 |
cmd_filter_6_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
461676998 |
8156 |
0 |
0 |
T72 |
3398 |
16 |
0 |
0 |
T92 |
31228 |
407 |
0 |
0 |
T101 |
5170 |
93 |
0 |
0 |
T110 |
9635 |
162 |
0 |
0 |
T111 |
7397 |
104 |
0 |
0 |
T114 |
13389 |
351 |
0 |
0 |
T137 |
20295 |
29 |
0 |
0 |
T138 |
14380 |
37 |
0 |
0 |
T145 |
39445 |
287 |
0 |
0 |
T146 |
12407 |
64 |
0 |
0 |
cmd_filter_7_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
461676998 |
9456 |
0 |
0 |
T72 |
3398 |
9 |
0 |
0 |
T92 |
31228 |
264 |
0 |
0 |
T101 |
5170 |
104 |
0 |
0 |
T110 |
9635 |
241 |
0 |
0 |
T111 |
7397 |
87 |
0 |
0 |
T114 |
13389 |
279 |
0 |
0 |
T137 |
20295 |
95 |
0 |
0 |
T138 |
14380 |
43 |
0 |
0 |
T145 |
39445 |
295 |
0 |
0 |
T146 |
12407 |
34 |
0 |
0 |
cmd_info_0_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
461676998 |
4644 |
0 |
0 |
T72 |
3398 |
9 |
0 |
0 |
T92 |
31228 |
241 |
0 |
0 |
T101 |
5170 |
10 |
0 |
0 |
T110 |
9635 |
119 |
0 |
0 |
T111 |
7397 |
26 |
0 |
0 |
T114 |
13389 |
97 |
0 |
0 |
T137 |
20295 |
44 |
0 |
0 |
T138 |
14380 |
25 |
0 |
0 |
T145 |
39445 |
289 |
0 |
0 |
T146 |
12407 |
39 |
0 |
0 |
cmd_info_10_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
461676998 |
4644 |
0 |
0 |
T72 |
3398 |
11 |
0 |
0 |
T92 |
31228 |
247 |
0 |
0 |
T101 |
5170 |
4 |
0 |
0 |
T110 |
9635 |
47 |
0 |
0 |
T111 |
7397 |
36 |
0 |
0 |
T114 |
13389 |
76 |
0 |
0 |
T137 |
20295 |
18 |
0 |
0 |
T138 |
14380 |
34 |
0 |
0 |
T145 |
39445 |
263 |
0 |
0 |
T146 |
12407 |
73 |
0 |
0 |
cmd_info_11_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
461676998 |
5078 |
0 |
0 |
T72 |
3398 |
12 |
0 |
0 |
T92 |
31228 |
266 |
0 |
0 |
T101 |
5170 |
15 |
0 |
0 |
T110 |
9635 |
117 |
0 |
0 |
T111 |
7397 |
20 |
0 |
0 |
T114 |
13389 |
131 |
0 |
0 |
T137 |
20295 |
16 |
0 |
0 |
T138 |
14380 |
80 |
0 |
0 |
T145 |
39445 |
307 |
0 |
0 |
T146 |
12407 |
47 |
0 |
0 |
cmd_info_12_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
461676998 |
4375 |
0 |
0 |
T72 |
3398 |
13 |
0 |
0 |
T73 |
3308 |
6 |
0 |
0 |
T92 |
31228 |
309 |
0 |
0 |
T101 |
5170 |
40 |
0 |
0 |
T110 |
9635 |
59 |
0 |
0 |
T114 |
13389 |
56 |
0 |
0 |
T137 |
20295 |
54 |
0 |
0 |
T138 |
14380 |
30 |
0 |
0 |
T145 |
39445 |
259 |
0 |
0 |
T146 |
12407 |
42 |
0 |
0 |
cmd_info_13_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
461676998 |
4771 |
0 |
0 |
T72 |
3398 |
7 |
0 |
0 |
T92 |
31228 |
282 |
0 |
0 |
T101 |
5170 |
36 |
0 |
0 |
T110 |
9635 |
101 |
0 |
0 |
T111 |
7397 |
36 |
0 |
0 |
T114 |
13389 |
151 |
0 |
0 |
T137 |
20295 |
105 |
0 |
0 |
T138 |
14380 |
47 |
0 |
0 |
T145 |
39445 |
265 |
0 |
0 |
T146 |
12407 |
78 |
0 |
0 |
cmd_info_14_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
461676998 |
4755 |
0 |
0 |
T72 |
3398 |
15 |
0 |
0 |
T92 |
31228 |
417 |
0 |
0 |
T101 |
5170 |
2 |
0 |
0 |
T110 |
9635 |
98 |
0 |
0 |
T111 |
7397 |
33 |
0 |
0 |
T114 |
13389 |
65 |
0 |
0 |
T137 |
20295 |
32 |
0 |
0 |
T138 |
14380 |
111 |
0 |
0 |
T145 |
39445 |
256 |
0 |
0 |
T146 |
12407 |
38 |
0 |
0 |
cmd_info_15_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
461676998 |
4508 |
0 |
0 |
T72 |
3398 |
10 |
0 |
0 |
T92 |
31228 |
297 |
0 |
0 |
T101 |
5170 |
8 |
0 |
0 |
T110 |
9635 |
97 |
0 |
0 |
T111 |
7397 |
79 |
0 |
0 |
T114 |
13389 |
99 |
0 |
0 |
T137 |
20295 |
102 |
0 |
0 |
T138 |
14380 |
36 |
0 |
0 |
T145 |
39445 |
238 |
0 |
0 |
T146 |
12407 |
34 |
0 |
0 |
cmd_info_16_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
461676998 |
4901 |
0 |
0 |
T72 |
3398 |
16 |
0 |
0 |
T73 |
3308 |
8 |
0 |
0 |
T92 |
31228 |
261 |
0 |
0 |
T110 |
9635 |
76 |
0 |
0 |
T111 |
7397 |
75 |
0 |
0 |
T114 |
13389 |
106 |
0 |
0 |
T137 |
20295 |
2 |
0 |
0 |
T138 |
14380 |
32 |
0 |
0 |
T145 |
39445 |
264 |
0 |
0 |
T146 |
12407 |
48 |
0 |
0 |
cmd_info_17_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
461676998 |
5271 |
0 |
0 |
T72 |
3398 |
8 |
0 |
0 |
T92 |
31228 |
244 |
0 |
0 |
T101 |
5170 |
1 |
0 |
0 |
T110 |
9635 |
136 |
0 |
0 |
T111 |
7397 |
31 |
0 |
0 |
T114 |
13389 |
61 |
0 |
0 |
T137 |
20295 |
62 |
0 |
0 |
T138 |
14380 |
52 |
0 |
0 |
T145 |
39445 |
253 |
0 |
0 |
T146 |
12407 |
46 |
0 |
0 |
cmd_info_18_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
461676998 |
4154 |
0 |
0 |
T72 |
3398 |
6 |
0 |
0 |
T92 |
31228 |
190 |
0 |
0 |
T101 |
5170 |
27 |
0 |
0 |
T110 |
9635 |
50 |
0 |
0 |
T111 |
7397 |
19 |
0 |
0 |
T114 |
13389 |
63 |
0 |
0 |
T137 |
20295 |
54 |
0 |
0 |
T138 |
14380 |
54 |
0 |
0 |
T145 |
39445 |
247 |
0 |
0 |
T146 |
12407 |
98 |
0 |
0 |
cmd_info_19_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
461676998 |
4977 |
0 |
0 |
T72 |
3398 |
12 |
0 |
0 |
T92 |
31228 |
279 |
0 |
0 |
T101 |
5170 |
11 |
0 |
0 |
T110 |
9635 |
58 |
0 |
0 |
T111 |
7397 |
16 |
0 |
0 |
T114 |
13389 |
120 |
0 |
0 |
T137 |
20295 |
25 |
0 |
0 |
T138 |
14380 |
51 |
0 |
0 |
T145 |
39445 |
284 |
0 |
0 |
T146 |
12407 |
33 |
0 |
0 |
cmd_info_1_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
461676998 |
4962 |
0 |
0 |
T72 |
3398 |
8 |
0 |
0 |
T92 |
31228 |
349 |
0 |
0 |
T101 |
5170 |
7 |
0 |
0 |
T110 |
9635 |
2 |
0 |
0 |
T111 |
7397 |
32 |
0 |
0 |
T114 |
13389 |
173 |
0 |
0 |
T137 |
20295 |
74 |
0 |
0 |
T138 |
14380 |
58 |
0 |
0 |
T145 |
39445 |
296 |
0 |
0 |
T146 |
12407 |
29 |
0 |
0 |
cmd_info_20_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
461676998 |
5132 |
0 |
0 |
T72 |
3398 |
13 |
0 |
0 |
T92 |
31228 |
386 |
0 |
0 |
T101 |
5170 |
10 |
0 |
0 |
T110 |
9635 |
17 |
0 |
0 |
T111 |
7397 |
55 |
0 |
0 |
T114 |
13389 |
131 |
0 |
0 |
T137 |
20295 |
50 |
0 |
0 |
T138 |
14380 |
29 |
0 |
0 |
T145 |
39445 |
285 |
0 |
0 |
T146 |
12407 |
20 |
0 |
0 |
cmd_info_21_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
461676998 |
4619 |
0 |
0 |
T72 |
3398 |
8 |
0 |
0 |
T92 |
31228 |
435 |
0 |
0 |
T101 |
5170 |
38 |
0 |
0 |
T110 |
9635 |
14 |
0 |
0 |
T111 |
7397 |
19 |
0 |
0 |
T114 |
13389 |
60 |
0 |
0 |
T137 |
20295 |
50 |
0 |
0 |
T138 |
14380 |
46 |
0 |
0 |
T145 |
39445 |
308 |
0 |
0 |
T146 |
12407 |
57 |
0 |
0 |
cmd_info_22_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
461676998 |
4930 |
0 |
0 |
T72 |
3398 |
14 |
0 |
0 |
T92 |
31228 |
135 |
0 |
0 |
T101 |
5170 |
45 |
0 |
0 |
T110 |
9635 |
102 |
0 |
0 |
T111 |
7397 |
11 |
0 |
0 |
T114 |
13389 |
58 |
0 |
0 |
T137 |
20295 |
107 |
0 |
0 |
T138 |
14380 |
54 |
0 |
0 |
T145 |
39445 |
271 |
0 |
0 |
T146 |
12407 |
33 |
0 |
0 |
cmd_info_23_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
461676998 |
4466 |
0 |
0 |
T72 |
3398 |
12 |
0 |
0 |
T92 |
31228 |
137 |
0 |
0 |
T101 |
5170 |
11 |
0 |
0 |
T110 |
9635 |
8 |
0 |
0 |
T111 |
7397 |
36 |
0 |
0 |
T114 |
13389 |
107 |
0 |
0 |
T137 |
20295 |
86 |
0 |
0 |
T138 |
14380 |
94 |
0 |
0 |
T145 |
39445 |
263 |
0 |
0 |
T146 |
12407 |
56 |
0 |
0 |
cmd_info_2_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
461676998 |
4913 |
0 |
0 |
T72 |
3398 |
11 |
0 |
0 |
T73 |
3308 |
5 |
0 |
0 |
T92 |
31228 |
220 |
0 |
0 |
T110 |
9635 |
38 |
0 |
0 |
T111 |
7397 |
5 |
0 |
0 |
T114 |
13389 |
63 |
0 |
0 |
T137 |
20295 |
42 |
0 |
0 |
T138 |
14380 |
59 |
0 |
0 |
T145 |
39445 |
297 |
0 |
0 |
T146 |
12407 |
30 |
0 |
0 |
cmd_info_3_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
461676998 |
3973 |
0 |
0 |
T72 |
3398 |
6 |
0 |
0 |
T92 |
31228 |
212 |
0 |
0 |
T101 |
5170 |
47 |
0 |
0 |
T110 |
9635 |
47 |
0 |
0 |
T111 |
7397 |
5 |
0 |
0 |
T114 |
13389 |
42 |
0 |
0 |
T137 |
20295 |
76 |
0 |
0 |
T138 |
14380 |
59 |
0 |
0 |
T145 |
39445 |
271 |
0 |
0 |
T146 |
12407 |
32 |
0 |
0 |
cmd_info_4_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
461676998 |
4478 |
0 |
0 |
T72 |
3398 |
5 |
0 |
0 |
T92 |
31228 |
287 |
0 |
0 |
T101 |
5170 |
55 |
0 |
0 |
T110 |
9635 |
91 |
0 |
0 |
T111 |
7397 |
35 |
0 |
0 |
T114 |
13389 |
107 |
0 |
0 |
T137 |
20295 |
44 |
0 |
0 |
T138 |
14380 |
26 |
0 |
0 |
T145 |
39445 |
269 |
0 |
0 |
T146 |
12407 |
63 |
0 |
0 |
cmd_info_5_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
461676998 |
4239 |
0 |
0 |
T72 |
3398 |
12 |
0 |
0 |
T92 |
31228 |
129 |
0 |
0 |
T101 |
5170 |
50 |
0 |
0 |
T110 |
9635 |
45 |
0 |
0 |
T111 |
7397 |
8 |
0 |
0 |
T114 |
13389 |
36 |
0 |
0 |
T137 |
20295 |
46 |
0 |
0 |
T138 |
14380 |
51 |
0 |
0 |
T145 |
39445 |
303 |
0 |
0 |
T146 |
12407 |
29 |
0 |
0 |
cmd_info_6_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
461676998 |
4677 |
0 |
0 |
T72 |
3398 |
2 |
0 |
0 |
T92 |
31228 |
202 |
0 |
0 |
T101 |
5170 |
5 |
0 |
0 |
T110 |
9635 |
62 |
0 |
0 |
T111 |
7397 |
73 |
0 |
0 |
T114 |
13389 |
39 |
0 |
0 |
T137 |
20295 |
49 |
0 |
0 |
T138 |
14380 |
51 |
0 |
0 |
T145 |
39445 |
257 |
0 |
0 |
T146 |
12407 |
32 |
0 |
0 |
cmd_info_7_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
461676998 |
4724 |
0 |
0 |
T72 |
3398 |
5 |
0 |
0 |
T92 |
31228 |
259 |
0 |
0 |
T101 |
5170 |
43 |
0 |
0 |
T110 |
9635 |
104 |
0 |
0 |
T111 |
7397 |
30 |
0 |
0 |
T114 |
13389 |
162 |
0 |
0 |
T137 |
20295 |
43 |
0 |
0 |
T138 |
14380 |
68 |
0 |
0 |
T145 |
39445 |
225 |
0 |
0 |
T146 |
12407 |
10 |
0 |
0 |
cmd_info_8_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
461676998 |
4430 |
0 |
0 |
T72 |
3398 |
12 |
0 |
0 |
T92 |
31228 |
312 |
0 |
0 |
T101 |
5170 |
49 |
0 |
0 |
T110 |
9635 |
52 |
0 |
0 |
T111 |
7397 |
40 |
0 |
0 |
T114 |
13389 |
59 |
0 |
0 |
T137 |
20295 |
85 |
0 |
0 |
T138 |
14380 |
37 |
0 |
0 |
T145 |
39445 |
236 |
0 |
0 |
T146 |
12407 |
23 |
0 |
0 |
cmd_info_9_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
461676998 |
4530 |
0 |
0 |
T72 |
3398 |
8 |
0 |
0 |
T92 |
31228 |
183 |
0 |
0 |
T101 |
5170 |
6 |
0 |
0 |
T110 |
9635 |
76 |
0 |
0 |
T111 |
7397 |
46 |
0 |
0 |
T114 |
13389 |
108 |
0 |
0 |
T137 |
20295 |
53 |
0 |
0 |
T138 |
14380 |
38 |
0 |
0 |
T145 |
39445 |
297 |
0 |
0 |
T146 |
12407 |
59 |
0 |
0 |
cmd_info_en4b_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
461676998 |
1957 |
0 |
0 |
T72 |
3398 |
9 |
0 |
0 |
T92 |
31228 |
58 |
0 |
0 |
T101 |
5170 |
9 |
0 |
0 |
T110 |
9635 |
13 |
0 |
0 |
T111 |
7397 |
5 |
0 |
0 |
T114 |
13389 |
25 |
0 |
0 |
T137 |
20295 |
38 |
0 |
0 |
T138 |
14380 |
13 |
0 |
0 |
T145 |
39445 |
276 |
0 |
0 |
T146 |
12407 |
42 |
0 |
0 |
cmd_info_ex4b_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
461676998 |
2080 |
0 |
0 |
T72 |
3398 |
13 |
0 |
0 |
T92 |
31228 |
58 |
0 |
0 |
T101 |
5170 |
6 |
0 |
0 |
T110 |
9635 |
17 |
0 |
0 |
T111 |
7397 |
1 |
0 |
0 |
T114 |
13389 |
15 |
0 |
0 |
T137 |
20295 |
20 |
0 |
0 |
T138 |
14380 |
48 |
0 |
0 |
T145 |
39445 |
301 |
0 |
0 |
T146 |
12407 |
32 |
0 |
0 |
cmd_info_wrdi_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
461676998 |
1985 |
0 |
0 |
T72 |
3398 |
13 |
0 |
0 |
T92 |
31228 |
50 |
0 |
0 |
T101 |
5170 |
6 |
0 |
0 |
T110 |
9635 |
22 |
0 |
0 |
T111 |
7397 |
3 |
0 |
0 |
T114 |
13389 |
16 |
0 |
0 |
T137 |
20295 |
58 |
0 |
0 |
T138 |
14380 |
56 |
0 |
0 |
T145 |
39445 |
270 |
0 |
0 |
T146 |
12407 |
15 |
0 |
0 |
cmd_info_wren_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
461676998 |
2075 |
0 |
0 |
T72 |
3398 |
3 |
0 |
0 |
T92 |
31228 |
82 |
0 |
0 |
T101 |
5170 |
13 |
0 |
0 |
T110 |
9635 |
7 |
0 |
0 |
T111 |
7397 |
8 |
0 |
0 |
T114 |
13389 |
8 |
0 |
0 |
T137 |
20295 |
69 |
0 |
0 |
T138 |
14380 |
1 |
0 |
0 |
T145 |
39445 |
302 |
0 |
0 |
T146 |
12407 |
48 |
0 |
0 |
intercept_en_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
461676998 |
2627 |
0 |
0 |
T72 |
3398 |
10 |
0 |
0 |
T73 |
3308 |
9 |
0 |
0 |
T92 |
31228 |
84 |
0 |
0 |
T101 |
5170 |
7 |
0 |
0 |
T110 |
9635 |
21 |
0 |
0 |
T114 |
13389 |
26 |
0 |
0 |
T137 |
20295 |
54 |
0 |
0 |
T138 |
14380 |
45 |
0 |
0 |
T145 |
39445 |
233 |
0 |
0 |
T146 |
12407 |
42 |
0 |
0 |
intr_enable_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
461676998 |
4657 |
0 |
0 |
T16 |
4773 |
5 |
0 |
0 |
T17 |
0 |
46 |
0 |
0 |
T18 |
0 |
26 |
0 |
0 |
T23 |
0 |
8 |
0 |
0 |
T29 |
162039 |
6 |
0 |
0 |
T38 |
227190 |
0 |
0 |
0 |
T40 |
10071 |
0 |
0 |
0 |
T48 |
10018 |
0 |
0 |
0 |
T49 |
13468 |
0 |
0 |
0 |
T50 |
154275 |
0 |
0 |
0 |
T51 |
1610 |
0 |
0 |
0 |
T52 |
839 |
0 |
0 |
0 |
T53 |
539493 |
0 |
0 |
0 |
T147 |
0 |
9 |
0 |
0 |
T148 |
0 |
20 |
0 |
0 |
T149 |
0 |
27 |
0 |
0 |
T150 |
0 |
15 |
0 |
0 |
T151 |
0 |
40 |
0 |
0 |
jedec_cc_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
461676998 |
2032 |
0 |
0 |
T73 |
3308 |
2 |
0 |
0 |
T92 |
31228 |
65 |
0 |
0 |
T101 |
5170 |
9 |
0 |
0 |
T110 |
9635 |
8 |
0 |
0 |
T111 |
7397 |
4 |
0 |
0 |
T114 |
13389 |
8 |
0 |
0 |
T137 |
20295 |
121 |
0 |
0 |
T138 |
14380 |
55 |
0 |
0 |
T145 |
39445 |
291 |
0 |
0 |
T146 |
12407 |
42 |
0 |
0 |
jedec_id_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
461676998 |
1999 |
0 |
0 |
T72 |
3398 |
7 |
0 |
0 |
T92 |
31228 |
63 |
0 |
0 |
T101 |
5170 |
11 |
0 |
0 |
T110 |
9635 |
8 |
0 |
0 |
T111 |
7397 |
10 |
0 |
0 |
T114 |
13389 |
11 |
0 |
0 |
T137 |
20295 |
40 |
0 |
0 |
T138 |
14380 |
26 |
0 |
0 |
T145 |
39445 |
195 |
0 |
0 |
T146 |
12407 |
56 |
0 |
0 |
mailbox_addr_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
461676998 |
1834 |
0 |
0 |
T72 |
3398 |
13 |
0 |
0 |
T92 |
31228 |
43 |
0 |
0 |
T101 |
5170 |
7 |
0 |
0 |
T110 |
9635 |
12 |
0 |
0 |
T111 |
7397 |
6 |
0 |
0 |
T114 |
13389 |
15 |
0 |
0 |
T137 |
20295 |
82 |
0 |
0 |
T138 |
14380 |
72 |
0 |
0 |
T145 |
39445 |
266 |
0 |
0 |
T146 |
12407 |
50 |
0 |
0 |
payload_swap_data_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
461676998 |
1873 |
0 |
0 |
T72 |
3398 |
4 |
0 |
0 |
T73 |
3308 |
9 |
0 |
0 |
T92 |
31228 |
42 |
0 |
0 |
T101 |
5170 |
7 |
0 |
0 |
T110 |
9635 |
10 |
0 |
0 |
T114 |
13389 |
12 |
0 |
0 |
T137 |
20295 |
72 |
0 |
0 |
T138 |
14380 |
43 |
0 |
0 |
T145 |
39445 |
340 |
0 |
0 |
T146 |
12407 |
50 |
0 |
0 |
payload_swap_mask_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
461676998 |
1923 |
0 |
0 |
T72 |
3398 |
15 |
0 |
0 |
T92 |
31228 |
42 |
0 |
0 |
T101 |
5170 |
7 |
0 |
0 |
T110 |
9635 |
19 |
0 |
0 |
T111 |
7397 |
2 |
0 |
0 |
T114 |
13389 |
7 |
0 |
0 |
T137 |
20295 |
54 |
0 |
0 |
T138 |
14380 |
83 |
0 |
0 |
T145 |
39445 |
243 |
0 |
0 |
T146 |
12407 |
54 |
0 |
0 |
read_threshold_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
461676998 |
1838 |
0 |
0 |
T72 |
3398 |
7 |
0 |
0 |
T73 |
3308 |
3 |
0 |
0 |
T92 |
31228 |
37 |
0 |
0 |
T101 |
5170 |
8 |
0 |
0 |
T110 |
9635 |
11 |
0 |
0 |
T114 |
13389 |
8 |
0 |
0 |
T137 |
20295 |
25 |
0 |
0 |
T138 |
14380 |
44 |
0 |
0 |
T145 |
39445 |
289 |
0 |
0 |
T146 |
12407 |
19 |
0 |
0 |
tpm_access_0_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
461676998 |
2797 |
0 |
0 |
T72 |
3398 |
4 |
0 |
0 |
T92 |
31228 |
126 |
0 |
0 |
T101 |
5170 |
3 |
0 |
0 |
T110 |
9635 |
29 |
0 |
0 |
T111 |
7397 |
13 |
0 |
0 |
T114 |
13389 |
29 |
0 |
0 |
T137 |
20295 |
57 |
0 |
0 |
T138 |
14380 |
44 |
0 |
0 |
T145 |
39445 |
290 |
0 |
0 |
T146 |
12407 |
31 |
0 |
0 |
tpm_access_1_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
461676998 |
1851 |
0 |
0 |
T72 |
3398 |
4 |
0 |
0 |
T92 |
31228 |
47 |
0 |
0 |
T101 |
5170 |
2 |
0 |
0 |
T110 |
9635 |
13 |
0 |
0 |
T111 |
7397 |
9 |
0 |
0 |
T114 |
13389 |
15 |
0 |
0 |
T137 |
20295 |
64 |
0 |
0 |
T138 |
14380 |
43 |
0 |
0 |
T145 |
39445 |
287 |
0 |
0 |
T146 |
12407 |
38 |
0 |
0 |
tpm_cfg_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
461676998 |
2757 |
0 |
0 |
T72 |
3398 |
5 |
0 |
0 |
T92 |
31228 |
119 |
0 |
0 |
T101 |
5170 |
2 |
0 |
0 |
T110 |
9635 |
65 |
0 |
0 |
T111 |
7397 |
8 |
0 |
0 |
T114 |
13389 |
14 |
0 |
0 |
T137 |
20295 |
69 |
0 |
0 |
T138 |
14380 |
44 |
0 |
0 |
T145 |
39445 |
258 |
0 |
0 |
T146 |
12407 |
37 |
0 |
0 |
tpm_did_vid_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
461676998 |
2116 |
0 |
0 |
T72 |
3398 |
3 |
0 |
0 |
T92 |
31228 |
43 |
0 |
0 |
T101 |
5170 |
10 |
0 |
0 |
T110 |
9635 |
10 |
0 |
0 |
T111 |
7397 |
11 |
0 |
0 |
T114 |
13389 |
16 |
0 |
0 |
T137 |
20295 |
61 |
0 |
0 |
T138 |
14380 |
22 |
0 |
0 |
T145 |
39445 |
301 |
0 |
0 |
T146 |
12407 |
61 |
0 |
0 |
tpm_int_enable_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
461676998 |
1732 |
0 |
0 |
T72 |
3398 |
4 |
0 |
0 |
T92 |
31228 |
44 |
0 |
0 |
T101 |
5170 |
4 |
0 |
0 |
T110 |
9635 |
18 |
0 |
0 |
T111 |
7397 |
2 |
0 |
0 |
T114 |
13389 |
9 |
0 |
0 |
T137 |
20295 |
66 |
0 |
0 |
T138 |
14380 |
30 |
0 |
0 |
T145 |
39445 |
312 |
0 |
0 |
T146 |
12407 |
37 |
0 |
0 |
tpm_int_status_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
461676998 |
1833 |
0 |
0 |
T72 |
3398 |
9 |
0 |
0 |
T73 |
3308 |
10 |
0 |
0 |
T92 |
31228 |
30 |
0 |
0 |
T101 |
5170 |
10 |
0 |
0 |
T110 |
9635 |
11 |
0 |
0 |
T114 |
13389 |
7 |
0 |
0 |
T137 |
20295 |
117 |
0 |
0 |
T138 |
14380 |
50 |
0 |
0 |
T145 |
39445 |
250 |
0 |
0 |
T146 |
12407 |
42 |
0 |
0 |
tpm_int_vector_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
461676998 |
1935 |
0 |
0 |
T72 |
3398 |
3 |
0 |
0 |
T92 |
31228 |
26 |
0 |
0 |
T101 |
5170 |
12 |
0 |
0 |
T110 |
9635 |
12 |
0 |
0 |
T111 |
7397 |
11 |
0 |
0 |
T114 |
13389 |
8 |
0 |
0 |
T137 |
20295 |
77 |
0 |
0 |
T138 |
14380 |
38 |
0 |
0 |
T145 |
39445 |
292 |
0 |
0 |
T146 |
12407 |
41 |
0 |
0 |
tpm_intf_capability_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
461676998 |
1841 |
0 |
0 |
T72 |
3398 |
7 |
0 |
0 |
T73 |
3308 |
15 |
0 |
0 |
T92 |
31228 |
41 |
0 |
0 |
T101 |
5170 |
7 |
0 |
0 |
T110 |
9635 |
11 |
0 |
0 |
T114 |
13389 |
4 |
0 |
0 |
T137 |
20295 |
96 |
0 |
0 |
T138 |
14380 |
47 |
0 |
0 |
T145 |
39445 |
286 |
0 |
0 |
T146 |
12407 |
61 |
0 |
0 |
tpm_rid_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
461676998 |
1837 |
0 |
0 |
T72 |
3398 |
6 |
0 |
0 |
T73 |
3308 |
4 |
0 |
0 |
T92 |
31228 |
36 |
0 |
0 |
T110 |
9635 |
14 |
0 |
0 |
T111 |
7397 |
2 |
0 |
0 |
T114 |
13389 |
3 |
0 |
0 |
T137 |
20295 |
39 |
0 |
0 |
T138 |
14380 |
47 |
0 |
0 |
T145 |
39445 |
259 |
0 |
0 |
T146 |
12407 |
47 |
0 |
0 |
tpm_sts_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
461676998 |
1858 |
0 |
0 |
T72 |
3398 |
12 |
0 |
0 |
T92 |
31228 |
30 |
0 |
0 |
T101 |
5170 |
11 |
0 |
0 |
T110 |
9635 |
19 |
0 |
0 |
T111 |
7397 |
7 |
0 |
0 |
T114 |
13389 |
9 |
0 |
0 |
T137 |
20295 |
69 |
0 |
0 |
T138 |
14380 |
67 |
0 |
0 |
T145 |
39445 |
250 |
0 |
0 |
T146 |
12407 |
51 |
0 |
0 |