Assert Coverage for Module :
spi_device_csr_assert_fpv
Assertion Details
TlulOOBAddrErr_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
425222587 |
3592 |
0 |
0 |
T85 |
7755 |
220 |
0 |
0 |
T86 |
6088 |
2 |
0 |
0 |
T87 |
4323 |
1 |
0 |
0 |
T88 |
3430 |
65 |
0 |
0 |
T89 |
10273 |
217 |
0 |
0 |
T90 |
16073 |
228 |
0 |
0 |
T91 |
29425 |
4 |
0 |
0 |
T106 |
3863 |
8 |
0 |
0 |
T107 |
15176 |
4 |
0 |
0 |
T108 |
9196 |
5 |
0 |
0 |
addr_swap_data_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
425222587 |
1362 |
0 |
0 |
T86 |
6088 |
4 |
0 |
0 |
T105 |
9114 |
16 |
0 |
0 |
T107 |
15176 |
17 |
0 |
0 |
T110 |
3632 |
3 |
0 |
0 |
T111 |
9319 |
11 |
0 |
0 |
T112 |
103134 |
392 |
0 |
0 |
T142 |
8103 |
13 |
0 |
0 |
T143 |
6955 |
46 |
0 |
0 |
T144 |
34239 |
40 |
0 |
0 |
T145 |
9277 |
8 |
0 |
0 |
addr_swap_mask_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
425222587 |
1390 |
0 |
0 |
T105 |
9114 |
18 |
0 |
0 |
T107 |
15176 |
7 |
0 |
0 |
T111 |
9319 |
19 |
0 |
0 |
T112 |
103134 |
362 |
0 |
0 |
T142 |
8103 |
51 |
0 |
0 |
T143 |
6955 |
23 |
0 |
0 |
T144 |
34239 |
23 |
0 |
0 |
T145 |
9277 |
6 |
0 |
0 |
T146 |
16773 |
24 |
0 |
0 |
T147 |
18749 |
95 |
0 |
0 |
cfg_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
425222587 |
1636 |
0 |
0 |
T86 |
6088 |
5 |
0 |
0 |
T105 |
9114 |
29 |
0 |
0 |
T107 |
15176 |
46 |
0 |
0 |
T111 |
9319 |
34 |
0 |
0 |
T112 |
103134 |
382 |
0 |
0 |
T142 |
8103 |
16 |
0 |
0 |
T143 |
6955 |
12 |
0 |
0 |
T144 |
34239 |
65 |
0 |
0 |
T145 |
9277 |
15 |
0 |
0 |
T146 |
16773 |
54 |
0 |
0 |
cmd_filter_0_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
425222587 |
4792 |
0 |
0 |
T86 |
6088 |
74 |
0 |
0 |
T105 |
9114 |
20 |
0 |
0 |
T107 |
15176 |
285 |
0 |
0 |
T110 |
3632 |
4 |
0 |
0 |
T111 |
9319 |
154 |
0 |
0 |
T112 |
103134 |
391 |
0 |
0 |
T142 |
8103 |
9 |
0 |
0 |
T143 |
6955 |
23 |
0 |
0 |
T144 |
34239 |
747 |
0 |
0 |
T145 |
9277 |
70 |
0 |
0 |
cmd_filter_1_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
425222587 |
4524 |
0 |
0 |
T86 |
6088 |
65 |
0 |
0 |
T105 |
9114 |
13 |
0 |
0 |
T107 |
15176 |
126 |
0 |
0 |
T110 |
3632 |
4 |
0 |
0 |
T111 |
9319 |
276 |
0 |
0 |
T112 |
103134 |
421 |
0 |
0 |
T142 |
8103 |
3 |
0 |
0 |
T143 |
6955 |
31 |
0 |
0 |
T144 |
34239 |
281 |
0 |
0 |
T145 |
9277 |
126 |
0 |
0 |
cmd_filter_2_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
425222587 |
4358 |
0 |
0 |
T86 |
6088 |
79 |
0 |
0 |
T105 |
9114 |
116 |
0 |
0 |
T107 |
15176 |
286 |
0 |
0 |
T110 |
3632 |
9 |
0 |
0 |
T111 |
9319 |
13 |
0 |
0 |
T112 |
103134 |
485 |
0 |
0 |
T142 |
8103 |
43 |
0 |
0 |
T143 |
6955 |
50 |
0 |
0 |
T144 |
34239 |
584 |
0 |
0 |
T145 |
9277 |
83 |
0 |
0 |
cmd_filter_3_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
425222587 |
5495 |
0 |
0 |
T86 |
6088 |
45 |
0 |
0 |
T105 |
9114 |
28 |
0 |
0 |
T107 |
15176 |
262 |
0 |
0 |
T110 |
3632 |
5 |
0 |
0 |
T111 |
9319 |
137 |
0 |
0 |
T112 |
103134 |
392 |
0 |
0 |
T142 |
8103 |
11 |
0 |
0 |
T143 |
6955 |
13 |
0 |
0 |
T144 |
34239 |
823 |
0 |
0 |
T145 |
9277 |
103 |
0 |
0 |
cmd_filter_4_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
425222587 |
4369 |
0 |
0 |
T86 |
6088 |
5 |
0 |
0 |
T105 |
9114 |
132 |
0 |
0 |
T107 |
15176 |
242 |
0 |
0 |
T110 |
3632 |
3 |
0 |
0 |
T111 |
9319 |
128 |
0 |
0 |
T112 |
103134 |
356 |
0 |
0 |
T142 |
8103 |
13 |
0 |
0 |
T143 |
6955 |
15 |
0 |
0 |
T144 |
34239 |
381 |
0 |
0 |
T145 |
9277 |
2 |
0 |
0 |
cmd_filter_5_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
425222587 |
5305 |
0 |
0 |
T86 |
6088 |
38 |
0 |
0 |
T105 |
9114 |
124 |
0 |
0 |
T107 |
15176 |
238 |
0 |
0 |
T111 |
9319 |
115 |
0 |
0 |
T112 |
103134 |
439 |
0 |
0 |
T142 |
8103 |
16 |
0 |
0 |
T143 |
6955 |
17 |
0 |
0 |
T144 |
34239 |
1186 |
0 |
0 |
T145 |
9277 |
62 |
0 |
0 |
T146 |
16773 |
66 |
0 |
0 |
cmd_filter_6_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
425222587 |
4377 |
0 |
0 |
T105 |
9114 |
14 |
0 |
0 |
T107 |
15176 |
336 |
0 |
0 |
T110 |
3632 |
1 |
0 |
0 |
T111 |
9319 |
325 |
0 |
0 |
T112 |
103134 |
403 |
0 |
0 |
T143 |
6955 |
30 |
0 |
0 |
T144 |
34239 |
778 |
0 |
0 |
T145 |
9277 |
119 |
0 |
0 |
T146 |
16773 |
79 |
0 |
0 |
T147 |
18749 |
57 |
0 |
0 |
cmd_filter_7_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
425222587 |
5135 |
0 |
0 |
T86 |
6088 |
40 |
0 |
0 |
T105 |
9114 |
147 |
0 |
0 |
T107 |
15176 |
266 |
0 |
0 |
T110 |
3632 |
120 |
0 |
0 |
T111 |
9319 |
141 |
0 |
0 |
T112 |
103134 |
492 |
0 |
0 |
T142 |
8103 |
6 |
0 |
0 |
T143 |
6955 |
1 |
0 |
0 |
T144 |
34239 |
556 |
0 |
0 |
T145 |
9277 |
12 |
0 |
0 |
cmd_info_0_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
425222587 |
2884 |
0 |
0 |
T86 |
6088 |
5 |
0 |
0 |
T105 |
9114 |
12 |
0 |
0 |
T107 |
15176 |
122 |
0 |
0 |
T110 |
3632 |
53 |
0 |
0 |
T111 |
9319 |
47 |
0 |
0 |
T112 |
103134 |
458 |
0 |
0 |
T143 |
6955 |
38 |
0 |
0 |
T144 |
34239 |
261 |
0 |
0 |
T145 |
9277 |
76 |
0 |
0 |
T146 |
16773 |
57 |
0 |
0 |
cmd_info_10_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
425222587 |
2771 |
0 |
0 |
T86 |
6088 |
20 |
0 |
0 |
T105 |
9114 |
59 |
0 |
0 |
T107 |
15176 |
105 |
0 |
0 |
T110 |
3632 |
59 |
0 |
0 |
T111 |
9319 |
189 |
0 |
0 |
T112 |
103134 |
399 |
0 |
0 |
T142 |
8103 |
53 |
0 |
0 |
T143 |
6955 |
17 |
0 |
0 |
T144 |
34239 |
311 |
0 |
0 |
T145 |
9277 |
16 |
0 |
0 |
cmd_info_11_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
425222587 |
2924 |
0 |
0 |
T86 |
6088 |
3 |
0 |
0 |
T105 |
9114 |
98 |
0 |
0 |
T107 |
15176 |
19 |
0 |
0 |
T110 |
3632 |
59 |
0 |
0 |
T111 |
9319 |
47 |
0 |
0 |
T112 |
103134 |
469 |
0 |
0 |
T142 |
8103 |
3 |
0 |
0 |
T143 |
6955 |
38 |
0 |
0 |
T144 |
34239 |
316 |
0 |
0 |
T146 |
16773 |
42 |
0 |
0 |
cmd_info_12_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
425222587 |
2786 |
0 |
0 |
T86 |
6088 |
38 |
0 |
0 |
T105 |
9114 |
53 |
0 |
0 |
T107 |
15176 |
73 |
0 |
0 |
T110 |
3632 |
61 |
0 |
0 |
T111 |
9319 |
49 |
0 |
0 |
T112 |
103134 |
372 |
0 |
0 |
T142 |
8103 |
35 |
0 |
0 |
T143 |
6955 |
8 |
0 |
0 |
T144 |
34239 |
227 |
0 |
0 |
T145 |
9277 |
14 |
0 |
0 |
cmd_info_13_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
425222587 |
2732 |
0 |
0 |
T86 |
6088 |
2 |
0 |
0 |
T105 |
9114 |
37 |
0 |
0 |
T107 |
15176 |
25 |
0 |
0 |
T110 |
3632 |
4 |
0 |
0 |
T111 |
9319 |
72 |
0 |
0 |
T112 |
103134 |
407 |
0 |
0 |
T142 |
8103 |
39 |
0 |
0 |
T143 |
6955 |
11 |
0 |
0 |
T144 |
34239 |
297 |
0 |
0 |
T145 |
9277 |
52 |
0 |
0 |
cmd_info_14_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
425222587 |
2777 |
0 |
0 |
T86 |
6088 |
47 |
0 |
0 |
T105 |
9114 |
23 |
0 |
0 |
T107 |
15176 |
80 |
0 |
0 |
T110 |
3632 |
55 |
0 |
0 |
T111 |
9319 |
61 |
0 |
0 |
T112 |
103134 |
392 |
0 |
0 |
T142 |
8103 |
30 |
0 |
0 |
T143 |
6955 |
13 |
0 |
0 |
T144 |
34239 |
162 |
0 |
0 |
T146 |
16773 |
22 |
0 |
0 |
cmd_info_15_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
425222587 |
2802 |
0 |
0 |
T86 |
6088 |
2 |
0 |
0 |
T105 |
9114 |
58 |
0 |
0 |
T107 |
15176 |
93 |
0 |
0 |
T110 |
3632 |
3 |
0 |
0 |
T111 |
9319 |
86 |
0 |
0 |
T112 |
103134 |
444 |
0 |
0 |
T142 |
8103 |
14 |
0 |
0 |
T143 |
6955 |
60 |
0 |
0 |
T144 |
34239 |
311 |
0 |
0 |
T146 |
16773 |
36 |
0 |
0 |
cmd_info_16_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
425222587 |
2478 |
0 |
0 |
T105 |
9114 |
99 |
0 |
0 |
T107 |
15176 |
21 |
0 |
0 |
T110 |
3632 |
51 |
0 |
0 |
T111 |
9319 |
172 |
0 |
0 |
T112 |
103134 |
364 |
0 |
0 |
T143 |
6955 |
17 |
0 |
0 |
T144 |
34239 |
166 |
0 |
0 |
T145 |
9277 |
8 |
0 |
0 |
T146 |
16773 |
31 |
0 |
0 |
T147 |
18749 |
59 |
0 |
0 |
cmd_info_17_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
425222587 |
3070 |
0 |
0 |
T86 |
6088 |
8 |
0 |
0 |
T105 |
9114 |
93 |
0 |
0 |
T107 |
15176 |
166 |
0 |
0 |
T110 |
3632 |
1 |
0 |
0 |
T111 |
9319 |
57 |
0 |
0 |
T112 |
103134 |
460 |
0 |
0 |
T142 |
8103 |
16 |
0 |
0 |
T143 |
6955 |
24 |
0 |
0 |
T144 |
34239 |
305 |
0 |
0 |
T145 |
9277 |
70 |
0 |
0 |
cmd_info_18_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
425222587 |
2378 |
0 |
0 |
T86 |
6088 |
13 |
0 |
0 |
T105 |
9114 |
54 |
0 |
0 |
T107 |
15176 |
137 |
0 |
0 |
T110 |
3632 |
52 |
0 |
0 |
T111 |
9319 |
12 |
0 |
0 |
T112 |
103134 |
344 |
0 |
0 |
T142 |
8103 |
30 |
0 |
0 |
T143 |
6955 |
30 |
0 |
0 |
T144 |
34239 |
201 |
0 |
0 |
T145 |
9277 |
22 |
0 |
0 |
cmd_info_19_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
425222587 |
2818 |
0 |
0 |
T86 |
6088 |
22 |
0 |
0 |
T105 |
9114 |
14 |
0 |
0 |
T107 |
15176 |
87 |
0 |
0 |
T110 |
3632 |
9 |
0 |
0 |
T111 |
9319 |
32 |
0 |
0 |
T112 |
103134 |
387 |
0 |
0 |
T142 |
8103 |
32 |
0 |
0 |
T143 |
6955 |
9 |
0 |
0 |
T144 |
34239 |
349 |
0 |
0 |
T145 |
9277 |
9 |
0 |
0 |
cmd_info_1_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
425222587 |
3157 |
0 |
0 |
T86 |
6088 |
49 |
0 |
0 |
T105 |
9114 |
44 |
0 |
0 |
T107 |
15176 |
24 |
0 |
0 |
T110 |
3632 |
72 |
0 |
0 |
T111 |
9319 |
64 |
0 |
0 |
T112 |
103134 |
458 |
0 |
0 |
T142 |
8103 |
30 |
0 |
0 |
T143 |
6955 |
19 |
0 |
0 |
T144 |
34239 |
404 |
0 |
0 |
T145 |
9277 |
14 |
0 |
0 |
cmd_info_20_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
425222587 |
2849 |
0 |
0 |
T86 |
6088 |
44 |
0 |
0 |
T105 |
9114 |
49 |
0 |
0 |
T107 |
15176 |
145 |
0 |
0 |
T110 |
3632 |
63 |
0 |
0 |
T111 |
9319 |
101 |
0 |
0 |
T112 |
103134 |
429 |
0 |
0 |
T142 |
8103 |
34 |
0 |
0 |
T143 |
6955 |
8 |
0 |
0 |
T144 |
34239 |
147 |
0 |
0 |
T145 |
9277 |
53 |
0 |
0 |
cmd_info_21_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
425222587 |
2671 |
0 |
0 |
T86 |
6088 |
27 |
0 |
0 |
T105 |
9114 |
72 |
0 |
0 |
T107 |
15176 |
25 |
0 |
0 |
T110 |
3632 |
50 |
0 |
0 |
T111 |
9319 |
54 |
0 |
0 |
T112 |
103134 |
415 |
0 |
0 |
T142 |
8103 |
34 |
0 |
0 |
T143 |
6955 |
8 |
0 |
0 |
T144 |
34239 |
379 |
0 |
0 |
T145 |
9277 |
26 |
0 |
0 |
cmd_info_22_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
425222587 |
2929 |
0 |
0 |
T86 |
6088 |
42 |
0 |
0 |
T105 |
9114 |
10 |
0 |
0 |
T107 |
15176 |
93 |
0 |
0 |
T110 |
3632 |
4 |
0 |
0 |
T111 |
9319 |
104 |
0 |
0 |
T112 |
103134 |
475 |
0 |
0 |
T143 |
6955 |
27 |
0 |
0 |
T144 |
34239 |
92 |
0 |
0 |
T145 |
9277 |
85 |
0 |
0 |
T146 |
16773 |
13 |
0 |
0 |
cmd_info_23_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
425222587 |
2741 |
0 |
0 |
T98 |
25609 |
1 |
0 |
0 |
T105 |
9114 |
78 |
0 |
0 |
T107 |
15176 |
67 |
0 |
0 |
T110 |
3632 |
46 |
0 |
0 |
T111 |
9319 |
18 |
0 |
0 |
T112 |
103134 |
436 |
0 |
0 |
T143 |
6955 |
5 |
0 |
0 |
T144 |
34239 |
369 |
0 |
0 |
T145 |
9277 |
5 |
0 |
0 |
T146 |
16773 |
47 |
0 |
0 |
cmd_info_2_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
425222587 |
2639 |
0 |
0 |
T86 |
6088 |
33 |
0 |
0 |
T105 |
9114 |
95 |
0 |
0 |
T107 |
15176 |
64 |
0 |
0 |
T110 |
3632 |
47 |
0 |
0 |
T111 |
9319 |
8 |
0 |
0 |
T112 |
103134 |
428 |
0 |
0 |
T142 |
8103 |
37 |
0 |
0 |
T144 |
34239 |
242 |
0 |
0 |
T145 |
9277 |
6 |
0 |
0 |
T146 |
16773 |
40 |
0 |
0 |
cmd_info_3_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
425222587 |
2852 |
0 |
0 |
T86 |
6088 |
25 |
0 |
0 |
T105 |
9114 |
48 |
0 |
0 |
T107 |
15176 |
78 |
0 |
0 |
T110 |
3632 |
44 |
0 |
0 |
T111 |
9319 |
143 |
0 |
0 |
T112 |
103134 |
494 |
0 |
0 |
T142 |
8103 |
68 |
0 |
0 |
T143 |
6955 |
27 |
0 |
0 |
T144 |
34239 |
374 |
0 |
0 |
T145 |
9277 |
67 |
0 |
0 |
cmd_info_4_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
425222587 |
2618 |
0 |
0 |
T86 |
6088 |
14 |
0 |
0 |
T105 |
9114 |
58 |
0 |
0 |
T107 |
15176 |
71 |
0 |
0 |
T110 |
3632 |
58 |
0 |
0 |
T111 |
9319 |
105 |
0 |
0 |
T112 |
103134 |
358 |
0 |
0 |
T142 |
8103 |
9 |
0 |
0 |
T143 |
6955 |
11 |
0 |
0 |
T144 |
34239 |
295 |
0 |
0 |
T145 |
9277 |
28 |
0 |
0 |
cmd_info_5_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
425222587 |
3164 |
0 |
0 |
T86 |
6088 |
29 |
0 |
0 |
T105 |
9114 |
28 |
0 |
0 |
T107 |
15176 |
99 |
0 |
0 |
T110 |
3632 |
6 |
0 |
0 |
T111 |
9319 |
115 |
0 |
0 |
T112 |
103134 |
403 |
0 |
0 |
T142 |
8103 |
17 |
0 |
0 |
T143 |
6955 |
40 |
0 |
0 |
T144 |
34239 |
343 |
0 |
0 |
T145 |
9277 |
47 |
0 |
0 |
cmd_info_6_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
425222587 |
2692 |
0 |
0 |
T86 |
6088 |
2 |
0 |
0 |
T105 |
9114 |
97 |
0 |
0 |
T107 |
15176 |
116 |
0 |
0 |
T110 |
3632 |
7 |
0 |
0 |
T111 |
9319 |
107 |
0 |
0 |
T112 |
103134 |
347 |
0 |
0 |
T142 |
8103 |
9 |
0 |
0 |
T143 |
6955 |
39 |
0 |
0 |
T144 |
34239 |
315 |
0 |
0 |
T145 |
9277 |
43 |
0 |
0 |
cmd_info_7_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
425222587 |
2567 |
0 |
0 |
T86 |
6088 |
19 |
0 |
0 |
T105 |
9114 |
11 |
0 |
0 |
T107 |
15176 |
56 |
0 |
0 |
T110 |
3632 |
6 |
0 |
0 |
T111 |
9319 |
16 |
0 |
0 |
T112 |
103134 |
442 |
0 |
0 |
T142 |
8103 |
7 |
0 |
0 |
T143 |
6955 |
27 |
0 |
0 |
T144 |
34239 |
156 |
0 |
0 |
T145 |
9277 |
45 |
0 |
0 |
cmd_info_8_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
425222587 |
2843 |
0 |
0 |
T105 |
9114 |
120 |
0 |
0 |
T107 |
15176 |
185 |
0 |
0 |
T110 |
3632 |
5 |
0 |
0 |
T111 |
9319 |
45 |
0 |
0 |
T112 |
103134 |
380 |
0 |
0 |
T142 |
8103 |
48 |
0 |
0 |
T143 |
6955 |
8 |
0 |
0 |
T144 |
34239 |
215 |
0 |
0 |
T145 |
9277 |
17 |
0 |
0 |
T146 |
16773 |
20 |
0 |
0 |
cmd_info_9_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
425222587 |
2899 |
0 |
0 |
T86 |
6088 |
23 |
0 |
0 |
T105 |
9114 |
11 |
0 |
0 |
T107 |
15176 |
11 |
0 |
0 |
T110 |
3632 |
56 |
0 |
0 |
T111 |
9319 |
99 |
0 |
0 |
T112 |
103134 |
439 |
0 |
0 |
T142 |
8103 |
2 |
0 |
0 |
T143 |
6955 |
35 |
0 |
0 |
T144 |
34239 |
239 |
0 |
0 |
T145 |
9277 |
69 |
0 |
0 |
cmd_info_en4b_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
425222587 |
1671 |
0 |
0 |
T86 |
6088 |
4 |
0 |
0 |
T105 |
9114 |
13 |
0 |
0 |
T107 |
15176 |
45 |
0 |
0 |
T110 |
3632 |
5 |
0 |
0 |
T111 |
9319 |
9 |
0 |
0 |
T112 |
103134 |
487 |
0 |
0 |
T142 |
8103 |
3 |
0 |
0 |
T143 |
6955 |
28 |
0 |
0 |
T144 |
34239 |
65 |
0 |
0 |
T145 |
9277 |
16 |
0 |
0 |
cmd_info_ex4b_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
425222587 |
1553 |
0 |
0 |
T86 |
6088 |
6 |
0 |
0 |
T105 |
9114 |
22 |
0 |
0 |
T107 |
15176 |
19 |
0 |
0 |
T110 |
3632 |
10 |
0 |
0 |
T111 |
9319 |
14 |
0 |
0 |
T112 |
103134 |
426 |
0 |
0 |
T142 |
8103 |
27 |
0 |
0 |
T143 |
6955 |
30 |
0 |
0 |
T144 |
34239 |
64 |
0 |
0 |
T145 |
9277 |
7 |
0 |
0 |
cmd_info_wrdi_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
425222587 |
1523 |
0 |
0 |
T86 |
6088 |
1 |
0 |
0 |
T105 |
9114 |
14 |
0 |
0 |
T107 |
15176 |
32 |
0 |
0 |
T110 |
3632 |
7 |
0 |
0 |
T111 |
9319 |
28 |
0 |
0 |
T112 |
103134 |
424 |
0 |
0 |
T142 |
8103 |
34 |
0 |
0 |
T143 |
6955 |
28 |
0 |
0 |
T144 |
34239 |
57 |
0 |
0 |
T145 |
9277 |
6 |
0 |
0 |
cmd_info_wren_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
425222587 |
1433 |
0 |
0 |
T86 |
6088 |
5 |
0 |
0 |
T105 |
9114 |
15 |
0 |
0 |
T107 |
15176 |
24 |
0 |
0 |
T110 |
3632 |
3 |
0 |
0 |
T111 |
9319 |
8 |
0 |
0 |
T112 |
103134 |
439 |
0 |
0 |
T142 |
8103 |
42 |
0 |
0 |
T143 |
6955 |
5 |
0 |
0 |
T144 |
34239 |
52 |
0 |
0 |
T145 |
9277 |
7 |
0 |
0 |
intercept_en_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
425222587 |
1801 |
0 |
0 |
T86 |
6088 |
9 |
0 |
0 |
T105 |
9114 |
13 |
0 |
0 |
T107 |
15176 |
57 |
0 |
0 |
T110 |
3632 |
6 |
0 |
0 |
T111 |
9319 |
33 |
0 |
0 |
T112 |
103134 |
448 |
0 |
0 |
T142 |
8103 |
22 |
0 |
0 |
T144 |
34239 |
89 |
0 |
0 |
T145 |
9277 |
27 |
0 |
0 |
T146 |
16773 |
62 |
0 |
0 |
intr_enable_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
425222587 |
2586 |
0 |
0 |
T21 |
4622 |
49 |
0 |
0 |
T23 |
0 |
24 |
0 |
0 |
T129 |
0 |
65 |
0 |
0 |
T133 |
0 |
16 |
0 |
0 |
T148 |
0 |
39 |
0 |
0 |
T149 |
0 |
31 |
0 |
0 |
T150 |
0 |
23 |
0 |
0 |
T151 |
0 |
6 |
0 |
0 |
T152 |
0 |
15 |
0 |
0 |
T153 |
0 |
5 |
0 |
0 |
T154 |
81461 |
0 |
0 |
0 |
T155 |
7794 |
0 |
0 |
0 |
T156 |
179864 |
0 |
0 |
0 |
T157 |
37910 |
0 |
0 |
0 |
T158 |
149195 |
0 |
0 |
0 |
T159 |
216391 |
0 |
0 |
0 |
T160 |
333505 |
0 |
0 |
0 |
T161 |
8691 |
0 |
0 |
0 |
T162 |
177554 |
0 |
0 |
0 |
jedec_cc_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
425222587 |
1479 |
0 |
0 |
T86 |
6088 |
11 |
0 |
0 |
T105 |
9114 |
16 |
0 |
0 |
T107 |
15176 |
27 |
0 |
0 |
T110 |
3632 |
5 |
0 |
0 |
T111 |
9319 |
11 |
0 |
0 |
T112 |
103134 |
462 |
0 |
0 |
T142 |
8103 |
12 |
0 |
0 |
T143 |
6955 |
1 |
0 |
0 |
T144 |
34239 |
56 |
0 |
0 |
T145 |
9277 |
22 |
0 |
0 |
jedec_id_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
425222587 |
1545 |
0 |
0 |
T105 |
9114 |
21 |
0 |
0 |
T107 |
15176 |
9 |
0 |
0 |
T111 |
9319 |
9 |
0 |
0 |
T112 |
103134 |
387 |
0 |
0 |
T120 |
7009 |
7 |
0 |
0 |
T142 |
8103 |
34 |
0 |
0 |
T143 |
6955 |
20 |
0 |
0 |
T144 |
34239 |
41 |
0 |
0 |
T146 |
16773 |
29 |
0 |
0 |
T147 |
18749 |
131 |
0 |
0 |
mailbox_addr_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
425222587 |
1514 |
0 |
0 |
T86 |
6088 |
6 |
0 |
0 |
T105 |
9114 |
17 |
0 |
0 |
T107 |
15176 |
33 |
0 |
0 |
T110 |
3632 |
1 |
0 |
0 |
T111 |
9319 |
12 |
0 |
0 |
T112 |
103134 |
414 |
0 |
0 |
T142 |
8103 |
50 |
0 |
0 |
T143 |
6955 |
13 |
0 |
0 |
T144 |
34239 |
43 |
0 |
0 |
T145 |
9277 |
6 |
0 |
0 |
payload_swap_data_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
425222587 |
1400 |
0 |
0 |
T86 |
6088 |
2 |
0 |
0 |
T105 |
9114 |
13 |
0 |
0 |
T107 |
15176 |
40 |
0 |
0 |
T111 |
9319 |
13 |
0 |
0 |
T112 |
103134 |
401 |
0 |
0 |
T142 |
8103 |
43 |
0 |
0 |
T143 |
6955 |
26 |
0 |
0 |
T144 |
34239 |
50 |
0 |
0 |
T146 |
16773 |
30 |
0 |
0 |
T147 |
18749 |
58 |
0 |
0 |
payload_swap_mask_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
425222587 |
1378 |
0 |
0 |
T86 |
6088 |
3 |
0 |
0 |
T105 |
9114 |
18 |
0 |
0 |
T107 |
15176 |
14 |
0 |
0 |
T110 |
3632 |
1 |
0 |
0 |
T111 |
9319 |
9 |
0 |
0 |
T112 |
103134 |
396 |
0 |
0 |
T142 |
8103 |
1 |
0 |
0 |
T143 |
6955 |
10 |
0 |
0 |
T144 |
34239 |
48 |
0 |
0 |
T145 |
9277 |
17 |
0 |
0 |
read_threshold_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
425222587 |
1458 |
0 |
0 |
T86 |
6088 |
3 |
0 |
0 |
T105 |
9114 |
20 |
0 |
0 |
T107 |
15176 |
27 |
0 |
0 |
T110 |
3632 |
5 |
0 |
0 |
T111 |
9319 |
5 |
0 |
0 |
T112 |
103134 |
455 |
0 |
0 |
T142 |
8103 |
10 |
0 |
0 |
T143 |
6955 |
14 |
0 |
0 |
T144 |
34239 |
40 |
0 |
0 |
T145 |
9277 |
3 |
0 |
0 |
tpm_access_0_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
425222587 |
1757 |
0 |
0 |
T86 |
6088 |
21 |
0 |
0 |
T105 |
9114 |
12 |
0 |
0 |
T107 |
15176 |
41 |
0 |
0 |
T110 |
3632 |
12 |
0 |
0 |
T111 |
9319 |
49 |
0 |
0 |
T112 |
103134 |
359 |
0 |
0 |
T142 |
8103 |
15 |
0 |
0 |
T143 |
6955 |
6 |
0 |
0 |
T144 |
34239 |
95 |
0 |
0 |
T145 |
9277 |
13 |
0 |
0 |
tpm_access_1_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
425222587 |
1330 |
0 |
0 |
T86 |
6088 |
6 |
0 |
0 |
T105 |
9114 |
12 |
0 |
0 |
T107 |
15176 |
15 |
0 |
0 |
T110 |
3632 |
3 |
0 |
0 |
T111 |
9319 |
16 |
0 |
0 |
T112 |
103134 |
384 |
0 |
0 |
T142 |
8103 |
18 |
0 |
0 |
T143 |
6955 |
4 |
0 |
0 |
T144 |
34239 |
43 |
0 |
0 |
T146 |
16773 |
38 |
0 |
0 |
tpm_cfg_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
425222587 |
2063 |
0 |
0 |
T86 |
6088 |
3 |
0 |
0 |
T105 |
9114 |
22 |
0 |
0 |
T107 |
15176 |
46 |
0 |
0 |
T111 |
9319 |
34 |
0 |
0 |
T112 |
103134 |
421 |
0 |
0 |
T142 |
8103 |
14 |
0 |
0 |
T143 |
6955 |
45 |
0 |
0 |
T144 |
34239 |
130 |
0 |
0 |
T145 |
9277 |
10 |
0 |
0 |
T146 |
16773 |
59 |
0 |
0 |
tpm_did_vid_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
425222587 |
1612 |
0 |
0 |
T86 |
6088 |
4 |
0 |
0 |
T105 |
9114 |
27 |
0 |
0 |
T107 |
15176 |
23 |
0 |
0 |
T110 |
3632 |
6 |
0 |
0 |
T111 |
9319 |
11 |
0 |
0 |
T112 |
103134 |
474 |
0 |
0 |
T142 |
8103 |
39 |
0 |
0 |
T143 |
6955 |
37 |
0 |
0 |
T144 |
34239 |
70 |
0 |
0 |
T145 |
9277 |
16 |
0 |
0 |
tpm_int_enable_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
425222587 |
1511 |
0 |
0 |
T86 |
6088 |
10 |
0 |
0 |
T105 |
9114 |
3 |
0 |
0 |
T107 |
15176 |
22 |
0 |
0 |
T110 |
3632 |
1 |
0 |
0 |
T111 |
9319 |
21 |
0 |
0 |
T112 |
103134 |
488 |
0 |
0 |
T142 |
8103 |
41 |
0 |
0 |
T143 |
6955 |
56 |
0 |
0 |
T144 |
34239 |
47 |
0 |
0 |
T145 |
9277 |
16 |
0 |
0 |
tpm_int_status_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
425222587 |
1497 |
0 |
0 |
T105 |
9114 |
15 |
0 |
0 |
T107 |
15176 |
20 |
0 |
0 |
T110 |
3632 |
4 |
0 |
0 |
T111 |
9319 |
3 |
0 |
0 |
T112 |
103134 |
476 |
0 |
0 |
T142 |
8103 |
45 |
0 |
0 |
T143 |
6955 |
47 |
0 |
0 |
T144 |
34239 |
30 |
0 |
0 |
T145 |
9277 |
10 |
0 |
0 |
T146 |
16773 |
43 |
0 |
0 |
tpm_int_vector_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
425222587 |
1679 |
0 |
0 |
T105 |
9114 |
17 |
0 |
0 |
T107 |
15176 |
24 |
0 |
0 |
T111 |
9319 |
4 |
0 |
0 |
T112 |
103134 |
462 |
0 |
0 |
T142 |
8103 |
53 |
0 |
0 |
T143 |
6955 |
58 |
0 |
0 |
T144 |
34239 |
55 |
0 |
0 |
T145 |
9277 |
12 |
0 |
0 |
T146 |
16773 |
36 |
0 |
0 |
T147 |
18749 |
115 |
0 |
0 |
tpm_intf_capability_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
425222587 |
1387 |
0 |
0 |
T86 |
6088 |
3 |
0 |
0 |
T105 |
9114 |
23 |
0 |
0 |
T107 |
15176 |
30 |
0 |
0 |
T110 |
3632 |
9 |
0 |
0 |
T111 |
9319 |
15 |
0 |
0 |
T112 |
103134 |
386 |
0 |
0 |
T142 |
8103 |
38 |
0 |
0 |
T143 |
6955 |
45 |
0 |
0 |
T144 |
34239 |
35 |
0 |
0 |
T145 |
9277 |
8 |
0 |
0 |
tpm_rid_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
425222587 |
1497 |
0 |
0 |
T105 |
9114 |
19 |
0 |
0 |
T107 |
15176 |
28 |
0 |
0 |
T110 |
3632 |
4 |
0 |
0 |
T111 |
9319 |
16 |
0 |
0 |
T112 |
103134 |
455 |
0 |
0 |
T142 |
8103 |
19 |
0 |
0 |
T143 |
6955 |
19 |
0 |
0 |
T144 |
34239 |
34 |
0 |
0 |
T145 |
9277 |
2 |
0 |
0 |
T146 |
16773 |
29 |
0 |
0 |
tpm_sts_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
425222587 |
1391 |
0 |
0 |
T86 |
6088 |
7 |
0 |
0 |
T105 |
9114 |
14 |
0 |
0 |
T107 |
15176 |
16 |
0 |
0 |
T110 |
3632 |
7 |
0 |
0 |
T111 |
9319 |
15 |
0 |
0 |
T112 |
103134 |
370 |
0 |
0 |
T143 |
6955 |
11 |
0 |
0 |
T144 |
34239 |
43 |
0 |
0 |
T145 |
9277 |
23 |
0 |
0 |
T146 |
16773 |
53 |
0 |
0 |