Assert Coverage for Module :
spi_device_csr_assert_fpv
Assertion Details
TlulOOBAddrErr_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
462298786 |
3476 |
0 |
0 |
T98 |
29712 |
4 |
0 |
0 |
T99 |
18494 |
212 |
0 |
0 |
T100 |
3833 |
102 |
0 |
0 |
T101 |
81282 |
5 |
0 |
0 |
T102 |
4158 |
4 |
0 |
0 |
T103 |
34460 |
1 |
0 |
0 |
T120 |
3790 |
8 |
0 |
0 |
T125 |
10556 |
2 |
0 |
0 |
T126 |
78671 |
2 |
0 |
0 |
T127 |
55653 |
3 |
0 |
0 |
addr_swap_data_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
462298786 |
1507 |
0 |
0 |
T89 |
4626 |
11 |
0 |
0 |
T103 |
34460 |
37 |
0 |
0 |
T116 |
14896 |
26 |
0 |
0 |
T118 |
10243 |
19 |
0 |
0 |
T128 |
62734 |
31 |
0 |
0 |
T132 |
10437 |
18 |
0 |
0 |
T154 |
20090 |
24 |
0 |
0 |
T155 |
7398 |
42 |
0 |
0 |
T165 |
13338 |
41 |
0 |
0 |
T166 |
31491 |
30 |
0 |
0 |
addr_swap_mask_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
462298786 |
1260 |
0 |
0 |
T89 |
4626 |
11 |
0 |
0 |
T103 |
34460 |
28 |
0 |
0 |
T116 |
14896 |
27 |
0 |
0 |
T118 |
10243 |
15 |
0 |
0 |
T128 |
62734 |
39 |
0 |
0 |
T132 |
10437 |
11 |
0 |
0 |
T154 |
20090 |
32 |
0 |
0 |
T155 |
7398 |
20 |
0 |
0 |
T165 |
13338 |
35 |
0 |
0 |
T166 |
31491 |
31 |
0 |
0 |
cfg_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
462298786 |
1690 |
0 |
0 |
T89 |
4626 |
11 |
0 |
0 |
T103 |
34460 |
48 |
0 |
0 |
T116 |
14896 |
38 |
0 |
0 |
T118 |
10243 |
20 |
0 |
0 |
T128 |
62734 |
99 |
0 |
0 |
T132 |
10437 |
17 |
0 |
0 |
T154 |
20090 |
48 |
0 |
0 |
T155 |
7398 |
27 |
0 |
0 |
T165 |
13338 |
14 |
0 |
0 |
T166 |
31491 |
60 |
0 |
0 |
cmd_filter_0_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
462298786 |
5258 |
0 |
0 |
T89 |
4626 |
6 |
0 |
0 |
T103 |
34460 |
276 |
0 |
0 |
T116 |
14896 |
177 |
0 |
0 |
T118 |
10243 |
127 |
0 |
0 |
T128 |
62734 |
950 |
0 |
0 |
T132 |
10437 |
129 |
0 |
0 |
T154 |
20090 |
33 |
0 |
0 |
T155 |
7398 |
13 |
0 |
0 |
T165 |
13338 |
57 |
0 |
0 |
T166 |
31491 |
434 |
0 |
0 |
cmd_filter_1_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
462298786 |
5303 |
0 |
0 |
T103 |
34460 |
424 |
0 |
0 |
T116 |
14896 |
395 |
0 |
0 |
T118 |
10243 |
14 |
0 |
0 |
T128 |
62734 |
809 |
0 |
0 |
T132 |
10437 |
14 |
0 |
0 |
T138 |
11049 |
327 |
0 |
0 |
T154 |
20090 |
16 |
0 |
0 |
T165 |
13338 |
42 |
0 |
0 |
T166 |
31491 |
258 |
0 |
0 |
T167 |
67076 |
1139 |
0 |
0 |
cmd_filter_2_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
462298786 |
5576 |
0 |
0 |
T89 |
4626 |
17 |
0 |
0 |
T103 |
34460 |
534 |
0 |
0 |
T116 |
14896 |
177 |
0 |
0 |
T118 |
10243 |
278 |
0 |
0 |
T128 |
62734 |
641 |
0 |
0 |
T132 |
10437 |
125 |
0 |
0 |
T154 |
20090 |
15 |
0 |
0 |
T155 |
7398 |
24 |
0 |
0 |
T165 |
13338 |
66 |
0 |
0 |
T166 |
31491 |
421 |
0 |
0 |
cmd_filter_3_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
462298786 |
4798 |
0 |
0 |
T89 |
4626 |
8 |
0 |
0 |
T103 |
34460 |
684 |
0 |
0 |
T116 |
14896 |
411 |
0 |
0 |
T118 |
10243 |
126 |
0 |
0 |
T128 |
62734 |
528 |
0 |
0 |
T132 |
10437 |
130 |
0 |
0 |
T154 |
20090 |
70 |
0 |
0 |
T155 |
7398 |
21 |
0 |
0 |
T165 |
13338 |
50 |
0 |
0 |
T166 |
31491 |
278 |
0 |
0 |
cmd_filter_4_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
462298786 |
6005 |
0 |
0 |
T89 |
4626 |
11 |
0 |
0 |
T103 |
34460 |
516 |
0 |
0 |
T116 |
14896 |
242 |
0 |
0 |
T118 |
10243 |
231 |
0 |
0 |
T128 |
62734 |
634 |
0 |
0 |
T132 |
10437 |
264 |
0 |
0 |
T154 |
20090 |
40 |
0 |
0 |
T155 |
7398 |
34 |
0 |
0 |
T165 |
13338 |
27 |
0 |
0 |
T166 |
31491 |
400 |
0 |
0 |
cmd_filter_5_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
462298786 |
6260 |
0 |
0 |
T89 |
4626 |
13 |
0 |
0 |
T103 |
34460 |
933 |
0 |
0 |
T116 |
14896 |
236 |
0 |
0 |
T118 |
10243 |
141 |
0 |
0 |
T128 |
62734 |
518 |
0 |
0 |
T132 |
10437 |
8 |
0 |
0 |
T154 |
20090 |
24 |
0 |
0 |
T155 |
7398 |
29 |
0 |
0 |
T165 |
13338 |
48 |
0 |
0 |
T166 |
31491 |
584 |
0 |
0 |
cmd_filter_6_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
462298786 |
5861 |
0 |
0 |
T89 |
4626 |
22 |
0 |
0 |
T103 |
34460 |
577 |
0 |
0 |
T116 |
14896 |
265 |
0 |
0 |
T118 |
10243 |
127 |
0 |
0 |
T128 |
62734 |
452 |
0 |
0 |
T132 |
10437 |
224 |
0 |
0 |
T154 |
20090 |
55 |
0 |
0 |
T155 |
7398 |
34 |
0 |
0 |
T165 |
13338 |
80 |
0 |
0 |
T166 |
31491 |
301 |
0 |
0 |
cmd_filter_7_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
462298786 |
5040 |
0 |
0 |
T89 |
4626 |
9 |
0 |
0 |
T103 |
34460 |
527 |
0 |
0 |
T112 |
9215 |
4 |
0 |
0 |
T116 |
14896 |
21 |
0 |
0 |
T118 |
10243 |
1 |
0 |
0 |
T128 |
62734 |
546 |
0 |
0 |
T132 |
10437 |
280 |
0 |
0 |
T154 |
20090 |
37 |
0 |
0 |
T155 |
7398 |
36 |
0 |
0 |
T165 |
13338 |
34 |
0 |
0 |
cmd_info_0_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
462298786 |
2961 |
0 |
0 |
T89 |
4626 |
19 |
0 |
0 |
T103 |
34460 |
117 |
0 |
0 |
T116 |
14896 |
68 |
0 |
0 |
T118 |
10243 |
9 |
0 |
0 |
T128 |
62734 |
248 |
0 |
0 |
T132 |
10437 |
92 |
0 |
0 |
T154 |
20090 |
60 |
0 |
0 |
T155 |
7398 |
47 |
0 |
0 |
T165 |
13338 |
57 |
0 |
0 |
T166 |
31491 |
185 |
0 |
0 |
cmd_info_10_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
462298786 |
2928 |
0 |
0 |
T89 |
4626 |
14 |
0 |
0 |
T103 |
34460 |
187 |
0 |
0 |
T116 |
14896 |
102 |
0 |
0 |
T118 |
10243 |
20 |
0 |
0 |
T128 |
62734 |
386 |
0 |
0 |
T132 |
10437 |
112 |
0 |
0 |
T154 |
20090 |
39 |
0 |
0 |
T155 |
7398 |
70 |
0 |
0 |
T165 |
13338 |
28 |
0 |
0 |
T166 |
31491 |
139 |
0 |
0 |
cmd_info_11_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
462298786 |
2771 |
0 |
0 |
T89 |
4626 |
1 |
0 |
0 |
T103 |
34460 |
238 |
0 |
0 |
T116 |
14896 |
63 |
0 |
0 |
T118 |
10243 |
91 |
0 |
0 |
T128 |
62734 |
179 |
0 |
0 |
T132 |
10437 |
120 |
0 |
0 |
T154 |
20090 |
30 |
0 |
0 |
T155 |
7398 |
27 |
0 |
0 |
T165 |
13338 |
16 |
0 |
0 |
T166 |
31491 |
121 |
0 |
0 |
cmd_info_12_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
462298786 |
2977 |
0 |
0 |
T89 |
4626 |
10 |
0 |
0 |
T103 |
34460 |
168 |
0 |
0 |
T116 |
14896 |
101 |
0 |
0 |
T118 |
10243 |
81 |
0 |
0 |
T128 |
62734 |
306 |
0 |
0 |
T132 |
10437 |
100 |
0 |
0 |
T154 |
20090 |
45 |
0 |
0 |
T155 |
7398 |
42 |
0 |
0 |
T165 |
13338 |
42 |
0 |
0 |
T166 |
31491 |
125 |
0 |
0 |
cmd_info_13_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
462298786 |
2863 |
0 |
0 |
T89 |
4626 |
12 |
0 |
0 |
T99 |
18494 |
5 |
0 |
0 |
T103 |
34460 |
124 |
0 |
0 |
T116 |
14896 |
175 |
0 |
0 |
T118 |
10243 |
73 |
0 |
0 |
T128 |
62734 |
184 |
0 |
0 |
T132 |
10437 |
114 |
0 |
0 |
T154 |
20090 |
13 |
0 |
0 |
T155 |
7398 |
2 |
0 |
0 |
T165 |
13338 |
26 |
0 |
0 |
cmd_info_14_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
462298786 |
3144 |
0 |
0 |
T89 |
4626 |
18 |
0 |
0 |
T103 |
34460 |
283 |
0 |
0 |
T116 |
14896 |
111 |
0 |
0 |
T118 |
10243 |
60 |
0 |
0 |
T128 |
62734 |
266 |
0 |
0 |
T132 |
10437 |
61 |
0 |
0 |
T154 |
20090 |
42 |
0 |
0 |
T155 |
7398 |
6 |
0 |
0 |
T165 |
13338 |
20 |
0 |
0 |
T166 |
31491 |
155 |
0 |
0 |
cmd_info_15_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
462298786 |
2875 |
0 |
0 |
T89 |
4626 |
16 |
0 |
0 |
T103 |
34460 |
249 |
0 |
0 |
T116 |
14896 |
28 |
0 |
0 |
T118 |
10243 |
70 |
0 |
0 |
T128 |
62734 |
300 |
0 |
0 |
T132 |
10437 |
49 |
0 |
0 |
T154 |
20090 |
28 |
0 |
0 |
T155 |
7398 |
41 |
0 |
0 |
T165 |
13338 |
28 |
0 |
0 |
T166 |
31491 |
91 |
0 |
0 |
cmd_info_16_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
462298786 |
3211 |
0 |
0 |
T89 |
4626 |
4 |
0 |
0 |
T103 |
34460 |
366 |
0 |
0 |
T116 |
14896 |
140 |
0 |
0 |
T118 |
10243 |
78 |
0 |
0 |
T128 |
62734 |
342 |
0 |
0 |
T132 |
10437 |
10 |
0 |
0 |
T154 |
20090 |
51 |
0 |
0 |
T155 |
7398 |
26 |
0 |
0 |
T165 |
13338 |
26 |
0 |
0 |
T166 |
31491 |
110 |
0 |
0 |
cmd_info_17_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
462298786 |
3030 |
0 |
0 |
T89 |
4626 |
21 |
0 |
0 |
T103 |
34460 |
237 |
0 |
0 |
T116 |
14896 |
102 |
0 |
0 |
T118 |
10243 |
104 |
0 |
0 |
T128 |
62734 |
334 |
0 |
0 |
T132 |
10437 |
16 |
0 |
0 |
T154 |
20090 |
44 |
0 |
0 |
T155 |
7398 |
38 |
0 |
0 |
T165 |
13338 |
31 |
0 |
0 |
T166 |
31491 |
241 |
0 |
0 |
cmd_info_18_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
462298786 |
3025 |
0 |
0 |
T89 |
4626 |
12 |
0 |
0 |
T103 |
34460 |
278 |
0 |
0 |
T116 |
14896 |
65 |
0 |
0 |
T118 |
10243 |
79 |
0 |
0 |
T128 |
62734 |
332 |
0 |
0 |
T132 |
10437 |
75 |
0 |
0 |
T154 |
20090 |
25 |
0 |
0 |
T155 |
7398 |
9 |
0 |
0 |
T165 |
13338 |
45 |
0 |
0 |
T166 |
31491 |
168 |
0 |
0 |
cmd_info_19_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
462298786 |
2813 |
0 |
0 |
T89 |
4626 |
5 |
0 |
0 |
T103 |
34460 |
299 |
0 |
0 |
T116 |
14896 |
77 |
0 |
0 |
T118 |
10243 |
20 |
0 |
0 |
T128 |
62734 |
172 |
0 |
0 |
T132 |
10437 |
60 |
0 |
0 |
T154 |
20090 |
31 |
0 |
0 |
T155 |
7398 |
7 |
0 |
0 |
T165 |
13338 |
23 |
0 |
0 |
T166 |
31491 |
98 |
0 |
0 |
cmd_info_1_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
462298786 |
3310 |
0 |
0 |
T89 |
4626 |
6 |
0 |
0 |
T103 |
34460 |
207 |
0 |
0 |
T116 |
14896 |
104 |
0 |
0 |
T118 |
10243 |
111 |
0 |
0 |
T128 |
62734 |
371 |
0 |
0 |
T132 |
10437 |
114 |
0 |
0 |
T154 |
20090 |
18 |
0 |
0 |
T155 |
7398 |
8 |
0 |
0 |
T165 |
13338 |
61 |
0 |
0 |
T166 |
31491 |
49 |
0 |
0 |
cmd_info_20_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
462298786 |
2904 |
0 |
0 |
T89 |
4626 |
17 |
0 |
0 |
T103 |
34460 |
364 |
0 |
0 |
T116 |
14896 |
77 |
0 |
0 |
T118 |
10243 |
57 |
0 |
0 |
T128 |
62734 |
216 |
0 |
0 |
T132 |
10437 |
42 |
0 |
0 |
T154 |
20090 |
24 |
0 |
0 |
T155 |
7398 |
23 |
0 |
0 |
T165 |
13338 |
85 |
0 |
0 |
T166 |
31491 |
134 |
0 |
0 |
cmd_info_21_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
462298786 |
3176 |
0 |
0 |
T89 |
4626 |
19 |
0 |
0 |
T103 |
34460 |
276 |
0 |
0 |
T116 |
14896 |
118 |
0 |
0 |
T118 |
10243 |
40 |
0 |
0 |
T128 |
62734 |
381 |
0 |
0 |
T132 |
10437 |
53 |
0 |
0 |
T154 |
20090 |
73 |
0 |
0 |
T155 |
7398 |
13 |
0 |
0 |
T165 |
13338 |
48 |
0 |
0 |
T166 |
31491 |
194 |
0 |
0 |
cmd_info_22_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
462298786 |
3472 |
0 |
0 |
T89 |
4626 |
9 |
0 |
0 |
T103 |
34460 |
321 |
0 |
0 |
T116 |
14896 |
57 |
0 |
0 |
T118 |
10243 |
95 |
0 |
0 |
T128 |
62734 |
331 |
0 |
0 |
T132 |
10437 |
93 |
0 |
0 |
T154 |
20090 |
78 |
0 |
0 |
T155 |
7398 |
18 |
0 |
0 |
T165 |
13338 |
33 |
0 |
0 |
T166 |
31491 |
253 |
0 |
0 |
cmd_info_23_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
462298786 |
3374 |
0 |
0 |
T89 |
4626 |
11 |
0 |
0 |
T103 |
34460 |
422 |
0 |
0 |
T116 |
14896 |
102 |
0 |
0 |
T118 |
10243 |
109 |
0 |
0 |
T128 |
62734 |
242 |
0 |
0 |
T132 |
10437 |
109 |
0 |
0 |
T154 |
20090 |
51 |
0 |
0 |
T155 |
7398 |
3 |
0 |
0 |
T165 |
13338 |
13 |
0 |
0 |
T166 |
31491 |
102 |
0 |
0 |
cmd_info_2_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
462298786 |
2986 |
0 |
0 |
T89 |
4626 |
18 |
0 |
0 |
T103 |
34460 |
355 |
0 |
0 |
T116 |
14896 |
102 |
0 |
0 |
T118 |
10243 |
96 |
0 |
0 |
T128 |
62734 |
380 |
0 |
0 |
T136 |
4079 |
36 |
0 |
0 |
T154 |
20090 |
14 |
0 |
0 |
T155 |
7398 |
29 |
0 |
0 |
T165 |
13338 |
56 |
0 |
0 |
T166 |
31491 |
172 |
0 |
0 |
cmd_info_3_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
462298786 |
3058 |
0 |
0 |
T89 |
4626 |
6 |
0 |
0 |
T103 |
34460 |
252 |
0 |
0 |
T116 |
14896 |
79 |
0 |
0 |
T118 |
10243 |
15 |
0 |
0 |
T128 |
62734 |
306 |
0 |
0 |
T132 |
10437 |
104 |
0 |
0 |
T154 |
20090 |
79 |
0 |
0 |
T155 |
7398 |
6 |
0 |
0 |
T165 |
13338 |
28 |
0 |
0 |
T166 |
31491 |
108 |
0 |
0 |
cmd_info_4_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
462298786 |
3032 |
0 |
0 |
T89 |
4626 |
13 |
0 |
0 |
T103 |
34460 |
211 |
0 |
0 |
T116 |
14896 |
122 |
0 |
0 |
T118 |
10243 |
56 |
0 |
0 |
T128 |
62734 |
185 |
0 |
0 |
T132 |
10437 |
97 |
0 |
0 |
T154 |
20090 |
61 |
0 |
0 |
T155 |
7398 |
61 |
0 |
0 |
T165 |
13338 |
54 |
0 |
0 |
T166 |
31491 |
159 |
0 |
0 |
cmd_info_5_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
462298786 |
3017 |
0 |
0 |
T89 |
4626 |
7 |
0 |
0 |
T103 |
34460 |
239 |
0 |
0 |
T116 |
14896 |
173 |
0 |
0 |
T118 |
10243 |
18 |
0 |
0 |
T128 |
62734 |
271 |
0 |
0 |
T132 |
10437 |
122 |
0 |
0 |
T154 |
20090 |
55 |
0 |
0 |
T155 |
7398 |
24 |
0 |
0 |
T165 |
13338 |
23 |
0 |
0 |
T166 |
31491 |
148 |
0 |
0 |
cmd_info_6_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
462298786 |
3020 |
0 |
0 |
T89 |
4626 |
6 |
0 |
0 |
T103 |
34460 |
218 |
0 |
0 |
T116 |
14896 |
67 |
0 |
0 |
T118 |
10243 |
113 |
0 |
0 |
T128 |
62734 |
305 |
0 |
0 |
T132 |
10437 |
67 |
0 |
0 |
T154 |
20090 |
17 |
0 |
0 |
T155 |
7398 |
13 |
0 |
0 |
T165 |
13338 |
51 |
0 |
0 |
T166 |
31491 |
97 |
0 |
0 |
cmd_info_7_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
462298786 |
2683 |
0 |
0 |
T89 |
4626 |
10 |
0 |
0 |
T103 |
34460 |
195 |
0 |
0 |
T116 |
14896 |
66 |
0 |
0 |
T118 |
10243 |
14 |
0 |
0 |
T128 |
62734 |
265 |
0 |
0 |
T132 |
10437 |
89 |
0 |
0 |
T154 |
20090 |
45 |
0 |
0 |
T155 |
7398 |
11 |
0 |
0 |
T165 |
13338 |
14 |
0 |
0 |
T166 |
31491 |
197 |
0 |
0 |
cmd_info_8_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
462298786 |
3131 |
0 |
0 |
T89 |
4626 |
8 |
0 |
0 |
T103 |
34460 |
178 |
0 |
0 |
T116 |
14896 |
56 |
0 |
0 |
T118 |
10243 |
60 |
0 |
0 |
T128 |
62734 |
411 |
0 |
0 |
T132 |
10437 |
120 |
0 |
0 |
T154 |
20090 |
19 |
0 |
0 |
T155 |
7398 |
17 |
0 |
0 |
T165 |
13338 |
59 |
0 |
0 |
T166 |
31491 |
198 |
0 |
0 |
cmd_info_9_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
462298786 |
2829 |
0 |
0 |
T89 |
4626 |
15 |
0 |
0 |
T103 |
34460 |
275 |
0 |
0 |
T116 |
14896 |
24 |
0 |
0 |
T118 |
10243 |
57 |
0 |
0 |
T128 |
62734 |
277 |
0 |
0 |
T132 |
10437 |
118 |
0 |
0 |
T154 |
20090 |
64 |
0 |
0 |
T155 |
7398 |
38 |
0 |
0 |
T165 |
13338 |
49 |
0 |
0 |
T166 |
31491 |
101 |
0 |
0 |
cmd_info_en4b_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
462298786 |
1628 |
0 |
0 |
T89 |
4626 |
7 |
0 |
0 |
T103 |
34460 |
68 |
0 |
0 |
T116 |
14896 |
43 |
0 |
0 |
T118 |
10243 |
33 |
0 |
0 |
T128 |
62734 |
57 |
0 |
0 |
T132 |
10437 |
24 |
0 |
0 |
T154 |
20090 |
24 |
0 |
0 |
T155 |
7398 |
37 |
0 |
0 |
T165 |
13338 |
53 |
0 |
0 |
T166 |
31491 |
47 |
0 |
0 |
cmd_info_ex4b_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
462298786 |
1543 |
0 |
0 |
T89 |
4626 |
8 |
0 |
0 |
T103 |
34460 |
80 |
0 |
0 |
T116 |
14896 |
41 |
0 |
0 |
T118 |
10243 |
10 |
0 |
0 |
T128 |
62734 |
57 |
0 |
0 |
T132 |
10437 |
28 |
0 |
0 |
T154 |
20090 |
14 |
0 |
0 |
T155 |
7398 |
8 |
0 |
0 |
T165 |
13338 |
33 |
0 |
0 |
T166 |
31491 |
29 |
0 |
0 |
cmd_info_wrdi_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
462298786 |
1557 |
0 |
0 |
T89 |
4626 |
17 |
0 |
0 |
T103 |
34460 |
73 |
0 |
0 |
T112 |
9215 |
7 |
0 |
0 |
T116 |
14896 |
30 |
0 |
0 |
T118 |
10243 |
28 |
0 |
0 |
T128 |
62734 |
54 |
0 |
0 |
T132 |
10437 |
11 |
0 |
0 |
T154 |
20090 |
47 |
0 |
0 |
T155 |
7398 |
16 |
0 |
0 |
T165 |
13338 |
32 |
0 |
0 |
cmd_info_wren_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
462298786 |
1580 |
0 |
0 |
T89 |
4626 |
14 |
0 |
0 |
T99 |
18494 |
6 |
0 |
0 |
T103 |
34460 |
62 |
0 |
0 |
T116 |
14896 |
34 |
0 |
0 |
T118 |
10243 |
12 |
0 |
0 |
T128 |
62734 |
55 |
0 |
0 |
T132 |
10437 |
20 |
0 |
0 |
T154 |
20090 |
53 |
0 |
0 |
T155 |
7398 |
46 |
0 |
0 |
T165 |
13338 |
27 |
0 |
0 |
intercept_en_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
462298786 |
1719 |
0 |
0 |
T89 |
4626 |
13 |
0 |
0 |
T103 |
34460 |
84 |
0 |
0 |
T116 |
14896 |
32 |
0 |
0 |
T118 |
10243 |
36 |
0 |
0 |
T128 |
62734 |
71 |
0 |
0 |
T132 |
10437 |
40 |
0 |
0 |
T154 |
20090 |
41 |
0 |
0 |
T155 |
7398 |
25 |
0 |
0 |
T165 |
13338 |
23 |
0 |
0 |
T166 |
31491 |
55 |
0 |
0 |
intr_enable_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
462298786 |
3019 |
0 |
0 |
T13 |
4773 |
1 |
0 |
0 |
T19 |
0 |
36 |
0 |
0 |
T37 |
446350 |
0 |
0 |
0 |
T38 |
277497 |
0 |
0 |
0 |
T57 |
131484 |
0 |
0 |
0 |
T60 |
0 |
15 |
0 |
0 |
T61 |
280198 |
0 |
0 |
0 |
T69 |
85266 |
0 |
0 |
0 |
T71 |
896 |
0 |
0 |
0 |
T72 |
1190 |
0 |
0 |
0 |
T84 |
0 |
17 |
0 |
0 |
T152 |
0 |
56 |
0 |
0 |
T158 |
8112 |
0 |
0 |
0 |
T168 |
0 |
19 |
0 |
0 |
T169 |
0 |
44 |
0 |
0 |
T170 |
0 |
35 |
0 |
0 |
T171 |
0 |
14 |
0 |
0 |
T172 |
0 |
19 |
0 |
0 |
T173 |
2337 |
0 |
0 |
0 |
jedec_cc_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
462298786 |
1498 |
0 |
0 |
T89 |
4626 |
7 |
0 |
0 |
T103 |
34460 |
63 |
0 |
0 |
T116 |
14896 |
31 |
0 |
0 |
T118 |
10243 |
14 |
0 |
0 |
T128 |
62734 |
50 |
0 |
0 |
T132 |
10437 |
12 |
0 |
0 |
T154 |
20090 |
29 |
0 |
0 |
T155 |
7398 |
12 |
0 |
0 |
T165 |
13338 |
49 |
0 |
0 |
T166 |
31491 |
21 |
0 |
0 |
jedec_id_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
462298786 |
1423 |
0 |
0 |
T89 |
4626 |
13 |
0 |
0 |
T103 |
34460 |
72 |
0 |
0 |
T116 |
14896 |
36 |
0 |
0 |
T118 |
10243 |
11 |
0 |
0 |
T128 |
62734 |
71 |
0 |
0 |
T132 |
10437 |
9 |
0 |
0 |
T154 |
20090 |
41 |
0 |
0 |
T155 |
7398 |
4 |
0 |
0 |
T165 |
13338 |
49 |
0 |
0 |
T166 |
31491 |
18 |
0 |
0 |
mailbox_addr_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
462298786 |
1421 |
0 |
0 |
T89 |
4626 |
1 |
0 |
0 |
T103 |
34460 |
38 |
0 |
0 |
T116 |
14896 |
39 |
0 |
0 |
T118 |
10243 |
15 |
0 |
0 |
T128 |
62734 |
33 |
0 |
0 |
T132 |
10437 |
14 |
0 |
0 |
T154 |
20090 |
64 |
0 |
0 |
T155 |
7398 |
22 |
0 |
0 |
T165 |
13338 |
14 |
0 |
0 |
T166 |
31491 |
30 |
0 |
0 |
payload_swap_data_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
462298786 |
1341 |
0 |
0 |
T89 |
4626 |
9 |
0 |
0 |
T103 |
34460 |
43 |
0 |
0 |
T116 |
14896 |
27 |
0 |
0 |
T118 |
10243 |
14 |
0 |
0 |
T128 |
62734 |
38 |
0 |
0 |
T132 |
10437 |
6 |
0 |
0 |
T154 |
20090 |
55 |
0 |
0 |
T155 |
7398 |
48 |
0 |
0 |
T165 |
13338 |
59 |
0 |
0 |
T166 |
31491 |
27 |
0 |
0 |
payload_swap_mask_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
462298786 |
1454 |
0 |
0 |
T89 |
4626 |
10 |
0 |
0 |
T103 |
34460 |
47 |
0 |
0 |
T116 |
14896 |
25 |
0 |
0 |
T118 |
10243 |
14 |
0 |
0 |
T128 |
62734 |
52 |
0 |
0 |
T132 |
10437 |
10 |
0 |
0 |
T154 |
20090 |
26 |
0 |
0 |
T155 |
7398 |
17 |
0 |
0 |
T165 |
13338 |
68 |
0 |
0 |
T166 |
31491 |
10 |
0 |
0 |
read_threshold_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
462298786 |
1350 |
0 |
0 |
T89 |
4626 |
7 |
0 |
0 |
T103 |
34460 |
45 |
0 |
0 |
T116 |
14896 |
24 |
0 |
0 |
T118 |
10243 |
8 |
0 |
0 |
T128 |
62734 |
38 |
0 |
0 |
T132 |
10437 |
17 |
0 |
0 |
T154 |
20090 |
42 |
0 |
0 |
T155 |
7398 |
6 |
0 |
0 |
T165 |
13338 |
14 |
0 |
0 |
T166 |
31491 |
22 |
0 |
0 |
tpm_access_0_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
462298786 |
1754 |
0 |
0 |
T89 |
4626 |
4 |
0 |
0 |
T103 |
34460 |
75 |
0 |
0 |
T116 |
14896 |
35 |
0 |
0 |
T118 |
10243 |
26 |
0 |
0 |
T128 |
62734 |
98 |
0 |
0 |
T132 |
10437 |
11 |
0 |
0 |
T154 |
20090 |
62 |
0 |
0 |
T155 |
7398 |
6 |
0 |
0 |
T165 |
13338 |
8 |
0 |
0 |
T166 |
31491 |
58 |
0 |
0 |
tpm_access_1_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
462298786 |
1422 |
0 |
0 |
T89 |
4626 |
15 |
0 |
0 |
T103 |
34460 |
31 |
0 |
0 |
T116 |
14896 |
21 |
0 |
0 |
T118 |
10243 |
19 |
0 |
0 |
T128 |
62734 |
59 |
0 |
0 |
T132 |
10437 |
10 |
0 |
0 |
T154 |
20090 |
9 |
0 |
0 |
T155 |
7398 |
39 |
0 |
0 |
T165 |
13338 |
34 |
0 |
0 |
T166 |
31491 |
24 |
0 |
0 |
tpm_cfg_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
462298786 |
1865 |
0 |
0 |
T89 |
4626 |
18 |
0 |
0 |
T103 |
34460 |
94 |
0 |
0 |
T116 |
14896 |
58 |
0 |
0 |
T118 |
10243 |
42 |
0 |
0 |
T128 |
62734 |
121 |
0 |
0 |
T132 |
10437 |
31 |
0 |
0 |
T154 |
20090 |
36 |
0 |
0 |
T155 |
7398 |
40 |
0 |
0 |
T165 |
13338 |
10 |
0 |
0 |
T166 |
31491 |
58 |
0 |
0 |
tpm_did_vid_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
462298786 |
1541 |
0 |
0 |
T89 |
4626 |
15 |
0 |
0 |
T103 |
34460 |
46 |
0 |
0 |
T116 |
14896 |
29 |
0 |
0 |
T118 |
10243 |
23 |
0 |
0 |
T128 |
62734 |
56 |
0 |
0 |
T132 |
10437 |
16 |
0 |
0 |
T154 |
20090 |
19 |
0 |
0 |
T155 |
7398 |
26 |
0 |
0 |
T165 |
13338 |
32 |
0 |
0 |
T166 |
31491 |
44 |
0 |
0 |
tpm_int_enable_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
462298786 |
1313 |
0 |
0 |
T89 |
4626 |
5 |
0 |
0 |
T103 |
34460 |
29 |
0 |
0 |
T116 |
14896 |
27 |
0 |
0 |
T118 |
10243 |
15 |
0 |
0 |
T128 |
62734 |
26 |
0 |
0 |
T132 |
10437 |
13 |
0 |
0 |
T154 |
20090 |
10 |
0 |
0 |
T155 |
7398 |
3 |
0 |
0 |
T165 |
13338 |
34 |
0 |
0 |
T166 |
31491 |
22 |
0 |
0 |
tpm_int_status_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
462298786 |
1473 |
0 |
0 |
T89 |
4626 |
22 |
0 |
0 |
T103 |
34460 |
29 |
0 |
0 |
T116 |
14896 |
31 |
0 |
0 |
T118 |
10243 |
16 |
0 |
0 |
T128 |
62734 |
37 |
0 |
0 |
T132 |
10437 |
7 |
0 |
0 |
T154 |
20090 |
48 |
0 |
0 |
T155 |
7398 |
64 |
0 |
0 |
T165 |
13338 |
65 |
0 |
0 |
T166 |
31491 |
25 |
0 |
0 |
tpm_int_vector_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
462298786 |
1427 |
0 |
0 |
T89 |
4626 |
1 |
0 |
0 |
T103 |
34460 |
17 |
0 |
0 |
T116 |
14896 |
20 |
0 |
0 |
T118 |
10243 |
30 |
0 |
0 |
T128 |
62734 |
45 |
0 |
0 |
T132 |
10437 |
23 |
0 |
0 |
T154 |
20090 |
45 |
0 |
0 |
T155 |
7398 |
32 |
0 |
0 |
T165 |
13338 |
54 |
0 |
0 |
T166 |
31491 |
30 |
0 |
0 |
tpm_intf_capability_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
462298786 |
1408 |
0 |
0 |
T89 |
4626 |
18 |
0 |
0 |
T103 |
34460 |
29 |
0 |
0 |
T116 |
14896 |
23 |
0 |
0 |
T118 |
10243 |
4 |
0 |
0 |
T128 |
62734 |
44 |
0 |
0 |
T132 |
10437 |
11 |
0 |
0 |
T154 |
20090 |
17 |
0 |
0 |
T155 |
7398 |
39 |
0 |
0 |
T165 |
13338 |
53 |
0 |
0 |
T166 |
31491 |
21 |
0 |
0 |
tpm_rid_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
462298786 |
1414 |
0 |
0 |
T89 |
4626 |
3 |
0 |
0 |
T99 |
18494 |
7 |
0 |
0 |
T103 |
34460 |
38 |
0 |
0 |
T116 |
14896 |
11 |
0 |
0 |
T118 |
10243 |
12 |
0 |
0 |
T128 |
62734 |
37 |
0 |
0 |
T132 |
10437 |
9 |
0 |
0 |
T154 |
20090 |
57 |
0 |
0 |
T155 |
7398 |
11 |
0 |
0 |
T165 |
13338 |
68 |
0 |
0 |
tpm_sts_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
462298786 |
1302 |
0 |
0 |
T89 |
4626 |
15 |
0 |
0 |
T103 |
34460 |
26 |
0 |
0 |
T116 |
14896 |
18 |
0 |
0 |
T118 |
10243 |
11 |
0 |
0 |
T128 |
62734 |
42 |
0 |
0 |
T132 |
10437 |
8 |
0 |
0 |
T154 |
20090 |
26 |
0 |
0 |
T155 |
7398 |
8 |
0 |
0 |
T165 |
13338 |
24 |
0 |
0 |
T166 |
31491 |
21 |
0 |
0 |