Unified Coverage Report :: Module :: spi_device_csr_assert_fpv

Module : spi_device_csr_assert_fpv

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_fpv_spi_device_csr_assert_0/spi_device_csr_assert_fpv.sv

Module self-instances :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
tb.dut.spi_device_csr_assert	100.00						100.00

---

Module Instance : tb.dut.spi_device_csr_assert

Instance :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Instance's subtree :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Parent :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	NAME
92.52	95.20	84.31	97.00		90.62	95.45	dut

Subtrees :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
no children

---

Since this is the module's only instance, the coverage report is the same as for the module.

Assert Coverage for Module : spi_device_csr_assert_fpv

	Total	Attempted	Percent	Succeeded/Matched	Percent
Assertions	58	58	100.00	58	100.00
Cover properties	0	0		0
Cover sequences	0	0		0
Total	58	58	100.00	58	100.00

---

Assertion Details

Name	Attempts	Real Successes	Failures	Incomplete
TlulOOBAddrErr_A	450404824	3185	0	0
addr_swap_data_rd_A	450404824	2683	0	0
addr_swap_mask_rd_A	450404824	2604	0	0
cfg_rd_A	450404824	3151	0	0
cmd_filter_0_rd_A	450404824	11919	0	0
cmd_filter_1_rd_A	450404824	12474	0	0
cmd_filter_2_rd_A	450404824	11940	0	0
cmd_filter_3_rd_A	450404824	12955	0	0
cmd_filter_4_rd_A	450404824	11350	0	0
cmd_filter_5_rd_A	450404824	11368	0	0
cmd_filter_6_rd_A	450404824	11942	0	0
cmd_filter_7_rd_A	450404824	11737	0	0
cmd_info_0_rd_A	450404824	6528	0	0
cmd_info_10_rd_A	450404824	6257	0	0
cmd_info_11_rd_A	450404824	6162	0	0
cmd_info_12_rd_A	450404824	5726	0	0
cmd_info_13_rd_A	450404824	6480	0	0
cmd_info_14_rd_A	450404824	6903	0	0
cmd_info_15_rd_A	450404824	6019	0	0
cmd_info_16_rd_A	450404824	5871	0	0
cmd_info_17_rd_A	450404824	6182	0	0
cmd_info_18_rd_A	450404824	6582	0	0
cmd_info_19_rd_A	450404824	6143	0	0
cmd_info_1_rd_A	450404824	5962	0	0
cmd_info_20_rd_A	450404824	5868	0	0
cmd_info_21_rd_A	450404824	6044	0	0
cmd_info_22_rd_A	450404824	5897	0	0
cmd_info_23_rd_A	450404824	6051	0	0
cmd_info_2_rd_A	450404824	6540	0	0
cmd_info_3_rd_A	450404824	5928	0	0
cmd_info_4_rd_A	450404824	6315	0	0
cmd_info_5_rd_A	450404824	5818	0	0
cmd_info_6_rd_A	450404824	5833	0	0
cmd_info_7_rd_A	450404824	5793	0	0
cmd_info_8_rd_A	450404824	5799	0	0
cmd_info_9_rd_A	450404824	5416	0	0
cmd_info_en4b_rd_A	450404824	3043	0	0
cmd_info_ex4b_rd_A	450404824	3129	0	0
cmd_info_wrdi_rd_A	450404824	2872	0	0
cmd_info_wren_rd_A	450404824	2871	0	0
intercept_en_rd_A	450404824	3494	0	0
intr_enable_rd_A	450404824	5084	0	0
jedec_cc_rd_A	450404824	2850	0	0
jedec_id_rd_A	450404824	2876	0	0
mailbox_addr_rd_A	450404824	2858	0	0
payload_swap_data_rd_A	450404824	2768	0	0
payload_swap_mask_rd_A	450404824	2616	0	0
read_threshold_rd_A	450404824	2736	0	0
tpm_access_0_rd_A	450404824	3496	0	0
tpm_access_1_rd_A	450404824	2666	0	0
tpm_cfg_rd_A	450404824	3759	0	0
tpm_did_vid_rd_A	450404824	3072	0	0
tpm_int_enable_rd_A	450404824	2710	0	0
tpm_int_status_rd_A	450404824	2838	0	0
tpm_int_vector_rd_A	450404824	2620	0	0
tpm_intf_capability_rd_A	450404824	2812	0	0
tpm_rid_rd_A	450404824	2672	0	0
tpm_sts_rd_A	450404824	2697	0	0

TlulOOBAddrErr_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	450404824	3185	0	0
T82	15810	202	0	0
T83	2005	5	0	0
T84	17027	179	0	0
T85	19317	1	0	0
T86	10234	1	0	0
T88	13376	144	0	0
T91	4984	198	0	0
T96	4863	2	0	0
T97	12531	2	0	0
T99	5423	1	0	0

addr_swap_data_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	450404824	2683	0	0
T73	2676	1	0	0
T99	5423	3	0	0
T104	35303	143	0	0
T129	17296	56	0	0
T130	13560	33	0	0
T131	17833	114	0	0
T132	10684	29	0	0
T133	6465	7	0	0
T134	30618	24	0	0
T135	5860	6	0	0

addr_swap_mask_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	450404824	2604	0	0
T96	4863	6	0	0
T99	5423	5	0	0
T104	35303	127	0	0
T105	8270	8	0	0
T129	17296	45	0	0
T130	13560	32	0	0
T131	17833	10	0	0
T132	10684	8	0	0
T133	6465	6	0	0
T134	30618	12	0	0

cfg_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	450404824	3151	0	0
T96	4863	6	0	0
T99	5423	4	0	0
T104	35303	114	0	0
T105	8270	22	0	0
T129	17296	25	0	0
T130	13560	96	0	0
T131	17833	44	0	0
T132	10684	25	0	0
T133	6465	9	0	0
T134	30618	33	0	0

cmd_filter_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	450404824	11919	0	0
T96	4863	64	0	0
T99	5423	64	0	0
T104	35303	145	0	0
T105	8270	135	0	0
T129	17296	28	0	0
T130	13560	58	0	0
T131	17833	5	0	0
T132	10684	11	0	0
T134	30618	502	0	0
T135	5860	117	0	0

cmd_filter_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	450404824	12474	0	0
T96	4863	65	0	0
T99	5423	101	0	0
T104	35303	124	0	0
T105	8270	120	0	0
T129	17296	54	0	0
T130	13560	41	0	0
T131	17833	53	0	0
T132	10684	112	0	0
T133	6465	21	0	0
T134	30618	337	0	0

cmd_filter_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	450404824	11940	0	0
T96	4863	66	0	0
T99	5423	9	0	0
T104	35303	119	0	0
T105	8270	6	0	0
T129	17296	43	0	0
T130	13560	20	0	0
T131	17833	28	0	0
T132	10684	13	0	0
T133	6465	8	0	0
T134	30618	358	0	0

cmd_filter_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	450404824	12955	0	0
T96	4863	4	0	0
T99	5423	81	0	0
T104	35303	195	0	0
T105	8270	135	0	0
T129	17296	59	0	0
T130	13560	63	0	0
T131	17833	15	0	0
T132	10684	148	0	0
T133	6465	20	0	0
T134	30618	367	0	0

cmd_filter_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	450404824	11350	0	0
T96	4863	66	0	0
T104	35303	151	0	0
T105	8270	120	0	0
T129	17296	26	0	0
T130	13560	7	0	0
T131	17833	31	0	0
T132	10684	247	0	0
T133	6465	6	0	0
T134	30618	297	0	0
T135	5860	85	0	0

cmd_filter_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	450404824	11368	0	0
T73	2676	1	0	0
T99	5423	2	0	0
T104	35303	170	0	0
T105	8270	103	0	0
T129	17296	55	0	0
T130	13560	55	0	0
T131	17833	36	0	0
T132	10684	270	0	0
T134	30618	330	0	0
T135	5860	62	0	0

cmd_filter_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	450404824	11942	0	0
T96	4863	4	0	0
T99	5423	70	0	0
T104	35303	169	0	0
T105	8270	234	0	0
T129	17296	21	0	0
T130	13560	8	0	0
T131	17833	30	0	0
T132	10684	256	0	0
T133	6465	8	0	0
T134	30618	106	0	0

cmd_filter_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	450404824	11737	0	0
T96	4863	4	0	0
T99	5423	8	0	0
T104	35303	156	0	0
T105	8270	134	0	0
T129	17296	50	0	0
T130	13560	21	0	0
T131	17833	39	0	0
T132	10684	19	0	0
T133	6465	17	0	0
T134	30618	242	0	0

cmd_info_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	450404824	6528	0	0
T96	4863	22	0	0
T99	5423	1	0	0
T104	35303	156	0	0
T105	8270	98	0	0
T129	17296	25	0	0
T130	13560	52	0	0
T131	17833	32	0	0
T132	10684	26	0	0
T133	6465	22	0	0
T134	30618	223	0	0

cmd_info_10_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	450404824	6257	0	0
T96	4863	24	0	0
T99	5423	55	0	0
T104	35303	122	0	0
T105	8270	56	0	0
T129	17296	37	0	0
T130	13560	30	0	0
T131	17833	30	0	0
T132	10684	43	0	0
T133	6465	25	0	0
T134	30618	166	0	0

cmd_info_11_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	450404824	6162	0	0
T96	4863	20	0	0
T99	5423	1	0	0
T104	35303	108	0	0
T105	8270	61	0	0
T129	17296	32	0	0
T130	13560	70	0	0
T131	17833	38	0	0
T132	10684	47	0	0
T133	6465	12	0	0
T134	30618	144	0	0

cmd_info_12_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	450404824	5726	0	0
T96	4863	28	0	0
T99	5423	22	0	0
T104	35303	113	0	0
T105	8270	56	0	0
T129	17296	8	0	0
T130	13560	16	0	0
T131	17833	25	0	0
T132	10684	40	0	0
T133	6465	12	0	0
T134	30618	162	0	0

cmd_info_13_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	450404824	6480	0	0
T96	4863	2	0	0
T99	5423	10	0	0
T104	35303	180	0	0
T105	8270	34	0	0
T129	17296	29	0	0
T130	13560	47	0	0
T131	17833	37	0	0
T132	10684	90	0	0
T133	6465	15	0	0
T134	30618	126	0	0

cmd_info_14_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	450404824	6903	0	0
T73	2676	2	0	0
T96	4863	5	0	0
T104	35303	171	0	0
T105	8270	109	0	0
T129	17296	26	0	0
T130	13560	41	0	0
T131	17833	51	0	0
T132	10684	55	0	0
T134	30618	71	0	0
T135	5860	4	0	0

cmd_info_15_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	450404824	6019	0	0
T73	2676	5	0	0
T99	5423	22	0	0
T104	35303	128	0	0
T105	8270	50	0	0
T129	17296	50	0	0
T130	13560	49	0	0
T131	17833	26	0	0
T132	10684	50	0	0
T134	30618	64	0	0
T135	5860	36	0	0

cmd_info_16_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	450404824	5871	0	0
T73	2676	1	0	0
T99	5423	37	0	0
T104	35303	107	0	0
T105	8270	103	0	0
T129	17296	49	0	0
T130	13560	46	0	0
T131	17833	14	0	0
T132	10684	58	0	0
T134	30618	145	0	0
T135	5860	37	0	0

cmd_info_17_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	450404824	6182	0	0
T96	4863	33	0	0
T104	35303	165	0	0
T105	8270	45	0	0
T129	17296	6	0	0
T130	13560	32	0	0
T131	17833	46	0	0
T132	10684	134	0	0
T133	6465	9	0	0
T134	30618	163	0	0
T135	5860	10	0	0

cmd_info_18_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	450404824	6582	0	0
T96	4863	16	0	0
T99	5423	28	0	0
T104	35303	139	0	0
T105	8270	120	0	0
T129	17296	37	0	0
T130	13560	71	0	0
T131	17833	34	0	0
T132	10684	53	0	0
T133	6465	33	0	0
T134	30618	156	0	0

cmd_info_19_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	450404824	6143	0	0
T93	21270	9	0	0
T104	35303	146	0	0
T105	8270	49	0	0
T129	17296	25	0	0
T130	13560	89	0	0
T131	17833	13	0	0
T132	10684	14	0	0
T133	6465	3	0	0
T134	30618	189	0	0
T135	5860	53	0	0

cmd_info_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	450404824	5962	0	0
T93	21270	3	0	0
T96	4863	30	0	0
T99	5423	20	0	0
T104	35303	154	0	0
T105	8270	48	0	0
T129	17296	32	0	0
T130	13560	68	0	0
T131	17833	62	0	0
T132	10684	64	0	0
T133	6465	9	0	0

cmd_info_20_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	450404824	5868	0	0
T96	4863	2	0	0
T99	5423	7	0	0
T104	35303	158	0	0
T105	8270	88	0	0
T129	17296	23	0	0
T130	13560	72	0	0
T131	17833	37	0	0
T132	10684	71	0	0
T134	30618	152	0	0
T135	5860	35	0	0

cmd_info_21_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	450404824	6044	0	0
T99	5423	35	0	0
T104	35303	170	0	0
T105	8270	125	0	0
T129	17296	31	0	0
T130	13560	16	0	0
T131	17833	20	0	0
T132	10684	84	0	0
T133	6465	14	0	0
T134	30618	131	0	0
T135	5860	31	0	0

cmd_info_22_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	450404824	5897	0	0
T94	8315	2	0	0
T96	4863	10	0	0
T99	5423	49	0	0
T104	35303	143	0	0
T105	8270	50	0	0
T129	17296	31	0	0
T130	13560	36	0	0
T131	17833	40	0	0
T132	10684	124	0	0
T133	6465	3	0	0

cmd_info_23_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	450404824	6051	0	0
T99	5423	30	0	0
T104	35303	145	0	0
T105	8270	6	0	0
T129	17296	26	0	0
T130	13560	70	0	0
T131	17833	49	0	0
T132	10684	16	0	0
T133	6465	26	0	0
T134	30618	147	0	0
T135	5860	50	0	0

cmd_info_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	450404824	6540	0	0
T96	4863	18	0	0
T99	5423	2	0	0
T104	35303	178	0	0
T105	8270	68	0	0
T129	17296	45	0	0
T130	13560	53	0	0
T131	17833	21	0	0
T132	10684	19	0	0
T134	30618	129	0	0
T135	5860	5	0	0

cmd_info_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	450404824	5928	0	0
T96	4863	36	0	0
T104	35303	139	0	0
T105	8270	15	0	0
T129	17296	44	0	0
T130	13560	36	0	0
T131	17833	34	0	0
T132	10684	98	0	0
T133	6465	21	0	0
T134	30618	192	0	0
T135	5860	9	0	0

cmd_info_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	450404824	6315	0	0
T96	4863	8	0	0
T99	5423	23	0	0
T104	35303	204	0	0
T105	8270	65	0	0
T129	17296	40	0	0
T130	13560	46	0	0
T131	17833	38	0	0
T132	10684	76	0	0
T133	6465	23	0	0
T134	30618	130	0	0

cmd_info_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	450404824	5818	0	0
T96	4863	3	0	0
T104	35303	162	0	0
T105	8270	41	0	0
T129	17296	22	0	0
T130	13560	33	0	0
T131	17833	48	0	0
T132	10684	52	0	0
T133	6465	30	0	0
T134	30618	117	0	0
T135	5860	36	0	0

cmd_info_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	450404824	5833	0	0
T96	4863	7	0	0
T99	5423	37	0	0
T104	35303	194	0	0
T105	8270	41	0	0
T129	17296	33	0	0
T130	13560	29	0	0
T131	17833	37	0	0
T132	10684	14	0	0
T133	6465	3	0	0
T134	30618	160	0	0

cmd_info_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	450404824	5793	0	0
T96	4863	17	0	0
T99	5423	2	0	0
T104	35303	132	0	0
T105	8270	104	0	0
T129	17296	29	0	0
T130	13560	22	0	0
T131	17833	39	0	0
T132	10684	38	0	0
T133	6465	19	0	0
T134	30618	198	0	0

cmd_info_8_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	450404824	5799	0	0
T96	4863	2	0	0
T99	5423	15	0	0
T104	35303	137	0	0
T105	8270	44	0	0
T129	17296	29	0	0
T130	13560	63	0	0
T131	17833	16	0	0
T132	10684	76	0	0
T133	6465	6	0	0
T134	30618	148	0	0

cmd_info_9_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	450404824	5416	0	0
T96	4863	9	0	0
T99	5423	35	0	0
T104	35303	104	0	0
T105	8270	109	0	0
T129	17296	44	0	0
T130	13560	21	0	0
T131	17833	3	0	0
T132	10684	11	0	0
T133	6465	1	0	0
T134	30618	122	0	0

cmd_info_en4b_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	450404824	3043	0	0
T99	5423	11	0	0
T104	35303	155	0	0
T105	8270	24	0	0
T129	17296	19	0	0
T130	13560	70	0	0
T131	17833	59	0	0
T132	10684	19	0	0
T133	6465	25	0	0
T134	30618	30	0	0
T135	5860	4	0	0

cmd_info_ex4b_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	450404824	3129	0	0
T99	5423	3	0	0
T104	35303	138	0	0
T105	8270	15	0	0
T129	17296	26	0	0
T130	13560	60	0	0
T131	17833	34	0	0
T132	10684	14	0	0
T133	6465	20	0	0
T134	30618	26	0	0
T135	5860	14	0	0

cmd_info_wrdi_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	450404824	2872	0	0
T94	8315	4	0	0
T96	4863	8	0	0
T99	5423	9	0	0
T104	35303	128	0	0
T105	8270	15	0	0
T129	17296	48	0	0
T130	13560	18	0	0
T131	17833	26	0	0
T132	10684	25	0	0
T133	6465	5	0	0

cmd_info_wren_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	450404824	2871	0	0
T96	4863	1	0	0
T104	35303	106	0	0
T105	8270	2	0	0
T129	17296	43	0	0
T130	13560	53	0	0
T131	17833	33	0	0
T132	10684	17	0	0
T133	6465	2	0	0
T134	30618	43	0	0
T135	5860	3	0	0

intercept_en_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	450404824	3494	0	0
T99	5423	16	0	0
T104	35303	112	0	0
T105	8270	21	0	0
T129	17296	26	0	0
T130	13560	44	0	0
T131	17833	16	0	0
T132	10684	17	0	0
T133	6465	9	0	0
T134	30618	80	0	0
T135	5860	4	0	0

intr_enable_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	450404824	5084	0	0
T8	341948	24	0	0
T9	566701	46	0	0
T10	11796	0	0	0
T11	741021	0	0	0
T12	366738	0	0	0
T13	47434	0	0	0
T14	13068	0	0	0
T17	0	21	0	0
T23	1191	0	0	0
T24	2986	0	0	0
T25	71836	0	0	0
T114	0	18	0	0
T116	0	20	0	0
T136	0	8	0	0
T137	0	13	0	0
T138	0	5	0	0
T139	0	24	0	0
T140	0	5	0	0

jedec_cc_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	450404824	2850	0	0
T96	4863	3	0	0
T99	5423	7	0	0
T104	35303	95	0	0
T105	8270	7	0	0
T129	17296	49	0	0
T130	13560	42	0	0
T131	17833	21	0	0
T132	10684	23	0	0
T133	6465	41	0	0
T134	30618	27	0	0

jedec_id_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	450404824	2876	0	0
T96	4863	10	0	0
T104	35303	117	0	0
T105	8270	12	0	0
T129	17296	58	0	0
T130	13560	46	0	0
T131	17833	8	0	0
T132	10684	21	0	0
T133	6465	23	0	0
T134	30618	27	0	0
T135	5860	12	0	0

mailbox_addr_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	450404824	2858	0	0
T96	4863	6	0	0
T99	5423	4	0	0
T104	35303	188	0	0
T105	8270	9	0	0
T129	17296	56	0	0
T130	13560	33	0	0
T131	17833	56	0	0
T132	10684	16	0	0
T133	6465	3	0	0
T134	30618	10	0	0

payload_swap_data_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	450404824	2768	0	0
T96	4863	3	0	0
T99	5423	3	0	0
T104	35303	129	0	0
T105	8270	16	0	0
T129	17296	49	0	0
T130	13560	49	0	0
T131	17833	12	0	0
T132	10684	22	0	0
T133	6465	10	0	0
T134	30618	16	0	0

payload_swap_mask_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	450404824	2616	0	0
T96	4863	5	0	0
T99	5423	9	0	0
T104	35303	163	0	0
T105	8270	4	0	0
T129	17296	17	0	0
T130	13560	19	0	0
T131	17833	62	0	0
T132	10684	17	0	0
T133	6465	9	0	0
T134	30618	2	0	0

read_threshold_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	450404824	2736	0	0
T93	21270	2	0	0
T96	4863	3	0	0
T99	5423	7	0	0
T104	35303	127	0	0
T105	8270	13	0	0
T129	17296	44	0	0
T130	13560	16	0	0
T131	17833	18	0	0
T132	10684	8	0	0
T134	30618	24	0	0

tpm_access_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	450404824	3496	0	0
T96	4863	4	0	0
T99	5423	5	0	0
T104	35303	145	0	0
T105	8270	12	0	0
T129	17296	28	0	0
T130	13560	28	0	0
T131	17833	42	0	0
T132	10684	27	0	0
T133	6465	16	0	0
T134	30618	47	0	0

tpm_access_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	450404824	2666	0	0
T96	4863	11	0	0
T104	35303	151	0	0
T105	8270	6	0	0
T129	17296	78	0	0
T130	13560	34	0	0
T131	17833	9	0	0
T132	10684	20	0	0
T133	6465	20	0	0
T134	30618	52	0	0
T135	5860	6	0	0

tpm_cfg_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	450404824	3759	0	0
T96	4863	5	0	0
T99	5423	12	0	0
T104	35303	150	0	0
T105	8270	5	0	0
T129	17296	8	0	0
T130	13560	27	0	0
T131	17833	26	0	0
T132	10684	34	0	0
T133	6465	13	0	0
T134	30618	49	0	0

tpm_did_vid_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	450404824	3072	0	0
T93	21270	3	0	0
T96	4863	1	0	0
T99	5423	4	0	0
T104	35303	170	0	0
T105	8270	19	0	0
T129	17296	15	0	0
T130	13560	63	0	0
T131	17833	38	0	0
T132	10684	21	0	0
T133	6465	13	0	0

tpm_int_enable_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	450404824	2710	0	0
T96	4863	7	0	0
T99	5423	1	0	0
T104	35303	108	0	0
T105	8270	14	0	0
T129	17296	26	0	0
T130	13560	13	0	0
T131	17833	40	0	0
T132	10684	17	0	0
T133	6465	23	0	0
T134	30618	26	0	0

tpm_int_status_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	450404824	2838	0	0
T96	4863	1	0	0
T99	5423	6	0	0
T104	35303	148	0	0
T105	8270	5	0	0
T129	17296	58	0	0
T130	13560	43	0	0
T131	17833	26	0	0
T132	10684	24	0	0
T133	6465	14	0	0
T134	30618	28	0	0

tpm_int_vector_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	450404824	2620	0	0
T94	8315	8	0	0
T99	5423	4	0	0
T104	35303	148	0	0
T105	8270	10	0	0
T129	17296	31	0	0
T130	13560	59	0	0
T131	17833	29	0	0
T132	10684	18	0	0
T133	6465	2	0	0
T134	30618	21	0	0

tpm_intf_capability_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	450404824	2812	0	0
T99	5423	4	0	0
T104	35303	160	0	0
T105	8270	4	0	0
T129	17296	29	0	0
T130	13560	71	0	0
T131	17833	63	0	0
T132	10684	17	0	0
T133	6465	6	0	0
T134	30618	28	0	0
T135	5860	10	0	0

tpm_rid_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	450404824	2672	0	0
T96	4863	8	0	0
T104	35303	173	0	0
T105	8270	6	0	0
T129	17296	54	0	0
T130	13560	9	0	0
T131	17833	59	0	0
T132	10684	24	0	0
T133	6465	2	0	0
T134	30618	5	0	0
T135	5860	14	0	0

tpm_sts_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	450404824	2697	0	0
T96	4863	6	0	0
T99	5423	10	0	0
T104	35303	138	0	0
T105	8270	4	0	0
T129	17296	14	0	0
T130	13560	44	0	0
T131	17833	18	0	0
T132	10684	28	0	0
T133	6465	26	0	0
T134	30618	19	0	0