| T304 |
/workspace/coverage/default/13.sram_ctrl_partial_access_b2b.3016208292 |
|
|
Apr 25 02:18:07 PM PDT 24 |
Apr 25 02:24:19 PM PDT 24 |
7457312289 ps |
| T305 |
/workspace/coverage/default/2.sram_ctrl_partial_access.260453522 |
|
|
Apr 25 02:16:15 PM PDT 24 |
Apr 25 02:17:39 PM PDT 24 |
5671460745 ps |
| T306 |
/workspace/coverage/default/33.sram_ctrl_mem_partial_access.2879656601 |
|
|
Apr 25 02:23:07 PM PDT 24 |
Apr 25 02:25:04 PM PDT 24 |
3368229981 ps |
| T307 |
/workspace/coverage/default/14.sram_ctrl_access_during_key_req.2953822857 |
|
|
Apr 25 02:18:14 PM PDT 24 |
Apr 25 02:34:48 PM PDT 24 |
14400055753 ps |
| T308 |
/workspace/coverage/default/0.sram_ctrl_partial_access_b2b.83738941 |
|
|
Apr 25 02:15:59 PM PDT 24 |
Apr 25 02:25:10 PM PDT 24 |
50704324070 ps |
| T309 |
/workspace/coverage/default/35.sram_ctrl_throughput_w_partial_write.3243376234 |
|
|
Apr 25 02:23:25 PM PDT 24 |
Apr 25 02:23:50 PM PDT 24 |
837012001 ps |
| T310 |
/workspace/coverage/default/24.sram_ctrl_lc_escalation.2862095490 |
|
|
Apr 25 02:20:53 PM PDT 24 |
Apr 25 02:21:53 PM PDT 24 |
10224498168 ps |
| T311 |
/workspace/coverage/default/8.sram_ctrl_access_during_key_req.1530237768 |
|
|
Apr 25 02:17:14 PM PDT 24 |
Apr 25 02:39:36 PM PDT 24 |
44438276181 ps |
| T312 |
/workspace/coverage/default/29.sram_ctrl_smoke.2579322340 |
|
|
Apr 25 02:21:51 PM PDT 24 |
Apr 25 02:21:57 PM PDT 24 |
1462030822 ps |
| T313 |
/workspace/coverage/default/11.sram_ctrl_multiple_keys.2878562019 |
|
|
Apr 25 02:17:46 PM PDT 24 |
Apr 25 02:40:54 PM PDT 24 |
76270343840 ps |
| T314 |
/workspace/coverage/default/48.sram_ctrl_partial_access.1522764391 |
|
|
Apr 25 02:27:35 PM PDT 24 |
Apr 25 02:27:42 PM PDT 24 |
479346411 ps |
| T315 |
/workspace/coverage/default/46.sram_ctrl_lc_escalation.115567707 |
|
|
Apr 25 02:27:22 PM PDT 24 |
Apr 25 02:28:17 PM PDT 24 |
17934557148 ps |
| T316 |
/workspace/coverage/default/1.sram_ctrl_ram_cfg.1460034082 |
|
|
Apr 25 02:16:07 PM PDT 24 |
Apr 25 02:16:11 PM PDT 24 |
362822385 ps |
| T317 |
/workspace/coverage/default/2.sram_ctrl_lc_escalation.3885617150 |
|
|
Apr 25 02:16:15 PM PDT 24 |
Apr 25 02:16:23 PM PDT 24 |
2578604464 ps |
| T318 |
/workspace/coverage/default/21.sram_ctrl_stress_all.1084269098 |
|
|
Apr 25 02:20:08 PM PDT 24 |
Apr 25 02:31:28 PM PDT 24 |
13703181144 ps |
| T319 |
/workspace/coverage/default/5.sram_ctrl_bijection.3332371238 |
|
|
Apr 25 02:16:39 PM PDT 24 |
Apr 25 02:59:02 PM PDT 24 |
158836456855 ps |
| T320 |
/workspace/coverage/default/17.sram_ctrl_access_during_key_req.1485425947 |
|
|
Apr 25 02:18:49 PM PDT 24 |
Apr 25 02:27:04 PM PDT 24 |
39039091119 ps |
| T321 |
/workspace/coverage/default/36.sram_ctrl_bijection.1945278266 |
|
|
Apr 25 02:23:32 PM PDT 24 |
Apr 25 02:42:13 PM PDT 24 |
66846765502 ps |
| T322 |
/workspace/coverage/default/5.sram_ctrl_ram_cfg.2847858882 |
|
|
Apr 25 02:16:45 PM PDT 24 |
Apr 25 02:16:49 PM PDT 24 |
1767097105 ps |
| T323 |
/workspace/coverage/default/45.sram_ctrl_stress_all.3524044492 |
|
|
Apr 25 02:26:47 PM PDT 24 |
Apr 25 03:03:26 PM PDT 24 |
99380376571 ps |
| T324 |
/workspace/coverage/default/35.sram_ctrl_partial_access.2275024828 |
|
|
Apr 25 02:23:25 PM PDT 24 |
Apr 25 02:23:34 PM PDT 24 |
2595153163 ps |
| T325 |
/workspace/coverage/default/49.sram_ctrl_stress_all.3470784947 |
|
|
Apr 25 02:28:07 PM PDT 24 |
Apr 25 03:51:47 PM PDT 24 |
159636417288 ps |
| T326 |
/workspace/coverage/default/27.sram_ctrl_bijection.1931334072 |
|
|
Apr 25 02:21:31 PM PDT 24 |
Apr 25 02:42:58 PM PDT 24 |
169324350957 ps |
| T327 |
/workspace/coverage/default/49.sram_ctrl_multiple_keys.705300759 |
|
|
Apr 25 02:27:53 PM PDT 24 |
Apr 25 02:49:37 PM PDT 24 |
24261542956 ps |
| T328 |
/workspace/coverage/default/33.sram_ctrl_regwen.2853356996 |
|
|
Apr 25 02:23:07 PM PDT 24 |
Apr 25 02:35:45 PM PDT 24 |
41848146971 ps |
| T329 |
/workspace/coverage/default/48.sram_ctrl_lc_escalation.2411216338 |
|
|
Apr 25 02:27:40 PM PDT 24 |
Apr 25 02:28:25 PM PDT 24 |
19513693819 ps |
| T330 |
/workspace/coverage/default/13.sram_ctrl_smoke.971780528 |
|
|
Apr 25 02:18:00 PM PDT 24 |
Apr 25 02:19:02 PM PDT 24 |
1681446018 ps |
| T331 |
/workspace/coverage/default/34.sram_ctrl_executable.601459355 |
|
|
Apr 25 02:23:18 PM PDT 24 |
Apr 25 02:38:27 PM PDT 24 |
21115241298 ps |
| T332 |
/workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.259129067 |
|
|
Apr 25 02:26:16 PM PDT 24 |
Apr 25 02:26:39 PM PDT 24 |
729832042 ps |
| T333 |
/workspace/coverage/default/6.sram_ctrl_lc_escalation.1783136212 |
|
|
Apr 25 02:16:50 PM PDT 24 |
Apr 25 02:17:30 PM PDT 24 |
61473871380 ps |
| T334 |
/workspace/coverage/default/16.sram_ctrl_stress_pipeline.3904563871 |
|
|
Apr 25 02:18:36 PM PDT 24 |
Apr 25 02:21:26 PM PDT 24 |
3044018596 ps |
| T335 |
/workspace/coverage/default/26.sram_ctrl_alert_test.2619269113 |
|
|
Apr 25 02:21:25 PM PDT 24 |
Apr 25 02:21:27 PM PDT 24 |
30149543 ps |
| T336 |
/workspace/coverage/default/35.sram_ctrl_bijection.3543115250 |
|
|
Apr 25 02:23:26 PM PDT 24 |
Apr 25 02:56:53 PM PDT 24 |
345551125838 ps |
| T337 |
/workspace/coverage/default/46.sram_ctrl_partial_access.1196238594 |
|
|
Apr 25 02:27:33 PM PDT 24 |
Apr 25 02:27:51 PM PDT 24 |
3241803306 ps |
| T338 |
/workspace/coverage/default/4.sram_ctrl_max_throughput.2683373319 |
|
|
Apr 25 02:16:34 PM PDT 24 |
Apr 25 02:17:24 PM PDT 24 |
2889460951 ps |
| T339 |
/workspace/coverage/default/4.sram_ctrl_access_during_key_req.36829604 |
|
|
Apr 25 02:16:31 PM PDT 24 |
Apr 25 02:28:50 PM PDT 24 |
21341970551 ps |
| T340 |
/workspace/coverage/default/39.sram_ctrl_lc_escalation.1446817184 |
|
|
Apr 25 02:24:37 PM PDT 24 |
Apr 25 02:25:44 PM PDT 24 |
41989811068 ps |
| T341 |
/workspace/coverage/default/25.sram_ctrl_partial_access_b2b.296209712 |
|
|
Apr 25 02:20:54 PM PDT 24 |
Apr 25 02:23:44 PM PDT 24 |
3254696862 ps |
| T342 |
/workspace/coverage/default/1.sram_ctrl_executable.2276852641 |
|
|
Apr 25 02:16:06 PM PDT 24 |
Apr 25 02:18:27 PM PDT 24 |
29568585155 ps |
| T343 |
/workspace/coverage/default/41.sram_ctrl_stress_pipeline.1140354747 |
|
|
Apr 25 02:25:22 PM PDT 24 |
Apr 25 02:28:00 PM PDT 24 |
2502301973 ps |
| T47 |
/workspace/coverage/default/5.sram_ctrl_stress_all_with_rand_reset.125081126 |
|
|
Apr 25 02:16:44 PM PDT 24 |
Apr 25 02:17:47 PM PDT 24 |
2171097645 ps |
| T344 |
/workspace/coverage/default/16.sram_ctrl_alert_test.2813385926 |
|
|
Apr 25 02:18:43 PM PDT 24 |
Apr 25 02:18:45 PM PDT 24 |
19054214 ps |
| T345 |
/workspace/coverage/default/0.sram_ctrl_stress_all_with_rand_reset.2795425432 |
|
|
Apr 25 02:16:00 PM PDT 24 |
Apr 25 02:16:30 PM PDT 24 |
4655867059 ps |
| T103 |
/workspace/coverage/default/2.sram_ctrl_stress_all_with_rand_reset.1762300134 |
|
|
Apr 25 02:16:22 PM PDT 24 |
Apr 25 02:16:36 PM PDT 24 |
1528449269 ps |
| T346 |
/workspace/coverage/default/16.sram_ctrl_smoke.3787535511 |
|
|
Apr 25 02:18:32 PM PDT 24 |
Apr 25 02:19:58 PM PDT 24 |
1241671142 ps |
| T347 |
/workspace/coverage/default/6.sram_ctrl_regwen.3751933502 |
|
|
Apr 25 02:16:56 PM PDT 24 |
Apr 25 02:37:08 PM PDT 24 |
16280404133 ps |
| T348 |
/workspace/coverage/default/4.sram_ctrl_ram_cfg.638738620 |
|
|
Apr 25 02:16:31 PM PDT 24 |
Apr 25 02:16:35 PM PDT 24 |
807559984 ps |
| T349 |
/workspace/coverage/default/16.sram_ctrl_mem_walk.982243960 |
|
|
Apr 25 02:18:44 PM PDT 24 |
Apr 25 02:22:45 PM PDT 24 |
4066783414 ps |
| T350 |
/workspace/coverage/default/39.sram_ctrl_multiple_keys.4111892422 |
|
|
Apr 25 02:24:25 PM PDT 24 |
Apr 25 02:36:21 PM PDT 24 |
41824163491 ps |
| T351 |
/workspace/coverage/default/26.sram_ctrl_access_during_key_req.1411461506 |
|
|
Apr 25 02:21:23 PM PDT 24 |
Apr 25 02:43:43 PM PDT 24 |
17003056836 ps |
| T352 |
/workspace/coverage/default/39.sram_ctrl_mem_partial_access.4057600210 |
|
|
Apr 25 02:24:43 PM PDT 24 |
Apr 25 02:25:55 PM PDT 24 |
10184623549 ps |
| T353 |
/workspace/coverage/default/30.sram_ctrl_stress_pipeline.468462482 |
|
|
Apr 25 02:22:18 PM PDT 24 |
Apr 25 02:27:47 PM PDT 24 |
13315704743 ps |
| T354 |
/workspace/coverage/default/15.sram_ctrl_smoke.2617128236 |
|
|
Apr 25 02:18:19 PM PDT 24 |
Apr 25 02:19:07 PM PDT 24 |
782903882 ps |
| T355 |
/workspace/coverage/default/45.sram_ctrl_executable.2612553658 |
|
|
Apr 25 02:26:41 PM PDT 24 |
Apr 25 02:36:37 PM PDT 24 |
56023235027 ps |
| T356 |
/workspace/coverage/default/29.sram_ctrl_stress_all_with_rand_reset.3449382511 |
|
|
Apr 25 02:22:10 PM PDT 24 |
Apr 25 02:22:34 PM PDT 24 |
5419573060 ps |
| T357 |
/workspace/coverage/default/13.sram_ctrl_ram_cfg.311551962 |
|
|
Apr 25 02:18:11 PM PDT 24 |
Apr 25 02:18:15 PM PDT 24 |
1529920103 ps |
| T358 |
/workspace/coverage/default/31.sram_ctrl_stress_all.3103813941 |
|
|
Apr 25 02:22:38 PM PDT 24 |
Apr 25 02:56:57 PM PDT 24 |
55306236261 ps |
| T359 |
/workspace/coverage/default/28.sram_ctrl_executable.1019628929 |
|
|
Apr 25 02:21:45 PM PDT 24 |
Apr 25 02:32:58 PM PDT 24 |
26642397904 ps |
| T360 |
/workspace/coverage/default/12.sram_ctrl_multiple_keys.3265441419 |
|
|
Apr 25 02:17:51 PM PDT 24 |
Apr 25 02:43:21 PM PDT 24 |
7406880391 ps |
| T361 |
/workspace/coverage/default/16.sram_ctrl_stress_all_with_rand_reset.2555660647 |
|
|
Apr 25 02:18:44 PM PDT 24 |
Apr 25 02:20:03 PM PDT 24 |
9611644400 ps |
| T362 |
/workspace/coverage/default/18.sram_ctrl_multiple_keys.377638897 |
|
|
Apr 25 02:18:58 PM PDT 24 |
Apr 25 02:24:23 PM PDT 24 |
67983340670 ps |
| T363 |
/workspace/coverage/default/36.sram_ctrl_partial_access.1908429272 |
|
|
Apr 25 02:23:38 PM PDT 24 |
Apr 25 02:23:54 PM PDT 24 |
1692521108 ps |
| T364 |
/workspace/coverage/default/15.sram_ctrl_partial_access_b2b.679787167 |
|
|
Apr 25 02:18:29 PM PDT 24 |
Apr 25 02:21:44 PM PDT 24 |
5368150002 ps |
| T365 |
/workspace/coverage/default/30.sram_ctrl_throughput_w_partial_write.1786522480 |
|
|
Apr 25 02:22:17 PM PDT 24 |
Apr 25 02:22:23 PM PDT 24 |
682870623 ps |
| T366 |
/workspace/coverage/default/44.sram_ctrl_mem_walk.3970934684 |
|
|
Apr 25 02:26:29 PM PDT 24 |
Apr 25 02:28:54 PM PDT 24 |
34439410055 ps |
| T367 |
/workspace/coverage/default/38.sram_ctrl_stress_all.3642039405 |
|
|
Apr 25 02:24:25 PM PDT 24 |
Apr 25 03:40:42 PM PDT 24 |
507030743750 ps |
| T368 |
/workspace/coverage/default/19.sram_ctrl_regwen.609414693 |
|
|
Apr 25 02:19:30 PM PDT 24 |
Apr 25 02:34:03 PM PDT 24 |
172725561560 ps |
| T369 |
/workspace/coverage/default/32.sram_ctrl_alert_test.1869561576 |
|
|
Apr 25 02:22:52 PM PDT 24 |
Apr 25 02:22:54 PM PDT 24 |
23863684 ps |
| T370 |
/workspace/coverage/default/26.sram_ctrl_smoke.3108094492 |
|
|
Apr 25 02:21:10 PM PDT 24 |
Apr 25 02:21:15 PM PDT 24 |
730356093 ps |
| T371 |
/workspace/coverage/default/28.sram_ctrl_stress_all_with_rand_reset.977264532 |
|
|
Apr 25 02:21:52 PM PDT 24 |
Apr 25 02:22:00 PM PDT 24 |
224415033 ps |
| T372 |
/workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.1706848663 |
|
|
Apr 25 02:27:25 PM PDT 24 |
Apr 25 02:29:40 PM PDT 24 |
1042708649 ps |
| T373 |
/workspace/coverage/default/19.sram_ctrl_lc_escalation.1270518685 |
|
|
Apr 25 02:19:21 PM PDT 24 |
Apr 25 02:21:20 PM PDT 24 |
88770771403 ps |
| T374 |
/workspace/coverage/default/7.sram_ctrl_max_throughput.3400217514 |
|
|
Apr 25 02:16:59 PM PDT 24 |
Apr 25 02:17:06 PM PDT 24 |
852639227 ps |
| T375 |
/workspace/coverage/default/35.sram_ctrl_multiple_keys.2574531939 |
|
|
Apr 25 02:23:26 PM PDT 24 |
Apr 25 02:45:21 PM PDT 24 |
10988702460 ps |
| T376 |
/workspace/coverage/default/22.sram_ctrl_max_throughput.127790546 |
|
|
Apr 25 02:20:10 PM PDT 24 |
Apr 25 02:22:38 PM PDT 24 |
1591326005 ps |
| T377 |
/workspace/coverage/default/31.sram_ctrl_partial_access.628838668 |
|
|
Apr 25 02:22:36 PM PDT 24 |
Apr 25 02:23:29 PM PDT 24 |
7901005320 ps |
| T378 |
/workspace/coverage/default/34.sram_ctrl_mem_partial_access.2035265691 |
|
|
Apr 25 02:23:18 PM PDT 24 |
Apr 25 02:24:22 PM PDT 24 |
995170312 ps |
| T379 |
/workspace/coverage/default/47.sram_ctrl_max_throughput.2146687976 |
|
|
Apr 25 02:27:15 PM PDT 24 |
Apr 25 02:27:35 PM PDT 24 |
722852880 ps |
| T380 |
/workspace/coverage/default/13.sram_ctrl_stress_pipeline.2785050135 |
|
|
Apr 25 02:18:07 PM PDT 24 |
Apr 25 02:21:14 PM PDT 24 |
27185118944 ps |
| T381 |
/workspace/coverage/default/49.sram_ctrl_partial_access_b2b.138796400 |
|
|
Apr 25 02:27:57 PM PDT 24 |
Apr 25 02:33:49 PM PDT 24 |
15404055522 ps |
| T382 |
/workspace/coverage/default/39.sram_ctrl_executable.779352372 |
|
|
Apr 25 02:24:38 PM PDT 24 |
Apr 25 02:34:50 PM PDT 24 |
55389723716 ps |
| T383 |
/workspace/coverage/default/5.sram_ctrl_partial_access_b2b.3683794565 |
|
|
Apr 25 02:16:37 PM PDT 24 |
Apr 25 02:21:08 PM PDT 24 |
40932659290 ps |
| T384 |
/workspace/coverage/default/14.sram_ctrl_partial_access.1300691610 |
|
|
Apr 25 02:18:15 PM PDT 24 |
Apr 25 02:18:25 PM PDT 24 |
1388290551 ps |
| T104 |
/workspace/coverage/default/35.sram_ctrl_stress_all_with_rand_reset.3709256429 |
|
|
Apr 25 02:23:32 PM PDT 24 |
Apr 25 02:25:52 PM PDT 24 |
1724447413 ps |
| T385 |
/workspace/coverage/default/19.sram_ctrl_alert_test.1915721975 |
|
|
Apr 25 02:19:30 PM PDT 24 |
Apr 25 02:19:32 PM PDT 24 |
14652672 ps |
| T386 |
/workspace/coverage/default/13.sram_ctrl_regwen.2105724096 |
|
|
Apr 25 02:18:07 PM PDT 24 |
Apr 25 02:27:43 PM PDT 24 |
11957062914 ps |
| T387 |
/workspace/coverage/default/3.sram_ctrl_max_throughput.3058981439 |
|
|
Apr 25 02:16:25 PM PDT 24 |
Apr 25 02:16:50 PM PDT 24 |
1439681771 ps |
| T388 |
/workspace/coverage/default/32.sram_ctrl_multiple_keys.3178325371 |
|
|
Apr 25 02:22:39 PM PDT 24 |
Apr 25 02:39:07 PM PDT 24 |
122617481412 ps |
| T389 |
/workspace/coverage/default/40.sram_ctrl_regwen.894428791 |
|
|
Apr 25 02:25:01 PM PDT 24 |
Apr 25 02:39:57 PM PDT 24 |
16317530749 ps |
| T390 |
/workspace/coverage/default/14.sram_ctrl_smoke.901374338 |
|
|
Apr 25 02:18:08 PM PDT 24 |
Apr 25 02:18:20 PM PDT 24 |
820975457 ps |
| T105 |
/workspace/coverage/default/27.sram_ctrl_stress_all_with_rand_reset.2968717582 |
|
|
Apr 25 02:21:39 PM PDT 24 |
Apr 25 02:21:54 PM PDT 24 |
4916020409 ps |
| T391 |
/workspace/coverage/default/17.sram_ctrl_ram_cfg.2273038634 |
|
|
Apr 25 02:18:52 PM PDT 24 |
Apr 25 02:18:56 PM PDT 24 |
1356287938 ps |
| T392 |
/workspace/coverage/default/21.sram_ctrl_mem_walk.2876153528 |
|
|
Apr 25 02:19:57 PM PDT 24 |
Apr 25 02:22:23 PM PDT 24 |
8956766012 ps |
| T393 |
/workspace/coverage/default/41.sram_ctrl_smoke.22038983 |
|
|
Apr 25 02:25:21 PM PDT 24 |
Apr 25 02:25:31 PM PDT 24 |
706042138 ps |
| T394 |
/workspace/coverage/default/33.sram_ctrl_partial_access_b2b.3183454136 |
|
|
Apr 25 02:22:57 PM PDT 24 |
Apr 25 02:27:14 PM PDT 24 |
13594428185 ps |
| T395 |
/workspace/coverage/default/10.sram_ctrl_stress_all.391194044 |
|
|
Apr 25 02:17:36 PM PDT 24 |
Apr 25 02:57:28 PM PDT 24 |
18435416341 ps |
| T396 |
/workspace/coverage/default/15.sram_ctrl_regwen.935067887 |
|
|
Apr 25 02:18:32 PM PDT 24 |
Apr 25 02:32:31 PM PDT 24 |
95682552633 ps |
| T397 |
/workspace/coverage/default/7.sram_ctrl_ram_cfg.2152125398 |
|
|
Apr 25 02:17:11 PM PDT 24 |
Apr 25 02:17:15 PM PDT 24 |
1311084658 ps |
| T398 |
/workspace/coverage/default/41.sram_ctrl_access_during_key_req.412255090 |
|
|
Apr 25 02:25:22 PM PDT 24 |
Apr 25 02:37:26 PM PDT 24 |
12990437716 ps |
| T399 |
/workspace/coverage/default/6.sram_ctrl_smoke.1553562864 |
|
|
Apr 25 02:16:44 PM PDT 24 |
Apr 25 02:17:03 PM PDT 24 |
1808780657 ps |
| T400 |
/workspace/coverage/default/39.sram_ctrl_stress_all_with_rand_reset.2061934713 |
|
|
Apr 25 02:24:41 PM PDT 24 |
Apr 25 02:26:46 PM PDT 24 |
1715323263 ps |
| T106 |
/workspace/coverage/default/14.sram_ctrl_stress_all_with_rand_reset.1559257947 |
|
|
Apr 25 02:18:19 PM PDT 24 |
Apr 25 02:18:27 PM PDT 24 |
226859983 ps |
| T401 |
/workspace/coverage/default/4.sram_ctrl_mem_walk.4286608840 |
|
|
Apr 25 02:16:41 PM PDT 24 |
Apr 25 02:18:41 PM PDT 24 |
10391887492 ps |
| T402 |
/workspace/coverage/default/23.sram_ctrl_partial_access.2107148999 |
|
|
Apr 25 02:20:18 PM PDT 24 |
Apr 25 02:20:53 PM PDT 24 |
899424303 ps |
| T403 |
/workspace/coverage/default/24.sram_ctrl_partial_access_b2b.1834876566 |
|
|
Apr 25 02:20:39 PM PDT 24 |
Apr 25 02:28:08 PM PDT 24 |
39610075786 ps |
| T404 |
/workspace/coverage/default/9.sram_ctrl_partial_access.410430638 |
|
|
Apr 25 02:17:23 PM PDT 24 |
Apr 25 02:18:56 PM PDT 24 |
2386347269 ps |
| T405 |
/workspace/coverage/default/44.sram_ctrl_stress_pipeline.1501910988 |
|
|
Apr 25 02:26:14 PM PDT 24 |
Apr 25 02:30:43 PM PDT 24 |
7413259267 ps |
| T406 |
/workspace/coverage/default/16.sram_ctrl_mem_partial_access.554075039 |
|
|
Apr 25 02:18:43 PM PDT 24 |
Apr 25 02:19:56 PM PDT 24 |
3123878367 ps |
| T407 |
/workspace/coverage/default/29.sram_ctrl_mem_walk.542349722 |
|
|
Apr 25 02:22:09 PM PDT 24 |
Apr 25 02:24:40 PM PDT 24 |
17919397709 ps |
| T408 |
/workspace/coverage/default/5.sram_ctrl_mem_walk.2412962286 |
|
|
Apr 25 02:16:44 PM PDT 24 |
Apr 25 02:19:12 PM PDT 24 |
10984375311 ps |
| T409 |
/workspace/coverage/default/4.sram_ctrl_throughput_w_partial_write.932682632 |
|
|
Apr 25 02:16:35 PM PDT 24 |
Apr 25 02:16:44 PM PDT 24 |
872061218 ps |
| T107 |
/workspace/coverage/default/25.sram_ctrl_stress_all_with_rand_reset.2787666769 |
|
|
Apr 25 02:21:09 PM PDT 24 |
Apr 25 02:21:20 PM PDT 24 |
686494999 ps |
| T410 |
/workspace/coverage/default/39.sram_ctrl_bijection.2977647817 |
|
|
Apr 25 02:24:31 PM PDT 24 |
Apr 25 02:56:43 PM PDT 24 |
112291382339 ps |
| T411 |
/workspace/coverage/default/45.sram_ctrl_lc_escalation.2535381091 |
|
|
Apr 25 02:26:41 PM PDT 24 |
Apr 25 02:27:26 PM PDT 24 |
32449919702 ps |
| T412 |
/workspace/coverage/default/43.sram_ctrl_regwen.2014490141 |
|
|
Apr 25 02:26:07 PM PDT 24 |
Apr 25 02:35:40 PM PDT 24 |
49506936479 ps |
| T413 |
/workspace/coverage/default/14.sram_ctrl_stress_pipeline.1669447760 |
|
|
Apr 25 02:18:13 PM PDT 24 |
Apr 25 02:24:17 PM PDT 24 |
21874033605 ps |
| T414 |
/workspace/coverage/default/3.sram_ctrl_throughput_w_partial_write.592968872 |
|
|
Apr 25 02:16:21 PM PDT 24 |
Apr 25 02:18:09 PM PDT 24 |
6523116254 ps |
| T415 |
/workspace/coverage/default/22.sram_ctrl_access_during_key_req.753804438 |
|
|
Apr 25 02:20:10 PM PDT 24 |
Apr 25 02:46:49 PM PDT 24 |
77081256098 ps |
| T416 |
/workspace/coverage/default/12.sram_ctrl_alert_test.2569765213 |
|
|
Apr 25 02:17:58 PM PDT 24 |
Apr 25 02:17:59 PM PDT 24 |
14524841 ps |
| T417 |
/workspace/coverage/default/2.sram_ctrl_mem_partial_access.2683935016 |
|
|
Apr 25 02:16:24 PM PDT 24 |
Apr 25 02:17:25 PM PDT 24 |
3801585668 ps |
| T108 |
/workspace/coverage/default/38.sram_ctrl_stress_all_with_rand_reset.2548237329 |
|
|
Apr 25 02:24:27 PM PDT 24 |
Apr 25 02:25:21 PM PDT 24 |
6923864422 ps |
| T418 |
/workspace/coverage/default/19.sram_ctrl_smoke.3480390994 |
|
|
Apr 25 02:19:14 PM PDT 24 |
Apr 25 02:20:14 PM PDT 24 |
1529872746 ps |
| T419 |
/workspace/coverage/default/7.sram_ctrl_stress_all.3544920070 |
|
|
Apr 25 02:17:08 PM PDT 24 |
Apr 25 03:13:32 PM PDT 24 |
187544927029 ps |
| T420 |
/workspace/coverage/default/36.sram_ctrl_regwen.1885662569 |
|
|
Apr 25 02:23:42 PM PDT 24 |
Apr 25 02:37:36 PM PDT 24 |
26262344339 ps |
| T421 |
/workspace/coverage/default/27.sram_ctrl_stress_pipeline.1755792493 |
|
|
Apr 25 02:21:30 PM PDT 24 |
Apr 25 02:26:23 PM PDT 24 |
4488536202 ps |
| T422 |
/workspace/coverage/default/6.sram_ctrl_bijection.1596530993 |
|
|
Apr 25 02:16:44 PM PDT 24 |
Apr 25 02:27:30 PM PDT 24 |
10715211334 ps |
| T423 |
/workspace/coverage/default/30.sram_ctrl_partial_access.3600039311 |
|
|
Apr 25 02:22:17 PM PDT 24 |
Apr 25 02:22:49 PM PDT 24 |
675460759 ps |
| T424 |
/workspace/coverage/default/25.sram_ctrl_stress_pipeline.1930973857 |
|
|
Apr 25 02:20:54 PM PDT 24 |
Apr 25 02:24:54 PM PDT 24 |
14145677250 ps |
| T425 |
/workspace/coverage/default/10.sram_ctrl_stress_all_with_rand_reset.1925764398 |
|
|
Apr 25 02:17:37 PM PDT 24 |
Apr 25 02:17:48 PM PDT 24 |
1309200162 ps |
| T426 |
/workspace/coverage/default/37.sram_ctrl_stress_all_with_rand_reset.165654026 |
|
|
Apr 25 02:24:07 PM PDT 24 |
Apr 25 02:25:04 PM PDT 24 |
1172162142 ps |
| T427 |
/workspace/coverage/default/14.sram_ctrl_ram_cfg.3968727818 |
|
|
Apr 25 02:18:15 PM PDT 24 |
Apr 25 02:18:19 PM PDT 24 |
723966446 ps |
| T428 |
/workspace/coverage/default/34.sram_ctrl_throughput_w_partial_write.2366033155 |
|
|
Apr 25 02:23:14 PM PDT 24 |
Apr 25 02:25:27 PM PDT 24 |
1603466157 ps |
| T429 |
/workspace/coverage/default/49.sram_ctrl_smoke.1594895995 |
|
|
Apr 25 02:27:50 PM PDT 24 |
Apr 25 02:29:40 PM PDT 24 |
907777650 ps |
| T430 |
/workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.3748037961 |
|
|
Apr 25 02:17:46 PM PDT 24 |
Apr 25 02:20:25 PM PDT 24 |
843310112 ps |
| T431 |
/workspace/coverage/default/1.sram_ctrl_mem_walk.2067141341 |
|
|
Apr 25 02:16:09 PM PDT 24 |
Apr 25 02:18:52 PM PDT 24 |
41370284846 ps |
| T432 |
/workspace/coverage/default/6.sram_ctrl_partial_access.1874951321 |
|
|
Apr 25 02:16:43 PM PDT 24 |
Apr 25 02:18:12 PM PDT 24 |
5224121291 ps |
| T433 |
/workspace/coverage/default/31.sram_ctrl_ram_cfg.2518572236 |
|
|
Apr 25 02:22:39 PM PDT 24 |
Apr 25 02:22:43 PM PDT 24 |
343054066 ps |
| T434 |
/workspace/coverage/default/38.sram_ctrl_throughput_w_partial_write.1232607965 |
|
|
Apr 25 02:24:21 PM PDT 24 |
Apr 25 02:24:35 PM PDT 24 |
2890123004 ps |
| T435 |
/workspace/coverage/default/48.sram_ctrl_ram_cfg.214018889 |
|
|
Apr 25 02:27:45 PM PDT 24 |
Apr 25 02:27:50 PM PDT 24 |
1458407554 ps |
| T436 |
/workspace/coverage/default/31.sram_ctrl_smoke.3694960353 |
|
|
Apr 25 02:22:24 PM PDT 24 |
Apr 25 02:25:16 PM PDT 24 |
2142117030 ps |
| T437 |
/workspace/coverage/default/32.sram_ctrl_partial_access_b2b.4294871474 |
|
|
Apr 25 02:22:44 PM PDT 24 |
Apr 25 02:28:23 PM PDT 24 |
41648428082 ps |
| T438 |
/workspace/coverage/default/19.sram_ctrl_partial_access_b2b.2040691388 |
|
|
Apr 25 02:19:21 PM PDT 24 |
Apr 25 02:24:46 PM PDT 24 |
75695303362 ps |
| T439 |
/workspace/coverage/default/32.sram_ctrl_access_during_key_req.1743049686 |
|
|
Apr 25 02:22:44 PM PDT 24 |
Apr 25 02:26:34 PM PDT 24 |
8393975772 ps |
| T440 |
/workspace/coverage/default/30.sram_ctrl_ram_cfg.2985078899 |
|
|
Apr 25 02:22:20 PM PDT 24 |
Apr 25 02:22:24 PM PDT 24 |
355827178 ps |
| T441 |
/workspace/coverage/default/37.sram_ctrl_mem_partial_access.2923925471 |
|
|
Apr 25 02:24:06 PM PDT 24 |
Apr 25 02:26:34 PM PDT 24 |
18188347314 ps |
| T442 |
/workspace/coverage/default/14.sram_ctrl_mem_walk.3823146674 |
|
|
Apr 25 02:18:13 PM PDT 24 |
Apr 25 02:23:10 PM PDT 24 |
20640266282 ps |
| T443 |
/workspace/coverage/default/32.sram_ctrl_stress_all_with_rand_reset.1157311355 |
|
|
Apr 25 02:22:52 PM PDT 24 |
Apr 25 02:23:39 PM PDT 24 |
6301267311 ps |
| T444 |
/workspace/coverage/default/36.sram_ctrl_mem_walk.2306000886 |
|
|
Apr 25 02:23:48 PM PDT 24 |
Apr 25 02:26:19 PM PDT 24 |
10549733844 ps |
| T445 |
/workspace/coverage/default/7.sram_ctrl_stress_all_with_rand_reset.683992063 |
|
|
Apr 25 02:17:07 PM PDT 24 |
Apr 25 02:17:15 PM PDT 24 |
272663816 ps |
| T446 |
/workspace/coverage/default/29.sram_ctrl_mem_partial_access.4197507545 |
|
|
Apr 25 02:22:21 PM PDT 24 |
Apr 25 02:24:24 PM PDT 24 |
3207899318 ps |
| T447 |
/workspace/coverage/default/8.sram_ctrl_mem_partial_access.3372589561 |
|
|
Apr 25 02:17:17 PM PDT 24 |
Apr 25 02:18:32 PM PDT 24 |
2535298580 ps |
| T448 |
/workspace/coverage/default/42.sram_ctrl_max_throughput.1825343235 |
|
|
Apr 25 02:25:41 PM PDT 24 |
Apr 25 02:26:27 PM PDT 24 |
5545944346 ps |
| T449 |
/workspace/coverage/default/21.sram_ctrl_access_during_key_req.224020265 |
|
|
Apr 25 02:19:55 PM PDT 24 |
Apr 25 02:30:01 PM PDT 24 |
102268193895 ps |
| T450 |
/workspace/coverage/default/22.sram_ctrl_mem_partial_access.3532387469 |
|
|
Apr 25 02:20:11 PM PDT 24 |
Apr 25 02:21:28 PM PDT 24 |
9397063265 ps |
| T451 |
/workspace/coverage/default/31.sram_ctrl_max_throughput.2483722933 |
|
|
Apr 25 02:22:41 PM PDT 24 |
Apr 25 02:24:49 PM PDT 24 |
784512711 ps |
| T452 |
/workspace/coverage/default/42.sram_ctrl_ram_cfg.1984808570 |
|
|
Apr 25 02:25:47 PM PDT 24 |
Apr 25 02:25:51 PM PDT 24 |
1422745998 ps |
| T453 |
/workspace/coverage/default/42.sram_ctrl_mem_walk.1192421847 |
|
|
Apr 25 02:25:46 PM PDT 24 |
Apr 25 02:27:45 PM PDT 24 |
7900142622 ps |
| T454 |
/workspace/coverage/default/30.sram_ctrl_regwen.1112050913 |
|
|
Apr 25 02:22:18 PM PDT 24 |
Apr 25 02:29:44 PM PDT 24 |
29175988727 ps |
| T455 |
/workspace/coverage/default/19.sram_ctrl_executable.516529128 |
|
|
Apr 25 02:19:28 PM PDT 24 |
Apr 25 02:24:55 PM PDT 24 |
31924987416 ps |
| T456 |
/workspace/coverage/default/13.sram_ctrl_mem_walk.1011785805 |
|
|
Apr 25 02:18:07 PM PDT 24 |
Apr 25 02:22:15 PM PDT 24 |
7886451149 ps |
| T457 |
/workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.3265054215 |
|
|
Apr 25 02:16:13 PM PDT 24 |
Apr 25 02:17:06 PM PDT 24 |
1762435633 ps |
| T458 |
/workspace/coverage/default/26.sram_ctrl_regwen.866744583 |
|
|
Apr 25 02:21:29 PM PDT 24 |
Apr 25 02:34:28 PM PDT 24 |
49553679630 ps |
| T459 |
/workspace/coverage/default/24.sram_ctrl_stress_all.2094057839 |
|
|
Apr 25 02:20:55 PM PDT 24 |
Apr 25 03:57:51 PM PDT 24 |
84095995671 ps |
| T460 |
/workspace/coverage/default/4.sram_ctrl_stress_all_with_rand_reset.3283100639 |
|
|
Apr 25 02:16:36 PM PDT 24 |
Apr 25 02:17:16 PM PDT 24 |
1575725165 ps |
| T461 |
/workspace/coverage/default/17.sram_ctrl_partial_access.884344926 |
|
|
Apr 25 02:18:51 PM PDT 24 |
Apr 25 02:18:56 PM PDT 24 |
362530491 ps |
| T462 |
/workspace/coverage/default/0.sram_ctrl_smoke.4064019861 |
|
|
Apr 25 02:15:53 PM PDT 24 |
Apr 25 02:16:30 PM PDT 24 |
2026628785 ps |
| T463 |
/workspace/coverage/default/32.sram_ctrl_throughput_w_partial_write.2415752995 |
|
|
Apr 25 02:22:45 PM PDT 24 |
Apr 25 02:24:44 PM PDT 24 |
1566269781 ps |
| T464 |
/workspace/coverage/default/43.sram_ctrl_alert_test.2120502064 |
|
|
Apr 25 02:26:08 PM PDT 24 |
Apr 25 02:26:09 PM PDT 24 |
16332269 ps |
| T465 |
/workspace/coverage/default/12.sram_ctrl_ram_cfg.2072626789 |
|
|
Apr 25 02:17:59 PM PDT 24 |
Apr 25 02:18:03 PM PDT 24 |
359635836 ps |
| T466 |
/workspace/coverage/default/20.sram_ctrl_max_throughput.2874771973 |
|
|
Apr 25 02:19:37 PM PDT 24 |
Apr 25 02:20:45 PM PDT 24 |
1535347050 ps |
| T467 |
/workspace/coverage/default/15.sram_ctrl_multiple_keys.1385974015 |
|
|
Apr 25 02:18:21 PM PDT 24 |
Apr 25 02:21:37 PM PDT 24 |
2418580667 ps |
| T468 |
/workspace/coverage/default/28.sram_ctrl_bijection.1491014458 |
|
|
Apr 25 02:21:38 PM PDT 24 |
Apr 25 02:44:42 PM PDT 24 |
249987010521 ps |
| T469 |
/workspace/coverage/default/22.sram_ctrl_throughput_w_partial_write.1709732203 |
|
|
Apr 25 02:20:10 PM PDT 24 |
Apr 25 02:22:10 PM PDT 24 |
3266420489 ps |
| T470 |
/workspace/coverage/default/22.sram_ctrl_stress_all.3461071138 |
|
|
Apr 25 02:20:09 PM PDT 24 |
Apr 25 02:56:13 PM PDT 24 |
43504229170 ps |
| T471 |
/workspace/coverage/default/13.sram_ctrl_stress_all_with_rand_reset.227601430 |
|
|
Apr 25 02:18:11 PM PDT 24 |
Apr 25 02:18:21 PM PDT 24 |
396369964 ps |
| T472 |
/workspace/coverage/default/8.sram_ctrl_max_throughput.4140336818 |
|
|
Apr 25 02:17:18 PM PDT 24 |
Apr 25 02:17:29 PM PDT 24 |
716091247 ps |
| T473 |
/workspace/coverage/default/3.sram_ctrl_regwen.3998911975 |
|
|
Apr 25 02:16:23 PM PDT 24 |
Apr 25 02:27:54 PM PDT 24 |
4040688282 ps |
| T474 |
/workspace/coverage/default/12.sram_ctrl_executable.3139824136 |
|
|
Apr 25 02:17:52 PM PDT 24 |
Apr 25 02:47:48 PM PDT 24 |
69538579865 ps |
| T475 |
/workspace/coverage/default/47.sram_ctrl_stress_pipeline.3180595903 |
|
|
Apr 25 02:27:24 PM PDT 24 |
Apr 25 02:30:12 PM PDT 24 |
9138183088 ps |
| T476 |
/workspace/coverage/default/46.sram_ctrl_alert_test.2512769950 |
|
|
Apr 25 02:27:33 PM PDT 24 |
Apr 25 02:27:34 PM PDT 24 |
11521750 ps |
| T477 |
/workspace/coverage/default/3.sram_ctrl_stress_all_with_rand_reset.2797091194 |
|
|
Apr 25 02:16:36 PM PDT 24 |
Apr 25 02:17:54 PM PDT 24 |
1355744894 ps |
| T478 |
/workspace/coverage/default/26.sram_ctrl_stress_pipeline.127133332 |
|
|
Apr 25 02:21:21 PM PDT 24 |
Apr 25 02:25:31 PM PDT 24 |
41946592628 ps |
| T479 |
/workspace/coverage/default/43.sram_ctrl_smoke.2931204857 |
|
|
Apr 25 02:25:54 PM PDT 24 |
Apr 25 02:26:14 PM PDT 24 |
549977245 ps |
| T480 |
/workspace/coverage/default/3.sram_ctrl_access_during_key_req.1465912845 |
|
|
Apr 25 02:16:23 PM PDT 24 |
Apr 25 02:19:31 PM PDT 24 |
7920300024 ps |
| T481 |
/workspace/coverage/default/20.sram_ctrl_mem_walk.4230695518 |
|
|
Apr 25 02:19:37 PM PDT 24 |
Apr 25 02:21:34 PM PDT 24 |
2061643419 ps |
| T482 |
/workspace/coverage/default/29.sram_ctrl_access_during_key_req.286314365 |
|
|
Apr 25 02:22:10 PM PDT 24 |
Apr 25 02:58:07 PM PDT 24 |
94157775559 ps |
| T483 |
/workspace/coverage/default/37.sram_ctrl_mem_walk.110589432 |
|
|
Apr 25 02:24:07 PM PDT 24 |
Apr 25 02:26:47 PM PDT 24 |
8972659640 ps |
| T484 |
/workspace/coverage/default/8.sram_ctrl_partial_access_b2b.48857625 |
|
|
Apr 25 02:17:15 PM PDT 24 |
Apr 25 02:26:14 PM PDT 24 |
65514503085 ps |
| T485 |
/workspace/coverage/default/12.sram_ctrl_stress_all_with_rand_reset.475840677 |
|
|
Apr 25 02:17:59 PM PDT 24 |
Apr 25 02:18:03 PM PDT 24 |
297911889 ps |
| T486 |
/workspace/coverage/default/20.sram_ctrl_multiple_keys.2269478596 |
|
|
Apr 25 02:19:27 PM PDT 24 |
Apr 25 02:22:44 PM PDT 24 |
15692865844 ps |
| T487 |
/workspace/coverage/default/24.sram_ctrl_max_throughput.2960877819 |
|
|
Apr 25 02:20:41 PM PDT 24 |
Apr 25 02:20:52 PM PDT 24 |
4538330618 ps |
| T488 |
/workspace/coverage/default/37.sram_ctrl_ram_cfg.4133981019 |
|
|
Apr 25 02:24:08 PM PDT 24 |
Apr 25 02:24:12 PM PDT 24 |
360779552 ps |
| T489 |
/workspace/coverage/default/38.sram_ctrl_ram_cfg.2170798969 |
|
|
Apr 25 02:24:24 PM PDT 24 |
Apr 25 02:24:28 PM PDT 24 |
347125820 ps |
| T490 |
/workspace/coverage/default/44.sram_ctrl_lc_escalation.1260404382 |
|
|
Apr 25 02:26:16 PM PDT 24 |
Apr 25 02:27:33 PM PDT 24 |
67938431590 ps |
| T491 |
/workspace/coverage/default/29.sram_ctrl_regwen.2269002551 |
|
|
Apr 25 02:22:08 PM PDT 24 |
Apr 25 02:38:39 PM PDT 24 |
14046224040 ps |
| T492 |
/workspace/coverage/default/45.sram_ctrl_stress_pipeline.2981444342 |
|
|
Apr 25 02:26:30 PM PDT 24 |
Apr 25 02:30:33 PM PDT 24 |
18533092789 ps |
| T493 |
/workspace/coverage/default/1.sram_ctrl_alert_test.3795778753 |
|
|
Apr 25 02:16:14 PM PDT 24 |
Apr 25 02:16:15 PM PDT 24 |
20606480 ps |
| T494 |
/workspace/coverage/default/34.sram_ctrl_stress_all_with_rand_reset.2488574922 |
|
|
Apr 25 02:23:20 PM PDT 24 |
Apr 25 02:23:39 PM PDT 24 |
2033882649 ps |
| T495 |
/workspace/coverage/default/6.sram_ctrl_mem_partial_access.37328872 |
|
|
Apr 25 02:16:51 PM PDT 24 |
Apr 25 02:18:50 PM PDT 24 |
6440356735 ps |
| T496 |
/workspace/coverage/default/1.sram_ctrl_partial_access.1747990962 |
|
|
Apr 25 02:16:07 PM PDT 24 |
Apr 25 02:16:31 PM PDT 24 |
6281551158 ps |
| T497 |
/workspace/coverage/default/17.sram_ctrl_max_throughput.2565763655 |
|
|
Apr 25 02:18:51 PM PDT 24 |
Apr 25 02:19:55 PM PDT 24 |
2943932565 ps |
| T498 |
/workspace/coverage/default/4.sram_ctrl_partial_access_b2b.818472160 |
|
|
Apr 25 02:16:35 PM PDT 24 |
Apr 25 02:22:18 PM PDT 24 |
12919067620 ps |
| T499 |
/workspace/coverage/default/40.sram_ctrl_partial_access.3638966203 |
|
|
Apr 25 02:24:56 PM PDT 24 |
Apr 25 02:26:57 PM PDT 24 |
8501794507 ps |
| T500 |
/workspace/coverage/default/36.sram_ctrl_smoke.2622643465 |
|
|
Apr 25 02:23:33 PM PDT 24 |
Apr 25 02:24:57 PM PDT 24 |
880393036 ps |
| T501 |
/workspace/coverage/default/20.sram_ctrl_access_during_key_req.2439383414 |
|
|
Apr 25 02:20:08 PM PDT 24 |
Apr 25 02:48:19 PM PDT 24 |
21522168516 ps |
| T502 |
/workspace/coverage/default/41.sram_ctrl_multiple_keys.900995035 |
|
|
Apr 25 02:25:17 PM PDT 24 |
Apr 25 02:32:37 PM PDT 24 |
7722413067 ps |
| T503 |
/workspace/coverage/default/37.sram_ctrl_lc_escalation.67650189 |
|
|
Apr 25 02:24:01 PM PDT 24 |
Apr 25 02:25:10 PM PDT 24 |
9837218315 ps |
| T504 |
/workspace/coverage/default/26.sram_ctrl_stress_all_with_rand_reset.3072666546 |
|
|
Apr 25 02:21:24 PM PDT 24 |
Apr 25 02:21:39 PM PDT 24 |
334422248 ps |
| T505 |
/workspace/coverage/default/27.sram_ctrl_max_throughput.2333995806 |
|
|
Apr 25 02:21:33 PM PDT 24 |
Apr 25 02:22:27 PM PDT 24 |
777695631 ps |
| T506 |
/workspace/coverage/default/24.sram_ctrl_bijection.2426369439 |
|
|
Apr 25 02:20:37 PM PDT 24 |
Apr 25 02:49:15 PM PDT 24 |
105669031018 ps |
| T507 |
/workspace/coverage/default/15.sram_ctrl_executable.431872666 |
|
|
Apr 25 02:18:28 PM PDT 24 |
Apr 25 02:24:08 PM PDT 24 |
7662266402 ps |
| T508 |
/workspace/coverage/default/49.sram_ctrl_bijection.3620969427 |
|
|
Apr 25 02:27:59 PM PDT 24 |
Apr 25 02:53:35 PM PDT 24 |
90486126729 ps |
| T509 |
/workspace/coverage/default/36.sram_ctrl_throughput_w_partial_write.2991883359 |
|
|
Apr 25 02:23:43 PM PDT 24 |
Apr 25 02:25:40 PM PDT 24 |
794872422 ps |
| T510 |
/workspace/coverage/default/14.sram_ctrl_mem_partial_access.2145513982 |
|
|
Apr 25 02:18:19 PM PDT 24 |
Apr 25 02:20:20 PM PDT 24 |
22061322217 ps |
| T511 |
/workspace/coverage/default/40.sram_ctrl_access_during_key_req.1569609987 |
|
|
Apr 25 02:25:01 PM PDT 24 |
Apr 25 03:01:31 PM PDT 24 |
104242565515 ps |
| T512 |
/workspace/coverage/default/37.sram_ctrl_partial_access.2770108783 |
|
|
Apr 25 02:23:54 PM PDT 24 |
Apr 25 02:24:05 PM PDT 24 |
3103176925 ps |
| T513 |
/workspace/coverage/default/12.sram_ctrl_mem_walk.3199995248 |
|
|
Apr 25 02:18:00 PM PDT 24 |
Apr 25 02:20:05 PM PDT 24 |
2000049156 ps |
| T514 |
/workspace/coverage/default/45.sram_ctrl_stress_all_with_rand_reset.2335345777 |
|
|
Apr 25 02:26:49 PM PDT 24 |
Apr 25 02:27:16 PM PDT 24 |
3615259765 ps |
| T515 |
/workspace/coverage/default/1.sram_ctrl_lc_escalation.4493918 |
|
|
Apr 25 02:16:12 PM PDT 24 |
Apr 25 02:17:15 PM PDT 24 |
8708734373 ps |
| T516 |
/workspace/coverage/default/11.sram_ctrl_partial_access_b2b.3684835506 |
|
|
Apr 25 02:17:46 PM PDT 24 |
Apr 25 02:28:22 PM PDT 24 |
448032953800 ps |
| T517 |
/workspace/coverage/default/36.sram_ctrl_stress_pipeline.3271683982 |
|
|
Apr 25 02:23:37 PM PDT 24 |
Apr 25 02:26:14 PM PDT 24 |
16280826186 ps |
| T518 |
/workspace/coverage/default/43.sram_ctrl_partial_access.2575496400 |
|
|
Apr 25 02:25:54 PM PDT 24 |
Apr 25 02:27:58 PM PDT 24 |
2911399713 ps |
| T519 |
/workspace/coverage/default/15.sram_ctrl_stress_all.1469910342 |
|
|
Apr 25 02:18:29 PM PDT 24 |
Apr 25 02:38:33 PM PDT 24 |
30674966759 ps |
| T520 |
/workspace/coverage/default/8.sram_ctrl_regwen.3601878098 |
|
|
Apr 25 02:17:13 PM PDT 24 |
Apr 25 02:21:15 PM PDT 24 |
54098358929 ps |
| T521 |
/workspace/coverage/default/13.sram_ctrl_executable.3279926618 |
|
|
Apr 25 02:18:07 PM PDT 24 |
Apr 25 02:41:01 PM PDT 24 |
25515470513 ps |
| T522 |
/workspace/coverage/default/5.sram_ctrl_multiple_keys.2470505915 |
|
|
Apr 25 02:16:41 PM PDT 24 |
Apr 25 02:27:16 PM PDT 24 |
11477052258 ps |
| T523 |
/workspace/coverage/default/23.sram_ctrl_regwen.71466444 |
|
|
Apr 25 02:20:23 PM PDT 24 |
Apr 25 02:27:50 PM PDT 24 |
3704900099 ps |
| T524 |
/workspace/coverage/default/48.sram_ctrl_bijection.3837283990 |
|
|
Apr 25 02:27:28 PM PDT 24 |
Apr 25 02:45:18 PM PDT 24 |
59972425556 ps |
| T525 |
/workspace/coverage/default/21.sram_ctrl_alert_test.1106252907 |
|
|
Apr 25 02:20:08 PM PDT 24 |
Apr 25 02:20:10 PM PDT 24 |
15057863 ps |
| T526 |
/workspace/coverage/default/33.sram_ctrl_stress_all.1084352682 |
|
|
Apr 25 02:23:05 PM PDT 24 |
Apr 25 04:23:06 PM PDT 24 |
105534941086 ps |
| T527 |
/workspace/coverage/default/12.sram_ctrl_regwen.2114861522 |
|
|
Apr 25 02:18:00 PM PDT 24 |
Apr 25 02:28:59 PM PDT 24 |
5352848839 ps |
| T528 |
/workspace/coverage/default/8.sram_ctrl_stress_all_with_rand_reset.1999138635 |
|
|
Apr 25 02:17:14 PM PDT 24 |
Apr 25 02:17:44 PM PDT 24 |
1086948865 ps |
| T529 |
/workspace/coverage/default/10.sram_ctrl_smoke.1691004557 |
|
|
Apr 25 02:17:29 PM PDT 24 |
Apr 25 02:17:52 PM PDT 24 |
2770454577 ps |
| T530 |
/workspace/coverage/default/10.sram_ctrl_mem_walk.171221269 |
|
|
Apr 25 02:17:36 PM PDT 24 |
Apr 25 02:19:51 PM PDT 24 |
12340256008 ps |
| T531 |
/workspace/coverage/default/10.sram_ctrl_executable.4204646364 |
|
|
Apr 25 02:17:37 PM PDT 24 |
Apr 25 02:25:36 PM PDT 24 |
9741610293 ps |
| T532 |
/workspace/coverage/default/18.sram_ctrl_max_throughput.990119034 |
|
|
Apr 25 02:19:06 PM PDT 24 |
Apr 25 02:19:44 PM PDT 24 |
719241026 ps |
| T533 |
/workspace/coverage/default/6.sram_ctrl_partial_access_b2b.1584181862 |
|
|
Apr 25 02:16:51 PM PDT 24 |
Apr 25 02:23:04 PM PDT 24 |
24872990077 ps |
| T534 |
/workspace/coverage/default/16.sram_ctrl_partial_access_b2b.544312694 |
|
|
Apr 25 02:18:34 PM PDT 24 |
Apr 25 02:24:54 PM PDT 24 |
60528555381 ps |
| T535 |
/workspace/coverage/default/18.sram_ctrl_executable.2702633976 |
|
|
Apr 25 02:19:05 PM PDT 24 |
Apr 25 02:26:22 PM PDT 24 |
7202776435 ps |
| T536 |
/workspace/coverage/default/30.sram_ctrl_partial_access_b2b.3065014495 |
|
|
Apr 25 02:22:17 PM PDT 24 |
Apr 25 02:29:09 PM PDT 24 |
10898811737 ps |
| T537 |
/workspace/coverage/default/32.sram_ctrl_mem_walk.1619145733 |
|
|
Apr 25 02:22:51 PM PDT 24 |
Apr 25 02:25:07 PM PDT 24 |
7192522359 ps |
| T538 |
/workspace/coverage/default/44.sram_ctrl_access_during_key_req.306019074 |
|
|
Apr 25 02:26:16 PM PDT 24 |
Apr 25 02:39:06 PM PDT 24 |
49494304982 ps |
| T539 |
/workspace/coverage/default/29.sram_ctrl_stress_all.1361171942 |
|
|
Apr 25 02:22:09 PM PDT 24 |
Apr 25 03:16:20 PM PDT 24 |
55037987316 ps |
| T540 |
/workspace/coverage/default/23.sram_ctrl_access_during_key_req.2830823529 |
|
|
Apr 25 02:20:25 PM PDT 24 |
Apr 25 02:31:45 PM PDT 24 |
10227222951 ps |
| T541 |
/workspace/coverage/default/30.sram_ctrl_stress_all_with_rand_reset.523321543 |
|
|
Apr 25 02:22:24 PM PDT 24 |
Apr 25 02:22:43 PM PDT 24 |
2765093234 ps |
| T542 |
/workspace/coverage/default/9.sram_ctrl_alert_test.980291339 |
|
|
Apr 25 02:17:30 PM PDT 24 |
Apr 25 02:17:32 PM PDT 24 |
180816416 ps |
| T543 |
/workspace/coverage/default/37.sram_ctrl_regwen.2147218019 |
|
|
Apr 25 02:24:21 PM PDT 24 |
Apr 25 02:29:27 PM PDT 24 |
17187023317 ps |
| T544 |
/workspace/coverage/default/40.sram_ctrl_stress_all.2366480597 |
|
|
Apr 25 02:25:13 PM PDT 24 |
Apr 25 03:57:14 PM PDT 24 |
323663980059 ps |
| T545 |
/workspace/coverage/default/2.sram_ctrl_multiple_keys.4276554710 |
|
|
Apr 25 02:16:12 PM PDT 24 |
Apr 25 02:18:46 PM PDT 24 |
34815592723 ps |
| T546 |
/workspace/coverage/default/26.sram_ctrl_multiple_keys.3709380155 |
|
|
Apr 25 02:21:22 PM PDT 24 |
Apr 25 02:43:24 PM PDT 24 |
11182817503 ps |