Tests
dashboard | hierarchy | modlist | groups | tests | asserts
Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
98.23 99.21 95.41 100.00 100.00 96.19 99.56 97.26


Total test records in report: 899
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html
T550 /workspace/coverage/default/41.sram_ctrl_smoke.1160222433 May 30 02:42:16 PM PDT 24 May 30 02:42:36 PM PDT 24 3500417907 ps
T551 /workspace/coverage/default/44.sram_ctrl_stress_pipeline.8847902 May 30 02:42:29 PM PDT 24 May 30 02:49:06 PM PDT 24 33098558195 ps
T552 /workspace/coverage/default/6.sram_ctrl_lc_escalation.503744108 May 30 02:39:18 PM PDT 24 May 30 02:40:05 PM PDT 24 7316742421 ps
T553 /workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.3232641592 May 30 02:39:18 PM PDT 24 May 30 02:39:39 PM PDT 24 3233627147 ps
T554 /workspace/coverage/default/38.sram_ctrl_stress_pipeline.62779932 May 30 02:41:45 PM PDT 24 May 30 02:48:27 PM PDT 24 9928774628 ps
T555 /workspace/coverage/default/39.sram_ctrl_throughput_w_partial_write.4291644433 May 30 02:41:58 PM PDT 24 May 30 02:42:14 PM PDT 24 707295563 ps
T556 /workspace/coverage/default/17.sram_ctrl_ram_cfg.4251436149 May 30 02:39:43 PM PDT 24 May 30 02:39:49 PM PDT 24 344178254 ps
T557 /workspace/coverage/default/4.sram_ctrl_multiple_keys.3374454994 May 30 02:39:13 PM PDT 24 May 30 02:47:01 PM PDT 24 8738893999 ps
T558 /workspace/coverage/default/46.sram_ctrl_max_throughput.169900154 May 30 02:42:50 PM PDT 24 May 30 02:43:00 PM PDT 24 3733615721 ps
T559 /workspace/coverage/default/31.sram_ctrl_partial_access.3828597961 May 30 02:40:44 PM PDT 24 May 30 02:43:33 PM PDT 24 1352956059 ps
T560 /workspace/coverage/default/40.sram_ctrl_partial_access.1631365731 May 30 02:41:57 PM PDT 24 May 30 02:42:20 PM PDT 24 2303862716 ps
T561 /workspace/coverage/default/48.sram_ctrl_bijection.1780367465 May 30 02:43:06 PM PDT 24 May 30 02:51:33 PM PDT 24 18313422960 ps
T562 /workspace/coverage/default/44.sram_ctrl_max_throughput.3814158554 May 30 02:42:29 PM PDT 24 May 30 02:42:59 PM PDT 24 742734482 ps
T563 /workspace/coverage/default/38.sram_ctrl_regwen.3392835693 May 30 02:41:43 PM PDT 24 May 30 02:59:00 PM PDT 24 14123770216 ps
T564 /workspace/coverage/default/30.sram_ctrl_stress_pipeline.2272426166 May 30 02:40:47 PM PDT 24 May 30 02:47:11 PM PDT 24 5675630502 ps
T565 /workspace/coverage/default/44.sram_ctrl_mem_partial_access.714403673 May 30 02:42:38 PM PDT 24 May 30 02:44:08 PM PDT 24 2572876567 ps
T566 /workspace/coverage/default/47.sram_ctrl_ram_cfg.3807669519 May 30 02:42:50 PM PDT 24 May 30 02:42:56 PM PDT 24 843785745 ps
T567 /workspace/coverage/default/16.sram_ctrl_bijection.24332083 May 30 02:39:45 PM PDT 24 May 30 03:28:00 PM PDT 24 799209087632 ps
T568 /workspace/coverage/default/10.sram_ctrl_mem_walk.3751603141 May 30 02:39:23 PM PDT 24 May 30 02:44:10 PM PDT 24 5255456642 ps
T569 /workspace/coverage/default/23.sram_ctrl_mem_walk.2116711806 May 30 02:39:53 PM PDT 24 May 30 02:45:21 PM PDT 24 14105285813 ps
T570 /workspace/coverage/default/28.sram_ctrl_throughput_w_partial_write.4003878078 May 30 02:40:31 PM PDT 24 May 30 02:40:59 PM PDT 24 2541014576 ps
T571 /workspace/coverage/default/36.sram_ctrl_partial_access_b2b.901195166 May 30 02:41:30 PM PDT 24 May 30 02:47:20 PM PDT 24 32021154637 ps
T572 /workspace/coverage/default/30.sram_ctrl_executable.1217075173 May 30 02:40:47 PM PDT 24 May 30 02:53:28 PM PDT 24 14075827849 ps
T573 /workspace/coverage/default/22.sram_ctrl_bijection.291528190 May 30 02:39:55 PM PDT 24 May 30 03:10:35 PM PDT 24 71603366261 ps
T574 /workspace/coverage/default/32.sram_ctrl_executable.3839897227 May 30 02:40:55 PM PDT 24 May 30 02:56:54 PM PDT 24 76754575387 ps
T575 /workspace/coverage/default/46.sram_ctrl_ram_cfg.350341046 May 30 02:42:50 PM PDT 24 May 30 02:42:55 PM PDT 24 1400116614 ps
T576 /workspace/coverage/default/46.sram_ctrl_partial_access.1736638888 May 30 02:42:55 PM PDT 24 May 30 02:43:19 PM PDT 24 3854215077 ps
T577 /workspace/coverage/default/11.sram_ctrl_alert_test.613284196 May 30 02:39:29 PM PDT 24 May 30 02:39:34 PM PDT 24 17657502 ps
T578 /workspace/coverage/default/9.sram_ctrl_max_throughput.2431336805 May 30 02:39:32 PM PDT 24 May 30 02:42:10 PM PDT 24 1478045035 ps
T579 /workspace/coverage/default/20.sram_ctrl_smoke.3752034368 May 30 02:39:41 PM PDT 24 May 30 02:40:39 PM PDT 24 1730728454 ps
T580 /workspace/coverage/default/19.sram_ctrl_alert_test.1409129475 May 30 02:39:49 PM PDT 24 May 30 02:39:54 PM PDT 24 13909268 ps
T581 /workspace/coverage/default/26.sram_ctrl_mem_walk.2751992759 May 30 02:40:22 PM PDT 24 May 30 02:43:03 PM PDT 24 10951876597 ps
T582 /workspace/coverage/default/26.sram_ctrl_lc_escalation.3297215303 May 30 02:40:24 PM PDT 24 May 30 02:41:12 PM PDT 24 6796190452 ps
T583 /workspace/coverage/default/20.sram_ctrl_multiple_keys.3410594668 May 30 02:39:48 PM PDT 24 May 30 02:52:26 PM PDT 24 7914531188 ps
T584 /workspace/coverage/default/27.sram_ctrl_bijection.3758344752 May 30 02:40:22 PM PDT 24 May 30 02:55:49 PM PDT 24 128197131050 ps
T585 /workspace/coverage/default/45.sram_ctrl_ram_cfg.2946044157 May 30 02:42:39 PM PDT 24 May 30 02:42:44 PM PDT 24 358502185 ps
T586 /workspace/coverage/default/9.sram_ctrl_ram_cfg.4116728413 May 30 02:39:21 PM PDT 24 May 30 02:39:30 PM PDT 24 349452007 ps
T587 /workspace/coverage/default/44.sram_ctrl_lc_escalation.2762851292 May 30 02:42:27 PM PDT 24 May 30 02:43:49 PM PDT 24 48421638720 ps
T588 /workspace/coverage/default/35.sram_ctrl_ram_cfg.1771844875 May 30 02:41:32 PM PDT 24 May 30 02:41:39 PM PDT 24 345558676 ps
T589 /workspace/coverage/default/6.sram_ctrl_executable.995233928 May 30 02:39:14 PM PDT 24 May 30 02:57:49 PM PDT 24 125365796681 ps
T590 /workspace/coverage/default/17.sram_ctrl_partial_access_b2b.1088894679 May 30 02:39:29 PM PDT 24 May 30 02:45:48 PM PDT 24 32662679853 ps
T591 /workspace/coverage/default/23.sram_ctrl_ram_cfg.285729909 May 30 02:39:56 PM PDT 24 May 30 02:40:03 PM PDT 24 689906998 ps
T592 /workspace/coverage/default/22.sram_ctrl_stress_all_with_rand_reset.1137007504 May 30 02:39:56 PM PDT 24 May 30 02:40:17 PM PDT 24 573634343 ps
T593 /workspace/coverage/default/42.sram_ctrl_regwen.2920629086 May 30 02:42:29 PM PDT 24 May 30 02:50:09 PM PDT 24 8908990627 ps
T594 /workspace/coverage/default/30.sram_ctrl_throughput_w_partial_write.978481092 May 30 02:40:46 PM PDT 24 May 30 02:42:24 PM PDT 24 1238892264 ps
T595 /workspace/coverage/default/25.sram_ctrl_smoke.3060230598 May 30 02:40:22 PM PDT 24 May 30 02:40:39 PM PDT 24 3133474775 ps
T596 /workspace/coverage/default/27.sram_ctrl_multiple_keys.3010832534 May 30 02:40:23 PM PDT 24 May 30 02:58:40 PM PDT 24 34747958512 ps
T597 /workspace/coverage/default/9.sram_ctrl_smoke.1487601653 May 30 02:39:16 PM PDT 24 May 30 02:39:41 PM PDT 24 2471536366 ps
T598 /workspace/coverage/default/40.sram_ctrl_max_throughput.2801022029 May 30 02:41:56 PM PDT 24 May 30 02:42:21 PM PDT 24 737676879 ps
T599 /workspace/coverage/default/46.sram_ctrl_mem_walk.1302285397 May 30 02:42:51 PM PDT 24 May 30 02:47:51 PM PDT 24 5257240071 ps
T600 /workspace/coverage/default/41.sram_ctrl_mem_partial_access.1889826387 May 30 02:42:15 PM PDT 24 May 30 02:44:51 PM PDT 24 19765020658 ps
T601 /workspace/coverage/default/7.sram_ctrl_bijection.2624124467 May 30 02:39:10 PM PDT 24 May 30 03:10:21 PM PDT 24 106953959941 ps
T602 /workspace/coverage/default/32.sram_ctrl_mem_partial_access.968810157 May 30 02:40:56 PM PDT 24 May 30 02:42:03 PM PDT 24 4016890043 ps
T603 /workspace/coverage/default/11.sram_ctrl_mem_walk.1608604583 May 30 02:39:27 PM PDT 24 May 30 02:41:36 PM PDT 24 7891474246 ps
T604 /workspace/coverage/default/17.sram_ctrl_smoke.3389036372 May 30 02:39:43 PM PDT 24 May 30 02:39:59 PM PDT 24 821536312 ps
T605 /workspace/coverage/default/38.sram_ctrl_alert_test.4106813245 May 30 02:41:45 PM PDT 24 May 30 02:41:52 PM PDT 24 159657771 ps
T606 /workspace/coverage/default/42.sram_ctrl_throughput_w_partial_write.101051673 May 30 02:42:17 PM PDT 24 May 30 02:44:50 PM PDT 24 6486860976 ps
T607 /workspace/coverage/default/46.sram_ctrl_smoke.3520383133 May 30 02:42:41 PM PDT 24 May 30 02:43:29 PM PDT 24 8070980265 ps
T608 /workspace/coverage/default/41.sram_ctrl_bijection.3199416771 May 30 02:42:15 PM PDT 24 May 30 02:51:59 PM PDT 24 8866202768 ps
T609 /workspace/coverage/default/18.sram_ctrl_mem_partial_access.3144081796 May 30 02:39:41 PM PDT 24 May 30 02:42:59 PM PDT 24 111156458567 ps
T610 /workspace/coverage/default/8.sram_ctrl_multiple_keys.3016013707 May 30 02:39:22 PM PDT 24 May 30 03:13:57 PM PDT 24 38877414405 ps
T611 /workspace/coverage/default/1.sram_ctrl_lc_escalation.20957034 May 30 02:38:54 PM PDT 24 May 30 02:40:04 PM PDT 24 68835807595 ps
T612 /workspace/coverage/default/2.sram_ctrl_regwen.649254149 May 30 02:39:08 PM PDT 24 May 30 02:56:28 PM PDT 24 17474324897 ps
T613 /workspace/coverage/default/18.sram_ctrl_mem_walk.3553715081 May 30 02:39:47 PM PDT 24 May 30 02:42:57 PM PDT 24 103406249945 ps
T614 /workspace/coverage/default/6.sram_ctrl_mem_walk.2504549720 May 30 02:39:17 PM PDT 24 May 30 02:42:22 PM PDT 24 33340115525 ps
T615 /workspace/coverage/default/19.sram_ctrl_lc_escalation.823917208 May 30 02:39:40 PM PDT 24 May 30 02:41:36 PM PDT 24 61193369116 ps
T616 /workspace/coverage/default/13.sram_ctrl_smoke.1332639737 May 30 02:39:25 PM PDT 24 May 30 02:39:49 PM PDT 24 956240287 ps
T617 /workspace/coverage/default/15.sram_ctrl_regwen.362491034 May 30 02:39:32 PM PDT 24 May 30 02:59:26 PM PDT 24 29993079717 ps
T618 /workspace/coverage/default/49.sram_ctrl_multiple_keys.3413095649 May 30 02:43:03 PM PDT 24 May 30 02:44:42 PM PDT 24 2884409684 ps
T619 /workspace/coverage/default/27.sram_ctrl_alert_test.2673295746 May 30 02:40:32 PM PDT 24 May 30 02:40:40 PM PDT 24 16101056 ps
T620 /workspace/coverage/default/0.sram_ctrl_stress_pipeline.1686874579 May 30 02:38:57 PM PDT 24 May 30 02:43:53 PM PDT 24 6053401188 ps
T621 /workspace/coverage/default/32.sram_ctrl_stress_pipeline.1766934418 May 30 02:40:55 PM PDT 24 May 30 02:47:20 PM PDT 24 7935245479 ps
T622 /workspace/coverage/default/1.sram_ctrl_max_throughput.1453861053 May 30 02:38:59 PM PDT 24 May 30 02:39:50 PM PDT 24 1483129134 ps
T623 /workspace/coverage/default/46.sram_ctrl_regwen.540772222 May 30 02:42:53 PM PDT 24 May 30 03:05:08 PM PDT 24 12285356585 ps
T624 /workspace/coverage/default/19.sram_ctrl_throughput_w_partial_write.882836378 May 30 02:39:43 PM PDT 24 May 30 02:40:45 PM PDT 24 3370554814 ps
T625 /workspace/coverage/default/30.sram_ctrl_partial_access_b2b.2896932015 May 30 02:40:42 PM PDT 24 May 30 02:45:29 PM PDT 24 23105029652 ps
T626 /workspace/coverage/default/31.sram_ctrl_stress_pipeline.1286345944 May 30 02:40:48 PM PDT 24 May 30 02:43:53 PM PDT 24 3962723753 ps
T627 /workspace/coverage/default/36.sram_ctrl_mem_walk.3896299035 May 30 02:41:31 PM PDT 24 May 30 02:46:26 PM PDT 24 7295173913 ps
T628 /workspace/coverage/default/32.sram_ctrl_throughput_w_partial_write.74837272 May 30 02:40:55 PM PDT 24 May 30 02:43:23 PM PDT 24 3255506688 ps
T629 /workspace/coverage/default/47.sram_ctrl_regwen.1051608620 May 30 02:42:52 PM PDT 24 May 30 02:49:09 PM PDT 24 4550946129 ps
T630 /workspace/coverage/default/36.sram_ctrl_ram_cfg.1888734123 May 30 02:41:28 PM PDT 24 May 30 02:41:34 PM PDT 24 921465166 ps
T631 /workspace/coverage/default/15.sram_ctrl_partial_access_b2b.2322153627 May 30 02:39:32 PM PDT 24 May 30 02:43:07 PM PDT 24 10347267064 ps
T632 /workspace/coverage/default/47.sram_ctrl_max_throughput.4276125125 May 30 02:42:50 PM PDT 24 May 30 02:45:19 PM PDT 24 6962149254 ps
T633 /workspace/coverage/default/38.sram_ctrl_throughput_w_partial_write.1695534978 May 30 02:41:46 PM PDT 24 May 30 02:44:22 PM PDT 24 1595505127 ps
T634 /workspace/coverage/default/37.sram_ctrl_alert_test.668548799 May 30 02:41:44 PM PDT 24 May 30 02:41:51 PM PDT 24 15051517 ps
T635 /workspace/coverage/default/10.sram_ctrl_partial_access_b2b.1632891650 May 30 02:39:23 PM PDT 24 May 30 02:48:03 PM PDT 24 22356785382 ps
T636 /workspace/coverage/default/31.sram_ctrl_executable.3947169582 May 30 02:40:59 PM PDT 24 May 30 03:07:02 PM PDT 24 28308934508 ps
T637 /workspace/coverage/default/17.sram_ctrl_executable.1773776208 May 30 02:39:29 PM PDT 24 May 30 03:05:13 PM PDT 24 21593237204 ps
T638 /workspace/coverage/default/1.sram_ctrl_mem_partial_access.1563173179 May 30 02:38:57 PM PDT 24 May 30 02:40:05 PM PDT 24 9583292216 ps
T639 /workspace/coverage/default/20.sram_ctrl_mem_walk.1390748080 May 30 02:39:50 PM PDT 24 May 30 02:42:23 PM PDT 24 6114731422 ps
T640 /workspace/coverage/default/7.sram_ctrl_regwen.3833987783 May 30 02:39:19 PM PDT 24 May 30 02:56:29 PM PDT 24 13369055367 ps
T641 /workspace/coverage/default/10.sram_ctrl_ram_cfg.1039196636 May 30 02:39:21 PM PDT 24 May 30 02:39:30 PM PDT 24 3040460975 ps
T642 /workspace/coverage/default/4.sram_ctrl_regwen.3823265567 May 30 02:39:12 PM PDT 24 May 30 02:45:18 PM PDT 24 7406165810 ps
T643 /workspace/coverage/default/29.sram_ctrl_ram_cfg.4089071368 May 30 02:40:44 PM PDT 24 May 30 02:40:53 PM PDT 24 1407432890 ps
T644 /workspace/coverage/default/19.sram_ctrl_mem_walk.1696899076 May 30 02:39:49 PM PDT 24 May 30 02:42:01 PM PDT 24 7891827712 ps
T645 /workspace/coverage/default/47.sram_ctrl_mem_walk.3129161675 May 30 02:43:06 PM PDT 24 May 30 02:48:19 PM PDT 24 28210002055 ps
T646 /workspace/coverage/default/34.sram_ctrl_smoke.3287461937 May 30 02:41:09 PM PDT 24 May 30 02:41:22 PM PDT 24 954405092 ps
T647 /workspace/coverage/default/13.sram_ctrl_alert_test.714793040 May 30 02:39:45 PM PDT 24 May 30 02:39:50 PM PDT 24 11611253 ps
T648 /workspace/coverage/default/14.sram_ctrl_regwen.3093479363 May 30 02:39:30 PM PDT 24 May 30 02:49:54 PM PDT 24 27410741495 ps
T649 /workspace/coverage/default/3.sram_ctrl_partial_access_b2b.144577388 May 30 02:39:11 PM PDT 24 May 30 02:47:37 PM PDT 24 19606393392 ps
T650 /workspace/coverage/default/19.sram_ctrl_multiple_keys.3689554309 May 30 02:39:48 PM PDT 24 May 30 02:56:39 PM PDT 24 62898382944 ps
T651 /workspace/coverage/default/44.sram_ctrl_bijection.1590564498 May 30 02:42:28 PM PDT 24 May 30 03:18:41 PM PDT 24 234904500664 ps
T652 /workspace/coverage/default/45.sram_ctrl_mem_partial_access.1562046000 May 30 02:42:47 PM PDT 24 May 30 02:43:57 PM PDT 24 1387603572 ps
T653 /workspace/coverage/default/18.sram_ctrl_alert_test.837898473 May 30 02:39:38 PM PDT 24 May 30 02:39:41 PM PDT 24 110326711 ps
T654 /workspace/coverage/default/28.sram_ctrl_regwen.4092332408 May 30 02:40:31 PM PDT 24 May 30 02:46:48 PM PDT 24 103150745716 ps
T655 /workspace/coverage/default/37.sram_ctrl_smoke.2362466288 May 30 02:41:31 PM PDT 24 May 30 02:41:44 PM PDT 24 2436175088 ps
T656 /workspace/coverage/default/21.sram_ctrl_partial_access.2652387832 May 30 02:39:55 PM PDT 24 May 30 02:40:40 PM PDT 24 757971884 ps
T657 /workspace/coverage/default/31.sram_ctrl_max_throughput.1648203622 May 30 02:40:45 PM PDT 24 May 30 02:41:29 PM PDT 24 747165583 ps
T658 /workspace/coverage/default/42.sram_ctrl_alert_test.2237121649 May 30 02:42:31 PM PDT 24 May 30 02:42:34 PM PDT 24 15743118 ps
T659 /workspace/coverage/default/5.sram_ctrl_mem_partial_access.3741429037 May 30 02:39:14 PM PDT 24 May 30 02:42:01 PM PDT 24 5349346909 ps
T660 /workspace/coverage/default/19.sram_ctrl_partial_access_b2b.480350161 May 30 02:39:50 PM PDT 24 May 30 02:48:27 PM PDT 24 7531138214 ps
T661 /workspace/coverage/default/26.sram_ctrl_max_throughput.2021482982 May 30 02:40:22 PM PDT 24 May 30 02:40:37 PM PDT 24 4476775839 ps
T662 /workspace/coverage/default/42.sram_ctrl_stress_all_with_rand_reset.3860132000 May 30 02:42:28 PM PDT 24 May 30 02:43:07 PM PDT 24 3331728656 ps
T663 /workspace/coverage/default/3.sram_ctrl_max_throughput.2154010476 May 30 02:39:12 PM PDT 24 May 30 02:41:38 PM PDT 24 3192447645 ps
T664 /workspace/coverage/default/25.sram_ctrl_bijection.242479255 May 30 02:40:22 PM PDT 24 May 30 03:13:09 PM PDT 24 32133108513 ps
T665 /workspace/coverage/default/41.sram_ctrl_ram_cfg.2043953074 May 30 02:42:16 PM PDT 24 May 30 02:42:21 PM PDT 24 1344576316 ps
T666 /workspace/coverage/default/31.sram_ctrl_throughput_w_partial_write.3390414220 May 30 02:40:45 PM PDT 24 May 30 02:40:58 PM PDT 24 724212364 ps
T667 /workspace/coverage/default/5.sram_ctrl_ram_cfg.537394203 May 30 02:39:14 PM PDT 24 May 30 02:39:21 PM PDT 24 1061068673 ps
T668 /workspace/coverage/default/35.sram_ctrl_multiple_keys.1700200510 May 30 02:41:18 PM PDT 24 May 30 02:52:54 PM PDT 24 15201694367 ps
T669 /workspace/coverage/default/33.sram_ctrl_multiple_keys.1757165229 May 30 02:41:14 PM PDT 24 May 30 02:49:19 PM PDT 24 12128021382 ps
T670 /workspace/coverage/default/3.sram_ctrl_mem_partial_access.2931426108 May 30 02:39:09 PM PDT 24 May 30 02:40:26 PM PDT 24 2785736592 ps
T671 /workspace/coverage/default/0.sram_ctrl_partial_access.1993316756 May 30 02:39:00 PM PDT 24 May 30 02:39:28 PM PDT 24 5568377517 ps
T672 /workspace/coverage/default/23.sram_ctrl_bijection.847279638 May 30 02:39:52 PM PDT 24 May 30 02:55:03 PM PDT 24 255595239440 ps
T673 /workspace/coverage/default/8.sram_ctrl_executable.2212341226 May 30 02:39:21 PM PDT 24 May 30 02:45:15 PM PDT 24 15612600165 ps
T674 /workspace/coverage/default/2.sram_ctrl_mem_walk.1192291916 May 30 02:39:07 PM PDT 24 May 30 02:42:04 PM PDT 24 22979690938 ps
T675 /workspace/coverage/default/19.sram_ctrl_mem_partial_access.1973219293 May 30 02:39:47 PM PDT 24 May 30 02:41:04 PM PDT 24 5534185567 ps
T676 /workspace/coverage/default/42.sram_ctrl_executable.347935981 May 30 02:42:28 PM PDT 24 May 30 02:57:32 PM PDT 24 50183891234 ps
T677 /workspace/coverage/default/42.sram_ctrl_max_throughput.2249859356 May 30 02:42:15 PM PDT 24 May 30 02:42:37 PM PDT 24 736851079 ps
T678 /workspace/coverage/default/8.sram_ctrl_bijection.3049421656 May 30 02:39:13 PM PDT 24 May 30 03:14:16 PM PDT 24 144560533130 ps
T679 /workspace/coverage/default/13.sram_ctrl_ram_cfg.2828778760 May 30 02:39:40 PM PDT 24 May 30 02:39:47 PM PDT 24 365215355 ps
T680 /workspace/coverage/default/39.sram_ctrl_smoke.3608054653 May 30 02:41:46 PM PDT 24 May 30 02:43:17 PM PDT 24 3411646897 ps
T681 /workspace/coverage/default/3.sram_ctrl_bijection.606600632 May 30 02:39:10 PM PDT 24 May 30 03:21:35 PM PDT 24 290256105395 ps
T682 /workspace/coverage/default/10.sram_ctrl_regwen.3841766848 May 30 02:39:21 PM PDT 24 May 30 02:42:55 PM PDT 24 13406175884 ps
T683 /workspace/coverage/default/2.sram_ctrl_stress_pipeline.2309469170 May 30 02:39:14 PM PDT 24 May 30 02:43:13 PM PDT 24 4789614440 ps
T684 /workspace/coverage/default/9.sram_ctrl_regwen.538407405 May 30 02:39:18 PM PDT 24 May 30 02:51:34 PM PDT 24 70261948766 ps
T685 /workspace/coverage/default/7.sram_ctrl_stress_pipeline.1505782954 May 30 02:39:14 PM PDT 24 May 30 02:43:11 PM PDT 24 35563752978 ps
T686 /workspace/coverage/default/0.sram_ctrl_bijection.94384197 May 30 02:39:01 PM PDT 24 May 30 03:07:27 PM PDT 24 26647581073 ps
T687 /workspace/coverage/default/47.sram_ctrl_alert_test.3735076148 May 30 02:43:05 PM PDT 24 May 30 02:43:08 PM PDT 24 28049409 ps
T688 /workspace/coverage/default/0.sram_ctrl_stress_all_with_rand_reset.2486881710 May 30 02:38:56 PM PDT 24 May 30 02:39:13 PM PDT 24 1725692517 ps
T689 /workspace/coverage/default/21.sram_ctrl_mem_partial_access.1349904069 May 30 02:39:49 PM PDT 24 May 30 02:42:07 PM PDT 24 1998266571 ps
T690 /workspace/coverage/default/31.sram_ctrl_partial_access_b2b.3577793294 May 30 02:40:42 PM PDT 24 May 30 02:45:25 PM PDT 24 27659808427 ps
T691 /workspace/coverage/default/31.sram_ctrl_smoke.3949908433 May 30 02:40:46 PM PDT 24 May 30 02:41:06 PM PDT 24 1646329026 ps
T692 /workspace/coverage/default/2.sram_ctrl_multiple_keys.1857017625 May 30 02:38:58 PM PDT 24 May 30 02:49:08 PM PDT 24 13796761986 ps
T693 /workspace/coverage/default/22.sram_ctrl_max_throughput.1630484313 May 30 02:39:58 PM PDT 24 May 30 02:41:57 PM PDT 24 2607746523 ps
T694 /workspace/coverage/default/44.sram_ctrl_mem_walk.2926888131 May 30 02:42:38 PM PDT 24 May 30 02:45:12 PM PDT 24 16445540773 ps
T695 /workspace/coverage/default/32.sram_ctrl_alert_test.2169256780 May 30 02:41:07 PM PDT 24 May 30 02:41:10 PM PDT 24 127297012 ps
T696 /workspace/coverage/default/18.sram_ctrl_smoke.4290499702 May 30 02:39:46 PM PDT 24 May 30 02:40:08 PM PDT 24 6295865642 ps
T697 /workspace/coverage/default/1.sram_ctrl_stress_pipeline.3697054695 May 30 02:39:07 PM PDT 24 May 30 02:43:00 PM PDT 24 9843767161 ps
T698 /workspace/coverage/default/41.sram_ctrl_throughput_w_partial_write.434655249 May 30 02:42:15 PM PDT 24 May 30 02:42:34 PM PDT 24 736622639 ps
T699 /workspace/coverage/default/48.sram_ctrl_regwen.1259407125 May 30 02:43:03 PM PDT 24 May 30 02:48:00 PM PDT 24 1806002953 ps
T700 /workspace/coverage/default/19.sram_ctrl_ram_cfg.1439339281 May 30 02:39:49 PM PDT 24 May 30 02:39:56 PM PDT 24 455099061 ps
T701 /workspace/coverage/default/22.sram_ctrl_partial_access.2828083161 May 30 02:39:57 PM PDT 24 May 30 02:40:13 PM PDT 24 459162282 ps
T702 /workspace/coverage/default/9.sram_ctrl_multiple_keys.3269404595 May 30 02:39:21 PM PDT 24 May 30 02:54:15 PM PDT 24 5404927886 ps
T703 /workspace/coverage/default/47.sram_ctrl_partial_access_b2b.3794497191 May 30 02:42:51 PM PDT 24 May 30 02:46:57 PM PDT 24 5691760024 ps
T704 /workspace/coverage/default/44.sram_ctrl_partial_access.2049126693 May 30 02:42:28 PM PDT 24 May 30 02:44:48 PM PDT 24 4178588923 ps
T705 /workspace/coverage/default/2.sram_ctrl_executable.2564395122 May 30 02:39:09 PM PDT 24 May 30 02:40:01 PM PDT 24 3832237710 ps
T706 /workspace/coverage/default/14.sram_ctrl_smoke.1631790554 May 30 02:39:38 PM PDT 24 May 30 02:42:13 PM PDT 24 927605813 ps
T707 /workspace/coverage/default/49.sram_ctrl_alert_test.2811689948 May 30 02:43:16 PM PDT 24 May 30 02:43:18 PM PDT 24 15206351 ps
T708 /workspace/coverage/default/20.sram_ctrl_executable.4098156433 May 30 02:39:41 PM PDT 24 May 30 03:13:25 PM PDT 24 200110653612 ps
T709 /workspace/coverage/default/13.sram_ctrl_partial_access.1023789641 May 30 02:39:23 PM PDT 24 May 30 02:40:13 PM PDT 24 1412146921 ps
T710 /workspace/coverage/default/10.sram_ctrl_stress_pipeline.4277043523 May 30 02:39:20 PM PDT 24 May 30 02:45:04 PM PDT 24 7891955480 ps
T711 /workspace/coverage/default/5.sram_ctrl_stress_pipeline.596350044 May 30 02:39:12 PM PDT 24 May 30 02:44:37 PM PDT 24 10558328130 ps
T712 /workspace/coverage/default/4.sram_ctrl_max_throughput.3845594369 May 30 02:39:10 PM PDT 24 May 30 02:41:07 PM PDT 24 1206643704 ps
T713 /workspace/coverage/default/36.sram_ctrl_executable.3419660699 May 30 02:41:30 PM PDT 24 May 30 03:01:34 PM PDT 24 35909535400 ps
T714 /workspace/coverage/default/4.sram_ctrl_bijection.1615979639 May 30 02:39:12 PM PDT 24 May 30 02:57:52 PM PDT 24 64261179448 ps
T715 /workspace/coverage/default/18.sram_ctrl_bijection.135308147 May 30 02:39:33 PM PDT 24 May 30 03:20:25 PM PDT 24 455360816112 ps
T716 /workspace/coverage/default/21.sram_ctrl_stress_pipeline.4035277704 May 30 02:39:46 PM PDT 24 May 30 02:45:05 PM PDT 24 4435509993 ps
T717 /workspace/coverage/default/16.sram_ctrl_partial_access.2859582085 May 30 02:39:30 PM PDT 24 May 30 02:39:40 PM PDT 24 1645243779 ps
T718 /workspace/coverage/default/32.sram_ctrl_mem_walk.4013699664 May 30 02:40:56 PM PDT 24 May 30 02:43:51 PM PDT 24 56114759751 ps
T719 /workspace/coverage/default/30.sram_ctrl_mem_walk.3816417330 May 30 02:40:48 PM PDT 24 May 30 02:46:16 PM PDT 24 173013022355 ps
T720 /workspace/coverage/default/30.sram_ctrl_lc_escalation.1699743709 May 30 02:40:43 PM PDT 24 May 30 02:41:22 PM PDT 24 23582162520 ps
T721 /workspace/coverage/default/11.sram_ctrl_ram_cfg.151311295 May 30 02:39:26 PM PDT 24 May 30 02:39:35 PM PDT 24 680961301 ps
T722 /workspace/coverage/default/9.sram_ctrl_stress_pipeline.1541745129 May 30 02:39:18 PM PDT 24 May 30 02:45:05 PM PDT 24 16519694934 ps
T723 /workspace/coverage/default/39.sram_ctrl_mem_partial_access.3681011776 May 30 02:41:59 PM PDT 24 May 30 02:43:16 PM PDT 24 1475188085 ps
T124 /workspace/coverage/default/5.sram_ctrl_stress_all_with_rand_reset.453748533 May 30 02:39:15 PM PDT 24 May 30 02:39:52 PM PDT 24 1218635012 ps
T724 /workspace/coverage/default/33.sram_ctrl_stress_pipeline.628476168 May 30 02:41:05 PM PDT 24 May 30 02:46:18 PM PDT 24 25793815301 ps
T725 /workspace/coverage/default/45.sram_ctrl_partial_access_b2b.2226683568 May 30 02:42:47 PM PDT 24 May 30 02:48:46 PM PDT 24 7595728613 ps
T726 /workspace/coverage/default/29.sram_ctrl_regwen.3039925381 May 30 02:40:33 PM PDT 24 May 30 02:47:05 PM PDT 24 6824194268 ps
T727 /workspace/coverage/default/10.sram_ctrl_multiple_keys.2807070191 May 30 02:39:18 PM PDT 24 May 30 03:08:17 PM PDT 24 53809733477 ps
T728 /workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.2035113466 May 30 02:39:25 PM PDT 24 May 30 02:39:36 PM PDT 24 2778601004 ps
T729 /workspace/coverage/default/10.sram_ctrl_max_throughput.2241924883 May 30 02:39:21 PM PDT 24 May 30 02:39:44 PM PDT 24 9955331407 ps
T730 /workspace/coverage/default/45.sram_ctrl_partial_access.717437994 May 30 02:42:42 PM PDT 24 May 30 02:45:11 PM PDT 24 4184370746 ps
T731 /workspace/coverage/default/45.sram_ctrl_lc_escalation.1087000384 May 30 02:42:43 PM PDT 24 May 30 02:43:10 PM PDT 24 3806162413 ps
T732 /workspace/coverage/default/45.sram_ctrl_alert_test.2746444957 May 30 02:42:40 PM PDT 24 May 30 02:42:43 PM PDT 24 31430367 ps
T733 /workspace/coverage/default/33.sram_ctrl_throughput_w_partial_write.4272617441 May 30 02:41:09 PM PDT 24 May 30 02:43:02 PM PDT 24 1573934474 ps
T734 /workspace/coverage/default/15.sram_ctrl_stress_pipeline.927035648 May 30 02:39:33 PM PDT 24 May 30 02:45:07 PM PDT 24 26347794030 ps
T735 /workspace/coverage/default/14.sram_ctrl_max_throughput.3235320942 May 30 02:39:37 PM PDT 24 May 30 02:40:04 PM PDT 24 2939751460 ps
T736 /workspace/coverage/default/35.sram_ctrl_partial_access.2469209880 May 30 02:41:18 PM PDT 24 May 30 02:41:38 PM PDT 24 1813383982 ps
T31 /workspace/coverage/default/0.sram_ctrl_sec_cm.2870542229 May 30 02:38:57 PM PDT 24 May 30 02:39:03 PM PDT 24 793575021 ps
T737 /workspace/coverage/default/45.sram_ctrl_multiple_keys.918776599 May 30 02:42:39 PM PDT 24 May 30 02:55:27 PM PDT 24 15562727279 ps
T738 /workspace/coverage/default/12.sram_ctrl_partial_access_b2b.1282739449 May 30 02:39:25 PM PDT 24 May 30 02:46:02 PM PDT 24 6062728049 ps
T739 /workspace/coverage/default/41.sram_ctrl_lc_escalation.3624933746 May 30 02:42:15 PM PDT 24 May 30 02:43:52 PM PDT 24 17009132390 ps
T740 /workspace/coverage/default/22.sram_ctrl_mem_walk.4183440388 May 30 02:39:54 PM PDT 24 May 30 02:45:18 PM PDT 24 71717231120 ps
T741 /workspace/coverage/default/36.sram_ctrl_mem_partial_access.29655139 May 30 02:41:29 PM PDT 24 May 30 02:42:52 PM PDT 24 9387784034 ps
T742 /workspace/coverage/default/2.sram_ctrl_alert_test.2949814654 May 30 02:39:09 PM PDT 24 May 30 02:39:12 PM PDT 24 40407355 ps
T743 /workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.4279440181 May 30 02:39:07 PM PDT 24 May 30 02:40:07 PM PDT 24 1547715695 ps
T744 /workspace/coverage/default/24.sram_ctrl_throughput_w_partial_write.3135272315 May 30 02:40:05 PM PDT 24 May 30 02:42:28 PM PDT 24 811920071 ps
T745 /workspace/coverage/default/46.sram_ctrl_stress_pipeline.601388395 May 30 02:42:51 PM PDT 24 May 30 02:46:35 PM PDT 24 46472649508 ps
T746 /workspace/coverage/default/44.sram_ctrl_partial_access_b2b.4284146490 May 30 02:42:28 PM PDT 24 May 30 02:49:31 PM PDT 24 16473546830 ps
T747 /workspace/coverage/default/27.sram_ctrl_mem_walk.2723644751 May 30 02:40:31 PM PDT 24 May 30 02:43:29 PM PDT 24 9159180664 ps
T748 /workspace/coverage/default/6.sram_ctrl_stress_pipeline.794323667 May 30 02:39:15 PM PDT 24 May 30 02:44:27 PM PDT 24 6889798908 ps
T749 /workspace/coverage/default/16.sram_ctrl_stress_pipeline.788759840 May 30 02:39:42 PM PDT 24 May 30 02:44:25 PM PDT 24 10389096879 ps
T750 /workspace/coverage/default/14.sram_ctrl_lc_escalation.3862447071 May 30 02:39:26 PM PDT 24 May 30 02:40:18 PM PDT 24 6992957442 ps
T751 /workspace/coverage/default/16.sram_ctrl_max_throughput.1409721447 May 30 02:39:46 PM PDT 24 May 30 02:40:04 PM PDT 24 700978031 ps
T752 /workspace/coverage/default/14.sram_ctrl_alert_test.3811151383 May 30 02:39:49 PM PDT 24 May 30 02:39:53 PM PDT 24 20753614 ps
T753 /workspace/coverage/default/22.sram_ctrl_throughput_w_partial_write.1719020244 May 30 02:39:52 PM PDT 24 May 30 02:41:24 PM PDT 24 3158495656 ps
T754 /workspace/coverage/default/42.sram_ctrl_partial_access.108728624 May 30 02:42:17 PM PDT 24 May 30 02:43:43 PM PDT 24 3548763804 ps
T125 /workspace/coverage/default/20.sram_ctrl_stress_all_with_rand_reset.3235504375 May 30 02:39:46 PM PDT 24 May 30 02:40:04 PM PDT 24 2015001701 ps
T755 /workspace/coverage/default/32.sram_ctrl_partial_access_b2b.1724644561 May 30 02:40:55 PM PDT 24 May 30 02:50:28 PM PDT 24 43579159880 ps
T756 /workspace/coverage/default/37.sram_ctrl_lc_escalation.325686418 May 30 02:41:30 PM PDT 24 May 30 02:42:24 PM PDT 24 35495693087 ps
T757 /workspace/coverage/default/49.sram_ctrl_bijection.2417013256 May 30 02:43:06 PM PDT 24 May 30 02:54:30 PM PDT 24 27976954053 ps
T758 /workspace/coverage/default/23.sram_ctrl_multiple_keys.2692666382 May 30 02:39:55 PM PDT 24 May 30 03:14:44 PM PDT 24 153849533060 ps
T759 /workspace/coverage/default/34.sram_ctrl_bijection.1139485305 May 30 02:41:19 PM PDT 24 May 30 02:52:59 PM PDT 24 10928187639 ps
T760 /workspace/coverage/default/44.sram_ctrl_ram_cfg.4279113956 May 30 02:42:39 PM PDT 24 May 30 02:42:44 PM PDT 24 345596012 ps
T761 /workspace/coverage/default/14.sram_ctrl_throughput_w_partial_write.740478089 May 30 02:39:28 PM PDT 24 May 30 02:39:42 PM PDT 24 2829949004 ps
T762 /workspace/coverage/default/6.sram_ctrl_alert_test.3477760945 May 30 02:39:14 PM PDT 24 May 30 02:39:17 PM PDT 24 73502561 ps
T763 /workspace/coverage/default/30.sram_ctrl_mem_partial_access.1850548463 May 30 02:40:47 PM PDT 24 May 30 02:43:30 PM PDT 24 5580544048 ps
T764 /workspace/coverage/default/17.sram_ctrl_mem_partial_access.824567003 May 30 02:39:47 PM PDT 24 May 30 02:41:04 PM PDT 24 1406803432 ps
T765 /workspace/coverage/default/0.sram_ctrl_max_throughput.847959882 May 30 02:38:54 PM PDT 24 May 30 02:40:44 PM PDT 24 1516123190 ps
T766 /workspace/coverage/default/17.sram_ctrl_stress_pipeline.61092484 May 30 02:39:30 PM PDT 24 May 30 02:42:33 PM PDT 24 17277809715 ps
T767 /workspace/coverage/default/24.sram_ctrl_alert_test.2763929839 May 30 02:40:10 PM PDT 24 May 30 02:40:13 PM PDT 24 15782766 ps
T768 /workspace/coverage/default/21.sram_ctrl_max_throughput.537895078 May 30 02:39:50 PM PDT 24 May 30 02:40:28 PM PDT 24 3986222543 ps
T769 /workspace/coverage/default/29.sram_ctrl_max_throughput.442277651 May 30 02:40:31 PM PDT 24 May 30 02:41:18 PM PDT 24 3094896205 ps
T770 /workspace/coverage/default/12.sram_ctrl_mem_walk.2770495317 May 30 02:39:45 PM PDT 24 May 30 02:42:26 PM PDT 24 6989422894 ps
T771 /workspace/coverage/default/25.sram_ctrl_throughput_w_partial_write.1623132066 May 30 02:40:24 PM PDT 24 May 30 02:41:27 PM PDT 24 780305867 ps
T772 /workspace/coverage/default/20.sram_ctrl_alert_test.2223470517 May 30 02:39:50 PM PDT 24 May 30 02:39:54 PM PDT 24 33271504 ps
T773 /workspace/coverage/default/43.sram_ctrl_throughput_w_partial_write.3107952250 May 30 02:42:29 PM PDT 24 May 30 02:42:41 PM PDT 24 712248447 ps
T774 /workspace/coverage/default/27.sram_ctrl_smoke.3316425155 May 30 02:40:21 PM PDT 24 May 30 02:40:48 PM PDT 24 625511993 ps
T775 /workspace/coverage/default/23.sram_ctrl_executable.1529794344 May 30 02:39:57 PM PDT 24 May 30 03:03:05 PM PDT 24 19667618585 ps
T776 /workspace/coverage/default/0.sram_ctrl_partial_access_b2b.3028880657 May 30 02:38:59 PM PDT 24 May 30 02:45:16 PM PDT 24 17402555795 ps
T777 /workspace/coverage/default/34.sram_ctrl_executable.1232964899 May 30 02:41:18 PM PDT 24 May 30 02:52:02 PM PDT 24 87758751188 ps
T778 /workspace/coverage/default/3.sram_ctrl_smoke.3283820179 May 30 02:39:11 PM PDT 24 May 30 02:41:30 PM PDT 24 450515386 ps
T779 /workspace/coverage/default/15.sram_ctrl_max_throughput.3648206943 May 30 02:39:49 PM PDT 24 May 30 02:40:55 PM PDT 24 3313382987 ps
T780 /workspace/coverage/default/18.sram_ctrl_max_throughput.265352435 May 30 02:39:33 PM PDT 24 May 30 02:40:29 PM PDT 24 734516024 ps
T781 /workspace/coverage/default/18.sram_ctrl_ram_cfg.617033592 May 30 02:39:43 PM PDT 24 May 30 02:39:50 PM PDT 24 1343346479 ps
T782 /workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.2777916213 May 30 02:43:14 PM PDT 24 May 30 02:43:37 PM PDT 24 709101405 ps
T783 /workspace/coverage/default/16.sram_ctrl_mem_walk.3234715313 May 30 02:39:28 PM PDT 24 May 30 02:44:36 PM PDT 24 5257760955 ps
T784 /workspace/coverage/default/45.sram_ctrl_stress_pipeline.1817122694 May 30 02:42:46 PM PDT 24 May 30 02:47:28 PM PDT 24 7080319867 ps
T785 /workspace/coverage/default/11.sram_ctrl_lc_escalation.3612761508 May 30 02:39:25 PM PDT 24 May 30 02:40:44 PM PDT 24 25161087920 ps
T786 /workspace/coverage/default/25.sram_ctrl_stress_pipeline.1016191726 May 30 02:40:21 PM PDT 24 May 30 02:45:38 PM PDT 24 21692158391 ps
T787 /workspace/coverage/default/17.sram_ctrl_regwen.2356126211 May 30 02:39:33 PM PDT 24 May 30 02:45:48 PM PDT 24 9407345677 ps
T788 /workspace/coverage/default/44.sram_ctrl_executable.1903587230 May 30 02:42:42 PM PDT 24 May 30 02:52:04 PM PDT 24 20821402741 ps
T789 /workspace/coverage/default/34.sram_ctrl_max_throughput.2109070414 May 30 02:41:18 PM PDT 24 May 30 02:41:28 PM PDT 24 712208486 ps
T790 /workspace/coverage/default/27.sram_ctrl_stress_pipeline.1991195207 May 30 02:40:21 PM PDT 24 May 30 02:44:54 PM PDT 24 18992419493 ps
T791 /workspace/coverage/default/23.sram_ctrl_regwen.1684755289 May 30 02:39:54 PM PDT 24 May 30 03:04:30 PM PDT 24 72250260959 ps
T792 /workspace/coverage/default/1.sram_ctrl_ram_cfg.1301546528 May 30 02:38:57 PM PDT 24 May 30 02:39:04 PM PDT 24 356137751 ps
T793 /workspace/coverage/default/48.sram_ctrl_ram_cfg.1059023535 May 30 02:43:03 PM PDT 24 May 30 02:43:08 PM PDT 24 720945511 ps
T794 /workspace/coverage/default/17.sram_ctrl_bijection.867681226 May 30 02:39:43 PM PDT 24 May 30 03:14:56 PM PDT 24 33133785841 ps
T795 /workspace/coverage/default/21.sram_ctrl_lc_escalation.680277260 May 30 02:39:55 PM PDT 24 May 30 02:40:32 PM PDT 24 5851218548 ps
T796 /workspace/coverage/default/6.sram_ctrl_mem_partial_access.4106463500 May 30 02:39:14 PM PDT 24 May 30 02:41:47 PM PDT 24 18904819669 ps
0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%