Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

2 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64
tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	16584462	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

167409327

1

T1

3644

T2

199304

T3

1476

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	90656885	1			T1	914		T2	109382		T3	14919
values[0x0]	45022495	1			T1	1377		T2	52756		T3	4894
values[0x1]	48314409	1			T1	1359		T2	57172		T3	10566

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	8437834	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

175555955

1

T1

3647

T2

209381

T3

13866

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	580712	1			T2	1035		T3	128		T4	975
valid_sources[0x01]	556019	1			T2	710		T3	113		T4	1027
valid_sources[0x02]	544134	1			T2	897		T3	125		T4	1058
valid_sources[0x03]	932769	1			T2	821		T3	121		T4	1095
valid_sources[0x04]	585935	1			T2	933		T3	51		T4	932
valid_sources[0x05]	602721	1			T2	1028		T3	94		T4	1007
valid_sources[0x06]	574102	1			T2	569		T3	153		T4	979
valid_sources[0x07]	608053	1			T2	969		T3	150		T4	1064
valid_sources[0x08]	614285	1			T2	906		T3	185		T4	1106
valid_sources[0x09]	560144	1			T1	154		T2	909		T3	48
valid_sources[0x0a]	680058	1			T2	897		T3	128		T4	1078
valid_sources[0x0b]	606870	1			T2	738		T3	138		T4	1109
valid_sources[0x0c]	563090	1			T1	751		T2	1147		T3	121
valid_sources[0x0d]	579164	1			T2	670		T3	89		T4	1021
valid_sources[0x0e]	1253641	1			T2	755		T3	82		T4	1053
valid_sources[0x0f]	619732	1			T2	671		T3	197		T4	1089
valid_sources[0x10]	1759605	1			T2	663		T3	138		T4	976
valid_sources[0x11]	562467	1			T2	879		T3	83		T4	1157
valid_sources[0x12]	600715	1			T2	661		T3	18		T4	1081
valid_sources[0x13]	549092	1			T2	901		T3	187		T4	1147
valid_sources[0x14]	546296	1			T2	903		T3	33		T4	1167
valid_sources[0x15]	588053	1			T2	812		T3	226		T4	1142
valid_sources[0x16]	601827	1			T2	778		T3	106		T4	1050
valid_sources[0x17]	618509	1			T2	1116		T3	81		T4	1006
valid_sources[0x18]	601372	1			T2	796		T3	54		T4	1098
valid_sources[0x19]	636609	1			T2	1026		T3	133		T4	1160
valid_sources[0x1a]	560022	1			T2	811		T3	255		T4	1052
valid_sources[0x1b]	556866	1			T2	931		T3	73		T4	1022
valid_sources[0x1c]	602511	1			T1	439		T2	783		T3	148
valid_sources[0x1d]	607613	1			T2	611		T3	84		T4	1055
valid_sources[0x1e]	770465	1			T2	928		T3	141		T4	1099
valid_sources[0x1f]	561441	1			T2	967		T3	25		T4	1157
valid_sources[0x20]	882504	1			T2	1208		T3	90		T4	1074
valid_sources[0x21]	552286	1			T2	946		T3	110		T4	1106
valid_sources[0x22]	615265	1			T2	908		T3	87		T4	1056
valid_sources[0x23]	576165	1			T2	656		T3	93		T4	1100
valid_sources[0x24]	579840	1			T2	1101		T3	52		T4	1057
valid_sources[0x25]	638328	1			T2	936		T3	151		T4	1049
valid_sources[0x26]	641826	1			T2	874		T3	99		T4	1086
valid_sources[0x27]	581365	1			T2	1060		T3	176		T4	1026
valid_sources[0x28]	570911	1			T2	1021		T3	96		T4	1035
valid_sources[0x29]	561797	1			T2	938		T3	38		T4	1180
valid_sources[0x2a]	580544	1			T2	839		T3	29		T4	1147
valid_sources[0x2b]	551645	1			T2	929		T3	133		T4	1121
valid_sources[0x2c]	609249	1			T2	1082		T3	152		T4	1075
valid_sources[0x2d]	550299	1			T2	949		T3	109		T4	1095
valid_sources[0x2e]	546294	1			T2	924		T3	98		T4	1097
valid_sources[0x2f]	625906	1			T2	1010		T3	143		T4	1045
valid_sources[0x30]	557800	1			T2	919		T3	102		T4	1013
valid_sources[0x31]	579926	1			T2	1009		T3	30		T4	1129
valid_sources[0x32]	1352745	1			T2	962		T3	58		T4	1012
valid_sources[0x33]	593369	1			T2	931		T3	56		T4	1148
valid_sources[0x34]	626271	1			T2	1091		T3	112		T4	1017
valid_sources[0x35]	562311	1			T2	848		T3	91		T4	986
valid_sources[0x36]	599455	1			T1	221		T2	709		T3	56
valid_sources[0x37]	571625	1			T2	811		T3	204		T4	1109
valid_sources[0x38]	1620559	1			T2	1086		T3	154		T4	1053
valid_sources[0x39]	598341	1			T2	935		T3	160		T4	1017
valid_sources[0x3a]	562573	1			T2	690		T3	125		T4	1032
valid_sources[0x3b]	547749	1			T2	694		T3	176		T4	977
valid_sources[0x3c]	581379	1			T2	996		T3	139		T4	1042
valid_sources[0x3d]	563287	1			T2	934		T3	52		T4	972
valid_sources[0x3e]	586119	1			T2	982		T3	91		T4	1127
valid_sources[0x3f]	557239	1			T2	857		T3	236		T4	1002
valid_sources[0x40]	614422	1			T2	762		T3	287		T4	1076
valid_sources[0x41]	2005977	1			T2	1076		T3	195		T4	1045
valid_sources[0x42]	568318	1			T2	926		T3	33		T4	995
valid_sources[0x43]	772860	1			T2	887		T3	133		T4	1042
valid_sources[0x44]	553763	1			T2	956		T3	154		T4	1113
valid_sources[0x45]	568351	1			T2	912		T3	139		T4	1107
valid_sources[0x46]	588621	1			T2	755		T3	85		T4	1156
valid_sources[0x47]	615703	1			T2	914		T3	133		T4	1079
valid_sources[0x48]	598683	1			T2	832		T3	195		T4	955
valid_sources[0x49]	575799	1			T2	727		T3	51		T4	945
valid_sources[0x4a]	581527	1			T2	897		T3	80		T4	1198
valid_sources[0x4b]	560763	1			T2	807		T3	98		T4	1094
valid_sources[0x4c]	577139	1			T2	706		T3	182		T4	1102
valid_sources[0x4d]	603471	1			T2	1173		T3	43		T4	997
valid_sources[0x4e]	576124	1			T2	944		T3	172		T4	1042
valid_sources[0x4f]	566707	1			T2	772		T3	190		T4	1149
valid_sources[0x50]	562119	1			T2	808		T3	40		T4	1086
valid_sources[0x51]	628021	1			T2	969		T3	133		T4	1076
valid_sources[0x52]	566510	1			T2	1004		T3	126		T4	970
valid_sources[0x53]	542709	1			T2	750		T3	130		T4	1136
valid_sources[0x54]	2228151	1			T2	852		T3	14		T4	1015
valid_sources[0x55]	606622	1			T2	568		T3	117		T4	1081
valid_sources[0x56]	636631	1			T2	753		T3	118		T4	1206
valid_sources[0x57]	606290	1			T2	704		T3	149		T4	981
valid_sources[0x58]	560923	1			T2	1195		T3	71		T4	1045
valid_sources[0x59]	559825	1			T1	506		T2	632		T3	194
valid_sources[0x5a]	587544	1			T2	784		T3	146		T4	1102
valid_sources[0x5b]	586814	1			T2	787		T3	62		T4	1062
valid_sources[0x5c]	2297594	1			T2	601		T3	117		T4	1061
valid_sources[0x5d]	598346	1			T2	634		T3	116		T4	1014
valid_sources[0x5e]	627137	1			T2	859		T3	140		T4	1045
valid_sources[0x5f]	565729	1			T2	989		T3	152		T4	1151
valid_sources[0x60]	603791	1			T1	550		T2	1068		T3	178
valid_sources[0x61]	566578	1			T2	717		T3	49		T4	1055
valid_sources[0x62]	546592	1			T2	843		T3	149		T4	1086
valid_sources[0x63]	577477	1			T2	730		T3	157		T4	1049
valid_sources[0x64]	560437	1			T2	859		T3	151		T4	1144
valid_sources[0x65]	660981	1			T2	864		T3	102		T4	1059
valid_sources[0x66]	610087	1			T2	1014		T3	108		T4	1091
valid_sources[0x67]	548312	1			T2	957		T3	133		T4	992
valid_sources[0x68]	542885	1			T2	949		T3	19		T4	1033
valid_sources[0x69]	1993850	1			T2	863		T3	101		T4	1100
valid_sources[0x6a]	1671731	1			T2	794		T3	188		T4	990
valid_sources[0x6b]	562374	1			T2	823		T3	174		T4	991
valid_sources[0x6c]	624947	1			T2	879		T3	101		T4	1081
valid_sources[0x6d]	556230	1			T2	764		T3	187		T4	1114
valid_sources[0x6e]	595256	1			T2	848		T3	86		T4	1039
valid_sources[0x6f]	561003	1			T2	1137		T3	69		T4	1078
valid_sources[0x70]	625874	1			T2	843		T3	144		T4	974
valid_sources[0x71]	563270	1			T2	737		T3	164		T4	993
valid_sources[0x72]	582837	1			T2	938		T3	65		T4	947
valid_sources[0x73]	555059	1			T2	1185		T3	84		T4	1056
valid_sources[0x74]	550472	1			T2	716		T3	40		T4	1182
valid_sources[0x75]	614469	1			T2	827		T3	138		T4	1097
valid_sources[0x76]	583750	1			T2	719		T3	169		T4	987
valid_sources[0x77]	628777	1			T2	804		T3	139		T4	1054
valid_sources[0x78]	587947	1			T2	954		T3	76		T4	1059
valid_sources[0x79]	627198	1			T2	896		T3	153		T4	1135
valid_sources[0x7a]	562983	1			T2	845		T3	110		T4	998
valid_sources[0x7b]	622418	1			T1	406		T2	873		T3	97
valid_sources[0x7c]	557085	1			T2	552		T3	39		T4	982
valid_sources[0x7d]	551380	1			T2	988		T3	174		T4	1042
valid_sources[0x7e]	578816	1			T2	997		T3	148		T4	1086
valid_sources[0x7f]	624697	1			T2	629		T3	229		T4	1114
valid_sources[0x80]	584263	1			T2	765		T3	108		T4	1020

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

82316946

1

T1

911

T2

99457

T3

118

values[0x0]

all_enables

biggest_size

42549408

1

T1

1377

T2

49729

T3

681

values[0x1]

all_enables

biggest_size

42542973

1

T1

1356

T2

50118

T3

677

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	44702	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

174651

1

T1

1711

T2

1

T3

1

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	59311	1			T1	450		T6	30		T12	10
values[0x0]	77027	1			T1	684		T2	2		T3	2
values[0x1]	83015	1			T1	664		T2	3		T3	1

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	34122	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

185231

1

T1

1749

T2

2

T3

1

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	726	1			T1	12		T22	27		T19	2
valid_sources[0x01]	908	1			T1	3		T10	2		T22	27
valid_sources[0x02]	673	1			T1	5		T22	28		T23	6
valid_sources[0x03]	799	1			T1	7		T22	15		T19	2
valid_sources[0x04]	620	1			T1	5		T22	24		T19	2
valid_sources[0x05]	827	1			T1	6		T22	20		T43	1
valid_sources[0x06]	936	1			T1	8		T7	5		T22	26
valid_sources[0x07]	742	1			T1	4		T22	30		T20	1
valid_sources[0x08]	1106	1			T1	8		T41	1		T22	20
valid_sources[0x09]	1441	1			T1	2		T22	22		T19	4
valid_sources[0x0a]	1005	1			T1	9		T129	14		T22	21
valid_sources[0x0b]	941	1			T1	4		T22	25		T19	1
valid_sources[0x0c]	1028	1			T1	3		T10	6		T22	23
valid_sources[0x0d]	738	1			T1	9		T22	17		T44	6
valid_sources[0x0e]	767	1			T1	9		T63	1		T22	19
valid_sources[0x0f]	710	1			T1	3		T22	19		T19	2
valid_sources[0x10]	873	1			T1	9		T22	24		T19	4
valid_sources[0x11]	695	1			T1	3		T6	1		T8	1
valid_sources[0x12]	622	1			T1	3		T22	23		T90	1
valid_sources[0x13]	844	1			T1	4		T12	1		T8	1
valid_sources[0x14]	807	1			T1	6		T22	31		T19	4
valid_sources[0x15]	951	1			T1	7		T7	6		T22	11
valid_sources[0x16]	904	1			T1	9		T22	25		T19	1
valid_sources[0x17]	695	1			T1	12		T22	19		T76	1
valid_sources[0x18]	630	1			T1	11		T22	15		T19	2
valid_sources[0x19]	658	1			T1	16		T22	25		T19	1
valid_sources[0x1a]	586	1			T1	7		T22	22		T23	2
valid_sources[0x1b]	859	1			T1	7		T12	6		T7	6
valid_sources[0x1c]	835	1			T1	11		T22	25		T23	2
valid_sources[0x1d]	712	1			T1	6		T22	22		T45	1
valid_sources[0x1e]	880	1			T1	4		T22	12		T19	1
valid_sources[0x1f]	814	1			T1	4		T6	1		T22	19
valid_sources[0x20]	744	1			T1	11		T22	21		T130	2
valid_sources[0x21]	928	1			T1	11		T22	20		T112	12
valid_sources[0x22]	704	1			T1	8		T22	25		T23	4
valid_sources[0x23]	786	1			T1	3		T131	11		T22	20
valid_sources[0x24]	865	1			T1	7		T22	21		T44	1
valid_sources[0x25]	851	1			T1	7		T3	1		T22	23
valid_sources[0x26]	1107	1			T1	10		T22	19		T69	126
valid_sources[0x27]	699	1			T1	4		T22	29		T23	6
valid_sources[0x28]	853	1			T1	8		T9	2		T22	22
valid_sources[0x29]	755	1			T1	6		T7	5		T22	23
valid_sources[0x2a]	889	1			T1	6		T22	25		T45	5
valid_sources[0x2b]	808	1			T1	5		T64	23		T22	20
valid_sources[0x2c]	1193	1			T1	4		T2	1		T22	21
valid_sources[0x2d]	1065	1			T1	9		T22	23		T19	1
valid_sources[0x2e]	761	1			T1	7		T22	30		T19	4
valid_sources[0x2f]	669	1			T1	8		T22	18		T19	2
valid_sources[0x30]	892	1			T1	5		T22	28		T19	1
valid_sources[0x31]	880	1			T1	8		T22	21		T90	1
valid_sources[0x32]	1016	1			T1	4		T7	3		T22	28
valid_sources[0x33]	857	1			T1	5		T12	1		T22	21
valid_sources[0x34]	916	1			T1	6		T22	17		T19	2
valid_sources[0x35]	813	1			T1	10		T8	1		T22	19
valid_sources[0x36]	716	1			T1	5		T2	1		T57	1
valid_sources[0x37]	974	1			T1	6		T22	21		T19	2
valid_sources[0x38]	1097	1			T1	4		T22	24		T45	3
valid_sources[0x39]	714	1			T1	3		T22	20		T19	2
valid_sources[0x3a]	929	1			T1	5		T22	23		T43	1
valid_sources[0x3b]	965	1			T1	5		T22	26		T132	13
valid_sources[0x3c]	703	1			T1	6		T7	1		T22	28
valid_sources[0x3d]	790	1			T1	7		T22	19		T19	2
valid_sources[0x3e]	1372	1			T1	5		T10	1		T8	1
valid_sources[0x3f]	722	1			T1	5		T8	1		T22	35
valid_sources[0x40]	629	1			T1	6		T22	25		T133	1
valid_sources[0x41]	895	1			T1	3		T22	26		T19	2
valid_sources[0x42]	670	1			T1	7		T7	12		T78	2
valid_sources[0x43]	743	1			T1	5		T10	1		T22	13
valid_sources[0x44]	911	1			T1	7		T22	25		T20	2
valid_sources[0x45]	748	1			T1	4		T63	1		T22	25
valid_sources[0x46]	775	1			T1	8		T7	1		T63	2
valid_sources[0x47]	814	1			T1	14		T22	22		T23	5
valid_sources[0x48]	759	1			T1	8		T22	28		T23	4
valid_sources[0x49]	781	1			T1	2		T6	6		T10	1
valid_sources[0x4a]	864	1			T1	5		T22	20		T19	3
valid_sources[0x4b]	1277	1			T1	5		T22	27		T45	3
valid_sources[0x4c]	676	1			T1	6		T6	10		T8	1
valid_sources[0x4d]	981	1			T1	7		T22	20		T23	12
valid_sources[0x4e]	711	1			T1	9		T12	2		T22	30
valid_sources[0x4f]	1157	1			T1	4		T22	18		T23	7
valid_sources[0x50]	827	1			T1	6		T22	19		T76	3
valid_sources[0x51]	920	1			T1	4		T22	33		T20	1
valid_sources[0x52]	780	1			T1	9		T12	1		T7	3
valid_sources[0x53]	1030	1			T1	10		T22	23		T23	1
valid_sources[0x54]	929	1			T1	5		T7	3		T22	23
valid_sources[0x55]	741	1			T1	6		T22	27		T19	1
valid_sources[0x56]	916	1			T1	3		T22	24		T20	1
valid_sources[0x57]	943	1			T1	6		T22	23		T19	3
valid_sources[0x58]	827	1			T1	13		T8	3		T22	23
valid_sources[0x59]	774	1			T1	7		T7	1		T63	4
valid_sources[0x5a]	989	1			T1	7		T12	1		T8	1
valid_sources[0x5b]	816	1			T1	8		T7	3		T63	1
valid_sources[0x5c]	781	1			T1	6		T13	15		T22	19
valid_sources[0x5d]	768	1			T1	6		T4	1		T22	25
valid_sources[0x5e]	612	1			T1	7		T22	20		T20	1
valid_sources[0x5f]	916	1			T1	8		T11	1		T22	21
valid_sources[0x60]	1052	1			T1	2		T4	1		T22	24
valid_sources[0x61]	804	1			T1	5		T22	15		T45	3
valid_sources[0x62]	650	1			T1	5		T10	1		T63	1
valid_sources[0x63]	912	1			T1	5		T22	26		T45	5
valid_sources[0x64]	971	1			T1	1		T6	6		T22	28
valid_sources[0x65]	1153	1			T1	6		T22	24		T20	1
valid_sources[0x66]	858	1			T1	7		T41	1		T22	29
valid_sources[0x67]	866	1			T1	4		T22	20		T19	2
valid_sources[0x68]	865	1			T1	8		T22	18		T19	3
valid_sources[0x69]	1069	1			T1	7		T6	3		T10	1
valid_sources[0x6a]	1035	1			T1	6		T65	9		T22	17
valid_sources[0x6b]	714	1			T1	13		T7	2		T22	29
valid_sources[0x6c]	1149	1			T1	3		T4	1		T8	1
valid_sources[0x6d]	1105	1			T1	4		T22	29		T45	1
valid_sources[0x6e]	700	1			T1	5		T134	2		T22	35
valid_sources[0x6f]	801	1			T1	12		T22	26		T19	4
valid_sources[0x70]	1302	1			T1	5		T22	28		T20	1
valid_sources[0x71]	786	1			T1	10		T63	1		T22	24
valid_sources[0x72]	671	1			T1	5		T6	2		T8	1
valid_sources[0x73]	828	1			T1	6		T22	24		T76	1
valid_sources[0x74]	763	1			T1	13		T22	26		T19	1
valid_sources[0x75]	985	1			T1	10		T22	20		T19	1
valid_sources[0x76]	853	1			T1	9		T6	5		T22	26
valid_sources[0x77]	849	1			T1	8		T22	21		T70	16
valid_sources[0x78]	744	1			T1	9		T22	19		T90	3
valid_sources[0x79]	1139	1			T1	9		T22	24		T23	3
valid_sources[0x7a]	735	1			T1	5		T22	11		T19	5
valid_sources[0x7b]	983	1			T1	2		T7	2		T22	30
valid_sources[0x7c]	750	1			T1	7		T22	23		T19	1
valid_sources[0x7d]	937	1			T1	9		T8	1		T22	25
valid_sources[0x7e]	997	1			T1	4		T4	1		T22	20
valid_sources[0x7f]	691	1			T1	9		T2	1		T8	1
valid_sources[0x80]	771	1			T1	4		T7	9		T8	1

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

46248

1

T1

422

T6

8

T12

5

values[0x0]

all_enables

biggest_size

65458

1

T1

677

T2

1

T3

1

values[0x1]

all_enables

biggest_size

62945

1

T1

612

T6

1

T9

1