| T305 |
/workspace/coverage/default/40.sram_ctrl_smoke.2900009724 |
|
|
Jul 03 06:12:47 PM PDT 24 |
Jul 03 06:13:00 PM PDT 24 |
886143009 ps |
| T306 |
/workspace/coverage/default/8.sram_ctrl_stress_all_with_rand_reset.323725152 |
|
|
Jul 03 06:06:49 PM PDT 24 |
Jul 03 06:10:46 PM PDT 24 |
1364182082 ps |
| T307 |
/workspace/coverage/default/35.sram_ctrl_bijection.3185002702 |
|
|
Jul 03 06:11:41 PM PDT 24 |
Jul 03 06:36:28 PM PDT 24 |
21061860462 ps |
| T308 |
/workspace/coverage/default/28.sram_ctrl_stress_all_with_rand_reset.2853692004 |
|
|
Jul 03 06:10:15 PM PDT 24 |
Jul 03 06:11:48 PM PDT 24 |
2922342744 ps |
| T309 |
/workspace/coverage/default/28.sram_ctrl_multiple_keys.618300916 |
|
|
Jul 03 06:10:09 PM PDT 24 |
Jul 03 06:29:42 PM PDT 24 |
9790275578 ps |
| T310 |
/workspace/coverage/default/35.sram_ctrl_multiple_keys.4067486178 |
|
|
Jul 03 06:11:41 PM PDT 24 |
Jul 03 06:23:58 PM PDT 24 |
23664693778 ps |
| T311 |
/workspace/coverage/default/41.sram_ctrl_stress_all_with_rand_reset.1637483979 |
|
|
Jul 03 06:13:06 PM PDT 24 |
Jul 03 06:14:08 PM PDT 24 |
2278797049 ps |
| T312 |
/workspace/coverage/default/20.sram_ctrl_partial_access_b2b.3796111020 |
|
|
Jul 03 06:08:30 PM PDT 24 |
Jul 03 06:17:23 PM PDT 24 |
78534903121 ps |
| T313 |
/workspace/coverage/default/38.sram_ctrl_ram_cfg.526729845 |
|
|
Jul 03 06:12:30 PM PDT 24 |
Jul 03 06:12:34 PM PDT 24 |
365095896 ps |
| T314 |
/workspace/coverage/default/26.sram_ctrl_lc_escalation.4179917392 |
|
|
Jul 03 06:09:49 PM PDT 24 |
Jul 03 06:10:00 PM PDT 24 |
6275405088 ps |
| T315 |
/workspace/coverage/default/13.sram_ctrl_max_throughput.658278735 |
|
|
Jul 03 06:07:21 PM PDT 24 |
Jul 03 06:10:07 PM PDT 24 |
766771403 ps |
| T316 |
/workspace/coverage/default/12.sram_ctrl_mem_walk.2619521649 |
|
|
Jul 03 06:07:13 PM PDT 24 |
Jul 03 06:12:28 PM PDT 24 |
21006894433 ps |
| T317 |
/workspace/coverage/default/40.sram_ctrl_alert_test.4172157323 |
|
|
Jul 03 06:12:58 PM PDT 24 |
Jul 03 06:12:58 PM PDT 24 |
15374244 ps |
| T318 |
/workspace/coverage/default/47.sram_ctrl_partial_access.2721675054 |
|
|
Jul 03 06:14:18 PM PDT 24 |
Jul 03 06:14:23 PM PDT 24 |
1455374721 ps |
| T319 |
/workspace/coverage/default/11.sram_ctrl_multiple_keys.1796010763 |
|
|
Jul 03 06:06:59 PM PDT 24 |
Jul 03 06:36:22 PM PDT 24 |
34141512116 ps |
| T320 |
/workspace/coverage/default/9.sram_ctrl_alert_test.3026276221 |
|
|
Jul 03 06:06:50 PM PDT 24 |
Jul 03 06:06:52 PM PDT 24 |
184811865 ps |
| T321 |
/workspace/coverage/default/14.sram_ctrl_mem_walk.2760305251 |
|
|
Jul 03 06:07:34 PM PDT 24 |
Jul 03 06:09:51 PM PDT 24 |
2038413479 ps |
| T322 |
/workspace/coverage/default/34.sram_ctrl_alert_test.3321692043 |
|
|
Jul 03 06:11:42 PM PDT 24 |
Jul 03 06:11:43 PM PDT 24 |
22273982 ps |
| T323 |
/workspace/coverage/default/24.sram_ctrl_access_during_key_req.378697240 |
|
|
Jul 03 06:09:24 PM PDT 24 |
Jul 03 06:30:19 PM PDT 24 |
59899741109 ps |
| T324 |
/workspace/coverage/default/0.sram_ctrl_partial_access.1508085348 |
|
|
Jul 03 06:06:16 PM PDT 24 |
Jul 03 06:06:22 PM PDT 24 |
433200426 ps |
| T325 |
/workspace/coverage/default/40.sram_ctrl_mem_partial_access.3289463960 |
|
|
Jul 03 06:12:56 PM PDT 24 |
Jul 03 06:14:01 PM PDT 24 |
977462054 ps |
| T326 |
/workspace/coverage/default/3.sram_ctrl_partial_access_b2b.940529214 |
|
|
Jul 03 06:06:32 PM PDT 24 |
Jul 03 06:13:53 PM PDT 24 |
29783384849 ps |
| T327 |
/workspace/coverage/default/0.sram_ctrl_executable.1558294649 |
|
|
Jul 03 06:06:13 PM PDT 24 |
Jul 03 06:13:35 PM PDT 24 |
28131667568 ps |
| T328 |
/workspace/coverage/default/45.sram_ctrl_multiple_keys.2885183931 |
|
|
Jul 03 06:13:42 PM PDT 24 |
Jul 03 06:40:14 PM PDT 24 |
18850603284 ps |
| T329 |
/workspace/coverage/default/33.sram_ctrl_mem_partial_access.203627305 |
|
|
Jul 03 06:11:22 PM PDT 24 |
Jul 03 06:13:03 PM PDT 24 |
12779048852 ps |
| T330 |
/workspace/coverage/default/35.sram_ctrl_lc_escalation.3900038543 |
|
|
Jul 03 06:11:44 PM PDT 24 |
Jul 03 06:12:47 PM PDT 24 |
38862480551 ps |
| T331 |
/workspace/coverage/default/15.sram_ctrl_partial_access.1612963909 |
|
|
Jul 03 06:07:38 PM PDT 24 |
Jul 03 06:09:19 PM PDT 24 |
547557322 ps |
| T332 |
/workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.360597042 |
|
|
Jul 03 06:06:54 PM PDT 24 |
Jul 03 06:08:28 PM PDT 24 |
4755414710 ps |
| T333 |
/workspace/coverage/default/36.sram_ctrl_ram_cfg.2540115831 |
|
|
Jul 03 06:11:59 PM PDT 24 |
Jul 03 06:12:03 PM PDT 24 |
2108774130 ps |
| T334 |
/workspace/coverage/default/7.sram_ctrl_smoke.2050655742 |
|
|
Jul 03 06:06:43 PM PDT 24 |
Jul 03 06:06:57 PM PDT 24 |
1574577550 ps |
| T335 |
/workspace/coverage/default/39.sram_ctrl_stress_all.37070076 |
|
|
Jul 03 06:12:49 PM PDT 24 |
Jul 03 07:56:49 PM PDT 24 |
75484559515 ps |
| T336 |
/workspace/coverage/default/39.sram_ctrl_executable.656366542 |
|
|
Jul 03 06:12:39 PM PDT 24 |
Jul 03 06:18:17 PM PDT 24 |
5885332686 ps |
| T337 |
/workspace/coverage/default/9.sram_ctrl_bijection.4084408600 |
|
|
Jul 03 06:06:50 PM PDT 24 |
Jul 03 06:27:07 PM PDT 24 |
61857020138 ps |
| T338 |
/workspace/coverage/default/11.sram_ctrl_mem_walk.3758674518 |
|
|
Jul 03 06:07:07 PM PDT 24 |
Jul 03 06:12:49 PM PDT 24 |
21531172241 ps |
| T339 |
/workspace/coverage/default/29.sram_ctrl_stress_pipeline.4103090004 |
|
|
Jul 03 06:10:19 PM PDT 24 |
Jul 03 06:15:27 PM PDT 24 |
5304751278 ps |
| T340 |
/workspace/coverage/default/46.sram_ctrl_max_throughput.673223223 |
|
|
Jul 03 06:14:03 PM PDT 24 |
Jul 03 06:14:25 PM PDT 24 |
4999670249 ps |
| T341 |
/workspace/coverage/default/18.sram_ctrl_lc_escalation.3658356055 |
|
|
Jul 03 06:08:13 PM PDT 24 |
Jul 03 06:09:08 PM PDT 24 |
31431534851 ps |
| T342 |
/workspace/coverage/default/48.sram_ctrl_smoke.2338323401 |
|
|
Jul 03 06:14:24 PM PDT 24 |
Jul 03 06:14:45 PM PDT 24 |
3671455530 ps |
| T343 |
/workspace/coverage/default/12.sram_ctrl_ram_cfg.701614830 |
|
|
Jul 03 06:07:13 PM PDT 24 |
Jul 03 06:07:17 PM PDT 24 |
801568850 ps |
| T344 |
/workspace/coverage/default/14.sram_ctrl_throughput_w_partial_write.2182355612 |
|
|
Jul 03 06:07:28 PM PDT 24 |
Jul 03 06:10:04 PM PDT 24 |
803217045 ps |
| T345 |
/workspace/coverage/default/42.sram_ctrl_stress_all_with_rand_reset.378514096 |
|
|
Jul 03 06:13:19 PM PDT 24 |
Jul 03 06:13:33 PM PDT 24 |
398480201 ps |
| T346 |
/workspace/coverage/default/4.sram_ctrl_stress_pipeline.2039894431 |
|
|
Jul 03 06:06:37 PM PDT 24 |
Jul 03 06:10:21 PM PDT 24 |
11940493215 ps |
| T347 |
/workspace/coverage/default/25.sram_ctrl_throughput_w_partial_write.3494915985 |
|
|
Jul 03 06:09:32 PM PDT 24 |
Jul 03 06:09:46 PM PDT 24 |
731135305 ps |
| T348 |
/workspace/coverage/default/43.sram_ctrl_mem_partial_access.3810753230 |
|
|
Jul 03 06:13:27 PM PDT 24 |
Jul 03 06:16:16 PM PDT 24 |
5135651799 ps |
| T349 |
/workspace/coverage/default/46.sram_ctrl_stress_pipeline.1526255836 |
|
|
Jul 03 06:13:58 PM PDT 24 |
Jul 03 06:21:26 PM PDT 24 |
13490496650 ps |
| T350 |
/workspace/coverage/default/46.sram_ctrl_alert_test.1470517289 |
|
|
Jul 03 06:14:09 PM PDT 24 |
Jul 03 06:14:10 PM PDT 24 |
12900356 ps |
| T351 |
/workspace/coverage/default/16.sram_ctrl_regwen.2829122762 |
|
|
Jul 03 06:07:51 PM PDT 24 |
Jul 03 06:19:46 PM PDT 24 |
117742056305 ps |
| T352 |
/workspace/coverage/default/17.sram_ctrl_mem_walk.1567079128 |
|
|
Jul 03 06:08:02 PM PDT 24 |
Jul 03 06:13:18 PM PDT 24 |
13817807774 ps |
| T353 |
/workspace/coverage/default/25.sram_ctrl_stress_pipeline.290710309 |
|
|
Jul 03 06:09:31 PM PDT 24 |
Jul 03 06:14:12 PM PDT 24 |
18705632986 ps |
| T354 |
/workspace/coverage/default/29.sram_ctrl_access_during_key_req.696266960 |
|
|
Jul 03 06:10:27 PM PDT 24 |
Jul 03 06:22:38 PM PDT 24 |
18703484218 ps |
| T355 |
/workspace/coverage/default/11.sram_ctrl_stress_all.614432660 |
|
|
Jul 03 06:07:08 PM PDT 24 |
Jul 03 07:34:58 PM PDT 24 |
751318493106 ps |
| T356 |
/workspace/coverage/default/4.sram_ctrl_bijection.1141903666 |
|
|
Jul 03 06:06:37 PM PDT 24 |
Jul 03 06:41:37 PM PDT 24 |
379285464106 ps |
| T357 |
/workspace/coverage/default/27.sram_ctrl_partial_access_b2b.2177610089 |
|
|
Jul 03 06:10:00 PM PDT 24 |
Jul 03 06:16:57 PM PDT 24 |
6652803897 ps |
| T358 |
/workspace/coverage/default/48.sram_ctrl_multiple_keys.3634052858 |
|
|
Jul 03 06:14:24 PM PDT 24 |
Jul 03 06:20:30 PM PDT 24 |
21589323664 ps |
| T359 |
/workspace/coverage/default/29.sram_ctrl_executable.281305662 |
|
|
Jul 03 06:10:28 PM PDT 24 |
Jul 03 06:25:28 PM PDT 24 |
18673089097 ps |
| T360 |
/workspace/coverage/default/37.sram_ctrl_max_throughput.49188654 |
|
|
Jul 03 06:12:16 PM PDT 24 |
Jul 03 06:12:41 PM PDT 24 |
745646007 ps |
| T361 |
/workspace/coverage/default/2.sram_ctrl_access_during_key_req.847172360 |
|
|
Jul 03 06:06:31 PM PDT 24 |
Jul 03 06:08:22 PM PDT 24 |
2308395828 ps |
| T362 |
/workspace/coverage/default/2.sram_ctrl_ram_cfg.766185616 |
|
|
Jul 03 06:06:27 PM PDT 24 |
Jul 03 06:06:32 PM PDT 24 |
2105637927 ps |
| T363 |
/workspace/coverage/default/23.sram_ctrl_mem_partial_access.249545415 |
|
|
Jul 03 06:09:18 PM PDT 24 |
Jul 03 06:12:15 PM PDT 24 |
22519681885 ps |
| T364 |
/workspace/coverage/default/41.sram_ctrl_partial_access.1031429747 |
|
|
Jul 03 06:13:02 PM PDT 24 |
Jul 03 06:13:24 PM PDT 24 |
1454862368 ps |
| T365 |
/workspace/coverage/default/5.sram_ctrl_max_throughput.1435324446 |
|
|
Jul 03 06:06:45 PM PDT 24 |
Jul 03 06:07:51 PM PDT 24 |
2312035948 ps |
| T366 |
/workspace/coverage/default/3.sram_ctrl_executable.2505385491 |
|
|
Jul 03 06:06:36 PM PDT 24 |
Jul 03 06:15:46 PM PDT 24 |
3494561838 ps |
| T367 |
/workspace/coverage/default/40.sram_ctrl_max_throughput.982095053 |
|
|
Jul 03 06:12:54 PM PDT 24 |
Jul 03 06:13:02 PM PDT 24 |
2812688015 ps |
| T368 |
/workspace/coverage/default/11.sram_ctrl_lc_escalation.662975643 |
|
|
Jul 03 06:07:03 PM PDT 24 |
Jul 03 06:08:10 PM PDT 24 |
10727776396 ps |
| T369 |
/workspace/coverage/default/33.sram_ctrl_regwen.1788644503 |
|
|
Jul 03 06:11:20 PM PDT 24 |
Jul 03 06:40:40 PM PDT 24 |
22413289385 ps |
| T370 |
/workspace/coverage/default/22.sram_ctrl_regwen.1834453367 |
|
|
Jul 03 06:09:01 PM PDT 24 |
Jul 03 06:25:57 PM PDT 24 |
12684067107 ps |
| T94 |
/workspace/coverage/default/46.sram_ctrl_mem_partial_access.3575020604 |
|
|
Jul 03 06:14:03 PM PDT 24 |
Jul 03 06:16:13 PM PDT 24 |
6292830883 ps |
| T371 |
/workspace/coverage/default/15.sram_ctrl_mem_partial_access.1396696666 |
|
|
Jul 03 06:07:44 PM PDT 24 |
Jul 03 06:08:54 PM PDT 24 |
11938241002 ps |
| T372 |
/workspace/coverage/default/15.sram_ctrl_throughput_w_partial_write.388915157 |
|
|
Jul 03 06:07:37 PM PDT 24 |
Jul 03 06:07:45 PM PDT 24 |
1427464053 ps |
| T20 |
/workspace/coverage/default/3.sram_ctrl_sec_cm.218383755 |
|
|
Jul 03 06:06:36 PM PDT 24 |
Jul 03 06:06:38 PM PDT 24 |
143744725 ps |
| T373 |
/workspace/coverage/default/47.sram_ctrl_stress_pipeline.2916287855 |
|
|
Jul 03 06:14:13 PM PDT 24 |
Jul 03 06:17:30 PM PDT 24 |
12017536554 ps |
| T374 |
/workspace/coverage/default/37.sram_ctrl_bijection.3579901672 |
|
|
Jul 03 06:12:09 PM PDT 24 |
Jul 03 06:36:52 PM PDT 24 |
146773869712 ps |
| T375 |
/workspace/coverage/default/12.sram_ctrl_smoke.3260877079 |
|
|
Jul 03 06:07:15 PM PDT 24 |
Jul 03 06:07:40 PM PDT 24 |
1422371009 ps |
| T376 |
/workspace/coverage/default/39.sram_ctrl_regwen.1085008995 |
|
|
Jul 03 06:12:44 PM PDT 24 |
Jul 03 06:32:17 PM PDT 24 |
2609944044 ps |
| T377 |
/workspace/coverage/default/26.sram_ctrl_stress_all.726642382 |
|
|
Jul 03 06:09:49 PM PDT 24 |
Jul 03 07:09:50 PM PDT 24 |
77378138894 ps |
| T378 |
/workspace/coverage/default/23.sram_ctrl_multiple_keys.1575138559 |
|
|
Jul 03 06:09:03 PM PDT 24 |
Jul 03 06:10:51 PM PDT 24 |
897103840 ps |
| T379 |
/workspace/coverage/default/40.sram_ctrl_partial_access.791783366 |
|
|
Jul 03 06:12:51 PM PDT 24 |
Jul 03 06:12:59 PM PDT 24 |
1624031959 ps |
| T380 |
/workspace/coverage/default/37.sram_ctrl_mem_walk.296081557 |
|
|
Jul 03 06:12:19 PM PDT 24 |
Jul 03 06:18:35 PM PDT 24 |
74788241953 ps |
| T381 |
/workspace/coverage/default/44.sram_ctrl_stress_all.2221802441 |
|
|
Jul 03 06:13:40 PM PDT 24 |
Jul 03 08:05:50 PM PDT 24 |
935972245920 ps |
| T382 |
/workspace/coverage/default/10.sram_ctrl_stress_pipeline.2324329141 |
|
|
Jul 03 06:06:54 PM PDT 24 |
Jul 03 06:10:06 PM PDT 24 |
6910865391 ps |
| T383 |
/workspace/coverage/default/38.sram_ctrl_stress_pipeline.2321005044 |
|
|
Jul 03 06:12:26 PM PDT 24 |
Jul 03 06:17:11 PM PDT 24 |
9870347779 ps |
| T384 |
/workspace/coverage/default/5.sram_ctrl_mem_partial_access.2065259399 |
|
|
Jul 03 06:06:41 PM PDT 24 |
Jul 03 06:09:28 PM PDT 24 |
5127680081 ps |
| T385 |
/workspace/coverage/default/19.sram_ctrl_multiple_keys.1475140981 |
|
|
Jul 03 06:08:20 PM PDT 24 |
Jul 03 06:24:42 PM PDT 24 |
36213825474 ps |
| T386 |
/workspace/coverage/default/16.sram_ctrl_mem_walk.1898269467 |
|
|
Jul 03 06:07:53 PM PDT 24 |
Jul 03 06:10:32 PM PDT 24 |
2715137768 ps |
| T387 |
/workspace/coverage/default/19.sram_ctrl_regwen.2353331577 |
|
|
Jul 03 06:08:24 PM PDT 24 |
Jul 03 06:25:18 PM PDT 24 |
8660641557 ps |
| T388 |
/workspace/coverage/default/0.sram_ctrl_stress_all.4092740566 |
|
|
Jul 03 06:06:20 PM PDT 24 |
Jul 03 08:26:23 PM PDT 24 |
221737847350 ps |
| T389 |
/workspace/coverage/default/10.sram_ctrl_stress_all.1305258599 |
|
|
Jul 03 06:06:59 PM PDT 24 |
Jul 03 07:31:46 PM PDT 24 |
312734145985 ps |
| T390 |
/workspace/coverage/default/34.sram_ctrl_stress_all_with_rand_reset.3500467977 |
|
|
Jul 03 06:11:38 PM PDT 24 |
Jul 03 06:12:06 PM PDT 24 |
769915237 ps |
| T391 |
/workspace/coverage/default/27.sram_ctrl_multiple_keys.629814581 |
|
|
Jul 03 06:09:58 PM PDT 24 |
Jul 03 06:28:06 PM PDT 24 |
23350792091 ps |
| T392 |
/workspace/coverage/default/35.sram_ctrl_alert_test.1321041413 |
|
|
Jul 03 06:11:51 PM PDT 24 |
Jul 03 06:11:51 PM PDT 24 |
26891093 ps |
| T393 |
/workspace/coverage/default/2.sram_ctrl_alert_test.2192892662 |
|
|
Jul 03 06:06:26 PM PDT 24 |
Jul 03 06:06:27 PM PDT 24 |
31250175 ps |
| T394 |
/workspace/coverage/default/21.sram_ctrl_stress_all.99214559 |
|
|
Jul 03 06:08:49 PM PDT 24 |
Jul 03 06:49:36 PM PDT 24 |
449076644132 ps |
| T395 |
/workspace/coverage/default/19.sram_ctrl_partial_access_b2b.635998195 |
|
|
Jul 03 06:08:19 PM PDT 24 |
Jul 03 06:19:03 PM PDT 24 |
52092109786 ps |
| T396 |
/workspace/coverage/default/23.sram_ctrl_stress_pipeline.1265573785 |
|
|
Jul 03 06:09:01 PM PDT 24 |
Jul 03 06:14:14 PM PDT 24 |
4572016759 ps |
| T397 |
/workspace/coverage/default/32.sram_ctrl_partial_access_b2b.2472270581 |
|
|
Jul 03 06:11:02 PM PDT 24 |
Jul 03 06:18:51 PM PDT 24 |
86832918893 ps |
| T398 |
/workspace/coverage/default/30.sram_ctrl_stress_all_with_rand_reset.2450754983 |
|
|
Jul 03 06:10:40 PM PDT 24 |
Jul 03 06:10:59 PM PDT 24 |
2631443046 ps |
| T399 |
/workspace/coverage/default/48.sram_ctrl_alert_test.2712926555 |
|
|
Jul 03 06:14:34 PM PDT 24 |
Jul 03 06:14:35 PM PDT 24 |
16332532 ps |
| T400 |
/workspace/coverage/default/38.sram_ctrl_throughput_w_partial_write.1953607377 |
|
|
Jul 03 06:12:24 PM PDT 24 |
Jul 03 06:12:33 PM PDT 24 |
4833006146 ps |
| T401 |
/workspace/coverage/default/6.sram_ctrl_multiple_keys.692494445 |
|
|
Jul 03 06:06:42 PM PDT 24 |
Jul 03 06:20:08 PM PDT 24 |
9484983742 ps |
| T402 |
/workspace/coverage/default/15.sram_ctrl_stress_pipeline.1830983471 |
|
|
Jul 03 06:07:36 PM PDT 24 |
Jul 03 06:12:23 PM PDT 24 |
7265206928 ps |
| T403 |
/workspace/coverage/default/2.sram_ctrl_throughput_w_partial_write.2545656466 |
|
|
Jul 03 06:06:32 PM PDT 24 |
Jul 03 06:06:40 PM PDT 24 |
1354130591 ps |
| T404 |
/workspace/coverage/default/41.sram_ctrl_lc_escalation.4245642320 |
|
|
Jul 03 06:13:04 PM PDT 24 |
Jul 03 06:13:33 PM PDT 24 |
4999567914 ps |
| T405 |
/workspace/coverage/default/30.sram_ctrl_mem_partial_access.935276561 |
|
|
Jul 03 06:10:40 PM PDT 24 |
Jul 03 06:12:14 PM PDT 24 |
3129379378 ps |
| T406 |
/workspace/coverage/default/16.sram_ctrl_smoke.3062586106 |
|
|
Jul 03 06:07:44 PM PDT 24 |
Jul 03 06:08:07 PM PDT 24 |
1450984802 ps |
| T407 |
/workspace/coverage/default/19.sram_ctrl_max_throughput.557183397 |
|
|
Jul 03 06:08:22 PM PDT 24 |
Jul 03 06:11:00 PM PDT 24 |
6934617911 ps |
| T408 |
/workspace/coverage/default/48.sram_ctrl_stress_pipeline.1124845444 |
|
|
Jul 03 06:14:26 PM PDT 24 |
Jul 03 06:19:47 PM PDT 24 |
57619043296 ps |
| T409 |
/workspace/coverage/default/31.sram_ctrl_alert_test.2434893814 |
|
|
Jul 03 06:10:54 PM PDT 24 |
Jul 03 06:10:55 PM PDT 24 |
41866298 ps |
| T410 |
/workspace/coverage/default/34.sram_ctrl_max_throughput.1608070380 |
|
|
Jul 03 06:11:32 PM PDT 24 |
Jul 03 06:12:31 PM PDT 24 |
2807634532 ps |
| T411 |
/workspace/coverage/default/49.sram_ctrl_multiple_keys.1407522468 |
|
|
Jul 03 06:14:38 PM PDT 24 |
Jul 03 06:27:52 PM PDT 24 |
8798837938 ps |
| T412 |
/workspace/coverage/default/19.sram_ctrl_mem_partial_access.2599279986 |
|
|
Jul 03 06:08:24 PM PDT 24 |
Jul 03 06:09:31 PM PDT 24 |
1955481877 ps |
| T413 |
/workspace/coverage/default/10.sram_ctrl_mem_walk.1528061478 |
|
|
Jul 03 06:06:55 PM PDT 24 |
Jul 03 06:13:06 PM PDT 24 |
82718175771 ps |
| T414 |
/workspace/coverage/default/24.sram_ctrl_stress_all.288751615 |
|
|
Jul 03 06:09:28 PM PDT 24 |
Jul 03 07:15:15 PM PDT 24 |
57943629326 ps |
| T415 |
/workspace/coverage/default/32.sram_ctrl_mem_walk.1403201994 |
|
|
Jul 03 06:11:07 PM PDT 24 |
Jul 03 06:16:30 PM PDT 24 |
62895586579 ps |
| T416 |
/workspace/coverage/default/5.sram_ctrl_lc_escalation.404047291 |
|
|
Jul 03 06:06:44 PM PDT 24 |
Jul 03 06:08:05 PM PDT 24 |
117836578548 ps |
| T417 |
/workspace/coverage/default/48.sram_ctrl_max_throughput.171595633 |
|
|
Jul 03 06:14:28 PM PDT 24 |
Jul 03 06:16:59 PM PDT 24 |
5080873600 ps |
| T418 |
/workspace/coverage/default/36.sram_ctrl_multiple_keys.2254000354 |
|
|
Jul 03 06:11:49 PM PDT 24 |
Jul 03 06:26:29 PM PDT 24 |
50839608829 ps |
| T419 |
/workspace/coverage/default/28.sram_ctrl_mem_walk.470522212 |
|
|
Jul 03 06:10:10 PM PDT 24 |
Jul 03 06:16:17 PM PDT 24 |
86217206651 ps |
| T420 |
/workspace/coverage/default/24.sram_ctrl_stress_all_with_rand_reset.2834225220 |
|
|
Jul 03 06:09:28 PM PDT 24 |
Jul 03 06:10:35 PM PDT 24 |
12915010856 ps |
| T421 |
/workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.581269575 |
|
|
Jul 03 06:06:25 PM PDT 24 |
Jul 03 06:06:47 PM PDT 24 |
479824024 ps |
| T422 |
/workspace/coverage/default/24.sram_ctrl_stress_pipeline.4169527670 |
|
|
Jul 03 06:09:19 PM PDT 24 |
Jul 03 06:12:27 PM PDT 24 |
3479215238 ps |
| T423 |
/workspace/coverage/default/27.sram_ctrl_stress_all.1651377605 |
|
|
Jul 03 06:10:10 PM PDT 24 |
Jul 03 07:48:33 PM PDT 24 |
240699754612 ps |
| T424 |
/workspace/coverage/default/43.sram_ctrl_stress_pipeline.1754461422 |
|
|
Jul 03 06:13:20 PM PDT 24 |
Jul 03 06:17:27 PM PDT 24 |
8162093769 ps |
| T425 |
/workspace/coverage/default/26.sram_ctrl_ram_cfg.2320855003 |
|
|
Jul 03 06:09:51 PM PDT 24 |
Jul 03 06:09:55 PM PDT 24 |
371697871 ps |
| T426 |
/workspace/coverage/default/31.sram_ctrl_bijection.2422273555 |
|
|
Jul 03 06:10:44 PM PDT 24 |
Jul 03 06:37:53 PM PDT 24 |
41016448152 ps |
| T427 |
/workspace/coverage/default/25.sram_ctrl_multiple_keys.1231603916 |
|
|
Jul 03 06:09:33 PM PDT 24 |
Jul 03 06:11:27 PM PDT 24 |
3320436576 ps |
| T428 |
/workspace/coverage/default/35.sram_ctrl_stress_pipeline.1130743741 |
|
|
Jul 03 06:11:43 PM PDT 24 |
Jul 03 06:17:08 PM PDT 24 |
5456753849 ps |
| T429 |
/workspace/coverage/default/4.sram_ctrl_lc_escalation.3542011513 |
|
|
Jul 03 06:06:37 PM PDT 24 |
Jul 03 06:07:46 PM PDT 24 |
12676959035 ps |
| T108 |
/workspace/coverage/default/3.sram_ctrl_stress_all_with_rand_reset.4062063590 |
|
|
Jul 03 06:06:33 PM PDT 24 |
Jul 03 06:06:44 PM PDT 24 |
1205631389 ps |
| T430 |
/workspace/coverage/default/25.sram_ctrl_mem_walk.1714946972 |
|
|
Jul 03 06:09:39 PM PDT 24 |
Jul 03 06:11:46 PM PDT 24 |
1991457248 ps |
| T431 |
/workspace/coverage/default/38.sram_ctrl_stress_all_with_rand_reset.1930111552 |
|
|
Jul 03 06:12:34 PM PDT 24 |
Jul 03 06:13:40 PM PDT 24 |
8651142553 ps |
| T432 |
/workspace/coverage/default/49.sram_ctrl_max_throughput.244778319 |
|
|
Jul 03 06:14:42 PM PDT 24 |
Jul 03 06:16:35 PM PDT 24 |
763948694 ps |
| T433 |
/workspace/coverage/default/8.sram_ctrl_partial_access.4154737432 |
|
|
Jul 03 06:06:51 PM PDT 24 |
Jul 03 06:07:11 PM PDT 24 |
4056821910 ps |
| T434 |
/workspace/coverage/default/42.sram_ctrl_regwen.3280846188 |
|
|
Jul 03 06:13:13 PM PDT 24 |
Jul 03 06:24:05 PM PDT 24 |
48760199044 ps |
| T435 |
/workspace/coverage/default/16.sram_ctrl_bijection.3362296901 |
|
|
Jul 03 06:07:45 PM PDT 24 |
Jul 03 06:33:55 PM PDT 24 |
561278964671 ps |
| T436 |
/workspace/coverage/default/28.sram_ctrl_executable.2203288596 |
|
|
Jul 03 06:10:11 PM PDT 24 |
Jul 03 06:15:48 PM PDT 24 |
11080496409 ps |
| T437 |
/workspace/coverage/default/36.sram_ctrl_stress_all_with_rand_reset.1114314701 |
|
|
Jul 03 06:12:05 PM PDT 24 |
Jul 03 06:12:19 PM PDT 24 |
1463381268 ps |
| T438 |
/workspace/coverage/default/43.sram_ctrl_regwen.434781974 |
|
|
Jul 03 06:13:22 PM PDT 24 |
Jul 03 06:28:06 PM PDT 24 |
15844920530 ps |
| T439 |
/workspace/coverage/default/36.sram_ctrl_partial_access_b2b.1430901384 |
|
|
Jul 03 06:11:53 PM PDT 24 |
Jul 03 06:16:15 PM PDT 24 |
10304955589 ps |
| T440 |
/workspace/coverage/default/29.sram_ctrl_throughput_w_partial_write.977349884 |
|
|
Jul 03 06:10:23 PM PDT 24 |
Jul 03 06:10:40 PM PDT 24 |
1193232374 ps |
| T441 |
/workspace/coverage/default/22.sram_ctrl_lc_escalation.123657870 |
|
|
Jul 03 06:08:59 PM PDT 24 |
Jul 03 06:09:34 PM PDT 24 |
12048049705 ps |
| T442 |
/workspace/coverage/default/19.sram_ctrl_partial_access.597948429 |
|
|
Jul 03 06:08:20 PM PDT 24 |
Jul 03 06:08:36 PM PDT 24 |
1889597114 ps |
| T443 |
/workspace/coverage/default/4.sram_ctrl_stress_all_with_rand_reset.2856102004 |
|
|
Jul 03 06:06:38 PM PDT 24 |
Jul 03 06:07:48 PM PDT 24 |
8654507521 ps |
| T444 |
/workspace/coverage/default/34.sram_ctrl_partial_access_b2b.1274171677 |
|
|
Jul 03 06:11:30 PM PDT 24 |
Jul 03 06:18:10 PM PDT 24 |
62979400571 ps |
| T445 |
/workspace/coverage/default/3.sram_ctrl_access_during_key_req.2925116194 |
|
|
Jul 03 06:06:31 PM PDT 24 |
Jul 03 06:21:30 PM PDT 24 |
32954250970 ps |
| T446 |
/workspace/coverage/default/30.sram_ctrl_throughput_w_partial_write.4179256083 |
|
|
Jul 03 06:10:34 PM PDT 24 |
Jul 03 06:10:40 PM PDT 24 |
2659135559 ps |
| T447 |
/workspace/coverage/default/41.sram_ctrl_ram_cfg.1172981159 |
|
|
Jul 03 06:13:07 PM PDT 24 |
Jul 03 06:13:11 PM PDT 24 |
488801651 ps |
| T448 |
/workspace/coverage/default/34.sram_ctrl_mem_partial_access.3822893627 |
|
|
Jul 03 06:11:37 PM PDT 24 |
Jul 03 06:12:42 PM PDT 24 |
1015269860 ps |
| T449 |
/workspace/coverage/default/21.sram_ctrl_access_during_key_req.4252551520 |
|
|
Jul 03 06:08:42 PM PDT 24 |
Jul 03 06:26:04 PM PDT 24 |
15954203839 ps |
| T450 |
/workspace/coverage/default/45.sram_ctrl_executable.904216920 |
|
|
Jul 03 06:13:53 PM PDT 24 |
Jul 03 06:28:02 PM PDT 24 |
20365104892 ps |
| T451 |
/workspace/coverage/default/40.sram_ctrl_stress_pipeline.2310297848 |
|
|
Jul 03 06:12:50 PM PDT 24 |
Jul 03 06:17:46 PM PDT 24 |
63137667279 ps |
| T452 |
/workspace/coverage/default/0.sram_ctrl_lc_escalation.1321413419 |
|
|
Jul 03 06:06:17 PM PDT 24 |
Jul 03 06:06:57 PM PDT 24 |
21695602097 ps |
| T453 |
/workspace/coverage/default/23.sram_ctrl_executable.2202495998 |
|
|
Jul 03 06:09:10 PM PDT 24 |
Jul 03 06:27:56 PM PDT 24 |
6181324831 ps |
| T454 |
/workspace/coverage/default/4.sram_ctrl_max_throughput.1945996212 |
|
|
Jul 03 06:06:39 PM PDT 24 |
Jul 03 06:07:17 PM PDT 24 |
7194162641 ps |
| T455 |
/workspace/coverage/default/42.sram_ctrl_bijection.2733234359 |
|
|
Jul 03 06:13:08 PM PDT 24 |
Jul 03 06:28:35 PM PDT 24 |
78723855412 ps |
| T456 |
/workspace/coverage/default/13.sram_ctrl_executable.1444223709 |
|
|
Jul 03 06:07:24 PM PDT 24 |
Jul 03 06:19:04 PM PDT 24 |
29139012952 ps |
| T457 |
/workspace/coverage/default/49.sram_ctrl_mem_walk.4141800389 |
|
|
Jul 03 06:14:45 PM PDT 24 |
Jul 03 06:20:49 PM PDT 24 |
21108698963 ps |
| T458 |
/workspace/coverage/default/41.sram_ctrl_executable.1725544411 |
|
|
Jul 03 06:13:05 PM PDT 24 |
Jul 03 06:37:53 PM PDT 24 |
20858923285 ps |
| T459 |
/workspace/coverage/default/38.sram_ctrl_alert_test.2699215997 |
|
|
Jul 03 06:12:33 PM PDT 24 |
Jul 03 06:12:34 PM PDT 24 |
16035742 ps |
| T45 |
/workspace/coverage/default/10.sram_ctrl_stress_all_with_rand_reset.1974825399 |
|
|
Jul 03 06:06:59 PM PDT 24 |
Jul 03 06:07:23 PM PDT 24 |
3543875536 ps |
| T460 |
/workspace/coverage/default/41.sram_ctrl_mem_walk.1480956635 |
|
|
Jul 03 06:13:04 PM PDT 24 |
Jul 03 06:19:01 PM PDT 24 |
57571227819 ps |
| T461 |
/workspace/coverage/default/0.sram_ctrl_alert_test.783563720 |
|
|
Jul 03 06:06:21 PM PDT 24 |
Jul 03 06:06:22 PM PDT 24 |
13209274 ps |
| T462 |
/workspace/coverage/default/41.sram_ctrl_access_during_key_req.2910266815 |
|
|
Jul 03 06:13:06 PM PDT 24 |
Jul 03 06:22:58 PM PDT 24 |
60714030784 ps |
| T463 |
/workspace/coverage/default/34.sram_ctrl_stress_pipeline.3341080223 |
|
|
Jul 03 06:11:30 PM PDT 24 |
Jul 03 06:15:32 PM PDT 24 |
24020405942 ps |
| T464 |
/workspace/coverage/default/4.sram_ctrl_multiple_keys.3002727292 |
|
|
Jul 03 06:06:35 PM PDT 24 |
Jul 03 06:34:46 PM PDT 24 |
116728254698 ps |
| T465 |
/workspace/coverage/default/2.sram_ctrl_regwen.1231278034 |
|
|
Jul 03 06:06:28 PM PDT 24 |
Jul 03 06:20:34 PM PDT 24 |
54787455492 ps |
| T466 |
/workspace/coverage/default/6.sram_ctrl_stress_all.4091366207 |
|
|
Jul 03 06:06:54 PM PDT 24 |
Jul 03 08:23:42 PM PDT 24 |
648716393223 ps |
| T467 |
/workspace/coverage/default/4.sram_ctrl_partial_access_b2b.1424774477 |
|
|
Jul 03 06:06:34 PM PDT 24 |
Jul 03 06:12:26 PM PDT 24 |
13583908633 ps |
| T468 |
/workspace/coverage/default/7.sram_ctrl_executable.3633469764 |
|
|
Jul 03 06:06:48 PM PDT 24 |
Jul 03 06:21:11 PM PDT 24 |
69706597750 ps |
| T469 |
/workspace/coverage/default/12.sram_ctrl_executable.1000455076 |
|
|
Jul 03 06:07:14 PM PDT 24 |
Jul 03 06:16:24 PM PDT 24 |
68289069289 ps |
| T470 |
/workspace/coverage/default/29.sram_ctrl_partial_access_b2b.2555251840 |
|
|
Jul 03 06:10:19 PM PDT 24 |
Jul 03 06:16:57 PM PDT 24 |
60650605976 ps |
| T471 |
/workspace/coverage/default/21.sram_ctrl_executable.2578460124 |
|
|
Jul 03 06:08:45 PM PDT 24 |
Jul 03 06:23:53 PM PDT 24 |
10417824571 ps |
| T472 |
/workspace/coverage/default/15.sram_ctrl_executable.691431048 |
|
|
Jul 03 06:07:41 PM PDT 24 |
Jul 03 06:19:30 PM PDT 24 |
30387322219 ps |
| T473 |
/workspace/coverage/default/7.sram_ctrl_access_during_key_req.2365143867 |
|
|
Jul 03 06:06:46 PM PDT 24 |
Jul 03 06:22:45 PM PDT 24 |
52688259785 ps |
| T474 |
/workspace/coverage/default/20.sram_ctrl_mem_partial_access.2857405763 |
|
|
Jul 03 06:08:34 PM PDT 24 |
Jul 03 06:09:38 PM PDT 24 |
975414065 ps |
| T475 |
/workspace/coverage/default/45.sram_ctrl_stress_pipeline.583869243 |
|
|
Jul 03 06:13:47 PM PDT 24 |
Jul 03 06:18:57 PM PDT 24 |
4892163501 ps |
| T476 |
/workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.2761179528 |
|
|
Jul 03 06:07:04 PM PDT 24 |
Jul 03 06:07:23 PM PDT 24 |
10012024245 ps |
| T477 |
/workspace/coverage/default/9.sram_ctrl_ram_cfg.3107380465 |
|
|
Jul 03 06:06:54 PM PDT 24 |
Jul 03 06:06:58 PM PDT 24 |
1975293303 ps |
| T478 |
/workspace/coverage/default/5.sram_ctrl_partial_access_b2b.3685012643 |
|
|
Jul 03 06:06:36 PM PDT 24 |
Jul 03 06:15:28 PM PDT 24 |
81825331291 ps |
| T479 |
/workspace/coverage/default/14.sram_ctrl_ram_cfg.1643065414 |
|
|
Jul 03 06:07:34 PM PDT 24 |
Jul 03 06:07:38 PM PDT 24 |
353028211 ps |
| T480 |
/workspace/coverage/default/35.sram_ctrl_mem_walk.1198163807 |
|
|
Jul 03 06:11:47 PM PDT 24 |
Jul 03 06:13:53 PM PDT 24 |
2060945392 ps |
| T481 |
/workspace/coverage/default/45.sram_ctrl_smoke.873758880 |
|
|
Jul 03 06:13:45 PM PDT 24 |
Jul 03 06:14:04 PM PDT 24 |
2097790354 ps |
| T30 |
/workspace/coverage/default/4.sram_ctrl_sec_cm.1971391895 |
|
|
Jul 03 06:06:45 PM PDT 24 |
Jul 03 06:06:48 PM PDT 24 |
323524191 ps |
| T482 |
/workspace/coverage/default/2.sram_ctrl_max_throughput.785261467 |
|
|
Jul 03 06:06:27 PM PDT 24 |
Jul 03 06:06:36 PM PDT 24 |
709280753 ps |
| T483 |
/workspace/coverage/default/41.sram_ctrl_smoke.2419230223 |
|
|
Jul 03 06:12:58 PM PDT 24 |
Jul 03 06:13:07 PM PDT 24 |
3063561120 ps |
| T484 |
/workspace/coverage/default/8.sram_ctrl_stress_pipeline.1679188098 |
|
|
Jul 03 06:06:47 PM PDT 24 |
Jul 03 06:11:40 PM PDT 24 |
4183757314 ps |
| T485 |
/workspace/coverage/default/45.sram_ctrl_stress_all_with_rand_reset.3700626053 |
|
|
Jul 03 06:13:59 PM PDT 24 |
Jul 03 06:14:28 PM PDT 24 |
1125590317 ps |
| T486 |
/workspace/coverage/default/22.sram_ctrl_multiple_keys.3448105107 |
|
|
Jul 03 06:08:51 PM PDT 24 |
Jul 03 06:17:41 PM PDT 24 |
6884512730 ps |
| T487 |
/workspace/coverage/default/12.sram_ctrl_lc_escalation.967822636 |
|
|
Jul 03 06:07:13 PM PDT 24 |
Jul 03 06:07:58 PM PDT 24 |
26551897588 ps |
| T488 |
/workspace/coverage/default/39.sram_ctrl_stress_pipeline.2981486792 |
|
|
Jul 03 06:12:37 PM PDT 24 |
Jul 03 06:17:26 PM PDT 24 |
4355059124 ps |
| T489 |
/workspace/coverage/default/44.sram_ctrl_ram_cfg.1852205889 |
|
|
Jul 03 06:13:40 PM PDT 24 |
Jul 03 06:13:44 PM PDT 24 |
1291801817 ps |
| T490 |
/workspace/coverage/default/37.sram_ctrl_partial_access.646660754 |
|
|
Jul 03 06:12:12 PM PDT 24 |
Jul 03 06:12:37 PM PDT 24 |
3255374730 ps |
| T491 |
/workspace/coverage/default/31.sram_ctrl_mem_walk.1180224390 |
|
|
Jul 03 06:10:49 PM PDT 24 |
Jul 03 06:13:43 PM PDT 24 |
21081133345 ps |
| T95 |
/workspace/coverage/default/6.sram_ctrl_mem_partial_access.4275130108 |
|
|
Jul 03 06:06:44 PM PDT 24 |
Jul 03 06:09:10 PM PDT 24 |
13502395376 ps |
| T492 |
/workspace/coverage/default/7.sram_ctrl_stress_all_with_rand_reset.3451173764 |
|
|
Jul 03 06:06:54 PM PDT 24 |
Jul 03 06:07:05 PM PDT 24 |
1027543863 ps |
| T493 |
/workspace/coverage/default/30.sram_ctrl_regwen.1862171717 |
|
|
Jul 03 06:10:38 PM PDT 24 |
Jul 03 06:11:31 PM PDT 24 |
6055879527 ps |
| T494 |
/workspace/coverage/default/10.sram_ctrl_mem_partial_access.2852292456 |
|
|
Jul 03 06:06:59 PM PDT 24 |
Jul 03 06:09:06 PM PDT 24 |
6062114131 ps |
| T495 |
/workspace/coverage/default/2.sram_ctrl_stress_all_with_rand_reset.87239392 |
|
|
Jul 03 06:06:28 PM PDT 24 |
Jul 03 06:07:57 PM PDT 24 |
2689975372 ps |
| T496 |
/workspace/coverage/default/5.sram_ctrl_access_during_key_req.1169743208 |
|
|
Jul 03 06:06:42 PM PDT 24 |
Jul 03 06:14:43 PM PDT 24 |
11089938371 ps |
| T497 |
/workspace/coverage/default/29.sram_ctrl_max_throughput.1018000425 |
|
|
Jul 03 06:10:22 PM PDT 24 |
Jul 03 06:10:31 PM PDT 24 |
2721782641 ps |
| T498 |
/workspace/coverage/default/11.sram_ctrl_bijection.1483306192 |
|
|
Jul 03 06:07:01 PM PDT 24 |
Jul 03 06:43:26 PM PDT 24 |
524456596570 ps |
| T31 |
/workspace/coverage/default/1.sram_ctrl_sec_cm.3845841110 |
|
|
Jul 03 06:06:24 PM PDT 24 |
Jul 03 06:06:29 PM PDT 24 |
402817654 ps |
| T499 |
/workspace/coverage/default/33.sram_ctrl_multiple_keys.4194022179 |
|
|
Jul 03 06:11:10 PM PDT 24 |
Jul 03 06:35:38 PM PDT 24 |
11535587260 ps |
| T500 |
/workspace/coverage/default/43.sram_ctrl_max_throughput.4225775252 |
|
|
Jul 03 06:13:23 PM PDT 24 |
Jul 03 06:15:09 PM PDT 24 |
2263281456 ps |
| T501 |
/workspace/coverage/default/13.sram_ctrl_regwen.2613395218 |
|
|
Jul 03 06:07:23 PM PDT 24 |
Jul 03 06:15:38 PM PDT 24 |
12306911588 ps |
| T502 |
/workspace/coverage/default/9.sram_ctrl_multiple_keys.672031975 |
|
|
Jul 03 06:06:48 PM PDT 24 |
Jul 03 06:10:20 PM PDT 24 |
5710874685 ps |
| T503 |
/workspace/coverage/default/19.sram_ctrl_ram_cfg.727791774 |
|
|
Jul 03 06:08:24 PM PDT 24 |
Jul 03 06:08:28 PM PDT 24 |
2817490184 ps |
| T504 |
/workspace/coverage/default/0.sram_ctrl_mem_partial_access.3021652449 |
|
|
Jul 03 06:06:19 PM PDT 24 |
Jul 03 06:07:49 PM PDT 24 |
5905623044 ps |
| T505 |
/workspace/coverage/default/49.sram_ctrl_partial_access.62988579 |
|
|
Jul 03 06:14:37 PM PDT 24 |
Jul 03 06:14:50 PM PDT 24 |
2181955137 ps |
| T506 |
/workspace/coverage/default/5.sram_ctrl_executable.3015919779 |
|
|
Jul 03 06:06:44 PM PDT 24 |
Jul 03 06:42:55 PM PDT 24 |
29355410153 ps |
| T507 |
/workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.2379013838 |
|
|
Jul 03 06:14:29 PM PDT 24 |
Jul 03 06:14:51 PM PDT 24 |
2949267499 ps |
| T508 |
/workspace/coverage/default/14.sram_ctrl_access_during_key_req.4049213853 |
|
|
Jul 03 06:07:30 PM PDT 24 |
Jul 03 06:29:46 PM PDT 24 |
58825181208 ps |
| T509 |
/workspace/coverage/default/48.sram_ctrl_partial_access.4116514905 |
|
|
Jul 03 06:14:26 PM PDT 24 |
Jul 03 06:14:35 PM PDT 24 |
1812057035 ps |
| T510 |
/workspace/coverage/default/46.sram_ctrl_partial_access_b2b.3559800711 |
|
|
Jul 03 06:14:02 PM PDT 24 |
Jul 03 06:18:42 PM PDT 24 |
18240364209 ps |
| T511 |
/workspace/coverage/default/18.sram_ctrl_multiple_keys.71920843 |
|
|
Jul 03 06:08:12 PM PDT 24 |
Jul 03 06:32:09 PM PDT 24 |
29581696739 ps |
| T512 |
/workspace/coverage/default/20.sram_ctrl_mem_walk.1026608785 |
|
|
Jul 03 06:08:35 PM PDT 24 |
Jul 03 06:13:35 PM PDT 24 |
21873768605 ps |
| T513 |
/workspace/coverage/default/33.sram_ctrl_partial_access_b2b.271126714 |
|
|
Jul 03 06:11:15 PM PDT 24 |
Jul 03 06:17:39 PM PDT 24 |
13917417066 ps |
| T514 |
/workspace/coverage/default/23.sram_ctrl_smoke.3178706280 |
|
|
Jul 03 06:09:06 PM PDT 24 |
Jul 03 06:11:36 PM PDT 24 |
808551833 ps |
| T515 |
/workspace/coverage/default/10.sram_ctrl_partial_access.4053626068 |
|
|
Jul 03 06:06:54 PM PDT 24 |
Jul 03 06:07:21 PM PDT 24 |
6351687012 ps |
| T516 |
/workspace/coverage/default/19.sram_ctrl_stress_pipeline.3793029158 |
|
|
Jul 03 06:08:25 PM PDT 24 |
Jul 03 06:10:48 PM PDT 24 |
9860328795 ps |
| T517 |
/workspace/coverage/default/38.sram_ctrl_smoke.2007417371 |
|
|
Jul 03 06:12:22 PM PDT 24 |
Jul 03 06:12:29 PM PDT 24 |
1872742674 ps |
| T518 |
/workspace/coverage/default/28.sram_ctrl_stress_all.2560294058 |
|
|
Jul 03 06:10:15 PM PDT 24 |
Jul 03 07:43:04 PM PDT 24 |
802961691109 ps |
| T519 |
/workspace/coverage/default/35.sram_ctrl_partial_access_b2b.3781675259 |
|
|
Jul 03 06:11:44 PM PDT 24 |
Jul 03 06:18:10 PM PDT 24 |
15970160416 ps |
| T520 |
/workspace/coverage/default/42.sram_ctrl_ram_cfg.4239999586 |
|
|
Jul 03 06:13:17 PM PDT 24 |
Jul 03 06:13:21 PM PDT 24 |
360494804 ps |
| T521 |
/workspace/coverage/default/28.sram_ctrl_ram_cfg.2577241701 |
|
|
Jul 03 06:10:11 PM PDT 24 |
Jul 03 06:10:14 PM PDT 24 |
344588072 ps |
| T522 |
/workspace/coverage/default/39.sram_ctrl_mem_partial_access.2854442972 |
|
|
Jul 03 06:12:47 PM PDT 24 |
Jul 03 06:15:55 PM PDT 24 |
20403575349 ps |
| T523 |
/workspace/coverage/default/0.sram_ctrl_mem_walk.3596656861 |
|
|
Jul 03 06:06:20 PM PDT 24 |
Jul 03 06:11:59 PM PDT 24 |
76868115025 ps |
| T524 |
/workspace/coverage/default/26.sram_ctrl_executable.236010891 |
|
|
Jul 03 06:09:48 PM PDT 24 |
Jul 03 06:21:00 PM PDT 24 |
127806750556 ps |
| T525 |
/workspace/coverage/default/38.sram_ctrl_partial_access.3638544970 |
|
|
Jul 03 06:12:25 PM PDT 24 |
Jul 03 06:12:46 PM PDT 24 |
2227717644 ps |
| T526 |
/workspace/coverage/default/4.sram_ctrl_stress_all.1778052149 |
|
|
Jul 03 06:06:36 PM PDT 24 |
Jul 03 06:56:30 PM PDT 24 |
121038775939 ps |
| T527 |
/workspace/coverage/default/44.sram_ctrl_max_throughput.4174076865 |
|
|
Jul 03 06:13:33 PM PDT 24 |
Jul 03 06:13:50 PM PDT 24 |
4645616500 ps |
| T528 |
/workspace/coverage/default/24.sram_ctrl_multiple_keys.2403262564 |
|
|
Jul 03 06:09:18 PM PDT 24 |
Jul 03 06:25:56 PM PDT 24 |
5864006297 ps |
| T529 |
/workspace/coverage/default/44.sram_ctrl_stress_all_with_rand_reset.4221223888 |
|
|
Jul 03 06:13:41 PM PDT 24 |
Jul 03 06:13:57 PM PDT 24 |
570912654 ps |
| T530 |
/workspace/coverage/default/9.sram_ctrl_partial_access.1459520159 |
|
|
Jul 03 06:06:50 PM PDT 24 |
Jul 03 06:07:06 PM PDT 24 |
16374577886 ps |
| T531 |
/workspace/coverage/default/8.sram_ctrl_mem_partial_access.4161816008 |
|
|
Jul 03 06:06:50 PM PDT 24 |
Jul 03 06:09:46 PM PDT 24 |
7777326516 ps |
| T532 |
/workspace/coverage/default/38.sram_ctrl_multiple_keys.3326009445 |
|
|
Jul 03 06:12:22 PM PDT 24 |
Jul 03 06:28:40 PM PDT 24 |
20783317620 ps |
| T533 |
/workspace/coverage/default/41.sram_ctrl_regwen.3124361873 |
|
|
Jul 03 06:13:05 PM PDT 24 |
Jul 03 06:30:46 PM PDT 24 |
31332458258 ps |
| T534 |
/workspace/coverage/default/42.sram_ctrl_stress_pipeline.1425546228 |
|
|
Jul 03 06:13:08 PM PDT 24 |
Jul 03 06:17:24 PM PDT 24 |
8047134395 ps |
| T535 |
/workspace/coverage/default/32.sram_ctrl_throughput_w_partial_write.1812729979 |
|
|
Jul 03 06:11:03 PM PDT 24 |
Jul 03 06:11:29 PM PDT 24 |
3953263705 ps |
| T109 |
/workspace/coverage/default/12.sram_ctrl_stress_all_with_rand_reset.566696779 |
|
|
Jul 03 06:07:16 PM PDT 24 |
Jul 03 06:07:26 PM PDT 24 |
1085686390 ps |
| T536 |
/workspace/coverage/default/30.sram_ctrl_max_throughput.2909455905 |
|
|
Jul 03 06:10:34 PM PDT 24 |
Jul 03 06:11:42 PM PDT 24 |
3073250267 ps |
| T537 |
/workspace/coverage/default/5.sram_ctrl_stress_all.3865994822 |
|
|
Jul 03 06:06:40 PM PDT 24 |
Jul 03 06:54:21 PM PDT 24 |
28360613116 ps |
| T538 |
/workspace/coverage/default/7.sram_ctrl_throughput_w_partial_write.2301517171 |
|
|
Jul 03 06:06:44 PM PDT 24 |
Jul 03 06:08:08 PM PDT 24 |
3262754467 ps |
| T539 |
/workspace/coverage/default/8.sram_ctrl_alert_test.3148733566 |
|
|
Jul 03 06:06:46 PM PDT 24 |
Jul 03 06:06:47 PM PDT 24 |
60456576 ps |
| T540 |
/workspace/coverage/default/25.sram_ctrl_max_throughput.3524150 |
|
|
Jul 03 06:09:34 PM PDT 24 |
Jul 03 06:11:18 PM PDT 24 |
775510878 ps |
| T541 |
/workspace/coverage/default/29.sram_ctrl_bijection.3436195934 |
|
|
Jul 03 06:10:14 PM PDT 24 |
Jul 03 06:43:15 PM PDT 24 |
448646640767 ps |
| T542 |
/workspace/coverage/default/12.sram_ctrl_alert_test.2175697282 |
|
|
Jul 03 06:07:17 PM PDT 24 |
Jul 03 06:07:18 PM PDT 24 |
37581324 ps |
| T543 |
/workspace/coverage/default/26.sram_ctrl_multiple_keys.1432003388 |
|
|
Jul 03 06:09:43 PM PDT 24 |
Jul 03 06:32:14 PM PDT 24 |
49451982379 ps |
| T544 |
/workspace/coverage/default/4.sram_ctrl_smoke.2302134680 |
|
|
Jul 03 06:06:36 PM PDT 24 |
Jul 03 06:07:52 PM PDT 24 |
445915541 ps |
| T545 |
/workspace/coverage/default/38.sram_ctrl_access_during_key_req.1720319974 |
|
|
Jul 03 06:12:29 PM PDT 24 |
Jul 03 06:46:26 PM PDT 24 |
21452841602 ps |
| T546 |
/workspace/coverage/default/20.sram_ctrl_stress_all_with_rand_reset.488689038 |
|
|
Jul 03 06:08:37 PM PDT 24 |
Jul 03 06:08:53 PM PDT 24 |
1446030881 ps |