Unified Coverage Report :: Group :: sram_ctrl_env_pkg::sram_ctrl_env_cov#(15)::subword_access_cg

Group : sram_ctrl_env_pkg::sram_ctrl_env_cov#(15)::subword_access_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_sram_ctrl_env_0.1/sram_ctrl_env_cov.sv

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Summary for Group sram_ctrl_env_pkg::sram_ctrl_env_cov#(15)::subword_access_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	7	0	7	100.00
Crosses	10	0	10	100.00

Variables for Group sram_ctrl_env_pkg::sram_ctrl_env_cov#(15)::subword_access_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
subword_granularity_cp	5	0	5	100.00	100	1	1	0
subword_we_cp	2	0	2	100.00	100	1	1	2

Crosses for Group sram_ctrl_env_pkg::sram_ctrl_env_cov#(15)::subword_access_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
subword_access	10	0	10	100.00	100	1	1	0

Summary for Variable subword_granularity_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	5	0	5	100.00

User Defined Bins for subword_granularity_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ill_access	0	Illegal

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
word_access	138578741	1			T1	1129		T2	954		T3	79385
triple_byte_access	2700758	1			T1	19		T2	26		T3	1625
halfword_access	4141781	1			T1	28		T2	23		T3	2361
byte_access	5799019	1			T1	53		T2	33		T3	3162
zero_access	1759506	1			T1	8		T2	4		T3	764

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Summary for Variable subword_we_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for subword_we_cp

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

76445527

1

T1

614

T2

506

T3

43690

auto[1]

76534278

1

T1

623

T2

534

T3

43607

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Summary for Cross subword_access

Samples crossed: subword_we_cp subword_granularity_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	10	0	10	100.00

Automatically Generated Cross Bins for subword_access

Bins

subword_we_cp	subword_granularity_cp	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0]	word_access	69096629	1			T1	558		T2	462		T3	39813
auto[0]	triple_byte_access	1289220	1			T1	7		T2	11		T3	764
auto[0]	halfword_access	2025775	1			T1	17		T2	10		T3	1165
auto[0]	byte_access	2978135	1			T1	27		T2	20		T3	1567
auto[0]	zero_access	1055768	1			T1	5		T2	3		T3	381
auto[1]	word_access	69482112	1			T1	571		T2	492		T3	39572
auto[1]	triple_byte_access	1411538	1			T1	12		T2	15		T3	861
auto[1]	halfword_access	2116006	1			T1	11		T2	13		T3	1196
auto[1]	byte_access	2820884	1			T1	26		T2	13		T3	1595
auto[1]	zero_access	703738	1			T1	3		T2	1		T3	383