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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.97 99.19 94.27 99.72 100.00 96.03 99.12 97.44


Total test records in report: 1034
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T306 /workspace/coverage/default/49.sram_ctrl_max_throughput.3325728376 Aug 18 04:49:34 PM PDT 24 Aug 18 04:50:13 PM PDT 24 7959771084 ps
T307 /workspace/coverage/default/36.sram_ctrl_stress_all_with_rand_reset.3773993073 Aug 18 04:47:45 PM PDT 24 Aug 18 04:48:32 PM PDT 24 1410744636 ps
T308 /workspace/coverage/default/27.sram_ctrl_smoke.2332185188 Aug 18 04:46:24 PM PDT 24 Aug 18 04:47:06 PM PDT 24 740885978 ps
T309 /workspace/coverage/default/24.sram_ctrl_multiple_keys.967641974 Aug 18 04:46:09 PM PDT 24 Aug 18 04:50:21 PM PDT 24 2820505608 ps
T310 /workspace/coverage/default/6.sram_ctrl_ram_cfg.1179528365 Aug 18 04:45:22 PM PDT 24 Aug 18 04:45:25 PM PDT 24 348760808 ps
T311 /workspace/coverage/default/6.sram_ctrl_lc_escalation.3960560645 Aug 18 04:45:33 PM PDT 24 Aug 18 04:46:40 PM PDT 24 56662851096 ps
T312 /workspace/coverage/default/17.sram_ctrl_smoke.3840425594 Aug 18 04:45:53 PM PDT 24 Aug 18 04:46:06 PM PDT 24 941694947 ps
T313 /workspace/coverage/default/5.sram_ctrl_stress_all.2894482385 Aug 18 04:45:48 PM PDT 24 Aug 18 05:33:52 PM PDT 24 69582233390 ps
T314 /workspace/coverage/default/29.sram_ctrl_stress_pipeline.3894281352 Aug 18 04:46:36 PM PDT 24 Aug 18 04:50:09 PM PDT 24 11987448047 ps
T315 /workspace/coverage/default/27.sram_ctrl_alert_test.1306800911 Aug 18 04:46:36 PM PDT 24 Aug 18 04:46:37 PM PDT 24 17330331 ps
T316 /workspace/coverage/default/4.sram_ctrl_stress_pipeline.3990677626 Aug 18 04:45:29 PM PDT 24 Aug 18 04:51:35 PM PDT 24 5573988871 ps
T317 /workspace/coverage/default/8.sram_ctrl_partial_access.1207044585 Aug 18 04:45:18 PM PDT 24 Aug 18 04:47:19 PM PDT 24 4598495752 ps
T318 /workspace/coverage/default/4.sram_ctrl_executable.1369547053 Aug 18 04:45:18 PM PDT 24 Aug 18 05:14:42 PM PDT 24 45015670739 ps
T319 /workspace/coverage/default/26.sram_ctrl_max_throughput.2384031062 Aug 18 04:46:17 PM PDT 24 Aug 18 04:47:59 PM PDT 24 762468001 ps
T320 /workspace/coverage/default/38.sram_ctrl_stress_all.2175429188 Aug 18 04:47:53 PM PDT 24 Aug 18 05:59:12 PM PDT 24 475622302645 ps
T321 /workspace/coverage/default/0.sram_ctrl_ram_cfg.2438725893 Aug 18 04:45:17 PM PDT 24 Aug 18 04:45:21 PM PDT 24 1345531459 ps
T322 /workspace/coverage/default/41.sram_ctrl_lc_escalation.1611540921 Aug 18 04:48:22 PM PDT 24 Aug 18 04:48:30 PM PDT 24 12361003883 ps
T323 /workspace/coverage/default/35.sram_ctrl_stress_all.609217678 Aug 18 04:47:31 PM PDT 24 Aug 18 05:20:19 PM PDT 24 328717726113 ps
T324 /workspace/coverage/default/20.sram_ctrl_regwen.2290950038 Aug 18 04:46:02 PM PDT 24 Aug 18 04:54:17 PM PDT 24 2962183647 ps
T325 /workspace/coverage/default/11.sram_ctrl_stress_pipeline.363446375 Aug 18 04:45:49 PM PDT 24 Aug 18 04:49:27 PM PDT 24 2684661498 ps
T326 /workspace/coverage/default/32.sram_ctrl_access_during_key_req.3496595333 Aug 18 04:46:55 PM PDT 24 Aug 18 05:09:51 PM PDT 24 121287864832 ps
T327 /workspace/coverage/default/0.sram_ctrl_mem_walk.2012209345 Aug 18 04:45:15 PM PDT 24 Aug 18 04:48:16 PM PDT 24 39116235456 ps
T328 /workspace/coverage/default/41.sram_ctrl_smoke.236841477 Aug 18 04:48:12 PM PDT 24 Aug 18 04:48:32 PM PDT 24 5603808087 ps
T329 /workspace/coverage/default/0.sram_ctrl_multiple_keys.3670225918 Aug 18 04:45:13 PM PDT 24 Aug 18 04:58:26 PM PDT 24 15358676000 ps
T330 /workspace/coverage/default/25.sram_ctrl_max_throughput.3332403464 Aug 18 04:46:17 PM PDT 24 Aug 18 04:46:37 PM PDT 24 719098854 ps
T331 /workspace/coverage/default/30.sram_ctrl_smoke.3801837458 Aug 18 04:46:44 PM PDT 24 Aug 18 04:46:54 PM PDT 24 880570130 ps
T332 /workspace/coverage/default/10.sram_ctrl_bijection.2294344215 Aug 18 04:45:51 PM PDT 24 Aug 18 05:08:36 PM PDT 24 82934280168 ps
T333 /workspace/coverage/default/34.sram_ctrl_alert_test.1649080937 Aug 18 04:47:15 PM PDT 24 Aug 18 04:47:15 PM PDT 24 36796366 ps
T334 /workspace/coverage/default/40.sram_ctrl_stress_all_with_rand_reset.1440916984 Aug 18 04:48:13 PM PDT 24 Aug 18 04:48:38 PM PDT 24 915876937 ps
T335 /workspace/coverage/default/25.sram_ctrl_multiple_keys.2682974103 Aug 18 04:46:09 PM PDT 24 Aug 18 05:13:32 PM PDT 24 99971947193 ps
T336 /workspace/coverage/default/18.sram_ctrl_stress_all.1895712707 Aug 18 04:45:48 PM PDT 24 Aug 18 05:55:06 PM PDT 24 467283535205 ps
T337 /workspace/coverage/default/42.sram_ctrl_multiple_keys.1565299349 Aug 18 04:48:21 PM PDT 24 Aug 18 05:08:01 PM PDT 24 20158292546 ps
T338 /workspace/coverage/default/0.sram_ctrl_executable.3312331779 Aug 18 04:45:10 PM PDT 24 Aug 18 04:48:51 PM PDT 24 36823149336 ps
T339 /workspace/coverage/default/33.sram_ctrl_ram_cfg.1877103234 Aug 18 04:47:06 PM PDT 24 Aug 18 04:47:09 PM PDT 24 1412014579 ps
T340 /workspace/coverage/default/33.sram_ctrl_throughput_w_partial_write.4104904936 Aug 18 04:47:06 PM PDT 24 Aug 18 04:48:02 PM PDT 24 769524021 ps
T341 /workspace/coverage/default/21.sram_ctrl_stress_pipeline.4170633355 Aug 18 04:46:00 PM PDT 24 Aug 18 04:50:31 PM PDT 24 8280879275 ps
T342 /workspace/coverage/default/2.sram_ctrl_access_during_key_req.989705718 Aug 18 04:45:26 PM PDT 24 Aug 18 05:05:08 PM PDT 24 52936496862 ps
T343 /workspace/coverage/default/7.sram_ctrl_stress_all_with_rand_reset.929267562 Aug 18 04:45:18 PM PDT 24 Aug 18 04:45:45 PM PDT 24 784390944 ps
T344 /workspace/coverage/default/17.sram_ctrl_mem_walk.1734395805 Aug 18 04:46:02 PM PDT 24 Aug 18 04:49:10 PM PDT 24 26545408790 ps
T345 /workspace/coverage/default/42.sram_ctrl_bijection.8979867 Aug 18 04:48:20 PM PDT 24 Aug 18 05:00:07 PM PDT 24 86476791421 ps
T346 /workspace/coverage/default/47.sram_ctrl_bijection.637344222 Aug 18 04:49:14 PM PDT 24 Aug 18 04:58:53 PM PDT 24 332345008685 ps
T347 /workspace/coverage/default/24.sram_ctrl_smoke.3448988563 Aug 18 04:46:03 PM PDT 24 Aug 18 04:46:14 PM PDT 24 779894573 ps
T348 /workspace/coverage/default/34.sram_ctrl_mem_partial_access.2922670060 Aug 18 04:47:16 PM PDT 24 Aug 18 04:50:02 PM PDT 24 19617936216 ps
T349 /workspace/coverage/default/1.sram_ctrl_multiple_keys.2804980024 Aug 18 04:45:20 PM PDT 24 Aug 18 05:03:42 PM PDT 24 75381340377 ps
T350 /workspace/coverage/default/24.sram_ctrl_throughput_w_partial_write.1784245396 Aug 18 04:46:19 PM PDT 24 Aug 18 04:48:23 PM PDT 24 776027211 ps
T351 /workspace/coverage/default/19.sram_ctrl_max_throughput.3900088732 Aug 18 04:45:58 PM PDT 24 Aug 18 04:48:11 PM PDT 24 1446887120 ps
T352 /workspace/coverage/default/45.sram_ctrl_throughput_w_partial_write.1655616625 Aug 18 04:49:01 PM PDT 24 Aug 18 04:49:55 PM PDT 24 2628104876 ps
T353 /workspace/coverage/default/37.sram_ctrl_stress_pipeline.4034928833 Aug 18 04:47:42 PM PDT 24 Aug 18 04:52:30 PM PDT 24 4369478600 ps
T354 /workspace/coverage/default/23.sram_ctrl_partial_access.1601980371 Aug 18 04:46:19 PM PDT 24 Aug 18 04:46:41 PM PDT 24 10777041170 ps
T355 /workspace/coverage/default/23.sram_ctrl_regwen.647568508 Aug 18 04:46:19 PM PDT 24 Aug 18 04:59:46 PM PDT 24 12905618861 ps
T356 /workspace/coverage/default/8.sram_ctrl_stress_pipeline.3279023872 Aug 18 04:45:38 PM PDT 24 Aug 18 04:51:38 PM PDT 24 39633099112 ps
T357 /workspace/coverage/default/24.sram_ctrl_bijection.3507939681 Aug 18 04:46:11 PM PDT 24 Aug 18 05:18:45 PM PDT 24 27667477706 ps
T358 /workspace/coverage/default/45.sram_ctrl_stress_pipeline.4274999164 Aug 18 04:48:53 PM PDT 24 Aug 18 04:52:34 PM PDT 24 18595271311 ps
T359 /workspace/coverage/default/16.sram_ctrl_multiple_keys.759830034 Aug 18 04:45:50 PM PDT 24 Aug 18 04:58:33 PM PDT 24 19274220347 ps
T360 /workspace/coverage/default/18.sram_ctrl_stress_pipeline.1212449454 Aug 18 04:45:55 PM PDT 24 Aug 18 04:49:20 PM PDT 24 8798910442 ps
T361 /workspace/coverage/default/39.sram_ctrl_ram_cfg.848301527 Aug 18 04:47:59 PM PDT 24 Aug 18 04:48:03 PM PDT 24 3356362402 ps
T362 /workspace/coverage/default/39.sram_ctrl_mem_partial_access.2230668063 Aug 18 04:48:01 PM PDT 24 Aug 18 04:49:24 PM PDT 24 12105551882 ps
T363 /workspace/coverage/default/10.sram_ctrl_partial_access.966364407 Aug 18 04:45:40 PM PDT 24 Aug 18 04:46:26 PM PDT 24 2241696742 ps
T364 /workspace/coverage/default/23.sram_ctrl_ram_cfg.4037252151 Aug 18 04:46:14 PM PDT 24 Aug 18 04:46:18 PM PDT 24 386496298 ps
T365 /workspace/coverage/default/23.sram_ctrl_stress_all.144411731 Aug 18 04:46:13 PM PDT 24 Aug 18 07:01:28 PM PDT 24 1293973599389 ps
T366 /workspace/coverage/default/34.sram_ctrl_lc_escalation.1625793612 Aug 18 04:47:16 PM PDT 24 Aug 18 04:49:06 PM PDT 24 32261483346 ps
T367 /workspace/coverage/default/25.sram_ctrl_mem_partial_access.794319925 Aug 18 04:46:12 PM PDT 24 Aug 18 04:47:45 PM PDT 24 5463366504 ps
T368 /workspace/coverage/default/46.sram_ctrl_stress_all.4232781620 Aug 18 04:49:10 PM PDT 24 Aug 18 06:13:53 PM PDT 24 112378295557 ps
T369 /workspace/coverage/default/14.sram_ctrl_partial_access_b2b.3337520678 Aug 18 04:45:46 PM PDT 24 Aug 18 04:49:02 PM PDT 24 6920324176 ps
T370 /workspace/coverage/default/4.sram_ctrl_bijection.4139379909 Aug 18 04:45:41 PM PDT 24 Aug 18 05:18:31 PM PDT 24 55327065131 ps
T371 /workspace/coverage/default/17.sram_ctrl_max_throughput.4235421389 Aug 18 04:46:04 PM PDT 24 Aug 18 04:46:16 PM PDT 24 719230489 ps
T372 /workspace/coverage/default/27.sram_ctrl_access_during_key_req.910925293 Aug 18 04:46:26 PM PDT 24 Aug 18 04:53:46 PM PDT 24 21834789225 ps
T373 /workspace/coverage/default/18.sram_ctrl_multiple_keys.2900281640 Aug 18 04:46:07 PM PDT 24 Aug 18 04:51:25 PM PDT 24 17951038490 ps
T374 /workspace/coverage/default/44.sram_ctrl_stress_all.455281105 Aug 18 04:48:52 PM PDT 24 Aug 18 05:04:44 PM PDT 24 36102159061 ps
T375 /workspace/coverage/default/27.sram_ctrl_max_throughput.4251297118 Aug 18 04:46:28 PM PDT 24 Aug 18 04:47:30 PM PDT 24 2693877882 ps
T376 /workspace/coverage/default/13.sram_ctrl_stress_all_with_rand_reset.3338000838 Aug 18 04:45:47 PM PDT 24 Aug 18 04:47:44 PM PDT 24 10827683908 ps
T377 /workspace/coverage/default/15.sram_ctrl_max_throughput.3128575477 Aug 18 04:45:59 PM PDT 24 Aug 18 04:46:06 PM PDT 24 711686352 ps
T378 /workspace/coverage/default/8.sram_ctrl_bijection.1359757903 Aug 18 04:45:26 PM PDT 24 Aug 18 04:55:19 PM PDT 24 35781240552 ps
T379 /workspace/coverage/default/9.sram_ctrl_partial_access_b2b.2599518845 Aug 18 04:45:44 PM PDT 24 Aug 18 04:49:44 PM PDT 24 9147719859 ps
T380 /workspace/coverage/default/16.sram_ctrl_throughput_w_partial_write.1825832049 Aug 18 04:45:48 PM PDT 24 Aug 18 04:47:37 PM PDT 24 827081341 ps
T381 /workspace/coverage/default/47.sram_ctrl_access_during_key_req.3422413182 Aug 18 04:49:10 PM PDT 24 Aug 18 04:57:54 PM PDT 24 8529064591 ps
T382 /workspace/coverage/default/29.sram_ctrl_stress_all_with_rand_reset.2926450569 Aug 18 04:46:45 PM PDT 24 Aug 18 04:47:22 PM PDT 24 1079944224 ps
T383 /workspace/coverage/default/39.sram_ctrl_mem_walk.2482481841 Aug 18 04:47:59 PM PDT 24 Aug 18 04:51:15 PM PDT 24 30982733754 ps
T384 /workspace/coverage/default/0.sram_ctrl_lc_escalation.1536584250 Aug 18 04:45:24 PM PDT 24 Aug 18 04:46:33 PM PDT 24 12537941308 ps
T385 /workspace/coverage/default/40.sram_ctrl_stress_all.3637313316 Aug 18 04:48:15 PM PDT 24 Aug 18 05:44:29 PM PDT 24 178571396525 ps
T386 /workspace/coverage/default/42.sram_ctrl_partial_access_b2b.742695255 Aug 18 04:48:21 PM PDT 24 Aug 18 04:54:29 PM PDT 24 22852902594 ps
T387 /workspace/coverage/default/44.sram_ctrl_mem_partial_access.686111191 Aug 18 04:48:52 PM PDT 24 Aug 18 04:51:38 PM PDT 24 3098214167 ps
T388 /workspace/coverage/default/27.sram_ctrl_throughput_w_partial_write.151525588 Aug 18 04:46:27 PM PDT 24 Aug 18 04:47:32 PM PDT 24 3349719598 ps
T389 /workspace/coverage/default/13.sram_ctrl_executable.1940449173 Aug 18 04:45:58 PM PDT 24 Aug 18 04:51:55 PM PDT 24 6011085887 ps
T390 /workspace/coverage/default/19.sram_ctrl_partial_access_b2b.3377504717 Aug 18 04:46:08 PM PDT 24 Aug 18 04:50:59 PM PDT 24 47520441983 ps
T391 /workspace/coverage/default/36.sram_ctrl_multiple_keys.3479420041 Aug 18 04:47:29 PM PDT 24 Aug 18 05:02:46 PM PDT 24 47839744005 ps
T392 /workspace/coverage/default/37.sram_ctrl_mem_partial_access.3461362803 Aug 18 04:47:42 PM PDT 24 Aug 18 04:50:14 PM PDT 24 19963175873 ps
T393 /workspace/coverage/default/34.sram_ctrl_partial_access.3877308234 Aug 18 04:47:20 PM PDT 24 Aug 18 04:48:01 PM PDT 24 1147567213 ps
T394 /workspace/coverage/default/32.sram_ctrl_regwen.1972584706 Aug 18 04:46:57 PM PDT 24 Aug 18 04:52:17 PM PDT 24 28937362681 ps
T395 /workspace/coverage/default/33.sram_ctrl_stress_pipeline.2129824850 Aug 18 04:47:06 PM PDT 24 Aug 18 04:51:49 PM PDT 24 3963894096 ps
T396 /workspace/coverage/default/39.sram_ctrl_stress_all.3285955777 Aug 18 04:48:01 PM PDT 24 Aug 18 05:41:32 PM PDT 24 296857715016 ps
T397 /workspace/coverage/default/9.sram_ctrl_executable.442118137 Aug 18 04:45:45 PM PDT 24 Aug 18 04:53:29 PM PDT 24 157647045309 ps
T398 /workspace/coverage/default/6.sram_ctrl_partial_access.4106372608 Aug 18 04:45:25 PM PDT 24 Aug 18 04:45:41 PM PDT 24 2104066340 ps
T399 /workspace/coverage/default/44.sram_ctrl_partial_access_b2b.3348748922 Aug 18 04:48:52 PM PDT 24 Aug 18 04:55:09 PM PDT 24 11618437744 ps
T400 /workspace/coverage/default/24.sram_ctrl_regwen.2697971336 Aug 18 04:46:08 PM PDT 24 Aug 18 04:50:30 PM PDT 24 3235640113 ps
T401 /workspace/coverage/default/6.sram_ctrl_alert_test.4069097901 Aug 18 04:45:42 PM PDT 24 Aug 18 04:45:42 PM PDT 24 17549559 ps
T402 /workspace/coverage/default/36.sram_ctrl_alert_test.1063762719 Aug 18 04:47:45 PM PDT 24 Aug 18 04:47:45 PM PDT 24 21015948 ps
T403 /workspace/coverage/default/15.sram_ctrl_multiple_keys.180297192 Aug 18 04:45:48 PM PDT 24 Aug 18 04:48:04 PM PDT 24 22702871318 ps
T404 /workspace/coverage/default/18.sram_ctrl_regwen.2633539096 Aug 18 04:46:01 PM PDT 24 Aug 18 04:57:02 PM PDT 24 15303058744 ps
T405 /workspace/coverage/default/1.sram_ctrl_partial_access.2889200390 Aug 18 04:45:15 PM PDT 24 Aug 18 04:45:22 PM PDT 24 503282440 ps
T406 /workspace/coverage/default/28.sram_ctrl_mem_walk.2476586707 Aug 18 04:46:39 PM PDT 24 Aug 18 04:49:07 PM PDT 24 32926729646 ps
T407 /workspace/coverage/default/32.sram_ctrl_smoke.2400855347 Aug 18 04:46:57 PM PDT 24 Aug 18 04:48:15 PM PDT 24 3304581156 ps
T408 /workspace/coverage/default/42.sram_ctrl_stress_pipeline.2962263457 Aug 18 04:48:22 PM PDT 24 Aug 18 04:53:58 PM PDT 24 22798352279 ps
T409 /workspace/coverage/default/36.sram_ctrl_mem_partial_access.462398069 Aug 18 04:47:43 PM PDT 24 Aug 18 04:48:53 PM PDT 24 2016883064 ps
T410 /workspace/coverage/default/36.sram_ctrl_throughput_w_partial_write.3551376214 Aug 18 04:47:29 PM PDT 24 Aug 18 04:47:53 PM PDT 24 2961179127 ps
T411 /workspace/coverage/default/47.sram_ctrl_partial_access_b2b.3363436707 Aug 18 04:49:14 PM PDT 24 Aug 18 04:54:56 PM PDT 24 104612074510 ps
T412 /workspace/coverage/default/21.sram_ctrl_executable.2978410578 Aug 18 04:46:09 PM PDT 24 Aug 18 04:56:03 PM PDT 24 49496449098 ps
T413 /workspace/coverage/default/11.sram_ctrl_max_throughput.3021525083 Aug 18 04:45:45 PM PDT 24 Aug 18 04:47:20 PM PDT 24 748213342 ps
T414 /workspace/coverage/default/43.sram_ctrl_partial_access.3511775934 Aug 18 04:48:44 PM PDT 24 Aug 18 04:48:51 PM PDT 24 1411587264 ps
T111 /workspace/coverage/default/44.sram_ctrl_stress_all_with_rand_reset.2899225106 Aug 18 04:48:53 PM PDT 24 Aug 18 04:49:30 PM PDT 24 3242045129 ps
T415 /workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.2883706579 Aug 18 04:49:21 PM PDT 24 Aug 18 04:50:48 PM PDT 24 773300325 ps
T112 /workspace/coverage/default/35.sram_ctrl_stress_all_with_rand_reset.585722852 Aug 18 04:47:30 PM PDT 24 Aug 18 04:48:07 PM PDT 24 5931137285 ps
T416 /workspace/coverage/default/23.sram_ctrl_alert_test.3335326427 Aug 18 04:46:10 PM PDT 24 Aug 18 04:46:11 PM PDT 24 28615465 ps
T417 /workspace/coverage/default/2.sram_ctrl_partial_access.3281553834 Aug 18 04:45:15 PM PDT 24 Aug 18 04:47:04 PM PDT 24 2081179411 ps
T418 /workspace/coverage/default/30.sram_ctrl_multiple_keys.3093372590 Aug 18 04:46:45 PM PDT 24 Aug 18 05:14:59 PM PDT 24 17866173169 ps
T419 /workspace/coverage/default/24.sram_ctrl_partial_access.42278475 Aug 18 04:45:58 PM PDT 24 Aug 18 04:46:32 PM PDT 24 2858802479 ps
T420 /workspace/coverage/default/1.sram_ctrl_mem_walk.3505549924 Aug 18 04:45:23 PM PDT 24 Aug 18 04:48:03 PM PDT 24 7199530606 ps
T421 /workspace/coverage/default/18.sram_ctrl_alert_test.2555579484 Aug 18 04:45:49 PM PDT 24 Aug 18 04:45:50 PM PDT 24 14576608 ps
T422 /workspace/coverage/default/3.sram_ctrl_smoke.2926339079 Aug 18 04:45:24 PM PDT 24 Aug 18 04:45:39 PM PDT 24 782747545 ps
T423 /workspace/coverage/default/8.sram_ctrl_mem_walk.1126267491 Aug 18 04:45:41 PM PDT 24 Aug 18 04:48:35 PM PDT 24 34542289763 ps
T424 /workspace/coverage/default/32.sram_ctrl_ram_cfg.1398365098 Aug 18 04:46:55 PM PDT 24 Aug 18 04:46:58 PM PDT 24 407349238 ps
T425 /workspace/coverage/default/48.sram_ctrl_partial_access.63739586 Aug 18 04:49:21 PM PDT 24 Aug 18 04:49:50 PM PDT 24 707574869 ps
T426 /workspace/coverage/default/16.sram_ctrl_smoke.832945394 Aug 18 04:45:46 PM PDT 24 Aug 18 04:48:10 PM PDT 24 1388772139 ps
T427 /workspace/coverage/default/20.sram_ctrl_lc_escalation.1289209372 Aug 18 04:46:02 PM PDT 24 Aug 18 04:47:51 PM PDT 24 66759052776 ps
T428 /workspace/coverage/default/25.sram_ctrl_smoke.1052369668 Aug 18 04:46:14 PM PDT 24 Aug 18 04:46:42 PM PDT 24 1542571650 ps
T429 /workspace/coverage/default/48.sram_ctrl_stress_pipeline.375548564 Aug 18 04:49:22 PM PDT 24 Aug 18 04:53:52 PM PDT 24 4202695661 ps
T430 /workspace/coverage/default/4.sram_ctrl_smoke.2494459306 Aug 18 04:45:32 PM PDT 24 Aug 18 04:47:32 PM PDT 24 1276329394 ps
T431 /workspace/coverage/default/16.sram_ctrl_stress_pipeline.547034056 Aug 18 04:45:45 PM PDT 24 Aug 18 04:51:06 PM PDT 24 17638144827 ps
T432 /workspace/coverage/default/30.sram_ctrl_regwen.1284640324 Aug 18 04:46:46 PM PDT 24 Aug 18 05:07:40 PM PDT 24 3666797749 ps
T433 /workspace/coverage/default/28.sram_ctrl_throughput_w_partial_write.2050204016 Aug 18 04:46:37 PM PDT 24 Aug 18 04:48:35 PM PDT 24 789494592 ps
T434 /workspace/coverage/default/4.sram_ctrl_lc_escalation.3488012352 Aug 18 04:45:40 PM PDT 24 Aug 18 04:47:03 PM PDT 24 49023690291 ps
T435 /workspace/coverage/default/40.sram_ctrl_alert_test.2468309856 Aug 18 04:48:11 PM PDT 24 Aug 18 04:48:12 PM PDT 24 13146975 ps
T436 /workspace/coverage/default/17.sram_ctrl_executable.440722632 Aug 18 04:46:08 PM PDT 24 Aug 18 04:57:40 PM PDT 24 9206894781 ps
T437 /workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.1104705696 Aug 18 04:45:35 PM PDT 24 Aug 18 04:45:50 PM PDT 24 364478245 ps
T438 /workspace/coverage/default/35.sram_ctrl_mem_walk.2292727340 Aug 18 04:47:31 PM PDT 24 Aug 18 04:49:41 PM PDT 24 7899629936 ps
T439 /workspace/coverage/default/44.sram_ctrl_smoke.4012082716 Aug 18 04:48:42 PM PDT 24 Aug 18 04:50:17 PM PDT 24 4841221926 ps
T440 /workspace/coverage/default/13.sram_ctrl_regwen.2728046515 Aug 18 04:45:48 PM PDT 24 Aug 18 04:58:18 PM PDT 24 10705249660 ps
T441 /workspace/coverage/default/21.sram_ctrl_ram_cfg.2346259628 Aug 18 04:46:12 PM PDT 24 Aug 18 04:46:16 PM PDT 24 1348288063 ps
T442 /workspace/coverage/default/43.sram_ctrl_lc_escalation.850734179 Aug 18 04:48:40 PM PDT 24 Aug 18 04:49:16 PM PDT 24 5989260876 ps
T443 /workspace/coverage/default/6.sram_ctrl_access_during_key_req.588021446 Aug 18 04:45:28 PM PDT 24 Aug 18 04:53:43 PM PDT 24 16724926000 ps
T444 /workspace/coverage/default/33.sram_ctrl_stress_all.2913753710 Aug 18 04:47:20 PM PDT 24 Aug 18 05:31:21 PM PDT 24 74448696709 ps
T445 /workspace/coverage/default/13.sram_ctrl_stress_all.1049534567 Aug 18 04:45:46 PM PDT 24 Aug 18 06:56:59 PM PDT 24 169057109622 ps
T446 /workspace/coverage/default/22.sram_ctrl_regwen.4164695634 Aug 18 04:46:08 PM PDT 24 Aug 18 05:00:05 PM PDT 24 12855484756 ps
T447 /workspace/coverage/default/31.sram_ctrl_executable.2830567520 Aug 18 04:46:58 PM PDT 24 Aug 18 04:54:15 PM PDT 24 7250457500 ps
T448 /workspace/coverage/default/44.sram_ctrl_max_throughput.906040590 Aug 18 04:48:55 PM PDT 24 Aug 18 04:49:53 PM PDT 24 1520332154 ps
T449 /workspace/coverage/default/9.sram_ctrl_ram_cfg.3619206847 Aug 18 04:45:44 PM PDT 24 Aug 18 04:45:48 PM PDT 24 374220313 ps
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T496 /workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.3830970392 Aug 18 04:45:39 PM PDT 24 Aug 18 04:46:12 PM PDT 24 3443555541 ps
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T504 /workspace/coverage/default/46.sram_ctrl_max_throughput.4245481570 Aug 18 04:49:04 PM PDT 24 Aug 18 04:51:12 PM PDT 24 1699189743 ps
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T519 /workspace/coverage/default/19.sram_ctrl_throughput_w_partial_write.2536777555 Aug 18 04:45:48 PM PDT 24 Aug 18 04:45:54 PM PDT 24 894756277 ps
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T523 /workspace/coverage/default/12.sram_ctrl_throughput_w_partial_write.1184305313 Aug 18 04:45:45 PM PDT 24 Aug 18 04:48:30 PM PDT 24 3261673171 ps
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T525 /workspace/coverage/default/3.sram_ctrl_mem_partial_access.479590426 Aug 18 04:45:23 PM PDT 24 Aug 18 04:47:54 PM PDT 24 10620026142 ps
T526 /workspace/coverage/default/31.sram_ctrl_stress_pipeline.2121158653 Aug 18 04:46:55 PM PDT 24 Aug 18 04:50:24 PM PDT 24 2786105420 ps
T527 /workspace/coverage/default/49.sram_ctrl_mem_partial_access.4104679017 Aug 18 04:49:43 PM PDT 24 Aug 18 04:52:57 PM PDT 24 20086346813 ps
T528 /workspace/coverage/default/44.sram_ctrl_regwen.1556049221 Aug 18 04:48:51 PM PDT 24 Aug 18 05:00:58 PM PDT 24 8038160196 ps
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T531 /workspace/coverage/default/39.sram_ctrl_stress_all_with_rand_reset.635194817 Aug 18 04:48:01 PM PDT 24 Aug 18 04:48:14 PM PDT 24 425802016 ps
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T533 /workspace/coverage/default/18.sram_ctrl_access_during_key_req.1871178226 Aug 18 04:46:01 PM PDT 24 Aug 18 05:05:36 PM PDT 24 258003259790 ps
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T535 /workspace/coverage/default/22.sram_ctrl_stress_all_with_rand_reset.1803320649 Aug 18 04:46:00 PM PDT 24 Aug 18 04:47:10 PM PDT 24 1263215914 ps
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T540 /workspace/coverage/default/7.sram_ctrl_bijection.690494064 Aug 18 04:45:34 PM PDT 24 Aug 18 05:04:50 PM PDT 24 16786816028 ps
T541 /workspace/coverage/default/11.sram_ctrl_mem_walk.4034150583 Aug 18 04:45:39 PM PDT 24 Aug 18 04:51:07 PM PDT 24 53097322141 ps
T542 /workspace/coverage/default/7.sram_ctrl_partial_access.407573204 Aug 18 04:45:47 PM PDT 24 Aug 18 04:46:09 PM PDT 24 1511014002 ps
T543 /workspace/coverage/default/4.sram_ctrl_alert_test.3019416584 Aug 18 04:45:25 PM PDT 24 Aug 18 04:45:25 PM PDT 24 32408236 ps
T544 /workspace/coverage/default/36.sram_ctrl_stress_all.2014640677 Aug 18 04:47:43 PM PDT 24 Aug 18 06:59:34 PM PDT 24 892134510415 ps
T545 /workspace/coverage/default/39.sram_ctrl_max_throughput.2475512821 Aug 18 04:47:53 PM PDT 24 Aug 18 04:48:00 PM PDT 24 11068400350 ps
T546 /workspace/coverage/default/31.sram_ctrl_mem_walk.1588193359 Aug 18 04:46:54 PM PDT 24 Aug 18 04:50:02 PM PDT 24 79436275302 ps
T547 /workspace/coverage/default/39.sram_ctrl_stress_pipeline.2763709159 Aug 18 04:47:53 PM PDT 24 Aug 18 04:53:21 PM PDT 24 51860194900 ps
T548 /workspace/coverage/default/27.sram_ctrl_stress_pipeline.4079362815 Aug 18 04:46:20 PM PDT 24 Aug 18 04:50:51 PM PDT 24 82691965121 ps
T549 /workspace/coverage/default/2.sram_ctrl_stress_all.919509131 Aug 18 04:45:23 PM PDT 24 Aug 18 06:52:23 PM PDT 24 1099508223262 ps
T550 /workspace/coverage/default/17.sram_ctrl_throughput_w_partial_write.1128839727 Aug 18 04:46:05 PM PDT 24 Aug 18 04:48:13 PM PDT 24 3263381935 ps
T551 /workspace/coverage/default/37.sram_ctrl_throughput_w_partial_write.3271367036 Aug 18 04:47:44 PM PDT 24 Aug 18 04:48:07 PM PDT 24 2840338486 ps
T552 /workspace/coverage/default/26.sram_ctrl_stress_pipeline.1404172450 Aug 18 04:46:12 PM PDT 24 Aug 18 04:49:10 PM PDT 24 3076738274 ps
T553 /workspace/coverage/default/12.sram_ctrl_smoke.3124049374 Aug 18 04:45:39 PM PDT 24 Aug 18 04:45:52 PM PDT 24 479076345 ps
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