| T792 |
/workspace/coverage/default/2.sram_ctrl_max_throughput.3173309868 |
|
|
Aug 19 05:27:45 PM PDT 24 |
Aug 19 05:29:15 PM PDT 24 |
750648675 ps |
| T793 |
/workspace/coverage/default/0.sram_ctrl_stress_pipeline.263436310 |
|
|
Aug 19 05:27:41 PM PDT 24 |
Aug 19 05:32:52 PM PDT 24 |
23273006537 ps |
| T794 |
/workspace/coverage/default/33.sram_ctrl_stress_all_with_rand_reset.830681410 |
|
|
Aug 19 05:31:42 PM PDT 24 |
Aug 19 05:33:05 PM PDT 24 |
1987926872 ps |
| T795 |
/workspace/coverage/default/13.sram_ctrl_regwen.3080180739 |
|
|
Aug 19 05:28:55 PM PDT 24 |
Aug 19 05:51:06 PM PDT 24 |
10881548933 ps |
| T796 |
/workspace/coverage/default/17.sram_ctrl_partial_access_b2b.448528386 |
|
|
Aug 19 05:29:19 PM PDT 24 |
Aug 19 05:33:11 PM PDT 24 |
19060810243 ps |
| T797 |
/workspace/coverage/default/13.sram_ctrl_bijection.3643629488 |
|
|
Aug 19 05:28:54 PM PDT 24 |
Aug 19 05:42:54 PM PDT 24 |
134805161527 ps |
| T798 |
/workspace/coverage/default/33.sram_ctrl_executable.1694544191 |
|
|
Aug 19 05:31:45 PM PDT 24 |
Aug 19 05:45:55 PM PDT 24 |
11123850827 ps |
| T799 |
/workspace/coverage/default/8.sram_ctrl_stress_all_with_rand_reset.1125287752 |
|
|
Aug 19 05:28:23 PM PDT 24 |
Aug 19 05:28:42 PM PDT 24 |
2206380165 ps |
| T800 |
/workspace/coverage/default/49.sram_ctrl_mem_partial_access.2491052050 |
|
|
Aug 19 05:35:07 PM PDT 24 |
Aug 19 05:37:56 PM PDT 24 |
5039755085 ps |
| T801 |
/workspace/coverage/default/46.sram_ctrl_stress_all_with_rand_reset.3254615137 |
|
|
Aug 19 05:34:20 PM PDT 24 |
Aug 19 05:34:34 PM PDT 24 |
1046352005 ps |
| T802 |
/workspace/coverage/default/6.sram_ctrl_partial_access.3631234271 |
|
|
Aug 19 05:28:06 PM PDT 24 |
Aug 19 05:28:55 PM PDT 24 |
483240942 ps |
| T803 |
/workspace/coverage/default/37.sram_ctrl_partial_access.3386116059 |
|
|
Aug 19 05:32:23 PM PDT 24 |
Aug 19 05:32:40 PM PDT 24 |
1021467275 ps |
| T804 |
/workspace/coverage/default/35.sram_ctrl_regwen.492881861 |
|
|
Aug 19 05:32:04 PM PDT 24 |
Aug 19 05:35:23 PM PDT 24 |
2690356114 ps |
| T805 |
/workspace/coverage/default/23.sram_ctrl_executable.4250822177 |
|
|
Aug 19 05:29:51 PM PDT 24 |
Aug 19 05:33:45 PM PDT 24 |
42793700265 ps |
| T806 |
/workspace/coverage/default/25.sram_ctrl_executable.926490993 |
|
|
Aug 19 05:30:05 PM PDT 24 |
Aug 19 05:42:49 PM PDT 24 |
26010536739 ps |
| T807 |
/workspace/coverage/default/35.sram_ctrl_multiple_keys.1410141648 |
|
|
Aug 19 05:31:53 PM PDT 24 |
Aug 19 05:49:05 PM PDT 24 |
43278697116 ps |
| T808 |
/workspace/coverage/default/3.sram_ctrl_stress_pipeline.3212284353 |
|
|
Aug 19 05:27:54 PM PDT 24 |
Aug 19 05:33:33 PM PDT 24 |
49341488852 ps |
| T809 |
/workspace/coverage/default/14.sram_ctrl_smoke.2285807500 |
|
|
Aug 19 05:28:58 PM PDT 24 |
Aug 19 05:29:08 PM PDT 24 |
574225677 ps |
| T810 |
/workspace/coverage/default/7.sram_ctrl_access_during_key_req.2040636177 |
|
|
Aug 19 05:28:10 PM PDT 24 |
Aug 19 05:38:40 PM PDT 24 |
140915125577 ps |
| T811 |
/workspace/coverage/default/48.sram_ctrl_multiple_keys.1841982618 |
|
|
Aug 19 05:34:42 PM PDT 24 |
Aug 19 05:52:34 PM PDT 24 |
40142990023 ps |
| T812 |
/workspace/coverage/default/31.sram_ctrl_smoke.2607304654 |
|
|
Aug 19 05:31:11 PM PDT 24 |
Aug 19 05:31:18 PM PDT 24 |
707793422 ps |
| T813 |
/workspace/coverage/default/0.sram_ctrl_max_throughput.3338619345 |
|
|
Aug 19 05:27:46 PM PDT 24 |
Aug 19 05:27:53 PM PDT 24 |
2801722160 ps |
| T814 |
/workspace/coverage/default/16.sram_ctrl_smoke.1288430522 |
|
|
Aug 19 05:29:18 PM PDT 24 |
Aug 19 05:29:37 PM PDT 24 |
5107206694 ps |
| T815 |
/workspace/coverage/default/26.sram_ctrl_partial_access.3018932455 |
|
|
Aug 19 05:30:13 PM PDT 24 |
Aug 19 05:30:36 PM PDT 24 |
4860076450 ps |
| T816 |
/workspace/coverage/default/12.sram_ctrl_alert_test.2562659125 |
|
|
Aug 19 05:28:58 PM PDT 24 |
Aug 19 05:28:58 PM PDT 24 |
13359707 ps |
| T817 |
/workspace/coverage/default/25.sram_ctrl_bijection.2695047629 |
|
|
Aug 19 05:30:04 PM PDT 24 |
Aug 19 05:56:16 PM PDT 24 |
97645517199 ps |
| T818 |
/workspace/coverage/default/49.sram_ctrl_lc_escalation.827081121 |
|
|
Aug 19 05:35:07 PM PDT 24 |
Aug 19 05:35:42 PM PDT 24 |
6608462699 ps |
| T819 |
/workspace/coverage/default/32.sram_ctrl_executable.3134765529 |
|
|
Aug 19 05:31:27 PM PDT 24 |
Aug 19 05:41:18 PM PDT 24 |
7045755493 ps |
| T820 |
/workspace/coverage/default/19.sram_ctrl_partial_access_b2b.2895578124 |
|
|
Aug 19 05:29:30 PM PDT 24 |
Aug 19 05:33:38 PM PDT 24 |
37217162650 ps |
| T821 |
/workspace/coverage/default/36.sram_ctrl_smoke.3138831588 |
|
|
Aug 19 05:32:04 PM PDT 24 |
Aug 19 05:32:20 PM PDT 24 |
1007985068 ps |
| T822 |
/workspace/coverage/default/30.sram_ctrl_lc_escalation.1318327867 |
|
|
Aug 19 05:30:56 PM PDT 24 |
Aug 19 05:31:01 PM PDT 24 |
3213362167 ps |
| T823 |
/workspace/coverage/default/15.sram_ctrl_smoke.431479503 |
|
|
Aug 19 05:28:57 PM PDT 24 |
Aug 19 05:29:17 PM PDT 24 |
562762557 ps |
| T824 |
/workspace/coverage/default/17.sram_ctrl_multiple_keys.2179898657 |
|
|
Aug 19 05:29:19 PM PDT 24 |
Aug 19 05:46:13 PM PDT 24 |
68849958319 ps |
| T825 |
/workspace/coverage/default/26.sram_ctrl_regwen.1803690344 |
|
|
Aug 19 05:30:14 PM PDT 24 |
Aug 19 05:50:21 PM PDT 24 |
4053476419 ps |
| T826 |
/workspace/coverage/default/32.sram_ctrl_stress_pipeline.2883388649 |
|
|
Aug 19 05:31:22 PM PDT 24 |
Aug 19 05:35:34 PM PDT 24 |
3878896916 ps |
| T827 |
/workspace/coverage/default/42.sram_ctrl_mem_partial_access.1478348976 |
|
|
Aug 19 05:33:40 PM PDT 24 |
Aug 19 05:35:55 PM PDT 24 |
3182509974 ps |
| T828 |
/workspace/coverage/default/38.sram_ctrl_bijection.3255242422 |
|
|
Aug 19 05:32:37 PM PDT 24 |
Aug 19 06:11:06 PM PDT 24 |
421960969563 ps |
| T829 |
/workspace/coverage/default/10.sram_ctrl_regwen.1309505619 |
|
|
Aug 19 05:28:31 PM PDT 24 |
Aug 19 05:36:48 PM PDT 24 |
2083793194 ps |
| T830 |
/workspace/coverage/default/36.sram_ctrl_ram_cfg.472703329 |
|
|
Aug 19 05:32:13 PM PDT 24 |
Aug 19 05:32:17 PM PDT 24 |
4813208303 ps |
| T831 |
/workspace/coverage/default/31.sram_ctrl_max_throughput.247968774 |
|
|
Aug 19 05:31:13 PM PDT 24 |
Aug 19 05:31:24 PM PDT 24 |
3425857710 ps |
| T832 |
/workspace/coverage/default/11.sram_ctrl_ram_cfg.4205740793 |
|
|
Aug 19 05:28:39 PM PDT 24 |
Aug 19 05:28:42 PM PDT 24 |
357473820 ps |
| T833 |
/workspace/coverage/default/2.sram_ctrl_multiple_keys.1884273693 |
|
|
Aug 19 05:27:47 PM PDT 24 |
Aug 19 05:47:46 PM PDT 24 |
19710206041 ps |
| T834 |
/workspace/coverage/default/15.sram_ctrl_throughput_w_partial_write.3422641602 |
|
|
Aug 19 05:29:17 PM PDT 24 |
Aug 19 05:30:05 PM PDT 24 |
1533540656 ps |
| T835 |
/workspace/coverage/default/4.sram_ctrl_mem_walk.1048037757 |
|
|
Aug 19 05:27:51 PM PDT 24 |
Aug 19 05:30:40 PM PDT 24 |
9634179405 ps |
| T836 |
/workspace/coverage/default/49.sram_ctrl_partial_access.2386583233 |
|
|
Aug 19 05:34:54 PM PDT 24 |
Aug 19 05:35:38 PM PDT 24 |
471753829 ps |
| T837 |
/workspace/coverage/default/43.sram_ctrl_partial_access.321290997 |
|
|
Aug 19 05:33:33 PM PDT 24 |
Aug 19 05:33:53 PM PDT 24 |
4347678472 ps |
| T838 |
/workspace/coverage/default/20.sram_ctrl_partial_access.3112974072 |
|
|
Aug 19 05:29:29 PM PDT 24 |
Aug 19 05:31:26 PM PDT 24 |
3687605082 ps |
| T839 |
/workspace/coverage/default/46.sram_ctrl_multiple_keys.218639941 |
|
|
Aug 19 05:34:13 PM PDT 24 |
Aug 19 06:00:46 PM PDT 24 |
9586355481 ps |
| T840 |
/workspace/coverage/default/27.sram_ctrl_multiple_keys.1024906333 |
|
|
Aug 19 05:30:12 PM PDT 24 |
Aug 19 05:44:48 PM PDT 24 |
24690989182 ps |
| T841 |
/workspace/coverage/default/0.sram_ctrl_stress_all.2012128966 |
|
|
Aug 19 05:27:44 PM PDT 24 |
Aug 19 07:27:59 PM PDT 24 |
444442830242 ps |
| T842 |
/workspace/coverage/default/29.sram_ctrl_executable.1219333018 |
|
|
Aug 19 05:30:43 PM PDT 24 |
Aug 19 05:48:51 PM PDT 24 |
40544171993 ps |
| T843 |
/workspace/coverage/default/47.sram_ctrl_multiple_keys.3558304949 |
|
|
Aug 19 05:34:34 PM PDT 24 |
Aug 19 05:50:12 PM PDT 24 |
14510674596 ps |
| T844 |
/workspace/coverage/default/40.sram_ctrl_mem_walk.1114909469 |
|
|
Aug 19 05:33:07 PM PDT 24 |
Aug 19 05:35:45 PM PDT 24 |
21899471913 ps |
| T845 |
/workspace/coverage/default/31.sram_ctrl_throughput_w_partial_write.3017842448 |
|
|
Aug 19 05:31:12 PM PDT 24 |
Aug 19 05:34:12 PM PDT 24 |
4114813554 ps |
| T846 |
/workspace/coverage/default/42.sram_ctrl_ram_cfg.2203956910 |
|
|
Aug 19 05:33:31 PM PDT 24 |
Aug 19 05:33:35 PM PDT 24 |
358054860 ps |
| T847 |
/workspace/coverage/default/24.sram_ctrl_stress_all.3867331008 |
|
|
Aug 19 05:29:53 PM PDT 24 |
Aug 19 06:11:22 PM PDT 24 |
112764683477 ps |
| T848 |
/workspace/coverage/default/30.sram_ctrl_alert_test.1333746003 |
|
|
Aug 19 05:31:11 PM PDT 24 |
Aug 19 05:31:12 PM PDT 24 |
32818276 ps |
| T849 |
/workspace/coverage/default/12.sram_ctrl_access_during_key_req.2530396727 |
|
|
Aug 19 05:28:39 PM PDT 24 |
Aug 19 05:46:07 PM PDT 24 |
15716983670 ps |
| T850 |
/workspace/coverage/default/5.sram_ctrl_alert_test.2712006804 |
|
|
Aug 19 05:27:59 PM PDT 24 |
Aug 19 05:28:00 PM PDT 24 |
15362459 ps |
| T851 |
/workspace/coverage/default/27.sram_ctrl_mem_partial_access.4091890862 |
|
|
Aug 19 05:30:30 PM PDT 24 |
Aug 19 05:31:49 PM PDT 24 |
2682172325 ps |
| T852 |
/workspace/coverage/default/25.sram_ctrl_smoke.783512972 |
|
|
Aug 19 05:30:05 PM PDT 24 |
Aug 19 05:31:09 PM PDT 24 |
1012430917 ps |
| T853 |
/workspace/coverage/default/13.sram_ctrl_stress_all_with_rand_reset.3914907077 |
|
|
Aug 19 05:28:57 PM PDT 24 |
Aug 19 05:31:57 PM PDT 24 |
11355559849 ps |
| T854 |
/workspace/coverage/default/43.sram_ctrl_max_throughput.797158787 |
|
|
Aug 19 05:33:32 PM PDT 24 |
Aug 19 05:33:40 PM PDT 24 |
2477162556 ps |
| T855 |
/workspace/coverage/default/10.sram_ctrl_mem_walk.3115812321 |
|
|
Aug 19 05:28:31 PM PDT 24 |
Aug 19 05:31:39 PM PDT 24 |
21081596998 ps |
| T856 |
/workspace/coverage/default/10.sram_ctrl_mem_partial_access.370103270 |
|
|
Aug 19 05:28:29 PM PDT 24 |
Aug 19 05:29:54 PM PDT 24 |
2476385151 ps |
| T857 |
/workspace/coverage/default/26.sram_ctrl_stress_pipeline.3552178869 |
|
|
Aug 19 05:30:13 PM PDT 24 |
Aug 19 05:31:46 PM PDT 24 |
9648372124 ps |
| T858 |
/workspace/coverage/default/42.sram_ctrl_mem_walk.3259201193 |
|
|
Aug 19 05:33:32 PM PDT 24 |
Aug 19 05:39:01 PM PDT 24 |
28198638191 ps |
| T859 |
/workspace/coverage/default/35.sram_ctrl_mem_walk.894903624 |
|
|
Aug 19 05:32:03 PM PDT 24 |
Aug 19 05:34:39 PM PDT 24 |
10951159350 ps |
| T860 |
/workspace/coverage/default/10.sram_ctrl_lc_escalation.3564159885 |
|
|
Aug 19 05:28:30 PM PDT 24 |
Aug 19 05:29:35 PM PDT 24 |
9688566612 ps |
| T861 |
/workspace/coverage/default/37.sram_ctrl_mem_partial_access.1108622419 |
|
|
Aug 19 05:32:38 PM PDT 24 |
Aug 19 05:34:53 PM PDT 24 |
1644332142 ps |
| T862 |
/workspace/coverage/default/29.sram_ctrl_stress_pipeline.2849418208 |
|
|
Aug 19 05:30:32 PM PDT 24 |
Aug 19 05:34:15 PM PDT 24 |
3764558384 ps |
| T863 |
/workspace/coverage/default/40.sram_ctrl_partial_access_b2b.1183741811 |
|
|
Aug 19 05:32:55 PM PDT 24 |
Aug 19 05:35:34 PM PDT 24 |
6534149652 ps |
| T864 |
/workspace/coverage/default/47.sram_ctrl_max_throughput.1735358503 |
|
|
Aug 19 05:34:33 PM PDT 24 |
Aug 19 05:37:25 PM PDT 24 |
903604548 ps |
| T865 |
/workspace/coverage/default/10.sram_ctrl_partial_access_b2b.1525409776 |
|
|
Aug 19 05:28:29 PM PDT 24 |
Aug 19 05:36:14 PM PDT 24 |
72018755891 ps |
| T866 |
/workspace/coverage/default/4.sram_ctrl_partial_access.140985986 |
|
|
Aug 19 05:27:54 PM PDT 24 |
Aug 19 05:28:15 PM PDT 24 |
434244306 ps |
| T867 |
/workspace/coverage/default/10.sram_ctrl_ram_cfg.2491409274 |
|
|
Aug 19 05:28:30 PM PDT 24 |
Aug 19 05:28:34 PM PDT 24 |
1212477800 ps |
| T868 |
/workspace/coverage/default/36.sram_ctrl_multiple_keys.989393833 |
|
|
Aug 19 05:32:02 PM PDT 24 |
Aug 19 05:53:14 PM PDT 24 |
73172348963 ps |
| T869 |
/workspace/coverage/default/14.sram_ctrl_ram_cfg.2237551714 |
|
|
Aug 19 05:28:56 PM PDT 24 |
Aug 19 05:28:59 PM PDT 24 |
362441446 ps |
| T870 |
/workspace/coverage/default/8.sram_ctrl_regwen.1445640198 |
|
|
Aug 19 05:28:21 PM PDT 24 |
Aug 19 05:41:27 PM PDT 24 |
18300222417 ps |
| T871 |
/workspace/coverage/default/18.sram_ctrl_mem_walk.255370485 |
|
|
Aug 19 05:29:21 PM PDT 24 |
Aug 19 05:35:12 PM PDT 24 |
42220889054 ps |
| T872 |
/workspace/coverage/default/25.sram_ctrl_stress_pipeline.359207240 |
|
|
Aug 19 05:30:04 PM PDT 24 |
Aug 19 05:33:54 PM PDT 24 |
4079216353 ps |
| T873 |
/workspace/coverage/default/17.sram_ctrl_bijection.1118129598 |
|
|
Aug 19 05:29:19 PM PDT 24 |
Aug 19 06:01:26 PM PDT 24 |
169263979198 ps |
| T874 |
/workspace/coverage/default/18.sram_ctrl_lc_escalation.1537575891 |
|
|
Aug 19 05:29:17 PM PDT 24 |
Aug 19 05:29:42 PM PDT 24 |
15324665280 ps |
| T875 |
/workspace/coverage/default/13.sram_ctrl_partial_access.906572770 |
|
|
Aug 19 05:28:57 PM PDT 24 |
Aug 19 05:29:07 PM PDT 24 |
647293898 ps |
| T876 |
/workspace/coverage/default/30.sram_ctrl_multiple_keys.1886741084 |
|
|
Aug 19 05:30:43 PM PDT 24 |
Aug 19 05:36:34 PM PDT 24 |
5230941121 ps |
| T877 |
/workspace/coverage/default/38.sram_ctrl_smoke.2427164507 |
|
|
Aug 19 05:32:37 PM PDT 24 |
Aug 19 05:32:51 PM PDT 24 |
1553681990 ps |
| T878 |
/workspace/coverage/default/12.sram_ctrl_partial_access.4096423698 |
|
|
Aug 19 05:28:41 PM PDT 24 |
Aug 19 05:29:52 PM PDT 24 |
957111164 ps |
| T879 |
/workspace/coverage/default/5.sram_ctrl_ram_cfg.4207917276 |
|
|
Aug 19 05:28:02 PM PDT 24 |
Aug 19 05:28:05 PM PDT 24 |
360058616 ps |
| T880 |
/workspace/coverage/default/12.sram_ctrl_stress_pipeline.3456529719 |
|
|
Aug 19 05:28:39 PM PDT 24 |
Aug 19 05:34:35 PM PDT 24 |
21706684431 ps |
| T881 |
/workspace/coverage/default/40.sram_ctrl_max_throughput.3804992843 |
|
|
Aug 19 05:32:54 PM PDT 24 |
Aug 19 05:33:29 PM PDT 24 |
750572584 ps |
| T882 |
/workspace/coverage/default/45.sram_ctrl_partial_access.1155673872 |
|
|
Aug 19 05:34:04 PM PDT 24 |
Aug 19 05:34:10 PM PDT 24 |
370096737 ps |
| T30 |
/workspace/coverage/default/1.sram_ctrl_sec_cm.2463496270 |
|
|
Aug 19 05:27:48 PM PDT 24 |
Aug 19 05:27:50 PM PDT 24 |
369895714 ps |
| T883 |
/workspace/coverage/default/23.sram_ctrl_stress_all_with_rand_reset.944751823 |
|
|
Aug 19 05:29:44 PM PDT 24 |
Aug 19 05:29:54 PM PDT 24 |
726237659 ps |
| T884 |
/workspace/coverage/default/23.sram_ctrl_partial_access_b2b.2440837890 |
|
|
Aug 19 05:29:43 PM PDT 24 |
Aug 19 05:33:48 PM PDT 24 |
9932491214 ps |
| T885 |
/workspace/coverage/default/39.sram_ctrl_stress_all.3055433168 |
|
|
Aug 19 05:32:56 PM PDT 24 |
Aug 19 06:37:01 PM PDT 24 |
528666784940 ps |
| T886 |
/workspace/coverage/default/38.sram_ctrl_throughput_w_partial_write.824800666 |
|
|
Aug 19 05:32:39 PM PDT 24 |
Aug 19 05:34:36 PM PDT 24 |
1464708947 ps |
| T887 |
/workspace/coverage/default/0.sram_ctrl_smoke.1259703816 |
|
|
Aug 19 05:27:37 PM PDT 24 |
Aug 19 05:30:22 PM PDT 24 |
3222126873 ps |
| T888 |
/workspace/coverage/default/14.sram_ctrl_max_throughput.994298810 |
|
|
Aug 19 05:28:55 PM PDT 24 |
Aug 19 05:29:40 PM PDT 24 |
2852680286 ps |
| T889 |
/workspace/coverage/default/19.sram_ctrl_regwen.3365933152 |
|
|
Aug 19 05:29:28 PM PDT 24 |
Aug 19 05:37:39 PM PDT 24 |
5112182956 ps |
| T890 |
/workspace/coverage/default/15.sram_ctrl_partial_access_b2b.1112088660 |
|
|
Aug 19 05:29:17 PM PDT 24 |
Aug 19 05:33:10 PM PDT 24 |
26509333062 ps |
| T891 |
/workspace/coverage/default/21.sram_ctrl_partial_access_b2b.1010828194 |
|
|
Aug 19 05:29:32 PM PDT 24 |
Aug 19 05:37:26 PM PDT 24 |
35934003746 ps |
| T892 |
/workspace/coverage/default/15.sram_ctrl_multiple_keys.2450421487 |
|
|
Aug 19 05:28:59 PM PDT 24 |
Aug 19 05:53:32 PM PDT 24 |
152482235522 ps |
| T893 |
/workspace/coverage/default/4.sram_ctrl_access_during_key_req.376836703 |
|
|
Aug 19 05:27:53 PM PDT 24 |
Aug 19 05:47:09 PM PDT 24 |
31104429394 ps |
| T894 |
/workspace/coverage/default/28.sram_ctrl_stress_pipeline.3188395292 |
|
|
Aug 19 05:30:24 PM PDT 24 |
Aug 19 05:33:30 PM PDT 24 |
2524619414 ps |
| T895 |
/workspace/coverage/default/5.sram_ctrl_access_during_key_req.593556880 |
|
|
Aug 19 05:27:53 PM PDT 24 |
Aug 19 05:42:02 PM PDT 24 |
87199592346 ps |
| T896 |
/workspace/coverage/default/16.sram_ctrl_max_throughput.1190829295 |
|
|
Aug 19 05:29:17 PM PDT 24 |
Aug 19 05:30:24 PM PDT 24 |
786982555 ps |
| T897 |
/workspace/coverage/default/19.sram_ctrl_ram_cfg.3787902489 |
|
|
Aug 19 05:29:32 PM PDT 24 |
Aug 19 05:29:35 PM PDT 24 |
702174609 ps |
| T898 |
/workspace/coverage/default/5.sram_ctrl_throughput_w_partial_write.740550388 |
|
|
Aug 19 05:27:53 PM PDT 24 |
Aug 19 05:29:04 PM PDT 24 |
1560052440 ps |
| T899 |
/workspace/coverage/default/21.sram_ctrl_access_during_key_req.4178262684 |
|
|
Aug 19 05:29:32 PM PDT 24 |
Aug 19 05:41:32 PM PDT 24 |
13111416421 ps |
| T900 |
/workspace/coverage/default/4.sram_ctrl_multiple_keys.708769859 |
|
|
Aug 19 05:27:57 PM PDT 24 |
Aug 19 05:31:59 PM PDT 24 |
15261800571 ps |
| T901 |
/workspace/coverage/default/25.sram_ctrl_regwen.2150426585 |
|
|
Aug 19 05:30:04 PM PDT 24 |
Aug 19 05:51:35 PM PDT 24 |
13305784774 ps |
| T902 |
/workspace/coverage/default/18.sram_ctrl_executable.631757441 |
|
|
Aug 19 05:29:18 PM PDT 24 |
Aug 19 05:49:03 PM PDT 24 |
132527159993 ps |
| T903 |
/workspace/coverage/default/22.sram_ctrl_stress_pipeline.4073129888 |
|
|
Aug 19 05:29:36 PM PDT 24 |
Aug 19 05:33:13 PM PDT 24 |
5279674782 ps |
| T904 |
/workspace/coverage/default/45.sram_ctrl_executable.309152816 |
|
|
Aug 19 05:34:16 PM PDT 24 |
Aug 19 05:46:04 PM PDT 24 |
85690799916 ps |
| T905 |
/workspace/coverage/default/36.sram_ctrl_stress_all_with_rand_reset.1686110680 |
|
|
Aug 19 05:32:14 PM PDT 24 |
Aug 19 05:32:23 PM PDT 24 |
1483776618 ps |
| T906 |
/workspace/coverage/default/38.sram_ctrl_stress_pipeline.4291011060 |
|
|
Aug 19 05:32:38 PM PDT 24 |
Aug 19 05:36:03 PM PDT 24 |
3692341526 ps |
| T907 |
/workspace/coverage/default/2.sram_ctrl_mem_partial_access.334928910 |
|
|
Aug 19 05:27:46 PM PDT 24 |
Aug 19 05:29:03 PM PDT 24 |
2347333808 ps |
| T908 |
/workspace/coverage/default/8.sram_ctrl_stress_all.1853635598 |
|
|
Aug 19 05:28:22 PM PDT 24 |
Aug 19 07:26:34 PM PDT 24 |
82123720865 ps |
| T909 |
/workspace/coverage/default/27.sram_ctrl_stress_pipeline.3876993159 |
|
|
Aug 19 05:30:13 PM PDT 24 |
Aug 19 05:36:29 PM PDT 24 |
5357931247 ps |
| T910 |
/workspace/coverage/default/44.sram_ctrl_partial_access_b2b.636057419 |
|
|
Aug 19 05:33:51 PM PDT 24 |
Aug 19 05:38:40 PM PDT 24 |
47340684963 ps |
| T911 |
/workspace/coverage/default/10.sram_ctrl_alert_test.1817573482 |
|
|
Aug 19 05:28:29 PM PDT 24 |
Aug 19 05:28:30 PM PDT 24 |
13818288 ps |
| T912 |
/workspace/coverage/default/12.sram_ctrl_stress_all.3960943539 |
|
|
Aug 19 05:28:58 PM PDT 24 |
Aug 19 06:35:30 PM PDT 24 |
61440069427 ps |
| T913 |
/workspace/coverage/default/29.sram_ctrl_partial_access_b2b.2119225372 |
|
|
Aug 19 05:30:34 PM PDT 24 |
Aug 19 05:34:55 PM PDT 24 |
10890598171 ps |
| T914 |
/workspace/coverage/default/49.sram_ctrl_access_during_key_req.3575212111 |
|
|
Aug 19 05:35:04 PM PDT 24 |
Aug 19 05:49:21 PM PDT 24 |
37619581190 ps |
| T915 |
/workspace/coverage/default/34.sram_ctrl_stress_all.4273378903 |
|
|
Aug 19 05:31:54 PM PDT 24 |
Aug 19 06:10:54 PM PDT 24 |
90655893933 ps |
| T916 |
/workspace/coverage/default/31.sram_ctrl_lc_escalation.229435530 |
|
|
Aug 19 05:31:11 PM PDT 24 |
Aug 19 05:32:18 PM PDT 24 |
37807328960 ps |
| T917 |
/workspace/coverage/default/20.sram_ctrl_access_during_key_req.4072437471 |
|
|
Aug 19 05:29:32 PM PDT 24 |
Aug 19 05:36:09 PM PDT 24 |
9420707921 ps |
| T918 |
/workspace/coverage/default/6.sram_ctrl_mem_walk.4064193827 |
|
|
Aug 19 05:28:00 PM PDT 24 |
Aug 19 05:34:51 PM PDT 24 |
413169330962 ps |
| T919 |
/workspace/coverage/default/16.sram_ctrl_lc_escalation.2628004911 |
|
|
Aug 19 05:29:15 PM PDT 24 |
Aug 19 05:30:36 PM PDT 24 |
23789262447 ps |
| T920 |
/workspace/coverage/default/44.sram_ctrl_ram_cfg.1214796047 |
|
|
Aug 19 05:33:51 PM PDT 24 |
Aug 19 05:33:54 PM PDT 24 |
445673657 ps |
| T921 |
/workspace/coverage/default/37.sram_ctrl_executable.24051965 |
|
|
Aug 19 05:32:23 PM PDT 24 |
Aug 19 05:40:59 PM PDT 24 |
15366524288 ps |
| T922 |
/workspace/coverage/default/40.sram_ctrl_lc_escalation.4192254002 |
|
|
Aug 19 05:33:08 PM PDT 24 |
Aug 19 05:33:37 PM PDT 24 |
9523148281 ps |
| T923 |
/workspace/coverage/default/24.sram_ctrl_ram_cfg.958317277 |
|
|
Aug 19 05:29:53 PM PDT 24 |
Aug 19 05:29:57 PM PDT 24 |
1291418509 ps |
| T924 |
/workspace/coverage/default/39.sram_ctrl_max_throughput.3523483820 |
|
|
Aug 19 05:32:44 PM PDT 24 |
Aug 19 05:33:26 PM PDT 24 |
747849605 ps |
| T925 |
/workspace/coverage/default/7.sram_ctrl_stress_all_with_rand_reset.1783769840 |
|
|
Aug 19 05:28:13 PM PDT 24 |
Aug 19 05:28:25 PM PDT 24 |
360173843 ps |
| T926 |
/workspace/coverage/default/42.sram_ctrl_partial_access_b2b.931071034 |
|
|
Aug 19 05:33:34 PM PDT 24 |
Aug 19 05:36:24 PM PDT 24 |
14825951080 ps |
| T927 |
/workspace/coverage/default/43.sram_ctrl_mem_partial_access.4155452810 |
|
|
Aug 19 05:33:40 PM PDT 24 |
Aug 19 05:36:34 PM PDT 24 |
5247828989 ps |
| T928 |
/workspace/coverage/default/11.sram_ctrl_mem_walk.4227217301 |
|
|
Aug 19 05:28:40 PM PDT 24 |
Aug 19 05:34:57 PM PDT 24 |
86186772164 ps |
| T929 |
/workspace/coverage/default/15.sram_ctrl_mem_partial_access.142562107 |
|
|
Aug 19 05:29:18 PM PDT 24 |
Aug 19 05:30:24 PM PDT 24 |
15939535928 ps |
| T930 |
/workspace/coverage/default/4.sram_ctrl_ram_cfg.105246762 |
|
|
Aug 19 05:27:55 PM PDT 24 |
Aug 19 05:27:58 PM PDT 24 |
1346121721 ps |
| T931 |
/workspace/coverage/default/19.sram_ctrl_mem_walk.3991856930 |
|
|
Aug 19 05:29:30 PM PDT 24 |
Aug 19 05:34:57 PM PDT 24 |
75015734713 ps |
| T932 |
/workspace/coverage/default/2.sram_ctrl_ram_cfg.3911443890 |
|
|
Aug 19 05:27:44 PM PDT 24 |
Aug 19 05:27:47 PM PDT 24 |
351273154 ps |
| T933 |
/workspace/coverage/default/40.sram_ctrl_throughput_w_partial_write.1958905188 |
|
|
Aug 19 05:33:08 PM PDT 24 |
Aug 19 05:33:21 PM PDT 24 |
2794106796 ps |
| T934 |
/workspace/coverage/default/27.sram_ctrl_executable.4228991462 |
|
|
Aug 19 05:30:24 PM PDT 24 |
Aug 19 05:46:51 PM PDT 24 |
38277194349 ps |
| T935 |
/workspace/coverage/default/11.sram_ctrl_smoke.1514543481 |
|
|
Aug 19 05:28:31 PM PDT 24 |
Aug 19 05:28:45 PM PDT 24 |
1007043856 ps |
| T936 |
/workspace/coverage/default/6.sram_ctrl_access_during_key_req.2202368742 |
|
|
Aug 19 05:28:02 PM PDT 24 |
Aug 19 05:44:09 PM PDT 24 |
11735143788 ps |
| T937 |
/workspace/coverage/default/12.sram_ctrl_smoke.3107546378 |
|
|
Aug 19 05:28:42 PM PDT 24 |
Aug 19 05:29:03 PM PDT 24 |
1318129452 ps |
| T938 |
/workspace/coverage/default/8.sram_ctrl_multiple_keys.3918646056 |
|
|
Aug 19 05:28:15 PM PDT 24 |
Aug 19 05:36:13 PM PDT 24 |
14849750428 ps |
| T939 |
/workspace/coverage/default/46.sram_ctrl_stress_pipeline.464859738 |
|
|
Aug 19 05:34:13 PM PDT 24 |
Aug 19 05:38:38 PM PDT 24 |
3538253064 ps |
| T940 |
/workspace/coverage/default/32.sram_ctrl_bijection.3432967597 |
|
|
Aug 19 05:31:27 PM PDT 24 |
Aug 19 06:01:31 PM PDT 24 |
545206193350 ps |
| T76 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_passthru_mem_tl_intg_err.1052847424 |
|
|
Aug 19 04:33:28 PM PDT 24 |
Aug 19 04:34:40 PM PDT 24 |
64026177736 ps |
| T77 |
/workspace/coverage/cover_reg_top/7.sram_ctrl_same_csr_outstanding.4242182014 |
|
|
Aug 19 04:33:28 PM PDT 24 |
Aug 19 04:33:29 PM PDT 24 |
15394398 ps |
| T941 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_errors.2731305396 |
|
|
Aug 19 04:33:15 PM PDT 24 |
Aug 19 04:33:18 PM PDT 24 |
153477850 ps |
| T78 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_bit_bash.1787766598 |
|
|
Aug 19 04:33:27 PM PDT 24 |
Aug 19 04:33:28 PM PDT 24 |
162241208 ps |
| T942 |
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_errors.1851713350 |
|
|
Aug 19 04:33:59 PM PDT 24 |
Aug 19 04:34:03 PM PDT 24 |
74611761 ps |
| T73 |
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_intg_err.3861632384 |
|
|
Aug 19 04:33:39 PM PDT 24 |
Aug 19 04:33:41 PM PDT 24 |
694398439 ps |
| T114 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_hw_reset.3141107557 |
|
|
Aug 19 04:33:17 PM PDT 24 |
Aug 19 04:33:18 PM PDT 24 |
42531533 ps |
| T943 |
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_errors.2591693578 |
|
|
Aug 19 04:33:57 PM PDT 24 |
Aug 19 04:33:59 PM PDT 24 |
31899025 ps |
| T87 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_hw_reset.362547264 |
|
|
Aug 19 04:33:31 PM PDT 24 |
Aug 19 04:33:32 PM PDT 24 |
20141098 ps |
| T88 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_rw.3196379642 |
|
|
Aug 19 04:33:16 PM PDT 24 |
Aug 19 04:33:17 PM PDT 24 |
17451042 ps |
| T944 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_errors.1847823657 |
|
|
Aug 19 04:33:14 PM PDT 24 |
Aug 19 04:33:20 PM PDT 24 |
1013502348 ps |
| T89 |
/workspace/coverage/cover_reg_top/11.sram_ctrl_passthru_mem_tl_intg_err.1332455487 |
|
|
Aug 19 04:33:28 PM PDT 24 |
Aug 19 04:34:21 PM PDT 24 |
8333836554 ps |
| T945 |
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_mem_rw_with_rand_reset.2698153285 |
|
|
Aug 19 04:33:44 PM PDT 24 |
Aug 19 04:33:48 PM PDT 24 |
698485123 ps |
| T90 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_rw.2408923368 |
|
|
Aug 19 04:33:13 PM PDT 24 |
Aug 19 04:33:14 PM PDT 24 |
15305369 ps |
| T108 |
/workspace/coverage/cover_reg_top/10.sram_ctrl_same_csr_outstanding.2355323956 |
|
|
Aug 19 04:33:38 PM PDT 24 |
Aug 19 04:33:39 PM PDT 24 |
82885807 ps |
| T91 |
/workspace/coverage/cover_reg_top/14.sram_ctrl_passthru_mem_tl_intg_err.3858064696 |
|
|
Aug 19 04:33:39 PM PDT 24 |
Aug 19 04:34:07 PM PDT 24 |
3717182446 ps |
| T74 |
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_intg_err.1357203573 |
|
|
Aug 19 04:33:42 PM PDT 24 |
Aug 19 04:33:43 PM PDT 24 |
84493629 ps |
| T75 |
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_intg_err.66242862 |
|
|
Aug 19 04:33:41 PM PDT 24 |
Aug 19 04:33:43 PM PDT 24 |
374349012 ps |
| T92 |
/workspace/coverage/cover_reg_top/18.sram_ctrl_passthru_mem_tl_intg_err.1922859978 |
|
|
Aug 19 04:33:36 PM PDT 24 |
Aug 19 04:34:27 PM PDT 24 |
7129388243 ps |
| T946 |
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_mem_rw_with_rand_reset.2685435922 |
|
|
Aug 19 04:33:40 PM PDT 24 |
Aug 19 04:33:44 PM PDT 24 |
607158840 ps |
| T125 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_intg_err.3398993089 |
|
|
Aug 19 04:33:40 PM PDT 24 |
Aug 19 04:33:42 PM PDT 24 |
356455754 ps |
| T93 |
/workspace/coverage/cover_reg_top/12.sram_ctrl_passthru_mem_tl_intg_err.688101461 |
|
|
Aug 19 04:33:45 PM PDT 24 |
Aug 19 04:34:27 PM PDT 24 |
52803579457 ps |
| T947 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_mem_rw_with_rand_reset.996607018 |
|
|
Aug 19 04:33:28 PM PDT 24 |
Aug 19 04:33:32 PM PDT 24 |
722400969 ps |
| T94 |
/workspace/coverage/cover_reg_top/14.sram_ctrl_same_csr_outstanding.3949979304 |
|
|
Aug 19 04:33:33 PM PDT 24 |
Aug 19 04:33:34 PM PDT 24 |
93501058 ps |
| T95 |
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_rw.3365106000 |
|
|
Aug 19 04:33:29 PM PDT 24 |
Aug 19 04:33:29 PM PDT 24 |
14834631 ps |
| T129 |
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_intg_err.3688972043 |
|
|
Aug 19 04:33:28 PM PDT 24 |
Aug 19 04:33:31 PM PDT 24 |
323569979 ps |
| T948 |
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_errors.3918670093 |
|
|
Aug 19 04:33:32 PM PDT 24 |
Aug 19 04:33:36 PM PDT 24 |
133196516 ps |
| T109 |
/workspace/coverage/cover_reg_top/5.sram_ctrl_passthru_mem_tl_intg_err.321690740 |
|
|
Aug 19 04:33:33 PM PDT 24 |
Aug 19 04:34:27 PM PDT 24 |
7286717082 ps |
| T96 |
/workspace/coverage/cover_reg_top/8.sram_ctrl_passthru_mem_tl_intg_err.1882807490 |
|
|
Aug 19 04:33:26 PM PDT 24 |
Aug 19 04:33:55 PM PDT 24 |
3784222444 ps |
| T949 |
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_errors.145074480 |
|
|
Aug 19 04:33:28 PM PDT 24 |
Aug 19 04:33:31 PM PDT 24 |
118073857 ps |
| T97 |
/workspace/coverage/cover_reg_top/17.sram_ctrl_passthru_mem_tl_intg_err.3601008566 |
|
|
Aug 19 04:33:59 PM PDT 24 |
Aug 19 04:34:28 PM PDT 24 |
16073275591 ps |
| T950 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_passthru_mem_tl_intg_err.670654963 |
|
|
Aug 19 04:33:12 PM PDT 24 |
Aug 19 04:34:07 PM PDT 24 |
20134300663 ps |
| T951 |
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_mem_rw_with_rand_reset.3295856068 |
|
|
Aug 19 04:33:35 PM PDT 24 |
Aug 19 04:33:39 PM PDT 24 |
353874469 ps |
| T98 |
/workspace/coverage/cover_reg_top/13.sram_ctrl_passthru_mem_tl_intg_err.1254862394 |
|
|
Aug 19 04:33:30 PM PDT 24 |
Aug 19 04:34:29 PM PDT 24 |
47032351491 ps |
| T952 |
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_mem_rw_with_rand_reset.645492179 |
|
|
Aug 19 04:33:40 PM PDT 24 |
Aug 19 04:33:45 PM PDT 24 |
431024870 ps |
| T953 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_bit_bash.2211805224 |
|
|
Aug 19 04:33:25 PM PDT 24 |
Aug 19 04:33:27 PM PDT 24 |
247113794 ps |
| T102 |
/workspace/coverage/cover_reg_top/9.sram_ctrl_passthru_mem_tl_intg_err.719605794 |
|
|
Aug 19 04:33:32 PM PDT 24 |
Aug 19 04:34:24 PM PDT 24 |
14372596904 ps |
| T954 |
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_errors.1598457416 |
|
|
Aug 19 04:33:31 PM PDT 24 |
Aug 19 04:33:36 PM PDT 24 |
395806928 ps |
| T133 |
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_intg_err.161254316 |
|
|
Aug 19 04:33:39 PM PDT 24 |
Aug 19 04:33:41 PM PDT 24 |
188569088 ps |
| T131 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_intg_err.1832530985 |
|
|
Aug 19 04:33:36 PM PDT 24 |
Aug 19 04:33:37 PM PDT 24 |
733837402 ps |
| T955 |
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_rw.1586465412 |
|
|
Aug 19 04:33:30 PM PDT 24 |
Aug 19 04:33:31 PM PDT 24 |
111425376 ps |
| T130 |
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_intg_err.3770073282 |
|
|
Aug 19 04:33:38 PM PDT 24 |
Aug 19 04:33:40 PM PDT 24 |
261504063 ps |
| T956 |
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_errors.508971397 |
|
|
Aug 19 04:33:31 PM PDT 24 |
Aug 19 04:33:36 PM PDT 24 |
64358276 ps |
| T957 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_mem_rw_with_rand_reset.1435739731 |
|
|
Aug 19 04:33:30 PM PDT 24 |
Aug 19 04:33:34 PM PDT 24 |
1435470155 ps |
| T958 |
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_rw.712773784 |
|
|
Aug 19 04:33:31 PM PDT 24 |
Aug 19 04:33:31 PM PDT 24 |
51452120 ps |
| T959 |
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_errors.1254047139 |
|
|
Aug 19 04:33:32 PM PDT 24 |
Aug 19 04:33:34 PM PDT 24 |
81830217 ps |
| T960 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_bit_bash.3637484778 |
|
|
Aug 19 04:33:27 PM PDT 24 |
Aug 19 04:33:28 PM PDT 24 |
95665447 ps |
| T961 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_errors.4122870967 |
|
|
Aug 19 04:33:36 PM PDT 24 |
Aug 19 04:33:39 PM PDT 24 |
281602657 ps |
| T962 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_same_csr_outstanding.1414751161 |
|
|
Aug 19 04:33:27 PM PDT 24 |
Aug 19 04:33:27 PM PDT 24 |
47525408 ps |
| T963 |
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_rw.1523055582 |
|
|
Aug 19 04:33:41 PM PDT 24 |
Aug 19 04:33:42 PM PDT 24 |
16115715 ps |
| T964 |
/workspace/coverage/cover_reg_top/19.sram_ctrl_same_csr_outstanding.793444969 |
|
|
Aug 19 04:33:46 PM PDT 24 |
Aug 19 04:33:47 PM PDT 24 |
54406480 ps |
| T965 |
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_errors.2834804289 |
|
|
Aug 19 04:33:45 PM PDT 24 |
Aug 19 04:33:49 PM PDT 24 |
162334428 ps |
| T966 |
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_rw.2374717633 |
|
|
Aug 19 04:33:39 PM PDT 24 |
Aug 19 04:33:40 PM PDT 24 |
17382332 ps |
| T967 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_same_csr_outstanding.3118999 |
|
|
Aug 19 04:33:28 PM PDT 24 |
Aug 19 04:33:29 PM PDT 24 |
22946016 ps |
| T968 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_same_csr_outstanding.3317366243 |
|
|
Aug 19 04:33:28 PM PDT 24 |
Aug 19 04:33:29 PM PDT 24 |
89670428 ps |
| T969 |
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_mem_rw_with_rand_reset.3577263568 |
|
|
Aug 19 04:33:35 PM PDT 24 |
Aug 19 04:33:40 PM PDT 24 |
6772201523 ps |
| T970 |
/workspace/coverage/cover_reg_top/11.sram_ctrl_same_csr_outstanding.1786958348 |
|
|
Aug 19 04:33:31 PM PDT 24 |
Aug 19 04:33:32 PM PDT 24 |
21779044 ps |
| T971 |
/workspace/coverage/cover_reg_top/12.sram_ctrl_same_csr_outstanding.617752824 |
|
|
Aug 19 04:33:32 PM PDT 24 |
Aug 19 04:33:34 PM PDT 24 |
41289052 ps |
| T972 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_same_csr_outstanding.243729834 |
|
|
Aug 19 04:33:33 PM PDT 24 |
Aug 19 04:33:34 PM PDT 24 |
18929515 ps |
| T973 |
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_mem_rw_with_rand_reset.1218911851 |
|
|
Aug 19 04:33:34 PM PDT 24 |
Aug 19 04:33:38 PM PDT 24 |
1242027565 ps |
| T134 |
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_intg_err.807898757 |
|
|
Aug 19 04:33:31 PM PDT 24 |
Aug 19 04:33:34 PM PDT 24 |
765852884 ps |
| T974 |
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_mem_rw_with_rand_reset.790769237 |
|
|
Aug 19 04:33:38 PM PDT 24 |
Aug 19 04:33:42 PM PDT 24 |
365777669 ps |
| T975 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_mem_rw_with_rand_reset.4208977430 |
|
|
Aug 19 04:33:17 PM PDT 24 |
Aug 19 04:33:22 PM PDT 24 |
4264313336 ps |
| T976 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_bit_bash.568055386 |
|
|
Aug 19 04:33:31 PM PDT 24 |
Aug 19 04:33:33 PM PDT 24 |
88155744 ps |
| T977 |
/workspace/coverage/cover_reg_top/17.sram_ctrl_same_csr_outstanding.1006903419 |
|
|
Aug 19 04:33:45 PM PDT 24 |
Aug 19 04:33:45 PM PDT 24 |
55671622 ps |
| T103 |
/workspace/coverage/cover_reg_top/7.sram_ctrl_passthru_mem_tl_intg_err.807911946 |
|
|
Aug 19 04:33:32 PM PDT 24 |
Aug 19 04:34:21 PM PDT 24 |
14133898414 ps |
| T978 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_intg_err.1026284233 |
|
|
Aug 19 04:33:27 PM PDT 24 |
Aug 19 04:33:29 PM PDT 24 |
77473836 ps |
| T979 |
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_errors.3777901045 |
|
|
Aug 19 04:33:42 PM PDT 24 |
Aug 19 04:33:46 PM PDT 24 |
363672612 ps |
| T980 |
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_errors.2390080842 |
|
|
Aug 19 04:33:25 PM PDT 24 |
Aug 19 04:33:28 PM PDT 24 |
1525663487 ps |
| T981 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_rw.2699645966 |
|
|
Aug 19 04:33:32 PM PDT 24 |
Aug 19 04:33:33 PM PDT 24 |
14253547 ps |
| T982 |
/workspace/coverage/cover_reg_top/9.sram_ctrl_same_csr_outstanding.2012156259 |
|
|
Aug 19 04:33:37 PM PDT 24 |
Aug 19 04:33:37 PM PDT 24 |
16509720 ps |
| T104 |
/workspace/coverage/cover_reg_top/6.sram_ctrl_passthru_mem_tl_intg_err.795613740 |
|
|
Aug 19 04:33:31 PM PDT 24 |
Aug 19 04:33:59 PM PDT 24 |
3791512058 ps |
| T983 |
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_mem_rw_with_rand_reset.1288798155 |
|
|
Aug 19 04:33:30 PM PDT 24 |
Aug 19 04:33:35 PM PDT 24 |
411472828 ps |
| T126 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_intg_err.1332112613 |
|
|
Aug 19 04:33:13 PM PDT 24 |
Aug 19 04:33:16 PM PDT 24 |
184806188 ps |
| T984 |
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_mem_rw_with_rand_reset.3169007299 |
|
|
Aug 19 04:33:36 PM PDT 24 |
Aug 19 04:33:40 PM PDT 24 |
351085305 ps |
| T985 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_passthru_mem_tl_intg_err.4135903729 |
|
|
Aug 19 04:33:28 PM PDT 24 |
Aug 19 04:34:00 PM PDT 24 |
14838106840 ps |
| T986 |
/workspace/coverage/cover_reg_top/13.sram_ctrl_same_csr_outstanding.1155963028 |
|
|
Aug 19 04:33:44 PM PDT 24 |
Aug 19 04:33:45 PM PDT 24 |
28621198 ps |
| T987 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_rw.1800358197 |
|
|
Aug 19 04:33:31 PM PDT 24 |
Aug 19 04:33:32 PM PDT 24 |
28848714 ps |
| T988 |
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_mem_rw_with_rand_reset.549352604 |
|
|
Aug 19 04:33:29 PM PDT 24 |
Aug 19 04:33:33 PM PDT 24 |
1327318939 ps |
| T989 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_aliasing.3408241810 |
|
|
Aug 19 04:33:17 PM PDT 24 |
Aug 19 04:33:18 PM PDT 24 |
38311224 ps |
| T990 |
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_rw.1752564332 |
|
|
Aug 19 04:33:43 PM PDT 24 |
Aug 19 04:33:44 PM PDT 24 |
25198814 ps |
| T105 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_passthru_mem_tl_intg_err.1024948658 |
|
|
Aug 19 04:33:14 PM PDT 24 |
Aug 19 04:34:08 PM PDT 24 |
7389768248 ps |
| T106 |
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_rw.538507735 |
|
|
Aug 19 04:33:37 PM PDT 24 |
Aug 19 04:33:38 PM PDT 24 |
18790655 ps |
| T991 |
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_mem_rw_with_rand_reset.561687776 |
|
|
Aug 19 04:33:51 PM PDT 24 |
Aug 19 04:33:55 PM PDT 24 |
362604898 ps |
| T992 |
/workspace/coverage/cover_reg_top/15.sram_ctrl_same_csr_outstanding.106592330 |
|
|
Aug 19 04:33:41 PM PDT 24 |
Aug 19 04:33:42 PM PDT 24 |
96359972 ps |
| T993 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_errors.1504185273 |
|
|
Aug 19 04:33:27 PM PDT 24 |
Aug 19 04:33:31 PM PDT 24 |
161690468 ps |
| T994 |
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_mem_rw_with_rand_reset.2935466805 |
|
|
Aug 19 04:33:35 PM PDT 24 |
Aug 19 04:33:39 PM PDT 24 |
960391962 ps |
| T995 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_same_csr_outstanding.1020113275 |
|
|
Aug 19 04:33:31 PM PDT 24 |
Aug 19 04:33:32 PM PDT 24 |
31460963 ps |
| T996 |
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_intg_err.1820056646 |
|
|
Aug 19 04:33:41 PM PDT 24 |
Aug 19 04:33:43 PM PDT 24 |
239971583 ps |
| T997 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_hw_reset.3011194125 |
|
|
Aug 19 04:33:24 PM PDT 24 |
Aug 19 04:33:25 PM PDT 24 |
20199084 ps |
| T998 |
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_mem_rw_with_rand_reset.3599530661 |
|
|
Aug 19 04:33:33 PM PDT 24 |
Aug 19 04:33:37 PM PDT 24 |
354455784 ps |
| T999 |
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_errors.4049681943 |
|
|
Aug 19 04:33:43 PM PDT 24 |
Aug 19 04:33:47 PM PDT 24 |
1031524908 ps |
| T1000 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_aliasing.1551849429 |
|
|
Aug 19 04:33:30 PM PDT 24 |
Aug 19 04:33:31 PM PDT 24 |
65248990 ps |
| T127 |
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_intg_err.406122116 |
|
|
Aug 19 04:33:32 PM PDT 24 |
Aug 19 04:33:34 PM PDT 24 |
204929633 ps |
| T1001 |
/workspace/coverage/cover_reg_top/10.sram_ctrl_passthru_mem_tl_intg_err.236403791 |
|
|
Aug 19 04:33:31 PM PDT 24 |
Aug 19 04:34:18 PM PDT 24 |
7524133275 ps |
| T1002 |
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_rw.1567154877 |
|
|
Aug 19 04:33:42 PM PDT 24 |
Aug 19 04:33:43 PM PDT 24 |
18722049 ps |
| T1003 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_intg_err.4138095777 |
|
|
Aug 19 04:33:15 PM PDT 24 |
Aug 19 04:33:17 PM PDT 24 |
135792986 ps |
| T1004 |
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_errors.3028158579 |
|
|
Aug 19 04:33:28 PM PDT 24 |
Aug 19 04:33:30 PM PDT 24 |
22243486 ps |
| T1005 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_errors.3769492576 |
|
|
Aug 19 04:33:29 PM PDT 24 |
Aug 19 04:33:32 PM PDT 24 |
100817188 ps |
| T1006 |
/workspace/coverage/cover_reg_top/16.sram_ctrl_same_csr_outstanding.3422437223 |
|
|
Aug 19 04:33:33 PM PDT 24 |
Aug 19 04:33:34 PM PDT 24 |
25893552 ps |