Name |
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_aliasing.3408241810 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_bit_bash.3637484778 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_hw_reset.3141107557 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_mem_rw_with_rand_reset.2170305687 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_rw.2408923368 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_passthru_mem_tl_intg_err.670654963 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_same_csr_outstanding.1414751161 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_errors.1847823657 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_aliasing.1551849429 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_bit_bash.1787766598 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_hw_reset.362547264 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_mem_rw_with_rand_reset.4208977430 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_rw.3196379642 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_passthru_mem_tl_intg_err.1024948658 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_same_csr_outstanding.3317366243 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_errors.1504185273 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_intg_err.4138095777 |
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_mem_rw_with_rand_reset.790769237 |
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_rw.797021156 |
/workspace/coverage/cover_reg_top/10.sram_ctrl_passthru_mem_tl_intg_err.236403791 |
/workspace/coverage/cover_reg_top/10.sram_ctrl_same_csr_outstanding.2355323956 |
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_errors.508971397 |
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_mem_rw_with_rand_reset.2821725922 |
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_rw.2497117945 |
/workspace/coverage/cover_reg_top/11.sram_ctrl_passthru_mem_tl_intg_err.1332455487 |
/workspace/coverage/cover_reg_top/11.sram_ctrl_same_csr_outstanding.1786958348 |
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_errors.145074480 |
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_intg_err.3770073282 |
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_mem_rw_with_rand_reset.3295856068 |
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_rw.1621465079 |
/workspace/coverage/cover_reg_top/12.sram_ctrl_passthru_mem_tl_intg_err.688101461 |
/workspace/coverage/cover_reg_top/12.sram_ctrl_same_csr_outstanding.617752824 |
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_errors.1125503960 |
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_intg_err.2905227591 |
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_mem_rw_with_rand_reset.2935466805 |
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_rw.1567154877 |
/workspace/coverage/cover_reg_top/13.sram_ctrl_passthru_mem_tl_intg_err.1254862394 |
/workspace/coverage/cover_reg_top/13.sram_ctrl_same_csr_outstanding.1155963028 |
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_errors.3028158579 |
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_mem_rw_with_rand_reset.3169007299 |
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_rw.1586465412 |
/workspace/coverage/cover_reg_top/14.sram_ctrl_passthru_mem_tl_intg_err.3858064696 |
/workspace/coverage/cover_reg_top/14.sram_ctrl_same_csr_outstanding.3949979304 |
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_errors.2834804289 |
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_intg_err.3861632384 |
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_mem_rw_with_rand_reset.561687776 |
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_rw.3628497134 |
/workspace/coverage/cover_reg_top/15.sram_ctrl_passthru_mem_tl_intg_err.1280771358 |
/workspace/coverage/cover_reg_top/15.sram_ctrl_same_csr_outstanding.106592330 |
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_errors.2591693578 |
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_intg_err.252449417 |
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_mem_rw_with_rand_reset.3577263568 |
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_rw.504118525 |
/workspace/coverage/cover_reg_top/16.sram_ctrl_passthru_mem_tl_intg_err.2980518068 |
/workspace/coverage/cover_reg_top/16.sram_ctrl_same_csr_outstanding.3422437223 |
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_errors.4049681943 |
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_mem_rw_with_rand_reset.645492179 |
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_rw.1752564332 |
/workspace/coverage/cover_reg_top/17.sram_ctrl_passthru_mem_tl_intg_err.3601008566 |
/workspace/coverage/cover_reg_top/17.sram_ctrl_same_csr_outstanding.1006903419 |
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_errors.1851713350 |
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_mem_rw_with_rand_reset.2698153285 |
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_rw.1523055582 |
/workspace/coverage/cover_reg_top/18.sram_ctrl_passthru_mem_tl_intg_err.1922859978 |
/workspace/coverage/cover_reg_top/18.sram_ctrl_same_csr_outstanding.2111700543 |
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_errors.3777901045 |
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_intg_err.3169099813 |
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_mem_rw_with_rand_reset.2685435922 |
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_rw.2445558510 |
/workspace/coverage/cover_reg_top/19.sram_ctrl_passthru_mem_tl_intg_err.3355481936 |
/workspace/coverage/cover_reg_top/19.sram_ctrl_same_csr_outstanding.793444969 |
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_errors.1701359240 |
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_intg_err.161254316 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_aliasing.92433189 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_bit_bash.568055386 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_hw_reset.3011194125 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_mem_rw_with_rand_reset.996607018 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_rw.2699645966 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_passthru_mem_tl_intg_err.356186302 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_same_csr_outstanding.1020113275 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_errors.2731305396 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_intg_err.3398993089 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_aliasing.1681119227 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_bit_bash.3353638384 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_hw_reset.249278935 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_mem_rw_with_rand_reset.1435739731 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_rw.2579316218 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_same_csr_outstanding.3118999 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_errors.4122870967 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_intg_err.1832530985 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_aliasing.3523358427 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_bit_bash.2211805224 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_hw_reset.447308814 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_mem_rw_with_rand_reset.458273701 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_rw.1800358197 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_passthru_mem_tl_intg_err.4135903729 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_same_csr_outstanding.243729834 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_errors.3769492576 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_intg_err.1026284233 |
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_mem_rw_with_rand_reset.1218911851 |
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_rw.2374717633 |
/workspace/coverage/cover_reg_top/5.sram_ctrl_passthru_mem_tl_intg_err.321690740 |
/workspace/coverage/cover_reg_top/5.sram_ctrl_same_csr_outstanding.1669367160 |
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_errors.1598457416 |
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_intg_err.1357203573 |
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_mem_rw_with_rand_reset.2631629378 |
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_rw.2512613941 |
/workspace/coverage/cover_reg_top/6.sram_ctrl_passthru_mem_tl_intg_err.795613740 |
/workspace/coverage/cover_reg_top/6.sram_ctrl_same_csr_outstanding.1014903200 |
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_errors.2390080842 |
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_mem_rw_with_rand_reset.1288798155 |
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_rw.3365106000 |
/workspace/coverage/cover_reg_top/7.sram_ctrl_passthru_mem_tl_intg_err.807911946 |
/workspace/coverage/cover_reg_top/7.sram_ctrl_same_csr_outstanding.4242182014 |
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_errors.3325507017 |
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_intg_err.1582399744 |
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_mem_rw_with_rand_reset.549352604 |
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_rw.538507735 |
/workspace/coverage/cover_reg_top/8.sram_ctrl_passthru_mem_tl_intg_err.1882807490 |
/workspace/coverage/cover_reg_top/8.sram_ctrl_same_csr_outstanding.946073948 |
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_errors.1254047139 |
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_intg_err.406122116 |
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_mem_rw_with_rand_reset.3599530661 |
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_rw.712773784 |
/workspace/coverage/cover_reg_top/9.sram_ctrl_passthru_mem_tl_intg_err.719605794 |
/workspace/coverage/cover_reg_top/9.sram_ctrl_same_csr_outstanding.2012156259 |
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_errors.3918670093 |
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_intg_err.1820056646 |
/workspace/coverage/default/0.sram_ctrl_access_during_key_req.437453529 |
/workspace/coverage/default/0.sram_ctrl_alert_test.3990329620 |
/workspace/coverage/default/0.sram_ctrl_bijection.1649230506 |
/workspace/coverage/default/0.sram_ctrl_executable.1961314058 |
/workspace/coverage/default/0.sram_ctrl_lc_escalation.475061168 |
/workspace/coverage/default/0.sram_ctrl_max_throughput.3338619345 |
/workspace/coverage/default/0.sram_ctrl_mem_partial_access.133293113 |
/workspace/coverage/default/0.sram_ctrl_mem_walk.2594476726 |
/workspace/coverage/default/0.sram_ctrl_multiple_keys.3795785233 |
/workspace/coverage/default/0.sram_ctrl_partial_access.779917525 |
/workspace/coverage/default/0.sram_ctrl_partial_access_b2b.3186590384 |
/workspace/coverage/default/0.sram_ctrl_regwen.4083233008 |
/workspace/coverage/default/0.sram_ctrl_smoke.1259703816 |
/workspace/coverage/default/0.sram_ctrl_stress_all.2012128966 |
/workspace/coverage/default/0.sram_ctrl_stress_all_with_rand_reset.3930314026 |
/workspace/coverage/default/0.sram_ctrl_stress_pipeline.263436310 |
/workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.3466136500 |
/workspace/coverage/default/1.sram_ctrl_access_during_key_req.3529011139 |
/workspace/coverage/default/1.sram_ctrl_alert_test.2755551642 |
/workspace/coverage/default/1.sram_ctrl_bijection.762679298 |
/workspace/coverage/default/1.sram_ctrl_executable.1272853714 |
/workspace/coverage/default/1.sram_ctrl_lc_escalation.4015987382 |
/workspace/coverage/default/1.sram_ctrl_max_throughput.2005125992 |
/workspace/coverage/default/1.sram_ctrl_mem_partial_access.2401171505 |
/workspace/coverage/default/1.sram_ctrl_mem_walk.3642311367 |
/workspace/coverage/default/1.sram_ctrl_multiple_keys.3223478543 |
/workspace/coverage/default/1.sram_ctrl_partial_access.571632913 |
/workspace/coverage/default/1.sram_ctrl_partial_access_b2b.3093536714 |
/workspace/coverage/default/1.sram_ctrl_ram_cfg.4124056172 |
/workspace/coverage/default/1.sram_ctrl_regwen.1888240086 |
/workspace/coverage/default/1.sram_ctrl_sec_cm.2463496270 |
/workspace/coverage/default/1.sram_ctrl_smoke.2209908041 |
/workspace/coverage/default/1.sram_ctrl_stress_all.4104298366 |
/workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.1602040353 |
/workspace/coverage/default/1.sram_ctrl_stress_pipeline.2508330469 |
/workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.2272234811 |
/workspace/coverage/default/10.sram_ctrl_access_during_key_req.2240460555 |
/workspace/coverage/default/10.sram_ctrl_alert_test.1817573482 |
/workspace/coverage/default/10.sram_ctrl_bijection.1532523947 |
/workspace/coverage/default/10.sram_ctrl_executable.2123728546 |
/workspace/coverage/default/10.sram_ctrl_lc_escalation.3564159885 |
/workspace/coverage/default/10.sram_ctrl_max_throughput.1311009429 |
/workspace/coverage/default/10.sram_ctrl_mem_partial_access.370103270 |
/workspace/coverage/default/10.sram_ctrl_mem_walk.3115812321 |
/workspace/coverage/default/10.sram_ctrl_multiple_keys.1239624556 |
/workspace/coverage/default/10.sram_ctrl_partial_access.1901975631 |
/workspace/coverage/default/10.sram_ctrl_partial_access_b2b.1525409776 |
/workspace/coverage/default/10.sram_ctrl_ram_cfg.2491409274 |
/workspace/coverage/default/10.sram_ctrl_regwen.1309505619 |
/workspace/coverage/default/10.sram_ctrl_smoke.1092620688 |
/workspace/coverage/default/10.sram_ctrl_stress_all.3525288826 |
/workspace/coverage/default/10.sram_ctrl_stress_all_with_rand_reset.1723301730 |
/workspace/coverage/default/10.sram_ctrl_stress_pipeline.3688410344 |
/workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.3490483497 |
/workspace/coverage/default/11.sram_ctrl_access_during_key_req.121401388 |
/workspace/coverage/default/11.sram_ctrl_bijection.1103837541 |
/workspace/coverage/default/11.sram_ctrl_executable.2198810638 |
/workspace/coverage/default/11.sram_ctrl_lc_escalation.192581017 |
/workspace/coverage/default/11.sram_ctrl_max_throughput.614207338 |
/workspace/coverage/default/11.sram_ctrl_mem_partial_access.2033297912 |
/workspace/coverage/default/11.sram_ctrl_mem_walk.4227217301 |
/workspace/coverage/default/11.sram_ctrl_multiple_keys.2245733676 |
/workspace/coverage/default/11.sram_ctrl_partial_access.2041722996 |
/workspace/coverage/default/11.sram_ctrl_partial_access_b2b.3279240281 |
/workspace/coverage/default/11.sram_ctrl_ram_cfg.4205740793 |
/workspace/coverage/default/11.sram_ctrl_regwen.3542698176 |
/workspace/coverage/default/11.sram_ctrl_smoke.1514543481 |
/workspace/coverage/default/11.sram_ctrl_stress_all.2789777074 |
/workspace/coverage/default/11.sram_ctrl_stress_all_with_rand_reset.3852646248 |
/workspace/coverage/default/11.sram_ctrl_stress_pipeline.1023558493 |
/workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.623529016 |
/workspace/coverage/default/12.sram_ctrl_access_during_key_req.2530396727 |
/workspace/coverage/default/12.sram_ctrl_alert_test.2562659125 |
/workspace/coverage/default/12.sram_ctrl_bijection.190784391 |
/workspace/coverage/default/12.sram_ctrl_executable.2594138042 |
/workspace/coverage/default/12.sram_ctrl_lc_escalation.862221477 |
/workspace/coverage/default/12.sram_ctrl_max_throughput.1117604076 |
/workspace/coverage/default/12.sram_ctrl_mem_partial_access.979722016 |
/workspace/coverage/default/12.sram_ctrl_mem_walk.4277425140 |
/workspace/coverage/default/12.sram_ctrl_multiple_keys.1512412313 |
/workspace/coverage/default/12.sram_ctrl_partial_access.4096423698 |
/workspace/coverage/default/12.sram_ctrl_ram_cfg.828072431 |
/workspace/coverage/default/12.sram_ctrl_regwen.3353971014 |
/workspace/coverage/default/12.sram_ctrl_smoke.3107546378 |
/workspace/coverage/default/12.sram_ctrl_stress_all.3960943539 |
/workspace/coverage/default/12.sram_ctrl_stress_all_with_rand_reset.1607655389 |
/workspace/coverage/default/12.sram_ctrl_stress_pipeline.3456529719 |
/workspace/coverage/default/12.sram_ctrl_throughput_w_partial_write.2380003148 |
/workspace/coverage/default/13.sram_ctrl_access_during_key_req.861832773 |
/workspace/coverage/default/13.sram_ctrl_alert_test.1261580634 |
/workspace/coverage/default/13.sram_ctrl_bijection.3643629488 |
/workspace/coverage/default/13.sram_ctrl_executable.1080310657 |
/workspace/coverage/default/13.sram_ctrl_lc_escalation.219398220 |
/workspace/coverage/default/13.sram_ctrl_max_throughput.3413604044 |
/workspace/coverage/default/13.sram_ctrl_mem_walk.242110739 |
/workspace/coverage/default/13.sram_ctrl_multiple_keys.3585879237 |
/workspace/coverage/default/13.sram_ctrl_partial_access.906572770 |
/workspace/coverage/default/13.sram_ctrl_partial_access_b2b.4093191010 |
/workspace/coverage/default/13.sram_ctrl_ram_cfg.3428481787 |
/workspace/coverage/default/13.sram_ctrl_regwen.3080180739 |
/workspace/coverage/default/13.sram_ctrl_smoke.2911264140 |
/workspace/coverage/default/13.sram_ctrl_stress_all_with_rand_reset.3914907077 |
/workspace/coverage/default/13.sram_ctrl_stress_pipeline.2606738738 |
/workspace/coverage/default/13.sram_ctrl_throughput_w_partial_write.851550711 |
/workspace/coverage/default/14.sram_ctrl_access_during_key_req.2239593398 |
/workspace/coverage/default/14.sram_ctrl_alert_test.1457563200 |
/workspace/coverage/default/14.sram_ctrl_bijection.1495284331 |
/workspace/coverage/default/14.sram_ctrl_executable.2748885674 |
/workspace/coverage/default/14.sram_ctrl_lc_escalation.867358801 |
/workspace/coverage/default/14.sram_ctrl_max_throughput.994298810 |
/workspace/coverage/default/14.sram_ctrl_mem_partial_access.125173402 |
/workspace/coverage/default/14.sram_ctrl_mem_walk.3192190306 |
/workspace/coverage/default/14.sram_ctrl_multiple_keys.1258668062 |
/workspace/coverage/default/14.sram_ctrl_partial_access.1656692920 |
/workspace/coverage/default/14.sram_ctrl_partial_access_b2b.1987070012 |
/workspace/coverage/default/14.sram_ctrl_ram_cfg.2237551714 |
/workspace/coverage/default/14.sram_ctrl_regwen.2909903135 |
/workspace/coverage/default/14.sram_ctrl_smoke.2285807500 |
/workspace/coverage/default/14.sram_ctrl_stress_all.2346274033 |
/workspace/coverage/default/14.sram_ctrl_stress_all_with_rand_reset.4034335464 |
/workspace/coverage/default/14.sram_ctrl_stress_pipeline.1543555879 |
/workspace/coverage/default/14.sram_ctrl_throughput_w_partial_write.408563186 |
/workspace/coverage/default/15.sram_ctrl_access_during_key_req.912799450 |
/workspace/coverage/default/15.sram_ctrl_alert_test.577319010 |
/workspace/coverage/default/15.sram_ctrl_bijection.1998009808 |
/workspace/coverage/default/15.sram_ctrl_executable.2088668323 |
/workspace/coverage/default/15.sram_ctrl_lc_escalation.1475223964 |
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/workspace/coverage/default/44.sram_ctrl_partial_access.2227643149 |
/workspace/coverage/default/44.sram_ctrl_partial_access_b2b.636057419 |
/workspace/coverage/default/44.sram_ctrl_ram_cfg.1214796047 |
/workspace/coverage/default/44.sram_ctrl_regwen.1310332871 |
/workspace/coverage/default/44.sram_ctrl_smoke.2718580234 |
/workspace/coverage/default/44.sram_ctrl_stress_all.1138325395 |
/workspace/coverage/default/44.sram_ctrl_stress_all_with_rand_reset.3024108921 |
/workspace/coverage/default/44.sram_ctrl_stress_pipeline.503109770 |
/workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.2579523897 |
/workspace/coverage/default/45.sram_ctrl_access_during_key_req.4087357021 |
/workspace/coverage/default/45.sram_ctrl_alert_test.2766263146 |
/workspace/coverage/default/45.sram_ctrl_bijection.36085807 |
/workspace/coverage/default/45.sram_ctrl_executable.309152816 |
/workspace/coverage/default/45.sram_ctrl_max_throughput.1371604792 |
/workspace/coverage/default/45.sram_ctrl_mem_partial_access.2770294973 |
/workspace/coverage/default/45.sram_ctrl_mem_walk.3553224470 |
/workspace/coverage/default/45.sram_ctrl_multiple_keys.974301905 |
/workspace/coverage/default/45.sram_ctrl_partial_access.1155673872 |
/workspace/coverage/default/45.sram_ctrl_partial_access_b2b.411540388 |
/workspace/coverage/default/45.sram_ctrl_ram_cfg.1628233238 |
/workspace/coverage/default/45.sram_ctrl_regwen.3219340216 |
/workspace/coverage/default/45.sram_ctrl_smoke.4040860317 |
/workspace/coverage/default/45.sram_ctrl_stress_all.588608761 |
/workspace/coverage/default/45.sram_ctrl_stress_all_with_rand_reset.1089485261 |
/workspace/coverage/default/45.sram_ctrl_stress_pipeline.512563185 |
/workspace/coverage/default/45.sram_ctrl_throughput_w_partial_write.131552727 |
/workspace/coverage/default/46.sram_ctrl_access_during_key_req.4205066219 |
/workspace/coverage/default/46.sram_ctrl_alert_test.2166260626 |
/workspace/coverage/default/46.sram_ctrl_bijection.72068326 |
/workspace/coverage/default/46.sram_ctrl_executable.3086304052 |
/workspace/coverage/default/46.sram_ctrl_lc_escalation.150002614 |
/workspace/coverage/default/46.sram_ctrl_max_throughput.1195632555 |
/workspace/coverage/default/46.sram_ctrl_mem_partial_access.1527178585 |
/workspace/coverage/default/46.sram_ctrl_mem_walk.794788578 |
/workspace/coverage/default/46.sram_ctrl_multiple_keys.218639941 |
/workspace/coverage/default/46.sram_ctrl_partial_access.2772161922 |
/workspace/coverage/default/46.sram_ctrl_partial_access_b2b.3141530484 |
/workspace/coverage/default/46.sram_ctrl_ram_cfg.140095680 |
/workspace/coverage/default/46.sram_ctrl_regwen.2606205724 |
/workspace/coverage/default/46.sram_ctrl_smoke.1039512126 |
/workspace/coverage/default/46.sram_ctrl_stress_all.3342795786 |
/workspace/coverage/default/46.sram_ctrl_stress_all_with_rand_reset.3254615137 |
/workspace/coverage/default/46.sram_ctrl_stress_pipeline.464859738 |
/workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.2269603473 |
/workspace/coverage/default/47.sram_ctrl_access_during_key_req.2157245351 |
/workspace/coverage/default/47.sram_ctrl_alert_test.2488582642 |
/workspace/coverage/default/47.sram_ctrl_bijection.769182730 |
/workspace/coverage/default/47.sram_ctrl_executable.3426604065 |
/workspace/coverage/default/47.sram_ctrl_lc_escalation.608324731 |
/workspace/coverage/default/47.sram_ctrl_max_throughput.1735358503 |
/workspace/coverage/default/47.sram_ctrl_mem_partial_access.2845156682 |
/workspace/coverage/default/47.sram_ctrl_mem_walk.87386961 |
/workspace/coverage/default/47.sram_ctrl_multiple_keys.3558304949 |
/workspace/coverage/default/47.sram_ctrl_partial_access.2569267718 |
/workspace/coverage/default/47.sram_ctrl_partial_access_b2b.2590883016 |
/workspace/coverage/default/47.sram_ctrl_ram_cfg.315167686 |
/workspace/coverage/default/47.sram_ctrl_regwen.653107817 |
/workspace/coverage/default/47.sram_ctrl_smoke.374234863 |
/workspace/coverage/default/47.sram_ctrl_stress_all.4019433884 |
/workspace/coverage/default/47.sram_ctrl_stress_all_with_rand_reset.3449359451 |
/workspace/coverage/default/47.sram_ctrl_stress_pipeline.1640906398 |
/workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.4173422678 |
/workspace/coverage/default/48.sram_ctrl_access_during_key_req.3980232185 |
/workspace/coverage/default/48.sram_ctrl_alert_test.4110625069 |
/workspace/coverage/default/48.sram_ctrl_bijection.1522760866 |
/workspace/coverage/default/48.sram_ctrl_executable.4234144094 |
/workspace/coverage/default/48.sram_ctrl_lc_escalation.386503988 |
/workspace/coverage/default/48.sram_ctrl_max_throughput.1993154497 |
/workspace/coverage/default/48.sram_ctrl_mem_partial_access.3584417433 |
/workspace/coverage/default/48.sram_ctrl_mem_walk.2464217442 |
/workspace/coverage/default/48.sram_ctrl_multiple_keys.1841982618 |
/workspace/coverage/default/48.sram_ctrl_partial_access.2198064309 |
/workspace/coverage/default/48.sram_ctrl_partial_access_b2b.3055075448 |
/workspace/coverage/default/48.sram_ctrl_ram_cfg.1244251488 |
/workspace/coverage/default/48.sram_ctrl_smoke.1078979220 |
/workspace/coverage/default/48.sram_ctrl_stress_all.106101698 |
/workspace/coverage/default/48.sram_ctrl_stress_all_with_rand_reset.1654257895 |
/workspace/coverage/default/48.sram_ctrl_stress_pipeline.579765100 |
/workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.2688680354 |
/workspace/coverage/default/49.sram_ctrl_access_during_key_req.3575212111 |
/workspace/coverage/default/49.sram_ctrl_alert_test.4233734068 |
/workspace/coverage/default/49.sram_ctrl_bijection.3823001656 |
/workspace/coverage/default/49.sram_ctrl_executable.3140662793 |
/workspace/coverage/default/49.sram_ctrl_lc_escalation.827081121 |
/workspace/coverage/default/49.sram_ctrl_max_throughput.2962330253 |
/workspace/coverage/default/49.sram_ctrl_mem_partial_access.2491052050 |
/workspace/coverage/default/49.sram_ctrl_mem_walk.3997061274 |
/workspace/coverage/default/49.sram_ctrl_multiple_keys.3388488816 |
/workspace/coverage/default/49.sram_ctrl_partial_access.2386583233 |
/workspace/coverage/default/49.sram_ctrl_partial_access_b2b.1174278376 |
/workspace/coverage/default/49.sram_ctrl_ram_cfg.2351432656 |
/workspace/coverage/default/49.sram_ctrl_regwen.2558060756 |
/workspace/coverage/default/49.sram_ctrl_smoke.1559296632 |
/workspace/coverage/default/49.sram_ctrl_stress_all.965117156 |
/workspace/coverage/default/49.sram_ctrl_stress_all_with_rand_reset.2619284744 |
/workspace/coverage/default/49.sram_ctrl_stress_pipeline.634758759 |
/workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.3793705060 |
/workspace/coverage/default/5.sram_ctrl_access_during_key_req.593556880 |
/workspace/coverage/default/5.sram_ctrl_alert_test.2712006804 |
/workspace/coverage/default/5.sram_ctrl_bijection.1425700600 |
/workspace/coverage/default/5.sram_ctrl_executable.1541174796 |
/workspace/coverage/default/5.sram_ctrl_lc_escalation.2623424266 |
/workspace/coverage/default/5.sram_ctrl_max_throughput.3108699510 |
/workspace/coverage/default/5.sram_ctrl_mem_partial_access.2948527122 |
/workspace/coverage/default/5.sram_ctrl_mem_walk.3268055969 |
/workspace/coverage/default/5.sram_ctrl_multiple_keys.3444433157 |
/workspace/coverage/default/5.sram_ctrl_partial_access.4263533899 |
/workspace/coverage/default/5.sram_ctrl_partial_access_b2b.2604971261 |
/workspace/coverage/default/5.sram_ctrl_ram_cfg.4207917276 |
/workspace/coverage/default/5.sram_ctrl_regwen.329884042 |
/workspace/coverage/default/5.sram_ctrl_smoke.1125239831 |
/workspace/coverage/default/5.sram_ctrl_stress_all.1325403931 |
/workspace/coverage/default/5.sram_ctrl_stress_all_with_rand_reset.1905660584 |
/workspace/coverage/default/5.sram_ctrl_stress_pipeline.3574705330 |
/workspace/coverage/default/5.sram_ctrl_throughput_w_partial_write.740550388 |
/workspace/coverage/default/6.sram_ctrl_access_during_key_req.2202368742 |
/workspace/coverage/default/6.sram_ctrl_alert_test.1614363055 |
/workspace/coverage/default/6.sram_ctrl_bijection.4213260855 |
/workspace/coverage/default/6.sram_ctrl_executable.3956064511 |
/workspace/coverage/default/6.sram_ctrl_lc_escalation.1923413416 |
/workspace/coverage/default/6.sram_ctrl_max_throughput.2999462125 |
/workspace/coverage/default/6.sram_ctrl_mem_partial_access.4093396940 |
/workspace/coverage/default/6.sram_ctrl_mem_walk.4064193827 |
/workspace/coverage/default/6.sram_ctrl_multiple_keys.3786404587 |
/workspace/coverage/default/6.sram_ctrl_partial_access.3631234271 |
/workspace/coverage/default/6.sram_ctrl_partial_access_b2b.3148667073 |
/workspace/coverage/default/6.sram_ctrl_ram_cfg.933060742 |
/workspace/coverage/default/6.sram_ctrl_regwen.165889179 |
/workspace/coverage/default/6.sram_ctrl_smoke.4264885895 |
/workspace/coverage/default/6.sram_ctrl_stress_all.2087320832 |
/workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.2856890560 |
/workspace/coverage/default/6.sram_ctrl_stress_pipeline.3189428504 |
/workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.3542800643 |
/workspace/coverage/default/7.sram_ctrl_access_during_key_req.2040636177 |
/workspace/coverage/default/7.sram_ctrl_alert_test.1737855675 |
/workspace/coverage/default/7.sram_ctrl_bijection.3712119071 |
/workspace/coverage/default/7.sram_ctrl_executable.1701190237 |
/workspace/coverage/default/7.sram_ctrl_lc_escalation.2840198982 |
/workspace/coverage/default/7.sram_ctrl_max_throughput.3305181682 |
/workspace/coverage/default/7.sram_ctrl_mem_partial_access.2906805309 |
/workspace/coverage/default/7.sram_ctrl_mem_walk.1942941516 |
/workspace/coverage/default/7.sram_ctrl_multiple_keys.2819976301 |
/workspace/coverage/default/7.sram_ctrl_partial_access.3639400747 |
/workspace/coverage/default/7.sram_ctrl_partial_access_b2b.4037970169 |
/workspace/coverage/default/7.sram_ctrl_ram_cfg.1882647987 |
/workspace/coverage/default/7.sram_ctrl_regwen.484635443 |
/workspace/coverage/default/7.sram_ctrl_smoke.2902741952 |
/workspace/coverage/default/7.sram_ctrl_stress_all.4136484548 |
/workspace/coverage/default/7.sram_ctrl_stress_all_with_rand_reset.1783769840 |
/workspace/coverage/default/7.sram_ctrl_stress_pipeline.1076183880 |
/workspace/coverage/default/7.sram_ctrl_throughput_w_partial_write.1526057246 |
/workspace/coverage/default/8.sram_ctrl_access_during_key_req.3150252560 |
/workspace/coverage/default/8.sram_ctrl_alert_test.2956311189 |
/workspace/coverage/default/8.sram_ctrl_bijection.733777790 |
/workspace/coverage/default/8.sram_ctrl_executable.83378883 |
/workspace/coverage/default/8.sram_ctrl_lc_escalation.1197183342 |
/workspace/coverage/default/8.sram_ctrl_max_throughput.2546734995 |
/workspace/coverage/default/8.sram_ctrl_mem_partial_access.2041275794 |
/workspace/coverage/default/8.sram_ctrl_mem_walk.4136225161 |
/workspace/coverage/default/8.sram_ctrl_multiple_keys.3918646056 |
/workspace/coverage/default/8.sram_ctrl_partial_access.1703347924 |
/workspace/coverage/default/8.sram_ctrl_partial_access_b2b.3187820480 |
/workspace/coverage/default/8.sram_ctrl_ram_cfg.1599834617 |
/workspace/coverage/default/8.sram_ctrl_regwen.1445640198 |
/workspace/coverage/default/8.sram_ctrl_smoke.950047315 |
/workspace/coverage/default/8.sram_ctrl_stress_all.1853635598 |
/workspace/coverage/default/8.sram_ctrl_stress_all_with_rand_reset.1125287752 |
/workspace/coverage/default/8.sram_ctrl_stress_pipeline.205979098 |
/workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.667131800 |
/workspace/coverage/default/9.sram_ctrl_access_during_key_req.3729189780 |
/workspace/coverage/default/9.sram_ctrl_alert_test.555184823 |
/workspace/coverage/default/9.sram_ctrl_bijection.2285203843 |
/workspace/coverage/default/9.sram_ctrl_executable.938110050 |
/workspace/coverage/default/9.sram_ctrl_lc_escalation.2111152007 |
/workspace/coverage/default/9.sram_ctrl_max_throughput.1614696212 |
/workspace/coverage/default/9.sram_ctrl_mem_partial_access.293202009 |
/workspace/coverage/default/9.sram_ctrl_mem_walk.948993778 |
/workspace/coverage/default/9.sram_ctrl_multiple_keys.3956995810 |
/workspace/coverage/default/9.sram_ctrl_partial_access.3728365224 |
/workspace/coverage/default/9.sram_ctrl_partial_access_b2b.2185698335 |
/workspace/coverage/default/9.sram_ctrl_ram_cfg.353215693 |
/workspace/coverage/default/9.sram_ctrl_regwen.1807166267 |
/workspace/coverage/default/9.sram_ctrl_smoke.2431347952 |
/workspace/coverage/default/9.sram_ctrl_stress_all.776840782 |
/workspace/coverage/default/9.sram_ctrl_stress_all_with_rand_reset.2948261015 |
/workspace/coverage/default/9.sram_ctrl_stress_pipeline.511721248 |
/workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.3951091449 |
TEST NO | TEST LOCATION | TEST NAME | STATUS | STARTED | FINISHED | SIMULATION TIME |
T1 |
/workspace/coverage/default/33.sram_ctrl_bijection.2406998455 |
|
|
Aug 19 05:31:31 PM PDT 24 |
Aug 19 05:49:01 PM PDT 24 |
65904496892 ps |
T2 |
/workspace/coverage/default/47.sram_ctrl_mem_partial_access.2845156682 |
|
|
Aug 19 05:34:33 PM PDT 24 |
Aug 19 05:37:14 PM PDT 24 |
9304524893 ps |
T3 |
/workspace/coverage/default/48.sram_ctrl_regwen.2242203929 |
|
|
Aug 19 05:34:59 PM PDT 24 |
Aug 19 05:46:21 PM PDT 24 |
3537309941 ps |
T4 |
/workspace/coverage/default/22.sram_ctrl_lc_escalation.3263407710 |
|
|
Aug 19 05:29:36 PM PDT 24 |
Aug 19 05:30:42 PM PDT 24 |
21019139533 ps |
T7 |
/workspace/coverage/default/47.sram_ctrl_partial_access.2569267718 |
|
|
Aug 19 05:34:31 PM PDT 24 |
Aug 19 05:34:45 PM PDT 24 |
1036922917 ps |
T5 |
/workspace/coverage/default/45.sram_ctrl_lc_escalation.1223932540 |
|
|
Aug 19 05:34:11 PM PDT 24 |
Aug 19 05:35:47 PM PDT 24 |
14595495428 ps |
T8 |
/workspace/coverage/default/7.sram_ctrl_partial_access.3639400747 |
|
|
Aug 19 05:28:12 PM PDT 24 |
Aug 19 05:28:29 PM PDT 24 |
580814604 ps |
T9 |
/workspace/coverage/default/39.sram_ctrl_regwen.100046853 |
|
|
Aug 19 05:32:42 PM PDT 24 |
Aug 19 05:33:05 PM PDT 24 |
4810918531 ps |
T10 |
/workspace/coverage/default/12.sram_ctrl_regwen.3353971014 |
|
|
Aug 19 05:28:42 PM PDT 24 |
Aug 19 05:41:11 PM PDT 24 |
11485966825 ps |
T11 |
/workspace/coverage/default/22.sram_ctrl_mem_walk.1730877713 |
|
|
Aug 19 05:29:40 PM PDT 24 |
Aug 19 05:33:45 PM PDT 24 |
3946633942 ps |
T41 |
/workspace/coverage/default/0.sram_ctrl_access_during_key_req.437453529 |
|
|
Aug 19 05:27:40 PM PDT 24 |
Aug 19 05:48:19 PM PDT 24 |
185923320800 ps |
T42 |
/workspace/coverage/default/43.sram_ctrl_regwen.3239495505 |
|
|
Aug 19 05:33:42 PM PDT 24 |
Aug 19 05:53:25 PM PDT 24 |
4492414318 ps |
T40 |
/workspace/coverage/default/24.sram_ctrl_multiple_keys.3389574129 |
|
|
Aug 19 05:29:44 PM PDT 24 |
Aug 19 05:46:44 PM PDT 24 |
78891125912 ps |
T23 |
/workspace/coverage/default/22.sram_ctrl_stress_all_with_rand_reset.3983035528 |
|
|
Aug 19 05:29:38 PM PDT 24 |
Aug 19 05:29:50 PM PDT 24 |
518376524 ps |
T6 |
/workspace/coverage/default/39.sram_ctrl_lc_escalation.3804256790 |
|
|
Aug 19 05:32:45 PM PDT 24 |
Aug 19 05:33:19 PM PDT 24 |
8774141015 ps |
T84 |
/workspace/coverage/default/25.sram_ctrl_multiple_keys.941888834 |
|
|
Aug 19 05:30:03 PM PDT 24 |
Aug 19 05:37:39 PM PDT 24 |
30798917076 ps |
T71 |
/workspace/coverage/default/8.sram_ctrl_stress_pipeline.205979098 |
|
|
Aug 19 05:28:15 PM PDT 24 |
Aug 19 05:31:14 PM PDT 24 |
5411641548 ps |
T19 |
/workspace/coverage/default/7.sram_ctrl_lc_escalation.2840198982 |
|
|
Aug 19 05:28:13 PM PDT 24 |
Aug 19 05:28:57 PM PDT 24 |
13138285356 ps |
T85 |
/workspace/coverage/default/45.sram_ctrl_max_throughput.1371604792 |
|
|
Aug 19 05:34:04 PM PDT 24 |
Aug 19 05:36:23 PM PDT 24 |
3818176076 ps |
T12 |
/workspace/coverage/default/20.sram_ctrl_alert_test.1060475536 |
|
|
Aug 19 05:29:34 PM PDT 24 |
Aug 19 05:29:34 PM PDT 24 |
12152878 ps |
T72 |
/workspace/coverage/default/19.sram_ctrl_stress_all.2041670877 |
|
|
Aug 19 05:29:34 PM PDT 24 |
Aug 19 07:15:56 PM PDT 24 |
254844735968 ps |
T86 |
/workspace/coverage/default/22.sram_ctrl_multiple_keys.2067137655 |
|
|
Aug 19 05:29:33 PM PDT 24 |
Aug 19 05:51:45 PM PDT 24 |
38771571218 ps |
T13 |
/workspace/coverage/default/33.sram_ctrl_alert_test.2796059610 |
|
|
Aug 19 05:31:41 PM PDT 24 |
Aug 19 05:31:42 PM PDT 24 |
64477059 ps |
T48 |
/workspace/coverage/default/48.sram_ctrl_mem_walk.2464217442 |
|
|
Aug 19 05:34:54 PM PDT 24 |
Aug 19 05:37:40 PM PDT 24 |
57656109021 ps |
T58 |
/workspace/coverage/default/0.sram_ctrl_partial_access.779917525 |
|
|
Aug 19 05:27:38 PM PDT 24 |
Aug 19 05:27:44 PM PDT 24 |
449572843 ps |
T26 |
/workspace/coverage/default/28.sram_ctrl_ram_cfg.3699080834 |
|
|
Aug 19 05:30:33 PM PDT 24 |
Aug 19 05:30:37 PM PDT 24 |
705350929 ps |
T59 |
/workspace/coverage/default/34.sram_ctrl_bijection.1083182511 |
|
|
Aug 19 05:31:42 PM PDT 24 |
Aug 19 06:08:30 PM PDT 24 |
485483936421 ps |
T60 |
/workspace/coverage/default/12.sram_ctrl_partial_access_b2b.3382447198 |
|
|
Aug 19 05:28:41 PM PDT 24 |
Aug 19 05:36:48 PM PDT 24 |
85327476117 ps |
T45 |
/workspace/coverage/default/20.sram_ctrl_regwen.3406397263 |
|
|
Aug 19 05:29:29 PM PDT 24 |
Aug 19 05:40:01 PM PDT 24 |
58408562738 ps |
T61 |
/workspace/coverage/default/23.sram_ctrl_smoke.1820095746 |
|
|
Aug 19 05:29:41 PM PDT 24 |
Aug 19 05:29:49 PM PDT 24 |
5588434869 ps |
T49 |
/workspace/coverage/default/21.sram_ctrl_mem_partial_access.3562133229 |
|
|
Aug 19 05:29:35 PM PDT 24 |
Aug 19 05:32:24 PM PDT 24 |
6677694577 ps |
T62 |
/workspace/coverage/default/5.sram_ctrl_bijection.1425700600 |
|
|
Aug 19 05:27:53 PM PDT 24 |
Aug 19 05:35:46 PM PDT 24 |
27552503277 ps |
T63 |
/workspace/coverage/default/20.sram_ctrl_mem_walk.3329367899 |
|
|
Aug 19 05:29:30 PM PDT 24 |
Aug 19 05:31:41 PM PDT 24 |
7902280046 ps |
T27 |
/workspace/coverage/default/35.sram_ctrl_ram_cfg.129537480 |
|
|
Aug 19 05:32:04 PM PDT 24 |
Aug 19 05:32:07 PM PDT 24 |
512945564 ps |
T68 |
/workspace/coverage/default/40.sram_ctrl_stress_pipeline.2846802879 |
|
|
Aug 19 05:32:54 PM PDT 24 |
Aug 19 05:37:14 PM PDT 24 |
7184329203 ps |
T43 |
/workspace/coverage/default/24.sram_ctrl_access_during_key_req.2662737960 |
|
|
Aug 19 05:29:54 PM PDT 24 |
Aug 19 05:43:12 PM PDT 24 |
49045655876 ps |
T69 |
/workspace/coverage/default/48.sram_ctrl_partial_access_b2b.3055075448 |
|
|
Aug 19 05:34:42 PM PDT 24 |
Aug 19 05:41:32 PM PDT 24 |
17018794380 ps |
T50 |
/workspace/coverage/default/36.sram_ctrl_mem_partial_access.3170259278 |
|
|
Aug 19 05:32:13 PM PDT 24 |
Aug 19 05:33:33 PM PDT 24 |
2918820692 ps |
T44 |
/workspace/coverage/default/26.sram_ctrl_access_during_key_req.2974563768 |
|
|
Aug 19 05:30:15 PM PDT 24 |
Aug 19 05:38:01 PM PDT 24 |
8289361003 ps |
T70 |
/workspace/coverage/default/11.sram_ctrl_max_throughput.614207338 |
|
|
Aug 19 05:28:38 PM PDT 24 |
Aug 19 05:31:08 PM PDT 24 |
1593273422 ps |
T149 |
/workspace/coverage/default/37.sram_ctrl_max_throughput.1120822657 |
|
|
Aug 19 05:32:23 PM PDT 24 |
Aug 19 05:33:37 PM PDT 24 |
2921682897 ps |
T54 |
/workspace/coverage/default/13.sram_ctrl_mem_partial_access.1304774669 |
|
|
Aug 19 05:28:55 PM PDT 24 |
Aug 19 05:30:33 PM PDT 24 |
12257036086 ps |
T123 |
/workspace/coverage/default/24.sram_ctrl_lc_escalation.952882669 |
|
|
Aug 19 05:29:54 PM PDT 24 |
Aug 19 05:30:55 PM PDT 24 |
9517388485 ps |
T24 |
/workspace/coverage/default/3.sram_ctrl_stress_all_with_rand_reset.1496285765 |
|
|
Aug 19 05:27:54 PM PDT 24 |
Aug 19 05:29:28 PM PDT 24 |
4322130843 ps |
T119 |
/workspace/coverage/default/20.sram_ctrl_lc_escalation.1177994990 |
|
|
Aug 19 05:29:26 PM PDT 24 |
Aug 19 05:30:11 PM PDT 24 |
6948885405 ps |
T110 |
/workspace/coverage/default/33.sram_ctrl_partial_access_b2b.3953240846 |
|
|
Aug 19 05:31:30 PM PDT 24 |
Aug 19 05:36:16 PM PDT 24 |
60488960281 ps |
T120 |
/workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.2688680354 |
|
|
Aug 19 05:34:44 PM PDT 24 |
Aug 19 05:36:16 PM PDT 24 |
803590195 ps |
T46 |
/workspace/coverage/default/19.sram_ctrl_executable.1304627534 |
|
|
Aug 19 05:29:29 PM PDT 24 |
Aug 19 05:55:45 PM PDT 24 |
24602474356 ps |
T28 |
/workspace/coverage/default/7.sram_ctrl_ram_cfg.1882647987 |
|
|
Aug 19 05:28:09 PM PDT 24 |
Aug 19 05:28:13 PM PDT 24 |
3054073684 ps |
T121 |
/workspace/coverage/default/48.sram_ctrl_executable.4234144094 |
|
|
Aug 19 05:34:43 PM PDT 24 |
Aug 19 05:49:35 PM PDT 24 |
30373790994 ps |
T122 |
/workspace/coverage/default/46.sram_ctrl_partial_access.2772161922 |
|
|
Aug 19 05:34:12 PM PDT 24 |
Aug 19 05:34:26 PM PDT 24 |
545746835 ps |
T20 |
/workspace/coverage/default/49.sram_ctrl_regwen.2558060756 |
|
|
Aug 19 05:35:06 PM PDT 24 |
Aug 19 05:35:48 PM PDT 24 |
2194211478 ps |
T47 |
/workspace/coverage/default/7.sram_ctrl_regwen.484635443 |
|
|
Aug 19 05:28:15 PM PDT 24 |
Aug 19 05:43:30 PM PDT 24 |
12382465059 ps |
T151 |
/workspace/coverage/default/29.sram_ctrl_partial_access.748273782 |
|
|
Aug 19 05:30:35 PM PDT 24 |
Aug 19 05:31:50 PM PDT 24 |
1179715536 ps |
T111 |
/workspace/coverage/default/20.sram_ctrl_stress_pipeline.3697634158 |
|
|
Aug 19 05:29:31 PM PDT 24 |
Aug 19 05:32:31 PM PDT 24 |
8940226505 ps |
T112 |
/workspace/coverage/default/30.sram_ctrl_stress_pipeline.3022832510 |
|
|
Aug 19 05:30:43 PM PDT 24 |
Aug 19 05:34:56 PM PDT 24 |
5657938040 ps |
T152 |
/workspace/coverage/default/4.sram_ctrl_throughput_w_partial_write.1022429298 |
|
|
Aug 19 05:27:54 PM PDT 24 |
Aug 19 05:29:14 PM PDT 24 |
3097241549 ps |
T55 |
/workspace/coverage/default/0.sram_ctrl_mem_walk.2594476726 |
|
|
Aug 19 05:27:36 PM PDT 24 |
Aug 19 05:30:13 PM PDT 24 |
9734520874 ps |
T153 |
/workspace/coverage/default/4.sram_ctrl_max_throughput.1216908025 |
|
|
Aug 19 05:27:51 PM PDT 24 |
Aug 19 05:29:30 PM PDT 24 |
1521064869 ps |
T147 |
/workspace/coverage/default/19.sram_ctrl_bijection.1674454893 |
|
|
Aug 19 05:29:21 PM PDT 24 |
Aug 19 05:43:31 PM PDT 24 |
37797962440 ps |
T154 |
/workspace/coverage/default/38.sram_ctrl_lc_escalation.1599561197 |
|
|
Aug 19 05:32:37 PM PDT 24 |
Aug 19 05:33:55 PM PDT 24 |
39256768138 ps |
T155 |
/workspace/coverage/default/22.sram_ctrl_partial_access.3949871831 |
|
|
Aug 19 05:29:35 PM PDT 24 |
Aug 19 05:29:50 PM PDT 24 |
6238670293 ps |
T113 |
/workspace/coverage/default/23.sram_ctrl_stress_pipeline.1501355629 |
|
|
Aug 19 05:29:43 PM PDT 24 |
Aug 19 05:34:39 PM PDT 24 |
3644456654 ps |
T156 |
/workspace/coverage/default/4.sram_ctrl_smoke.2207619459 |
|
|
Aug 19 05:27:54 PM PDT 24 |
Aug 19 05:28:14 PM PDT 24 |
898045343 ps |
T145 |
/workspace/coverage/default/21.sram_ctrl_lc_escalation.3710798602 |
|
|
Aug 19 05:29:33 PM PDT 24 |
Aug 19 05:30:16 PM PDT 24 |
28651419617 ps |
T148 |
/workspace/coverage/default/43.sram_ctrl_bijection.4061559459 |
|
|
Aug 19 05:33:33 PM PDT 24 |
Aug 19 05:43:26 PM PDT 24 |
37340742326 ps |
T99 |
/workspace/coverage/default/23.sram_ctrl_access_during_key_req.2329283972 |
|
|
Aug 19 05:29:45 PM PDT 24 |
Aug 19 05:47:03 PM PDT 24 |
53254741910 ps |
T139 |
/workspace/coverage/default/11.sram_ctrl_executable.2198810638 |
|
|
Aug 19 05:28:40 PM PDT 24 |
Aug 19 05:49:02 PM PDT 24 |
19486580490 ps |
T140 |
/workspace/coverage/default/40.sram_ctrl_stress_all.1400046859 |
|
|
Aug 19 05:33:07 PM PDT 24 |
Aug 19 06:21:15 PM PDT 24 |
333753931218 ps |
T157 |
/workspace/coverage/default/32.sram_ctrl_lc_escalation.1065169410 |
|
|
Aug 19 05:31:23 PM PDT 24 |
Aug 19 05:31:51 PM PDT 24 |
4331263623 ps |
T25 |
/workspace/coverage/default/31.sram_ctrl_stress_all_with_rand_reset.3210434281 |
|
|
Aug 19 05:31:26 PM PDT 24 |
Aug 19 05:32:15 PM PDT 24 |
3720023153 ps |
T158 |
/workspace/coverage/default/1.sram_ctrl_ram_cfg.4124056172 |
|
|
Aug 19 05:27:44 PM PDT 24 |
Aug 19 05:27:47 PM PDT 24 |
350412245 ps |
T51 |
/workspace/coverage/default/34.sram_ctrl_stress_all_with_rand_reset.3424241086 |
|
|
Aug 19 05:31:53 PM PDT 24 |
Aug 19 05:32:36 PM PDT 24 |
29698944872 ps |
T14 |
/workspace/coverage/default/28.sram_ctrl_alert_test.319147243 |
|
|
Aug 19 05:30:36 PM PDT 24 |
Aug 19 05:30:37 PM PDT 24 |
17990458 ps |
T100 |
/workspace/coverage/default/11.sram_ctrl_access_during_key_req.121401388 |
|
|
Aug 19 05:28:42 PM PDT 24 |
Aug 19 05:52:04 PM PDT 24 |
32318213001 ps |
T21 |
/workspace/coverage/default/28.sram_ctrl_stress_all.2376006464 |
|
|
Aug 19 05:30:34 PM PDT 24 |
Aug 19 07:07:08 PM PDT 24 |
319185315161 ps |
T159 |
/workspace/coverage/default/1.sram_ctrl_smoke.2209908041 |
|
|
Aug 19 05:27:45 PM PDT 24 |
Aug 19 05:27:58 PM PDT 24 |
846758378 ps |
T56 |
/workspace/coverage/default/30.sram_ctrl_mem_walk.2732295233 |
|
|
Aug 19 05:30:52 PM PDT 24 |
Aug 19 05:36:38 PM PDT 24 |
13983806396 ps |
T160 |
/workspace/coverage/default/18.sram_ctrl_multiple_keys.676688974 |
|
|
Aug 19 05:29:20 PM PDT 24 |
Aug 19 05:43:51 PM PDT 24 |
21027724619 ps |
T146 |
/workspace/coverage/default/44.sram_ctrl_stress_all.1138325395 |
|
|
Aug 19 05:34:02 PM PDT 24 |
Aug 19 06:00:46 PM PDT 24 |
454101686803 ps |
T57 |
/workspace/coverage/default/32.sram_ctrl_mem_walk.1461289473 |
|
|
Aug 19 05:31:22 PM PDT 24 |
Aug 19 05:34:21 PM PDT 24 |
10341709319 ps |
T161 |
/workspace/coverage/default/48.sram_ctrl_max_throughput.1993154497 |
|
|
Aug 19 05:34:41 PM PDT 24 |
Aug 19 05:35:30 PM PDT 24 |
4881146157 ps |
T162 |
/workspace/coverage/default/35.sram_ctrl_lc_escalation.3093495137 |
|
|
Aug 19 05:32:02 PM PDT 24 |
Aug 19 05:32:40 PM PDT 24 |
5485100619 ps |
T163 |
/workspace/coverage/default/12.sram_ctrl_ram_cfg.828072431 |
|
|
Aug 19 05:28:41 PM PDT 24 |
Aug 19 05:28:44 PM PDT 24 |
498704834 ps |
T164 |
/workspace/coverage/default/26.sram_ctrl_throughput_w_partial_write.885308412 |
|
|
Aug 19 05:30:12 PM PDT 24 |
Aug 19 05:31:43 PM PDT 24 |
3134152279 ps |
T22 |
/workspace/coverage/default/29.sram_ctrl_regwen.3064181142 |
|
|
Aug 19 05:30:44 PM PDT 24 |
Aug 19 05:41:09 PM PDT 24 |
18206338095 ps |
T165 |
/workspace/coverage/default/9.sram_ctrl_max_throughput.1614696212 |
|
|
Aug 19 05:28:22 PM PDT 24 |
Aug 19 05:29:21 PM PDT 24 |
4317845078 ps |
T15 |
/workspace/coverage/default/39.sram_ctrl_alert_test.814353344 |
|
|
Aug 19 05:32:53 PM PDT 24 |
Aug 19 05:32:54 PM PDT 24 |
58921605 ps |
T143 |
/workspace/coverage/default/45.sram_ctrl_regwen.3219340216 |
|
|
Aug 19 05:34:15 PM PDT 24 |
Aug 19 06:02:10 PM PDT 24 |
34999955479 ps |
T101 |
/workspace/coverage/default/33.sram_ctrl_access_during_key_req.2232404486 |
|
|
Aug 19 05:31:32 PM PDT 24 |
Aug 19 05:52:04 PM PDT 24 |
66969451440 ps |
T124 |
/workspace/coverage/default/49.sram_ctrl_stress_all.965117156 |
|
|
Aug 19 05:35:07 PM PDT 24 |
Aug 19 05:51:07 PM PDT 24 |
139764953633 ps |
T166 |
/workspace/coverage/default/37.sram_ctrl_lc_escalation.681051409 |
|
|
Aug 19 05:32:22 PM PDT 24 |
Aug 19 05:32:41 PM PDT 24 |
2832822653 ps |
T79 |
/workspace/coverage/default/42.sram_ctrl_stress_all_with_rand_reset.3249123665 |
|
|
Aug 19 05:33:40 PM PDT 24 |
Aug 19 05:34:13 PM PDT 24 |
3134849122 ps |
T167 |
/workspace/coverage/default/37.sram_ctrl_ram_cfg.2314949012 |
|
|
Aug 19 05:32:38 PM PDT 24 |
Aug 19 05:32:41 PM PDT 24 |
420087682 ps |
T168 |
/workspace/coverage/default/35.sram_ctrl_executable.1637296219 |
|
|
Aug 19 05:32:03 PM PDT 24 |
Aug 19 06:00:34 PM PDT 24 |
45158764652 ps |
T169 |
/workspace/coverage/default/27.sram_ctrl_lc_escalation.3994720464 |
|
|
Aug 19 05:30:11 PM PDT 24 |
Aug 19 05:30:58 PM PDT 24 |
23414504362 ps |
T80 |
/workspace/coverage/default/30.sram_ctrl_stress_all_with_rand_reset.883038953 |
|
|
Aug 19 05:31:12 PM PDT 24 |
Aug 19 05:31:36 PM PDT 24 |
3506079217 ps |
T144 |
/workspace/coverage/default/48.sram_ctrl_stress_all.106101698 |
|
|
Aug 19 05:34:59 PM PDT 24 |
Aug 19 07:02:50 PM PDT 24 |
279429045228 ps |
T170 |
/workspace/coverage/default/0.sram_ctrl_ram_cfg.2899086490 |
|
|
Aug 19 05:27:37 PM PDT 24 |
Aug 19 05:27:40 PM PDT 24 |
345339953 ps |
T150 |
/workspace/coverage/default/38.sram_ctrl_max_throughput.2709557208 |
|
|
Aug 19 05:32:36 PM PDT 24 |
Aug 19 05:34:24 PM PDT 24 |
3137252519 ps |
T171 |
/workspace/coverage/default/31.sram_ctrl_partial_access.1388690063 |
|
|
Aug 19 05:31:12 PM PDT 24 |
Aug 19 05:32:06 PM PDT 24 |
1916972432 ps |
T141 |
/workspace/coverage/default/27.sram_ctrl_partial_access_b2b.2247712437 |
|
|
Aug 19 05:30:13 PM PDT 24 |
Aug 19 05:34:54 PM PDT 24 |
25097723796 ps |
T172 |
/workspace/coverage/default/13.sram_ctrl_stress_all.3795675966 |
|
|
Aug 19 05:28:57 PM PDT 24 |
Aug 19 06:08:42 PM PDT 24 |
61270963206 ps |
T173 |
/workspace/coverage/default/11.sram_ctrl_alert_test.385490581 |
|
|
Aug 19 05:28:42 PM PDT 24 |
Aug 19 05:28:43 PM PDT 24 |
66308016 ps |
T174 |
/workspace/coverage/default/6.sram_ctrl_ram_cfg.933060742 |
|
|
Aug 19 05:28:00 PM PDT 24 |
Aug 19 05:28:04 PM PDT 24 |
1407454261 ps |
T64 |
/workspace/coverage/default/14.sram_ctrl_mem_partial_access.125173402 |
|
|
Aug 19 05:28:55 PM PDT 24 |
Aug 19 05:31:35 PM PDT 24 |
5061864665 ps |
T175 |
/workspace/coverage/default/31.sram_ctrl_stress_all.67117973 |
|
|
Aug 19 05:31:23 PM PDT 24 |
Aug 19 07:01:05 PM PDT 24 |
82490313042 ps |
T176 |
/workspace/coverage/default/48.sram_ctrl_smoke.1078979220 |
|
|
Aug 19 05:34:42 PM PDT 24 |
Aug 19 05:37:11 PM PDT 24 |
1734107177 ps |
T177 |
/workspace/coverage/default/11.sram_ctrl_multiple_keys.2245733676 |
|
|
Aug 19 05:28:28 PM PDT 24 |
Aug 19 05:48:52 PM PDT 24 |
8807327527 ps |
T178 |
/workspace/coverage/default/45.sram_ctrl_ram_cfg.1628233238 |
|
|
Aug 19 05:34:14 PM PDT 24 |
Aug 19 05:34:18 PM PDT 24 |
641649713 ps |
T179 |
/workspace/coverage/default/10.sram_ctrl_bijection.1532523947 |
|
|
Aug 19 05:28:28 PM PDT 24 |
Aug 19 05:46:21 PM PDT 24 |
173286608049 ps |
T180 |
/workspace/coverage/default/38.sram_ctrl_regwen.3251858581 |
|
|
Aug 19 05:32:39 PM PDT 24 |
Aug 19 06:06:37 PM PDT 24 |
22582423091 ps |
T65 |
/workspace/coverage/default/2.sram_ctrl_stress_all_with_rand_reset.4112487956 |
|
|
Aug 19 05:27:44 PM PDT 24 |
Aug 19 05:28:17 PM PDT 24 |
4408775771 ps |
T181 |
/workspace/coverage/default/3.sram_ctrl_multiple_keys.2485822028 |
|
|
Aug 19 05:27:52 PM PDT 24 |
Aug 19 05:55:49 PM PDT 24 |
11651122285 ps |
T182 |
/workspace/coverage/default/21.sram_ctrl_stress_all.1017187970 |
|
|
Aug 19 05:29:35 PM PDT 24 |
Aug 19 06:38:18 PM PDT 24 |
35429087856 ps |
T183 |
/workspace/coverage/default/27.sram_ctrl_partial_access.507796555 |
|
|
Aug 19 05:30:12 PM PDT 24 |
Aug 19 05:30:52 PM PDT 24 |
964535080 ps |
T107 |
/workspace/coverage/default/46.sram_ctrl_mem_partial_access.1527178585 |
|
|
Aug 19 05:34:21 PM PDT 24 |
Aug 19 05:35:45 PM PDT 24 |
2788557424 ps |
T184 |
/workspace/coverage/default/17.sram_ctrl_max_throughput.1037521137 |
|
|
Aug 19 05:29:21 PM PDT 24 |
Aug 19 05:29:56 PM PDT 24 |
722915122 ps |
T185 |
/workspace/coverage/default/10.sram_ctrl_executable.2123728546 |
|
|
Aug 19 05:28:30 PM PDT 24 |
Aug 19 05:29:23 PM PDT 24 |
5342249377 ps |
T186 |
/workspace/coverage/default/0.sram_ctrl_regwen.4083233008 |
|
|
Aug 19 05:27:35 PM PDT 24 |
Aug 19 05:45:46 PM PDT 24 |
3458954472 ps |
T187 |
/workspace/coverage/default/2.sram_ctrl_executable.3430973285 |
|
|
Aug 19 05:27:47 PM PDT 24 |
Aug 19 05:48:25 PM PDT 24 |
24526683264 ps |
T188 |
/workspace/coverage/default/14.sram_ctrl_alert_test.1457563200 |
|
|
Aug 19 05:28:57 PM PDT 24 |
Aug 19 05:28:58 PM PDT 24 |
49727489 ps |
T189 |
/workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.2272234811 |
|
|
Aug 19 05:27:45 PM PDT 24 |
Aug 19 05:29:36 PM PDT 24 |
1586003080 ps |
T190 |
/workspace/coverage/default/43.sram_ctrl_ram_cfg.2083021479 |
|
|
Aug 19 05:33:42 PM PDT 24 |
Aug 19 05:33:45 PM PDT 24 |
1361812103 ps |
T191 |
/workspace/coverage/default/49.sram_ctrl_partial_access_b2b.1174278376 |
|
|
Aug 19 05:34:54 PM PDT 24 |
Aug 19 05:40:21 PM PDT 24 |
30322256818 ps |
T192 |
/workspace/coverage/default/31.sram_ctrl_partial_access_b2b.4025918698 |
|
|
Aug 19 05:31:12 PM PDT 24 |
Aug 19 05:35:40 PM PDT 24 |
4273591958 ps |
T193 |
/workspace/coverage/default/33.sram_ctrl_stress_all.2645093559 |
|
|
Aug 19 05:31:44 PM PDT 24 |
Aug 19 05:40:11 PM PDT 24 |
23670558128 ps |
T194 |
/workspace/coverage/default/5.sram_ctrl_stress_pipeline.3574705330 |
|
|
Aug 19 05:27:58 PM PDT 24 |
Aug 19 05:32:11 PM PDT 24 |
18067008481 ps |
T195 |
/workspace/coverage/default/31.sram_ctrl_alert_test.863456309 |
|
|
Aug 19 05:31:22 PM PDT 24 |
Aug 19 05:31:23 PM PDT 24 |
41435140 ps |
T196 |
/workspace/coverage/default/40.sram_ctrl_executable.449298650 |
|
|
Aug 19 05:33:06 PM PDT 24 |
Aug 19 05:53:37 PM PDT 24 |
89578195308 ps |
T197 |
/workspace/coverage/default/34.sram_ctrl_lc_escalation.3258317192 |
|
|
Aug 19 05:31:54 PM PDT 24 |
Aug 19 05:32:30 PM PDT 24 |
17606505916 ps |
T198 |
/workspace/coverage/default/32.sram_ctrl_access_during_key_req.1390813027 |
|
|
Aug 19 05:31:24 PM PDT 24 |
Aug 19 05:49:45 PM PDT 24 |
16019759289 ps |
T199 |
/workspace/coverage/default/9.sram_ctrl_multiple_keys.3956995810 |
|
|
Aug 19 05:28:21 PM PDT 24 |
Aug 19 05:46:46 PM PDT 24 |
84764866820 ps |
T200 |
/workspace/coverage/default/21.sram_ctrl_bijection.523755324 |
|
|
Aug 19 05:29:33 PM PDT 24 |
Aug 19 06:10:21 PM PDT 24 |
132466989993 ps |
T201 |
/workspace/coverage/default/32.sram_ctrl_ram_cfg.3573824369 |
|
|
Aug 19 05:31:22 PM PDT 24 |
Aug 19 05:31:25 PM PDT 24 |
358410181 ps |
T202 |
/workspace/coverage/default/49.sram_ctrl_ram_cfg.2351432656 |
|
|
Aug 19 05:35:07 PM PDT 24 |
Aug 19 05:35:10 PM PDT 24 |
1125324864 ps |
T203 |
/workspace/coverage/default/36.sram_ctrl_partial_access.1574293370 |
|
|
Aug 19 05:32:14 PM PDT 24 |
Aug 19 05:32:24 PM PDT 24 |
723593938 ps |
T81 |
/workspace/coverage/default/15.sram_ctrl_stress_all_with_rand_reset.1871446379 |
|
|
Aug 19 05:29:16 PM PDT 24 |
Aug 19 05:29:35 PM PDT 24 |
477786901 ps |
T204 |
/workspace/coverage/default/17.sram_ctrl_partial_access.1243916786 |
|
|
Aug 19 05:29:17 PM PDT 24 |
Aug 19 05:29:37 PM PDT 24 |
5756475445 ps |
T205 |
/workspace/coverage/default/9.sram_ctrl_alert_test.555184823 |
|
|
Aug 19 05:28:33 PM PDT 24 |
Aug 19 05:28:34 PM PDT 24 |
15522746 ps |
T206 |
/workspace/coverage/default/34.sram_ctrl_max_throughput.3235404559 |
|
|
Aug 19 05:31:41 PM PDT 24 |
Aug 19 05:31:50 PM PDT 24 |
719118002 ps |
T82 |
/workspace/coverage/default/32.sram_ctrl_stress_all_with_rand_reset.188254351 |
|
|
Aug 19 05:31:23 PM PDT 24 |
Aug 19 05:31:53 PM PDT 24 |
1115793649 ps |
T207 |
/workspace/coverage/default/6.sram_ctrl_lc_escalation.1923413416 |
|
|
Aug 19 05:28:03 PM PDT 24 |
Aug 19 05:28:21 PM PDT 24 |
8979130255 ps |
T208 |
/workspace/coverage/default/3.sram_ctrl_partial_access.2366511366 |
|
|
Aug 19 05:27:55 PM PDT 24 |
Aug 19 05:30:03 PM PDT 24 |
3800787653 ps |
T209 |
/workspace/coverage/default/34.sram_ctrl_executable.2875480304 |
|
|
Aug 19 05:31:52 PM PDT 24 |
Aug 19 05:41:26 PM PDT 24 |
6720980374 ps |
T210 |
/workspace/coverage/default/44.sram_ctrl_smoke.2718580234 |
|
|
Aug 19 05:33:52 PM PDT 24 |
Aug 19 05:34:13 PM PDT 24 |
910037812 ps |
T211 |
/workspace/coverage/default/19.sram_ctrl_stress_pipeline.521887601 |
|
|
Aug 19 05:29:21 PM PDT 24 |
Aug 19 05:32:20 PM PDT 24 |
12341388567 ps |
T212 |
/workspace/coverage/default/34.sram_ctrl_mem_walk.319252144 |
|
|
Aug 19 05:31:51 PM PDT 24 |
Aug 19 05:34:17 PM PDT 24 |
5265485658 ps |
T213 |
/workspace/coverage/default/28.sram_ctrl_access_during_key_req.3654637079 |
|
|
Aug 19 05:30:28 PM PDT 24 |
Aug 19 05:36:01 PM PDT 24 |
14620205682 ps |
T214 |
/workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.3466136500 |
|
|
Aug 19 05:27:46 PM PDT 24 |
Aug 19 05:28:10 PM PDT 24 |
1496510121 ps |
T215 |
/workspace/coverage/default/7.sram_ctrl_partial_access_b2b.4037970169 |
|
|
Aug 19 05:28:11 PM PDT 24 |
Aug 19 05:35:05 PM PDT 24 |
16057264048 ps |
T216 |
/workspace/coverage/default/2.sram_ctrl_stress_pipeline.4250928241 |
|
|
Aug 19 05:27:48 PM PDT 24 |
Aug 19 05:31:47 PM PDT 24 |
14601983056 ps |
T217 |
/workspace/coverage/default/36.sram_ctrl_stress_pipeline.2969950402 |
|
|
Aug 19 05:32:15 PM PDT 24 |
Aug 19 05:38:21 PM PDT 24 |
10209441167 ps |
T218 |
/workspace/coverage/default/16.sram_ctrl_mem_walk.2227847461 |
|
|
Aug 19 05:29:16 PM PDT 24 |
Aug 19 05:31:59 PM PDT 24 |
49506966029 ps |
T219 |
/workspace/coverage/default/3.sram_ctrl_lc_escalation.810135522 |
|
|
Aug 19 05:27:53 PM PDT 24 |
Aug 19 05:29:11 PM PDT 24 |
78539313659 ps |
T220 |
/workspace/coverage/default/36.sram_ctrl_max_throughput.2141365978 |
|
|
Aug 19 05:32:16 PM PDT 24 |
Aug 19 05:32:29 PM PDT 24 |
717883522 ps |
T221 |
/workspace/coverage/default/32.sram_ctrl_regwen.1811799455 |
|
|
Aug 19 05:31:20 PM PDT 24 |
Aug 19 05:44:22 PM PDT 24 |
11529169142 ps |
T222 |
/workspace/coverage/default/39.sram_ctrl_partial_access_b2b.2812802270 |
|
|
Aug 19 05:32:46 PM PDT 24 |
Aug 19 05:36:39 PM PDT 24 |
14976942876 ps |
T223 |
/workspace/coverage/default/7.sram_ctrl_smoke.2902741952 |
|
|
Aug 19 05:28:03 PM PDT 24 |
Aug 19 05:28:22 PM PDT 24 |
1951575483 ps |
T224 |
/workspace/coverage/default/47.sram_ctrl_alert_test.2488582642 |
|
|
Aug 19 05:34:31 PM PDT 24 |
Aug 19 05:34:32 PM PDT 24 |
45101167 ps |
T225 |
/workspace/coverage/default/7.sram_ctrl_max_throughput.3305181682 |
|
|
Aug 19 05:28:15 PM PDT 24 |
Aug 19 05:29:06 PM PDT 24 |
758843029 ps |
T226 |
/workspace/coverage/default/32.sram_ctrl_mem_partial_access.1220761378 |
|
|
Aug 19 05:31:23 PM PDT 24 |
Aug 19 05:32:50 PM PDT 24 |
26265914261 ps |
T83 |
/workspace/coverage/default/37.sram_ctrl_stress_all_with_rand_reset.3331107148 |
|
|
Aug 19 05:32:37 PM PDT 24 |
Aug 19 05:32:52 PM PDT 24 |
1037818932 ps |
T227 |
/workspace/coverage/default/22.sram_ctrl_stress_all.2076600288 |
|
|
Aug 19 05:29:41 PM PDT 24 |
Aug 19 06:22:21 PM PDT 24 |
223512684629 ps |
T228 |
/workspace/coverage/default/26.sram_ctrl_multiple_keys.4001112667 |
|
|
Aug 19 05:30:13 PM PDT 24 |
Aug 19 05:42:18 PM PDT 24 |
10003326802 ps |
T229 |
/workspace/coverage/default/43.sram_ctrl_throughput_w_partial_write.3315666557 |
|
|
Aug 19 05:33:42 PM PDT 24 |
Aug 19 05:33:48 PM PDT 24 |
668825075 ps |
T230 |
/workspace/coverage/default/5.sram_ctrl_stress_all_with_rand_reset.1905660584 |
|
|
Aug 19 05:28:01 PM PDT 24 |
Aug 19 05:29:22 PM PDT 24 |
1429010273 ps |
T231 |
/workspace/coverage/default/15.sram_ctrl_regwen.791420844 |
|
|
Aug 19 05:29:17 PM PDT 24 |
Aug 19 05:40:15 PM PDT 24 |
18017955675 ps |
T232 |
/workspace/coverage/default/22.sram_ctrl_smoke.3144384567 |
|
|
Aug 19 05:29:36 PM PDT 24 |
Aug 19 05:29:45 PM PDT 24 |
832665739 ps |
T233 |
/workspace/coverage/default/38.sram_ctrl_executable.166253758 |
|
|
Aug 19 05:32:38 PM PDT 24 |
Aug 19 05:42:17 PM PDT 24 |
17543524777 ps |
T234 |
/workspace/coverage/default/15.sram_ctrl_alert_test.577319010 |
|
|
Aug 19 05:29:17 PM PDT 24 |
Aug 19 05:29:18 PM PDT 24 |
47475984 ps |
T235 |
/workspace/coverage/default/23.sram_ctrl_ram_cfg.603647249 |
|
|
Aug 19 05:29:44 PM PDT 24 |
Aug 19 05:29:47 PM PDT 24 |
351815807 ps |
T236 |
/workspace/coverage/default/27.sram_ctrl_throughput_w_partial_write.1602555749 |
|
|
Aug 19 05:30:12 PM PDT 24 |
Aug 19 05:30:30 PM PDT 24 |
2905324609 ps |
T237 |
/workspace/coverage/default/2.sram_ctrl_smoke.1642428486 |
|
|
Aug 19 05:27:49 PM PDT 24 |
Aug 19 05:28:07 PM PDT 24 |
4387409073 ps |
T238 |
/workspace/coverage/default/43.sram_ctrl_alert_test.394902562 |
|
|
Aug 19 05:33:52 PM PDT 24 |
Aug 19 05:33:53 PM PDT 24 |
20426602 ps |
T239 |
/workspace/coverage/default/16.sram_ctrl_bijection.3073312462 |
|
|
Aug 19 05:29:18 PM PDT 24 |
Aug 19 05:48:54 PM PDT 24 |
69538818307 ps |
T240 |
/workspace/coverage/default/19.sram_ctrl_alert_test.2498371483 |
|
|
Aug 19 05:29:31 PM PDT 24 |
Aug 19 05:29:32 PM PDT 24 |
20344325 ps |
T241 |
/workspace/coverage/default/26.sram_ctrl_max_throughput.857652665 |
|
|
Aug 19 05:30:13 PM PDT 24 |
Aug 19 05:32:37 PM PDT 24 |
766402713 ps |
T242 |
/workspace/coverage/default/19.sram_ctrl_multiple_keys.1067534868 |
|
|
Aug 19 05:29:21 PM PDT 24 |
Aug 19 05:52:51 PM PDT 24 |
91627134630 ps |
T243 |
/workspace/coverage/default/1.sram_ctrl_access_during_key_req.3529011139 |
|
|
Aug 19 05:27:46 PM PDT 24 |
Aug 19 05:46:14 PM PDT 24 |
65588922586 ps |
T244 |
/workspace/coverage/default/37.sram_ctrl_stress_all.413509792 |
|
|
Aug 19 05:32:40 PM PDT 24 |
Aug 19 06:32:13 PM PDT 24 |
36431045427 ps |
T245 |
/workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.623529016 |
|
|
Aug 19 05:28:38 PM PDT 24 |
Aug 19 05:28:47 PM PDT 24 |
3259856916 ps |
T246 |
/workspace/coverage/default/4.sram_ctrl_bijection.2254447656 |
|
|
Aug 19 05:27:53 PM PDT 24 |
Aug 19 05:47:26 PM PDT 24 |
66947894574 ps |
T247 |
/workspace/coverage/default/9.sram_ctrl_access_during_key_req.3729189780 |
|
|
Aug 19 05:28:22 PM PDT 24 |
Aug 19 05:45:59 PM PDT 24 |
67211567952 ps |
T248 |
/workspace/coverage/default/26.sram_ctrl_mem_walk.1015266324 |
|
|
Aug 19 05:30:11 PM PDT 24 |
Aug 19 05:33:01 PM PDT 24 |
37383244316 ps |
T249 |
/workspace/coverage/default/33.sram_ctrl_partial_access.2908766449 |
|
|
Aug 19 05:31:29 PM PDT 24 |
Aug 19 05:31:37 PM PDT 24 |
735350800 ps |
T250 |
/workspace/coverage/default/25.sram_ctrl_mem_walk.1095550036 |
|
|
Aug 19 05:30:03 PM PDT 24 |
Aug 19 05:32:44 PM PDT 24 |
14120648157 ps |
T251 |
/workspace/coverage/default/34.sram_ctrl_multiple_keys.990540131 |
|
|
Aug 19 05:31:42 PM PDT 24 |
Aug 19 05:38:40 PM PDT 24 |
11442702993 ps |
T66 |
/workspace/coverage/default/19.sram_ctrl_mem_partial_access.3496565636 |
|
|
Aug 19 05:29:29 PM PDT 24 |
Aug 19 05:32:06 PM PDT 24 |
9721732039 ps |
T252 |
/workspace/coverage/default/5.sram_ctrl_mem_walk.3268055969 |
|
|
Aug 19 05:28:03 PM PDT 24 |
Aug 19 05:30:59 PM PDT 24 |
28833164211 ps |
T253 |
/workspace/coverage/default/12.sram_ctrl_lc_escalation.862221477 |
|
|
Aug 19 05:28:42 PM PDT 24 |
Aug 19 05:29:58 PM PDT 24 |
13421943690 ps |
T254 |
/workspace/coverage/default/46.sram_ctrl_lc_escalation.150002614 |
|
|
Aug 19 05:34:24 PM PDT 24 |
Aug 19 05:35:36 PM PDT 24 |
22658620552 ps |
T67 |
/workspace/coverage/default/29.sram_ctrl_mem_partial_access.2995059363 |
|
|
Aug 19 05:30:41 PM PDT 24 |
Aug 19 05:33:11 PM PDT 24 |
4984450279 ps |
T255 |
/workspace/coverage/default/9.sram_ctrl_stress_all_with_rand_reset.2948261015 |
|
|
Aug 19 05:28:29 PM PDT 24 |
Aug 19 05:29:05 PM PDT 24 |
3323668289 ps |
T256 |
/workspace/coverage/default/38.sram_ctrl_alert_test.3364508495 |
|
|
Aug 19 05:32:49 PM PDT 24 |
Aug 19 05:32:49 PM PDT 24 |
27316928 ps |
T257 |
/workspace/coverage/default/1.sram_ctrl_partial_access_b2b.3093536714 |
|
|
Aug 19 05:27:50 PM PDT 24 |
Aug 19 05:34:06 PM PDT 24 |
12740019201 ps |
T258 |
/workspace/coverage/default/24.sram_ctrl_throughput_w_partial_write.584002145 |
|
|
Aug 19 05:29:53 PM PDT 24 |
Aug 19 05:31:04 PM PDT 24 |
816723798 ps |
T259 |
/workspace/coverage/default/43.sram_ctrl_stress_pipeline.3059194621 |
|
|
Aug 19 05:33:31 PM PDT 24 |
Aug 19 05:39:52 PM PDT 24 |
11351472634 ps |
T260 |
/workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.2579523897 |
|
|
Aug 19 05:33:52 PM PDT 24 |
Aug 19 05:34:26 PM PDT 24 |
724379297 ps |
T261 |
/workspace/coverage/default/22.sram_ctrl_ram_cfg.3841334268 |
|
|
Aug 19 05:29:35 PM PDT 24 |
Aug 19 05:29:38 PM PDT 24 |
679438553 ps |
T262 |
/workspace/coverage/default/31.sram_ctrl_ram_cfg.2757937312 |
|
|
Aug 19 05:31:21 PM PDT 24 |
Aug 19 05:31:24 PM PDT 24 |
1201934245 ps |
T263 |
/workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.1602040353 |
|
|
Aug 19 05:27:49 PM PDT 24 |
Aug 19 05:28:03 PM PDT 24 |
876483525 ps |
T264 |
/workspace/coverage/default/4.sram_ctrl_executable.4087064693 |
|
|
Aug 19 05:27:56 PM PDT 24 |
Aug 19 05:42:42 PM PDT 24 |
28060539981 ps |
T265 |
/workspace/coverage/default/49.sram_ctrl_bijection.3823001656 |
|
|
Aug 19 05:34:55 PM PDT 24 |
Aug 19 06:13:56 PM PDT 24 |
34994454664 ps |
T266 |
/workspace/coverage/default/2.sram_ctrl_lc_escalation.709943688 |
|
|
Aug 19 05:27:49 PM PDT 24 |
Aug 19 05:28:49 PM PDT 24 |
20747668346 ps |
T267 |
/workspace/coverage/default/28.sram_ctrl_lc_escalation.3050585156 |
|
|
Aug 19 05:30:25 PM PDT 24 |
Aug 19 05:31:34 PM PDT 24 |
24343505205 ps |
T115 |
/workspace/coverage/default/16.sram_ctrl_stress_all_with_rand_reset.2394400264 |
|
|
Aug 19 05:29:17 PM PDT 24 |
Aug 19 05:30:09 PM PDT 24 |
1646817722 ps |
T268 |
/workspace/coverage/default/36.sram_ctrl_bijection.1507539341 |
|
|
Aug 19 05:32:12 PM PDT 24 |
Aug 19 06:04:08 PM PDT 24 |
122153595905 ps |
T269 |
/workspace/coverage/default/30.sram_ctrl_max_throughput.1240411032 |
|
|
Aug 19 05:30:53 PM PDT 24 |
Aug 19 05:33:08 PM PDT 24 |
815616000 ps |
T270 |
/workspace/coverage/default/38.sram_ctrl_access_during_key_req.1368881018 |
|
|
Aug 19 05:32:39 PM PDT 24 |
Aug 19 05:55:09 PM PDT 24 |
27085021192 ps |
T271 |
/workspace/coverage/default/13.sram_ctrl_access_during_key_req.861832773 |
|
|
Aug 19 05:28:58 PM PDT 24 |
Aug 19 05:29:32 PM PDT 24 |
1550682960 ps |
T142 |
/workspace/coverage/default/5.sram_ctrl_partial_access_b2b.2604971261 |
|
|
Aug 19 05:27:55 PM PDT 24 |
Aug 19 05:33:42 PM PDT 24 |
16284640671 ps |
T272 |
/workspace/coverage/default/8.sram_ctrl_partial_access.1703347924 |
|
|
Aug 19 05:28:10 PM PDT 24 |
Aug 19 05:28:25 PM PDT 24 |
4296508045 ps |
T273 |
/workspace/coverage/default/3.sram_ctrl_mem_walk.3665777920 |
|
|
Aug 19 05:27:58 PM PDT 24 |
Aug 19 05:31:01 PM PDT 24 |
10581912201 ps |
T274 |
/workspace/coverage/default/12.sram_ctrl_mem_partial_access.979722016 |
|
|
Aug 19 05:28:39 PM PDT 24 |
Aug 19 05:30:09 PM PDT 24 |
11809081796 ps |
T275 |
/workspace/coverage/default/37.sram_ctrl_access_during_key_req.1543614379 |
|
|
Aug 19 05:32:22 PM PDT 24 |
Aug 19 05:38:59 PM PDT 24 |
3679872474 ps |
T276 |
/workspace/coverage/default/17.sram_ctrl_smoke.2141782099 |
|
|
Aug 19 05:29:18 PM PDT 24 |
Aug 19 05:32:08 PM PDT 24 |
470798121 ps |
T277 |
/workspace/coverage/default/16.sram_ctrl_regwen.1545659508 |
|
|
Aug 19 05:29:19 PM PDT 24 |
Aug 19 05:54:31 PM PDT 24 |
74420410368 ps |
T278 |
/workspace/coverage/default/31.sram_ctrl_executable.1318790812 |
|
|
Aug 19 05:31:12 PM PDT 24 |
Aug 19 05:53:04 PM PDT 24 |
25838740392 ps |
T279 |
/workspace/coverage/default/18.sram_ctrl_throughput_w_partial_write.3715665055 |
|
|
Aug 19 05:29:20 PM PDT 24 |
Aug 19 05:29:29 PM PDT 24 |
6130365262 ps |
T280 |
/workspace/coverage/default/7.sram_ctrl_multiple_keys.2819976301 |
|
|
Aug 19 05:28:00 PM PDT 24 |
Aug 19 05:51:20 PM PDT 24 |
126795267074 ps |
T281 |
/workspace/coverage/default/21.sram_ctrl_stress_pipeline.570828219 |
|
|
Aug 19 05:29:32 PM PDT 24 |
Aug 19 05:32:25 PM PDT 24 |
5835847637 ps |
T282 |
/workspace/coverage/default/13.sram_ctrl_mem_walk.242110739 |
|
|
Aug 19 05:28:57 PM PDT 24 |
Aug 19 05:32:04 PM PDT 24 |
10778881698 ps |
T283 |
/workspace/coverage/default/40.sram_ctrl_ram_cfg.969473437 |
|
|
Aug 19 05:33:08 PM PDT 24 |
Aug 19 05:33:11 PM PDT 24 |
681254272 ps |
T284 |
/workspace/coverage/default/4.sram_ctrl_partial_access_b2b.2446922478 |
|
|
Aug 19 05:27:58 PM PDT 24 |
Aug 19 05:33:21 PM PDT 24 |
25433128353 ps |
T285 |
/workspace/coverage/default/27.sram_ctrl_access_during_key_req.2153704959 |
|
|
Aug 19 05:30:26 PM PDT 24 |
Aug 19 05:36:28 PM PDT 24 |
27446375128 ps |
T286 |
/workspace/coverage/default/12.sram_ctrl_throughput_w_partial_write.2380003148 |
|
|
Aug 19 05:28:39 PM PDT 24 |
Aug 19 05:29:05 PM PDT 24 |
4193916153 ps |
T287 |
/workspace/coverage/default/28.sram_ctrl_smoke.271713026 |
|
|
Aug 19 05:30:25 PM PDT 24 |
Aug 19 05:30:29 PM PDT 24 |
505755779 ps |
T288 |
/workspace/coverage/default/17.sram_ctrl_regwen.3726697869 |
|
|
Aug 19 05:29:20 PM PDT 24 |
Aug 19 05:44:26 PM PDT 24 |
31562928041 ps |
T289 |
/workspace/coverage/default/49.sram_ctrl_mem_walk.3997061274 |
|
|
Aug 19 05:35:04 PM PDT 24 |
Aug 19 05:37:33 PM PDT 24 |
10517381730 ps |
T290 |
/workspace/coverage/default/13.sram_ctrl_stress_pipeline.2606738738 |
|
|
Aug 19 05:28:57 PM PDT 24 |
Aug 19 05:33:32 PM PDT 24 |
16185072142 ps |
T291 |
/workspace/coverage/default/14.sram_ctrl_throughput_w_partial_write.408563186 |
|
|
Aug 19 05:28:58 PM PDT 24 |
Aug 19 05:29:15 PM PDT 24 |
2894920594 ps |
T292 |
/workspace/coverage/default/3.sram_ctrl_mem_partial_access.2704611791 |
|
|
Aug 19 05:27:54 PM PDT 24 |
Aug 19 05:30:59 PM PDT 24 |
5639513457 ps |
T293 |
/workspace/coverage/default/30.sram_ctrl_ram_cfg.1783927646 |
|
|
Aug 19 05:30:52 PM PDT 24 |
Aug 19 05:30:56 PM PDT 24 |
1401664135 ps |
T294 |
/workspace/coverage/default/2.sram_ctrl_bijection.2364979283 |
|
|
Aug 19 05:27:46 PM PDT 24 |
Aug 19 06:01:20 PM PDT 24 |
85477971329 ps |
T295 |
/workspace/coverage/default/48.sram_ctrl_partial_access.2198064309 |
|
|
Aug 19 05:34:41 PM PDT 24 |
Aug 19 05:34:53 PM PDT 24 |
795364440 ps |
T296 |
/workspace/coverage/default/35.sram_ctrl_alert_test.2662503206 |
|
|
Aug 19 05:32:03 PM PDT 24 |
Aug 19 05:32:04 PM PDT 24 |
14565942 ps |
T297 |
/workspace/coverage/default/41.sram_ctrl_mem_partial_access.2852191185 |
|
|
Aug 19 05:33:32 PM PDT 24 |
Aug 19 05:35:00 PM PDT 24 |
9236043745 ps |
T298 |
/workspace/coverage/default/20.sram_ctrl_ram_cfg.27337912 |
|
|
Aug 19 05:29:28 PM PDT 24 |
Aug 19 05:29:31 PM PDT 24 |
346842798 ps |
T299 |
/workspace/coverage/default/9.sram_ctrl_mem_walk.948993778 |
|
|
Aug 19 05:28:29 PM PDT 24 |
Aug 19 05:33:40 PM PDT 24 |
14270091093 ps |
T300 |
/workspace/coverage/default/34.sram_ctrl_alert_test.981849277 |
|
|
Aug 19 05:31:52 PM PDT 24 |
Aug 19 05:31:53 PM PDT 24 |
22077753 ps |
T301 |
/workspace/coverage/default/10.sram_ctrl_stress_pipeline.3688410344 |
|
|
Aug 19 05:28:31 PM PDT 24 |
Aug 19 05:33:24 PM PDT 24 |
4167128892 ps |
T52 |
/workspace/coverage/default/29.sram_ctrl_stress_all_with_rand_reset.2812929527 |
|
|
Aug 19 05:30:44 PM PDT 24 |
Aug 19 05:31:25 PM PDT 24 |
6875986709 ps |
T302 |
/workspace/coverage/default/18.sram_ctrl_access_during_key_req.4176562152 |
|
|
Aug 19 05:29:21 PM PDT 24 |
Aug 19 05:52:15 PM PDT 24 |
72072908764 ps |
T116 |
/workspace/coverage/default/17.sram_ctrl_stress_all_with_rand_reset.702403953 |
|
|
Aug 19 05:29:18 PM PDT 24 |
Aug 19 05:29:37 PM PDT 24 |
550583696 ps |
T303 |
/workspace/coverage/default/2.sram_ctrl_mem_walk.3663001237 |
|
|
Aug 19 05:27:44 PM PDT 24 |
Aug 19 05:30:38 PM PDT 24 |
20723652215 ps |
T304 |
/workspace/coverage/default/4.sram_ctrl_stress_pipeline.1727575851 |
|
|
Aug 19 05:27:54 PM PDT 24 |
Aug 19 05:32:31 PM PDT 24 |
32131771426 ps |
T305 |
/workspace/coverage/default/37.sram_ctrl_smoke.1526217702 |
|
|
Aug 19 05:32:23 PM PDT 24 |
Aug 19 05:34:52 PM PDT 24 |
938894957 ps |
T306 |
/workspace/coverage/default/17.sram_ctrl_stress_all.4192708358 |
|
|
Aug 19 05:29:18 PM PDT 24 |
Aug 19 06:21:32 PM PDT 24 |
305793741936 ps |
T307 |
/workspace/coverage/default/18.sram_ctrl_partial_access_b2b.2994126907 |
|
|
Aug 19 05:29:19 PM PDT 24 |
Aug 19 05:34:39 PM PDT 24 |
66872410565 ps |