Unified Coverage Report :: Group :: sram_ctrl_env_pkg::sram_ctrl_env_cov#(10)::subword_access_cg

Group : sram_ctrl_env_pkg::sram_ctrl_env_cov#(10)::subword_access_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_sram_ctrl_env_0.1/sram_ctrl_env_cov.sv

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Summary for Group sram_ctrl_env_pkg::sram_ctrl_env_cov#(10)::subword_access_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	7	0	7	100.00
Crosses	10	0	10	100.00

Variables for Group sram_ctrl_env_pkg::sram_ctrl_env_cov#(10)::subword_access_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
subword_granularity_cp	5	0	5	100.00	100	1	1	0
subword_we_cp	2	0	2	100.00	100	1	1	2

Crosses for Group sram_ctrl_env_pkg::sram_ctrl_env_cov#(10)::subword_access_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
subword_access	10	0	10	100.00	100	1	1	0

Summary for Variable subword_granularity_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	5	0	5	100.00

User Defined Bins for subword_granularity_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ill_access	0	Illegal

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
word_access	42046216	1			T1	7722		T2	99		T4	52853
triple_byte_access	2548572	1			T1	11		T2	231		T4	1046
halfword_access	3824860	1			T1	11		T2	420		T4	1611
byte_access	5106824	1			T1	19		T2	768		T4	2148
zero_access	1283238	1			T1	4		T2	421		T4	521

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Summary for Variable subword_we_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for subword_we_cp

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

27355503

1

T1

2960

T2

846

T4

29034

auto[1]

27454207

1

T1

4807

T2

1093

T4

29145

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Summary for Cross subword_access

Samples crossed: subword_we_cp subword_granularity_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	10	0	10	100.00

Automatically Generated Cross Bins for subword_access

Bins

subword_we_cp	subword_granularity_cp	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0]	word_access	20973797	1			T1	2944		T2	7		T4	26358
auto[0]	triple_byte_access	1272383	1			T1	5		T2	34		T4	533
auto[0]	halfword_access	1911218	1			T1	3		T2	111		T4	798
auto[0]	byte_access	2552027	1			T1	5		T2	363		T4	1102
auto[0]	zero_access	646078	1			T1	3		T2	331		T4	243
auto[1]	word_access	21072419	1			T1	4778		T2	92		T4	26495
auto[1]	triple_byte_access	1276189	1			T1	6		T2	197		T4	513
auto[1]	halfword_access	1913642	1			T1	8		T2	309		T4	813
auto[1]	byte_access	2554797	1			T1	14		T2	405		T4	1046
auto[1]	zero_access	637160	1			T1	1		T2	90		T4	278