Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
99.50 100.00 98.18 100.00 100.00 99.71 99.70 98.89


Total tests in report: 982
Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP  
TOTAL INCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRNAME
85.71 85.71 97.47 97.47 81.65 81.65 92.02 92.02 71.43 71.43 89.05 89.05 95.05 95.05 73.28 73.28 /workspace/coverage/default/38.sram_ctrl_stress_all_with_rand_reset.1987375241
94.71 9.00 99.13 1.65 92.02 10.36 96.96 4.94 100.00 28.57 96.54 7.49 95.05 0.00 83.30 10.02 /workspace/coverage/default/15.sram_ctrl_stress_all.2827690931
96.18 1.47 99.51 0.39 93.84 1.82 98.14 1.18 100.00 0.00 97.98 1.44 96.40 1.35 87.38 4.08 /workspace/coverage/default/20.sram_ctrl_partial_access_b2b.3389115505
97.41 1.23 99.71 0.19 94.82 0.98 98.71 0.57 100.00 0.00 98.85 0.86 96.85 0.45 92.95 5.57 /workspace/coverage/cover_reg_top/1.sram_ctrl_tl_intg_err.1059490705
98.06 0.65 99.90 0.19 96.92 2.10 99.14 0.43 100.00 0.00 99.71 0.86 97.45 0.60 93.32 0.37 /workspace/coverage/default/1.sram_ctrl_sec_cm.1490655008
98.59 0.53 99.90 0.00 97.34 0.42 99.28 0.14 100.00 0.00 99.71 0.00 97.45 0.00 96.47 3.15 /workspace/coverage/default/44.sram_ctrl_stress_all.3828089959
98.76 0.17 99.90 0.00 97.48 0.14 99.28 0.00 100.00 0.00 99.71 0.00 98.50 1.05 96.47 0.00 /workspace/coverage/cover_reg_top/17.sram_ctrl_csr_rw.4229260543
98.93 0.17 99.90 0.00 97.76 0.28 99.28 0.00 100.00 0.00 99.71 0.00 99.40 0.90 96.47 0.00 /workspace/coverage/default/14.sram_ctrl_access_during_key_req.3667701090
99.07 0.13 99.90 0.00 97.76 0.00 99.28 0.00 100.00 0.00 99.71 0.00 99.40 0.00 97.40 0.93 /workspace/coverage/default/2.sram_ctrl_stress_all.1548388074
99.18 0.12 100.00 0.10 97.76 0.00 100.00 0.72 100.00 0.00 99.71 0.00 99.40 0.00 97.40 0.00 /workspace/coverage/default/11.sram_ctrl_ram_cfg.1281367908
99.29 0.11 100.00 0.00 97.76 0.00 100.00 0.00 100.00 0.00 99.71 0.00 99.40 0.00 98.14 0.74 /workspace/coverage/cover_reg_top/3.sram_ctrl_tl_intg_err.2972685301
99.34 0.05 100.00 0.00 97.76 0.00 100.00 0.00 100.00 0.00 99.71 0.00 99.40 0.00 98.52 0.37 /workspace/coverage/cover_reg_top/5.sram_ctrl_tl_intg_err.67413124
99.38 0.04 100.00 0.00 97.76 0.00 100.00 0.00 100.00 0.00 99.71 0.00 99.70 0.30 98.52 0.00 /workspace/coverage/cover_reg_top/2.sram_ctrl_csr_bit_bash.595371593
99.42 0.04 100.00 0.00 98.04 0.28 100.00 0.00 100.00 0.00 99.71 0.00 99.70 0.00 98.52 0.00 /workspace/coverage/default/10.sram_ctrl_alert_test.64723533
99.45 0.03 100.00 0.00 98.04 0.00 100.00 0.00 100.00 0.00 99.71 0.00 99.70 0.00 98.70 0.19 /workspace/coverage/cover_reg_top/16.sram_ctrl_tl_intg_err.1923704267
99.48 0.03 100.00 0.00 98.04 0.00 100.00 0.00 100.00 0.00 99.71 0.00 99.70 0.00 98.89 0.19 /workspace/coverage/cover_reg_top/17.sram_ctrl_tl_intg_err.702552769

Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_bit_bash.2186486017
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_hw_reset.3365438202
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_mem_rw_with_rand_reset.1036611246
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_rw.2319997068
/workspace/coverage/cover_reg_top/0.sram_ctrl_same_csr_outstanding.383314572
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_errors.3316253545
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_intg_err.1841565445
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_aliasing.3019699398
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_bit_bash.1175692840
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_hw_reset.263359627
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_mem_rw_with_rand_reset.1972994539
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_rw.4123281052
/workspace/coverage/cover_reg_top/1.sram_ctrl_same_csr_outstanding.1488070995
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_errors.2781339463
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_mem_rw_with_rand_reset.1163304583
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_rw.114066282
/workspace/coverage/cover_reg_top/10.sram_ctrl_same_csr_outstanding.3218370866
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_errors.2932527996
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_intg_err.987088238
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_mem_rw_with_rand_reset.1815512036
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_rw.2082314772
/workspace/coverage/cover_reg_top/11.sram_ctrl_same_csr_outstanding.1233431987
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_errors.551345883
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_intg_err.1841620858
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_mem_rw_with_rand_reset.1405730511
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_rw.3704562853
/workspace/coverage/cover_reg_top/12.sram_ctrl_same_csr_outstanding.2689521398
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_errors.815672162
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_intg_err.497538323
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_mem_rw_with_rand_reset.2105149580
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_rw.1325736688
/workspace/coverage/cover_reg_top/13.sram_ctrl_same_csr_outstanding.2511967919
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_errors.1330632441
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_intg_err.1718792509
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_mem_rw_with_rand_reset.1243048826
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_rw.1482637841
/workspace/coverage/cover_reg_top/14.sram_ctrl_same_csr_outstanding.1671437079
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_errors.2933167151
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_intg_err.309611295
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_mem_rw_with_rand_reset.3567585814
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_rw.3309360300
/workspace/coverage/cover_reg_top/15.sram_ctrl_same_csr_outstanding.1931493045
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_errors.4075300169
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_intg_err.3735498569
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_mem_rw_with_rand_reset.3937077198
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_rw.1503456278
/workspace/coverage/cover_reg_top/16.sram_ctrl_same_csr_outstanding.248149650
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_errors.600681425
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_mem_rw_with_rand_reset.1673858224
/workspace/coverage/cover_reg_top/17.sram_ctrl_same_csr_outstanding.1751790123
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_errors.195368587
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_mem_rw_with_rand_reset.3820558114
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_rw.1850476067
/workspace/coverage/cover_reg_top/18.sram_ctrl_same_csr_outstanding.3203655362
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_errors.1151402475
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_intg_err.32192992
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_mem_rw_with_rand_reset.2083136848
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_rw.1136109559
/workspace/coverage/cover_reg_top/19.sram_ctrl_same_csr_outstanding.146037485
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_errors.940806676
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_intg_err.2169972770
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_aliasing.1154237684
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_hw_reset.69893145
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_mem_rw_with_rand_reset.3266517741
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_rw.758105262
/workspace/coverage/cover_reg_top/2.sram_ctrl_same_csr_outstanding.714628500
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_errors.2665656951
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_intg_err.1165780479
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_aliasing.1374176650
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_bit_bash.1205437879
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_hw_reset.2038647621
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_mem_rw_with_rand_reset.3666856047
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_rw.2731434997
/workspace/coverage/cover_reg_top/3.sram_ctrl_same_csr_outstanding.853329823
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_errors.1491185164
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_aliasing.116629561
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_bit_bash.3115987111
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_hw_reset.3375101081
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_mem_rw_with_rand_reset.1910735482
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_rw.3410341181
/workspace/coverage/cover_reg_top/4.sram_ctrl_same_csr_outstanding.3039251136
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_errors.4059300523
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_intg_err.1664238310
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_mem_rw_with_rand_reset.1046805507
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_rw.3210995347
/workspace/coverage/cover_reg_top/5.sram_ctrl_same_csr_outstanding.3398272933
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_errors.1693374456
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_mem_rw_with_rand_reset.3229450237
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_rw.361167312
/workspace/coverage/cover_reg_top/6.sram_ctrl_same_csr_outstanding.3947187848
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_errors.797495934
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_intg_err.127913048
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_mem_rw_with_rand_reset.2810667697
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_rw.1112792730
/workspace/coverage/cover_reg_top/7.sram_ctrl_same_csr_outstanding.2927628472
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_errors.51592147
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_intg_err.1045780205
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_mem_rw_with_rand_reset.646132160
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_rw.2537061783
/workspace/coverage/cover_reg_top/8.sram_ctrl_same_csr_outstanding.94826355
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_errors.2004964825
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_intg_err.2512360677
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_mem_rw_with_rand_reset.1393103375
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_rw.58634238
/workspace/coverage/cover_reg_top/9.sram_ctrl_same_csr_outstanding.305971193
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_errors.2038103641
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_intg_err.1840762374
/workspace/coverage/default/0.sram_ctrl_access_during_key_req.1389722394
/workspace/coverage/default/0.sram_ctrl_alert_test.2557284670
/workspace/coverage/default/0.sram_ctrl_bijection.1739570656
/workspace/coverage/default/0.sram_ctrl_executable.2110825073
/workspace/coverage/default/0.sram_ctrl_lc_escalation.2069739653
/workspace/coverage/default/0.sram_ctrl_max_throughput.2730849667
/workspace/coverage/default/0.sram_ctrl_mem_partial_access.333168775
/workspace/coverage/default/0.sram_ctrl_mem_walk.3627181164
/workspace/coverage/default/0.sram_ctrl_multiple_keys.1432968223
/workspace/coverage/default/0.sram_ctrl_partial_access.874234693
/workspace/coverage/default/0.sram_ctrl_partial_access_b2b.4200901034
/workspace/coverage/default/0.sram_ctrl_ram_cfg.1775162160
/workspace/coverage/default/0.sram_ctrl_regwen.241810308
/workspace/coverage/default/0.sram_ctrl_sec_cm.4171707362
/workspace/coverage/default/0.sram_ctrl_smoke.1933155570
/workspace/coverage/default/0.sram_ctrl_stress_all_with_rand_reset.3436753123
/workspace/coverage/default/0.sram_ctrl_stress_pipeline.3581615755
/workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.1138490904
/workspace/coverage/default/1.sram_ctrl_access_during_key_req.952033674
/workspace/coverage/default/1.sram_ctrl_bijection.651223215
/workspace/coverage/default/1.sram_ctrl_executable.2063740340
/workspace/coverage/default/1.sram_ctrl_lc_escalation.3714552396
/workspace/coverage/default/1.sram_ctrl_max_throughput.4038169715
/workspace/coverage/default/1.sram_ctrl_mem_partial_access.510385445
/workspace/coverage/default/1.sram_ctrl_mem_walk.3006719483
/workspace/coverage/default/1.sram_ctrl_multiple_keys.1521576716
/workspace/coverage/default/1.sram_ctrl_partial_access.3110522328
/workspace/coverage/default/1.sram_ctrl_partial_access_b2b.10838237
/workspace/coverage/default/1.sram_ctrl_ram_cfg.3129626532
/workspace/coverage/default/1.sram_ctrl_regwen.175772471
/workspace/coverage/default/1.sram_ctrl_smoke.3963844575
/workspace/coverage/default/1.sram_ctrl_stress_all.137855186
/workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.2464330998
/workspace/coverage/default/1.sram_ctrl_stress_pipeline.3212151852
/workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.3216604686
/workspace/coverage/default/10.sram_ctrl_access_during_key_req.2389162907
/workspace/coverage/default/10.sram_ctrl_bijection.3922795698
/workspace/coverage/default/10.sram_ctrl_executable.1171056137
/workspace/coverage/default/10.sram_ctrl_lc_escalation.2341524111
/workspace/coverage/default/10.sram_ctrl_max_throughput.2945002227
/workspace/coverage/default/10.sram_ctrl_mem_partial_access.571414756
/workspace/coverage/default/10.sram_ctrl_mem_walk.3203874412
/workspace/coverage/default/10.sram_ctrl_multiple_keys.506843240
/workspace/coverage/default/10.sram_ctrl_partial_access.2795369194
/workspace/coverage/default/10.sram_ctrl_partial_access_b2b.306535826
/workspace/coverage/default/10.sram_ctrl_ram_cfg.3764517820
/workspace/coverage/default/10.sram_ctrl_regwen.873285349
/workspace/coverage/default/10.sram_ctrl_smoke.2562747107
/workspace/coverage/default/10.sram_ctrl_stress_all.4223813577
/workspace/coverage/default/10.sram_ctrl_stress_all_with_rand_reset.3702138506
/workspace/coverage/default/10.sram_ctrl_stress_pipeline.1041078174
/workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.526267110
/workspace/coverage/default/11.sram_ctrl_access_during_key_req.3540506823
/workspace/coverage/default/11.sram_ctrl_alert_test.3054182110
/workspace/coverage/default/11.sram_ctrl_bijection.1562324863
/workspace/coverage/default/11.sram_ctrl_executable.3820009353
/workspace/coverage/default/11.sram_ctrl_max_throughput.2667867038
/workspace/coverage/default/11.sram_ctrl_mem_partial_access.4152452516
/workspace/coverage/default/11.sram_ctrl_mem_walk.715166744
/workspace/coverage/default/11.sram_ctrl_multiple_keys.501415745
/workspace/coverage/default/11.sram_ctrl_partial_access.2554429028
/workspace/coverage/default/11.sram_ctrl_partial_access_b2b.3774632029
/workspace/coverage/default/11.sram_ctrl_regwen.2059803847
/workspace/coverage/default/11.sram_ctrl_smoke.2340912536
/workspace/coverage/default/11.sram_ctrl_stress_all.1228133970
/workspace/coverage/default/11.sram_ctrl_stress_all_with_rand_reset.2363758892
/workspace/coverage/default/11.sram_ctrl_stress_pipeline.1719523551
/workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.487475785
/workspace/coverage/default/12.sram_ctrl_access_during_key_req.1133667991
/workspace/coverage/default/12.sram_ctrl_alert_test.1155643485
/workspace/coverage/default/12.sram_ctrl_bijection.2394609032
/workspace/coverage/default/12.sram_ctrl_executable.709512975
/workspace/coverage/default/12.sram_ctrl_lc_escalation.109781867
/workspace/coverage/default/12.sram_ctrl_max_throughput.1852189734
/workspace/coverage/default/12.sram_ctrl_mem_partial_access.2029086966
/workspace/coverage/default/12.sram_ctrl_mem_walk.2036108827
/workspace/coverage/default/12.sram_ctrl_multiple_keys.2707202780
/workspace/coverage/default/12.sram_ctrl_partial_access.3239314834
/workspace/coverage/default/12.sram_ctrl_partial_access_b2b.809183309
/workspace/coverage/default/12.sram_ctrl_ram_cfg.3412516593
/workspace/coverage/default/12.sram_ctrl_regwen.1194161847
/workspace/coverage/default/12.sram_ctrl_smoke.2694086728
/workspace/coverage/default/12.sram_ctrl_stress_all.1696386477
/workspace/coverage/default/12.sram_ctrl_stress_all_with_rand_reset.1473758143
/workspace/coverage/default/12.sram_ctrl_stress_pipeline.1270645139
/workspace/coverage/default/12.sram_ctrl_throughput_w_partial_write.2425045043
/workspace/coverage/default/13.sram_ctrl_access_during_key_req.226405060
/workspace/coverage/default/13.sram_ctrl_alert_test.1090637874
/workspace/coverage/default/13.sram_ctrl_bijection.2444901596
/workspace/coverage/default/13.sram_ctrl_executable.3451565560
/workspace/coverage/default/13.sram_ctrl_max_throughput.1798335937
/workspace/coverage/default/13.sram_ctrl_mem_partial_access.3151575037
/workspace/coverage/default/13.sram_ctrl_multiple_keys.1193941344
/workspace/coverage/default/13.sram_ctrl_partial_access.2637512866
/workspace/coverage/default/13.sram_ctrl_partial_access_b2b.3887444938
/workspace/coverage/default/13.sram_ctrl_ram_cfg.2994416042
/workspace/coverage/default/13.sram_ctrl_regwen.523636059
/workspace/coverage/default/13.sram_ctrl_smoke.2049534771
/workspace/coverage/default/13.sram_ctrl_stress_all_with_rand_reset.579851726
/workspace/coverage/default/13.sram_ctrl_stress_pipeline.3558164975
/workspace/coverage/default/13.sram_ctrl_throughput_w_partial_write.3253159099
/workspace/coverage/default/14.sram_ctrl_alert_test.1152905985
/workspace/coverage/default/14.sram_ctrl_bijection.2362797590
/workspace/coverage/default/14.sram_ctrl_executable.1330554352
/workspace/coverage/default/14.sram_ctrl_max_throughput.1339110174
/workspace/coverage/default/14.sram_ctrl_mem_partial_access.1209723971
/workspace/coverage/default/14.sram_ctrl_mem_walk.100203827
/workspace/coverage/default/14.sram_ctrl_multiple_keys.3231690191
/workspace/coverage/default/14.sram_ctrl_partial_access.2814125161
/workspace/coverage/default/14.sram_ctrl_partial_access_b2b.3952873947
/workspace/coverage/default/14.sram_ctrl_ram_cfg.404045954
/workspace/coverage/default/14.sram_ctrl_regwen.3109454346
/workspace/coverage/default/14.sram_ctrl_smoke.2085950727
/workspace/coverage/default/14.sram_ctrl_stress_all.3575848411
/workspace/coverage/default/14.sram_ctrl_stress_all_with_rand_reset.1512968413
/workspace/coverage/default/14.sram_ctrl_stress_pipeline.260075584
/workspace/coverage/default/14.sram_ctrl_throughput_w_partial_write.1092680440
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/workspace/coverage/default/46.sram_ctrl_stress_all_with_rand_reset.3108996214
/workspace/coverage/default/46.sram_ctrl_stress_pipeline.359289579
/workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.1381411901
/workspace/coverage/default/47.sram_ctrl_access_during_key_req.2950697971
/workspace/coverage/default/47.sram_ctrl_alert_test.2258926612
/workspace/coverage/default/47.sram_ctrl_bijection.3456699335
/workspace/coverage/default/47.sram_ctrl_executable.2573869278
/workspace/coverage/default/47.sram_ctrl_lc_escalation.2377389982
/workspace/coverage/default/47.sram_ctrl_max_throughput.1474529676
/workspace/coverage/default/47.sram_ctrl_mem_partial_access.3936249103
/workspace/coverage/default/47.sram_ctrl_mem_walk.820946682
/workspace/coverage/default/47.sram_ctrl_multiple_keys.4266402070
/workspace/coverage/default/47.sram_ctrl_partial_access.495061627
/workspace/coverage/default/47.sram_ctrl_partial_access_b2b.2553868848
/workspace/coverage/default/47.sram_ctrl_ram_cfg.135266691
/workspace/coverage/default/47.sram_ctrl_regwen.467767619
/workspace/coverage/default/47.sram_ctrl_smoke.2804732668
/workspace/coverage/default/47.sram_ctrl_stress_all.1242636919
/workspace/coverage/default/47.sram_ctrl_stress_all_with_rand_reset.2769116114
/workspace/coverage/default/47.sram_ctrl_stress_pipeline.2557059790
/workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.1876469848
/workspace/coverage/default/48.sram_ctrl_access_during_key_req.3290417861
/workspace/coverage/default/48.sram_ctrl_alert_test.1589905071
/workspace/coverage/default/48.sram_ctrl_bijection.657681337
/workspace/coverage/default/48.sram_ctrl_executable.3231725476
/workspace/coverage/default/48.sram_ctrl_lc_escalation.3040084072
/workspace/coverage/default/48.sram_ctrl_max_throughput.2001016863
/workspace/coverage/default/48.sram_ctrl_mem_partial_access.4026427227
/workspace/coverage/default/48.sram_ctrl_mem_walk.3225240401
/workspace/coverage/default/48.sram_ctrl_multiple_keys.3359848435
/workspace/coverage/default/48.sram_ctrl_partial_access.436325831
/workspace/coverage/default/48.sram_ctrl_partial_access_b2b.2323529887
/workspace/coverage/default/48.sram_ctrl_ram_cfg.1218266541
/workspace/coverage/default/48.sram_ctrl_regwen.2877018170
/workspace/coverage/default/48.sram_ctrl_smoke.3072539873
/workspace/coverage/default/48.sram_ctrl_stress_all_with_rand_reset.317102081
/workspace/coverage/default/48.sram_ctrl_stress_pipeline.3496749299
/workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.2819239597
/workspace/coverage/default/49.sram_ctrl_access_during_key_req.1504502110
/workspace/coverage/default/49.sram_ctrl_alert_test.1757869033
/workspace/coverage/default/49.sram_ctrl_bijection.2285386424
/workspace/coverage/default/49.sram_ctrl_executable.1505757255
/workspace/coverage/default/49.sram_ctrl_lc_escalation.1749501448
/workspace/coverage/default/49.sram_ctrl_max_throughput.3148999524
/workspace/coverage/default/49.sram_ctrl_mem_partial_access.2209201213
/workspace/coverage/default/49.sram_ctrl_mem_walk.1301797133
/workspace/coverage/default/49.sram_ctrl_multiple_keys.718198771
/workspace/coverage/default/49.sram_ctrl_partial_access.1604746111
/workspace/coverage/default/49.sram_ctrl_partial_access_b2b.1076923262
/workspace/coverage/default/49.sram_ctrl_ram_cfg.2268064140
/workspace/coverage/default/49.sram_ctrl_regwen.621628553
/workspace/coverage/default/49.sram_ctrl_smoke.1992897653
/workspace/coverage/default/49.sram_ctrl_stress_all.3398090222
/workspace/coverage/default/49.sram_ctrl_stress_all_with_rand_reset.578576470
/workspace/coverage/default/49.sram_ctrl_stress_pipeline.324791022
/workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.1896936370
/workspace/coverage/default/5.sram_ctrl_access_during_key_req.1174538786
/workspace/coverage/default/5.sram_ctrl_alert_test.2353080985
/workspace/coverage/default/5.sram_ctrl_bijection.2758916334
/workspace/coverage/default/5.sram_ctrl_executable.3402917944
/workspace/coverage/default/5.sram_ctrl_lc_escalation.205826501
/workspace/coverage/default/5.sram_ctrl_max_throughput.1698258912
/workspace/coverage/default/5.sram_ctrl_mem_partial_access.2436861871
/workspace/coverage/default/5.sram_ctrl_mem_walk.2974868076
/workspace/coverage/default/5.sram_ctrl_multiple_keys.298211426
/workspace/coverage/default/5.sram_ctrl_partial_access.4163259528
/workspace/coverage/default/5.sram_ctrl_partial_access_b2b.2125108039
/workspace/coverage/default/5.sram_ctrl_ram_cfg.3642058688
/workspace/coverage/default/5.sram_ctrl_regwen.342325201
/workspace/coverage/default/5.sram_ctrl_smoke.873265188
/workspace/coverage/default/5.sram_ctrl_stress_all.1958221067
/workspace/coverage/default/5.sram_ctrl_stress_all_with_rand_reset.1411924754
/workspace/coverage/default/5.sram_ctrl_stress_pipeline.149276333
/workspace/coverage/default/5.sram_ctrl_throughput_w_partial_write.2745974169
/workspace/coverage/default/6.sram_ctrl_access_during_key_req.65177691
/workspace/coverage/default/6.sram_ctrl_alert_test.2439493469
/workspace/coverage/default/6.sram_ctrl_bijection.914068500
/workspace/coverage/default/6.sram_ctrl_executable.2358861669
/workspace/coverage/default/6.sram_ctrl_lc_escalation.4188202874
/workspace/coverage/default/6.sram_ctrl_max_throughput.4029412878
/workspace/coverage/default/6.sram_ctrl_mem_partial_access.249763791
/workspace/coverage/default/6.sram_ctrl_mem_walk.3086683350
/workspace/coverage/default/6.sram_ctrl_multiple_keys.4262360673
/workspace/coverage/default/6.sram_ctrl_partial_access.2790601282
/workspace/coverage/default/6.sram_ctrl_partial_access_b2b.2619844
/workspace/coverage/default/6.sram_ctrl_ram_cfg.1273204450
/workspace/coverage/default/6.sram_ctrl_regwen.188929200
/workspace/coverage/default/6.sram_ctrl_smoke.1787705448
/workspace/coverage/default/6.sram_ctrl_stress_all.1042904915
/workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.3553143671
/workspace/coverage/default/6.sram_ctrl_stress_pipeline.2852849499
/workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.966988525
/workspace/coverage/default/7.sram_ctrl_access_during_key_req.2463515381
/workspace/coverage/default/7.sram_ctrl_alert_test.144699812
/workspace/coverage/default/7.sram_ctrl_bijection.82827642
/workspace/coverage/default/7.sram_ctrl_executable.3759967674
/workspace/coverage/default/7.sram_ctrl_lc_escalation.1556972471
/workspace/coverage/default/7.sram_ctrl_max_throughput.2608331422
/workspace/coverage/default/7.sram_ctrl_mem_partial_access.3614198051
/workspace/coverage/default/7.sram_ctrl_mem_walk.2629259523
/workspace/coverage/default/7.sram_ctrl_multiple_keys.1328948150
/workspace/coverage/default/7.sram_ctrl_partial_access.323911111
/workspace/coverage/default/7.sram_ctrl_partial_access_b2b.882781365
/workspace/coverage/default/7.sram_ctrl_ram_cfg.2935569717
/workspace/coverage/default/7.sram_ctrl_regwen.3487689169
/workspace/coverage/default/7.sram_ctrl_smoke.575323713
/workspace/coverage/default/7.sram_ctrl_stress_all.522228258
/workspace/coverage/default/7.sram_ctrl_stress_pipeline.1956853404
/workspace/coverage/default/7.sram_ctrl_throughput_w_partial_write.3182795788
/workspace/coverage/default/8.sram_ctrl_access_during_key_req.3335174440
/workspace/coverage/default/8.sram_ctrl_alert_test.1571026845
/workspace/coverage/default/8.sram_ctrl_bijection.957239814
/workspace/coverage/default/8.sram_ctrl_executable.2754352478
/workspace/coverage/default/8.sram_ctrl_max_throughput.1812853400
/workspace/coverage/default/8.sram_ctrl_mem_partial_access.993621983
/workspace/coverage/default/8.sram_ctrl_mem_walk.3028607853
/workspace/coverage/default/8.sram_ctrl_multiple_keys.180104823
/workspace/coverage/default/8.sram_ctrl_partial_access.1009526516
/workspace/coverage/default/8.sram_ctrl_partial_access_b2b.500437154
/workspace/coverage/default/8.sram_ctrl_ram_cfg.112179284
/workspace/coverage/default/8.sram_ctrl_regwen.3573772475
/workspace/coverage/default/8.sram_ctrl_smoke.1286985046
/workspace/coverage/default/8.sram_ctrl_stress_all.3736221944
/workspace/coverage/default/8.sram_ctrl_stress_all_with_rand_reset.2466524586
/workspace/coverage/default/8.sram_ctrl_stress_pipeline.1677622796
/workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.2449829547
/workspace/coverage/default/9.sram_ctrl_access_during_key_req.3776329635
/workspace/coverage/default/9.sram_ctrl_alert_test.1274156327
/workspace/coverage/default/9.sram_ctrl_bijection.1061326962
/workspace/coverage/default/9.sram_ctrl_executable.2786284936
/workspace/coverage/default/9.sram_ctrl_lc_escalation.2666293868
/workspace/coverage/default/9.sram_ctrl_max_throughput.439673305
/workspace/coverage/default/9.sram_ctrl_mem_partial_access.1629162534
/workspace/coverage/default/9.sram_ctrl_mem_walk.1995908786
/workspace/coverage/default/9.sram_ctrl_multiple_keys.1424108333
/workspace/coverage/default/9.sram_ctrl_partial_access.3262677303
/workspace/coverage/default/9.sram_ctrl_partial_access_b2b.504802957
/workspace/coverage/default/9.sram_ctrl_ram_cfg.269255506
/workspace/coverage/default/9.sram_ctrl_regwen.2523356477
/workspace/coverage/default/9.sram_ctrl_smoke.1576108932
/workspace/coverage/default/9.sram_ctrl_stress_all.1838560006
/workspace/coverage/default/9.sram_ctrl_stress_all_with_rand_reset.1694013795
/workspace/coverage/default/9.sram_ctrl_stress_pipeline.768699528
/workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.2669228797



Total test records in report: 982
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html
TEST NOTEST LOCATIONTEST NAMESTATUSSTARTEDFINISHEDSIMULATION TIME
T1 /workspace/coverage/default/38.sram_ctrl_stress_all_with_rand_reset.1987375241 Jan 24 06:27:48 PM PST 24 Jan 24 07:13:21 PM PST 24 1045620075 ps
T2 /workspace/coverage/default/36.sram_ctrl_mem_partial_access.22717418 Jan 24 06:53:02 PM PST 24 Jan 24 06:53:13 PM PST 24 174456397 ps
T3 /workspace/coverage/default/49.sram_ctrl_ram_cfg.2268064140 Jan 24 07:03:55 PM PST 24 Jan 24 07:03:56 PM PST 24 150270514 ps
T4 /workspace/coverage/default/36.sram_ctrl_regwen.1376707314 Jan 24 06:24:58 PM PST 24 Jan 24 06:46:21 PM PST 24 39171294085 ps
T9 /workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.3216604686 Jan 24 05:51:41 PM PST 24 Jan 24 05:52:02 PM PST 24 371890543 ps
T5 /workspace/coverage/default/20.sram_ctrl_partial_access_b2b.3389115505 Jan 24 06:02:18 PM PST 24 Jan 24 06:10:04 PM PST 24 96460537646 ps
T10 /workspace/coverage/default/5.sram_ctrl_bijection.2758916334 Jan 24 05:48:10 PM PST 24 Jan 24 05:49:26 PM PST 24 2182953950 ps
T11 /workspace/coverage/default/12.sram_ctrl_executable.709512975 Jan 24 06:11:16 PM PST 24 Jan 24 06:28:02 PM PST 24 19698394306 ps
T12 /workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.1896936370 Jan 24 07:08:36 PM PST 24 Jan 24 07:09:10 PM PST 24 360936030 ps
T13 /workspace/coverage/default/19.sram_ctrl_partial_access_b2b.2235354962 Jan 24 06:08:00 PM PST 24 Jan 24 06:11:46 PM PST 24 36697283834 ps
T14 /workspace/coverage/default/48.sram_ctrl_stress_all_with_rand_reset.317102081 Jan 24 06:39:28 PM PST 24 Jan 24 06:56:12 PM PST 24 681238368 ps
T15 /workspace/coverage/default/32.sram_ctrl_access_during_key_req.1532223179 Jan 24 06:19:30 PM PST 24 Jan 24 06:19:50 PM PST 24 522641827 ps
T52 /workspace/coverage/default/26.sram_ctrl_partial_access_b2b.1316058942 Jan 24 07:46:24 PM PST 24 Jan 24 07:51:24 PM PST 24 56832336037 ps
T6 /workspace/coverage/default/44.sram_ctrl_stress_all.3828089959 Jan 24 06:34:13 PM PST 24 Jan 24 07:01:50 PM PST 24 26523554568 ps
T85 /workspace/coverage/default/30.sram_ctrl_partial_access_b2b.1765745735 Jan 24 07:08:34 PM PST 24 Jan 24 07:19:27 PM PST 24 9379742593 ps
T62 /workspace/coverage/default/14.sram_ctrl_partial_access_b2b.3952873947 Jan 24 05:54:58 PM PST 24 Jan 24 05:59:20 PM PST 24 14098704493 ps
T63 /workspace/coverage/default/40.sram_ctrl_smoke.2425100561 Jan 24 06:29:00 PM PST 24 Jan 24 06:29:40 PM PST 24 389043613 ps
T64 /workspace/coverage/default/32.sram_ctrl_multiple_keys.81983091 Jan 24 07:48:48 PM PST 24 Jan 24 08:08:31 PM PST 24 9938975005 ps
T30 /workspace/coverage/default/6.sram_ctrl_ram_cfg.1273204450 Jan 24 05:49:26 PM PST 24 Jan 24 05:49:28 PM PST 24 46138583 ps
T110 /workspace/coverage/default/19.sram_ctrl_multiple_keys.2633353504 Jan 24 05:59:39 PM PST 24 Jan 24 06:15:03 PM PST 24 12547158628 ps
T111 /workspace/coverage/default/19.sram_ctrl_smoke.611235437 Jan 24 05:59:36 PM PST 24 Jan 24 05:59:51 PM PST 24 228218565 ps
T112 /workspace/coverage/default/8.sram_ctrl_smoke.1286985046 Jan 24 05:50:20 PM PST 24 Jan 24 05:50:26 PM PST 24 277984002 ps
T7 /workspace/coverage/default/15.sram_ctrl_stress_all.2827690931 Jan 24 05:56:43 PM PST 24 Jan 24 06:30:24 PM PST 24 30937834580 ps
T29 /workspace/coverage/default/49.sram_ctrl_stress_all_with_rand_reset.578576470 Jan 24 07:01:12 PM PST 24 Jan 24 07:15:17 PM PST 24 4077419209 ps
T23 /workspace/coverage/default/8.sram_ctrl_alert_test.1571026845 Jan 24 05:50:41 PM PST 24 Jan 24 05:50:43 PM PST 24 28520375 ps
T21 /workspace/coverage/default/44.sram_ctrl_executable.45819286 Jan 24 06:33:41 PM PST 24 Jan 24 06:49:54 PM PST 24 129060498212 ps
T102 /workspace/coverage/default/35.sram_ctrl_regwen.2158500863 Jan 24 06:23:21 PM PST 24 Jan 24 06:27:51 PM PST 24 9572187212 ps
T16 /workspace/coverage/default/44.sram_ctrl_access_during_key_req.2738543265 Jan 24 06:33:40 PM PST 24 Jan 24 06:46:57 PM PST 24 6412438745 ps
T24 /workspace/coverage/default/20.sram_ctrl_alert_test.337261939 Jan 24 06:39:27 PM PST 24 Jan 24 06:39:28 PM PST 24 21342601 ps
T8 /workspace/coverage/default/17.sram_ctrl_stress_all.4056188385 Jan 24 05:58:27 PM PST 24 Jan 24 06:16:17 PM PST 24 109887282649 ps
T89 /workspace/coverage/default/16.sram_ctrl_partial_access_b2b.3131096666 Jan 24 05:56:49 PM PST 24 Jan 24 06:03:01 PM PST 24 9259439885 ps
T71 /workspace/coverage/default/8.sram_ctrl_mem_partial_access.993621983 Jan 24 07:34:28 PM PST 24 Jan 24 07:34:34 PM PST 24 68600567 ps
T17 /workspace/coverage/default/28.sram_ctrl_access_during_key_req.1947524093 Jan 24 06:13:58 PM PST 24 Jan 24 06:27:30 PM PST 24 5348555168 ps
T113 /workspace/coverage/default/35.sram_ctrl_partial_access.3177864155 Jan 24 06:22:58 PM PST 24 Jan 24 06:23:12 PM PST 24 257741689 ps
T26 /workspace/coverage/default/36.sram_ctrl_stress_all_with_rand_reset.3733798388 Jan 24 06:52:46 PM PST 24 Jan 24 07:52:42 PM PST 24 5215432871 ps
T31 /workspace/coverage/default/28.sram_ctrl_ram_cfg.1808764093 Jan 24 07:31:58 PM PST 24 Jan 24 07:32:07 PM PST 24 89929869 ps
T103 /workspace/coverage/default/2.sram_ctrl_stress_all.1548388074 Jan 24 07:19:19 PM PST 24 Jan 24 07:57:43 PM PST 24 49854674047 ps
T72 /workspace/coverage/default/21.sram_ctrl_mem_partial_access.3371879214 Jan 24 06:06:13 PM PST 24 Jan 24 06:06:19 PM PST 24 218857619 ps
T114 /workspace/coverage/default/48.sram_ctrl_ram_cfg.1218266541 Jan 24 08:28:22 PM PST 24 Jan 24 08:28:24 PM PST 24 80556402 ps
T73 /workspace/coverage/default/44.sram_ctrl_mem_partial_access.3427910389 Jan 24 06:34:04 PM PST 24 Jan 24 06:34:08 PM PST 24 505712355 ps
T90 /workspace/coverage/default/17.sram_ctrl_partial_access_b2b.178890276 Jan 24 05:58:14 PM PST 24 Jan 24 06:05:37 PM PST 24 77277014242 ps
T74 /workspace/coverage/default/27.sram_ctrl_mem_partial_access.3480337017 Jan 24 06:12:57 PM PST 24 Jan 24 06:13:00 PM PST 24 44458384 ps
T115 /workspace/coverage/default/6.sram_ctrl_multiple_keys.4262360673 Jan 24 05:48:30 PM PST 24 Jan 24 06:11:19 PM PST 24 2738299897 ps
T116 /workspace/coverage/default/13.sram_ctrl_bijection.2444901596 Jan 24 07:30:52 PM PST 24 Jan 24 07:31:45 PM PST 24 6368766229 ps
T117 /workspace/coverage/default/46.sram_ctrl_ram_cfg.862591149 Jan 24 06:36:40 PM PST 24 Jan 24 06:36:41 PM PST 24 29743772 ps
T118 /workspace/coverage/default/3.sram_ctrl_smoke.2176066765 Jan 24 05:45:35 PM PST 24 Jan 24 05:47:03 PM PST 24 522678668 ps
T119 /workspace/coverage/default/22.sram_ctrl_stress_pipeline.3368663617 Jan 24 07:35:22 PM PST 24 Jan 24 07:37:11 PM PST 24 15100453865 ps
T120 /workspace/coverage/default/10.sram_ctrl_partial_access_b2b.306535826 Jan 24 07:34:11 PM PST 24 Jan 24 07:40:33 PM PST 24 5245800442 ps
T121 /workspace/coverage/default/40.sram_ctrl_stress_pipeline.3973089124 Jan 24 06:29:13 PM PST 24 Jan 24 06:34:16 PM PST 24 3640758208 ps
T107 /workspace/coverage/default/31.sram_ctrl_executable.376171098 Jan 24 06:18:19 PM PST 24 Jan 24 06:23:03 PM PST 24 897848809 ps
T75 /workspace/coverage/default/46.sram_ctrl_mem_partial_access.3232400586 Jan 24 06:36:45 PM PST 24 Jan 24 06:36:48 PM PST 24 207011077 ps
T122 /workspace/coverage/default/38.sram_ctrl_partial_access_b2b.2558655267 Jan 24 06:26:54 PM PST 24 Jan 24 06:31:21 PM PST 24 26066302196 ps
T123 /workspace/coverage/default/7.sram_ctrl_throughput_w_partial_write.3182795788 Jan 24 05:49:50 PM PST 24 Jan 24 05:50:30 PM PST 24 376490726 ps
T124 /workspace/coverage/default/13.sram_ctrl_partial_access_b2b.3887444938 Jan 24 07:47:02 PM PST 24 Jan 24 07:54:05 PM PST 24 23579644946 ps
T25 /workspace/coverage/default/27.sram_ctrl_alert_test.141365586 Jan 24 07:22:32 PM PST 24 Jan 24 07:22:33 PM PST 24 13093625 ps
T125 /workspace/coverage/default/31.sram_ctrl_smoke.3687099395 Jan 24 06:17:31 PM PST 24 Jan 24 06:17:36 PM PST 24 278591137 ps
T126 /workspace/coverage/default/15.sram_ctrl_max_throughput.2437754507 Jan 24 05:56:27 PM PST 24 Jan 24 05:57:12 PM PST 24 174676477 ps
T127 /workspace/coverage/default/39.sram_ctrl_partial_access_b2b.3705630978 Jan 24 06:28:21 PM PST 24 Jan 24 06:33:02 PM PST 24 16577334851 ps
T128 /workspace/coverage/default/3.sram_ctrl_partial_access_b2b.3964186361 Jan 24 05:46:34 PM PST 24 Jan 24 05:51:02 PM PST 24 10013705583 ps
T129 /workspace/coverage/default/44.sram_ctrl_max_throughput.3086295874 Jan 24 06:33:21 PM PST 24 Jan 24 06:34:47 PM PST 24 117066429 ps
T130 /workspace/coverage/default/39.sram_ctrl_smoke.2721342001 Jan 24 06:27:48 PM PST 24 Jan 24 06:29:22 PM PST 24 2535891020 ps
T131 /workspace/coverage/default/42.sram_ctrl_stress_pipeline.3781944193 Jan 24 08:14:26 PM PST 24 Jan 24 08:18:22 PM PST 24 7663505959 ps
T132 /workspace/coverage/default/41.sram_ctrl_ram_cfg.3446386878 Jan 24 06:30:51 PM PST 24 Jan 24 06:30:52 PM PST 24 92217251 ps
T45 /workspace/coverage/default/26.sram_ctrl_stress_all_with_rand_reset.220095917 Jan 24 06:43:20 PM PST 24 Jan 24 07:27:24 PM PST 24 1135725329 ps
T27 /workspace/coverage/default/43.sram_ctrl_lc_escalation.719398983 Jan 24 07:27:03 PM PST 24 Jan 24 07:27:11 PM PST 24 657636826 ps
T133 /workspace/coverage/default/16.sram_ctrl_mem_walk.976873293 Jan 24 05:57:03 PM PST 24 Jan 24 05:57:09 PM PST 24 466089718 ps
T134 /workspace/coverage/default/2.sram_ctrl_smoke.3368984173 Jan 24 05:43:53 PM PST 24 Jan 24 05:44:09 PM PST 24 714309922 ps
T46 /workspace/coverage/default/0.sram_ctrl_stress_all_with_rand_reset.3436753123 Jan 24 05:56:55 PM PST 24 Jan 24 06:43:32 PM PST 24 993277590 ps
T54 /workspace/coverage/cover_reg_top/3.sram_ctrl_csr_hw_reset.2038647621 Jan 24 02:28:29 PM PST 24 Jan 24 02:28:37 PM PST 24 43083303 ps
T55 /workspace/coverage/cover_reg_top/5.sram_ctrl_csr_rw.3210995347 Jan 24 02:28:40 PM PST 24 Jan 24 02:28:44 PM PST 24 46848721 ps
T56 /workspace/coverage/cover_reg_top/2.sram_ctrl_csr_bit_bash.595371593 Jan 24 02:28:21 PM PST 24 Jan 24 02:28:37 PM PST 24 198545030 ps
T47 /workspace/coverage/cover_reg_top/15.sram_ctrl_csr_mem_rw_with_rand_reset.3567585814 Jan 24 02:29:36 PM PST 24 Jan 24 02:29:50 PM PST 24 55089434 ps
T48 /workspace/coverage/cover_reg_top/8.sram_ctrl_csr_mem_rw_with_rand_reset.646132160 Jan 24 02:29:00 PM PST 24 Jan 24 02:29:17 PM PST 24 95931527 ps
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