Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

2 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64
tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	13599195	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

57625788

1

T1

4985

T2

120975

T3

43008

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	35571015	1			T1	2710		T2	66535		T3	21504
values[0x0]	16467704	1			T1	1347		T2	32184		T3	10654
values[0x1]	19186264	1			T1	1421		T2	34450		T3	10850

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	6776814	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

64448169

1

T1

5214

T2

127150

T3

43008

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	258420	1			T1	12		T2	511		T3	172
valid_sources[0x01]	323431	1			T1	18		T2	506		T3	145
valid_sources[0x02]	280015	1			T1	18		T2	536		T3	165
valid_sources[0x03]	251396	1			T1	14		T2	559		T3	159
valid_sources[0x04]	275357	1			T1	23		T2	483		T3	256
valid_sources[0x05]	357187	1			T1	24		T2	426		T3	202
valid_sources[0x06]	232960	1			T1	17		T2	461		T3	113
valid_sources[0x07]	256555	1			T1	16		T2	585		T3	171
valid_sources[0x08]	271653	1			T1	25		T2	511		T3	163
valid_sources[0x09]	319300	1			T1	21		T2	539		T3	118
valid_sources[0x0a]	257384	1			T1	22		T2	583		T3	130
valid_sources[0x0b]	247442	1			T1	22		T2	519		T3	131
valid_sources[0x0c]	270202	1			T1	20		T2	559		T3	245
valid_sources[0x0d]	339251	1			T1	24		T2	537		T3	161
valid_sources[0x0e]	248073	1			T1	18		T2	534		T3	165
valid_sources[0x0f]	286115	1			T1	20		T2	456		T3	148
valid_sources[0x10]	250593	1			T1	14		T2	566		T3	200
valid_sources[0x11]	246059	1			T1	19		T2	475		T3	195
valid_sources[0x12]	275782	1			T1	27		T2	543		T3	163
valid_sources[0x13]	250561	1			T1	16		T2	480		T3	155
valid_sources[0x14]	340244	1			T1	19		T2	528		T3	155
valid_sources[0x15]	234579	1			T1	23		T2	479		T3	188
valid_sources[0x16]	249670	1			T1	17		T2	467		T3	139
valid_sources[0x17]	289986	1			T1	20		T2	490		T3	200
valid_sources[0x18]	269030	1			T1	12		T2	494		T3	235
valid_sources[0x19]	376044	1			T1	16		T2	563		T3	105
valid_sources[0x1a]	260030	1			T1	19		T2	500		T3	159
valid_sources[0x1b]	245584	1			T1	19		T2	568		T3	119
valid_sources[0x1c]	276181	1			T1	19		T2	516		T3	181
valid_sources[0x1d]	280697	1			T1	23		T2	470		T3	126
valid_sources[0x1e]	251803	1			T1	17		T2	602		T3	195
valid_sources[0x1f]	281258	1			T1	19		T2	529		T3	116
valid_sources[0x20]	247512	1			T1	20		T2	557		T3	154
valid_sources[0x21]	282711	1			T1	25		T2	506		T3	105
valid_sources[0x22]	311679	1			T1	30		T2	513		T3	123
valid_sources[0x23]	265653	1			T1	29		T2	542		T3	169
valid_sources[0x24]	242787	1			T1	16		T2	506		T3	172
valid_sources[0x25]	281854	1			T1	23		T2	509		T3	139
valid_sources[0x26]	297191	1			T1	14		T2	523		T3	184
valid_sources[0x27]	268703	1			T1	32		T2	544		T3	205
valid_sources[0x28]	233641	1			T1	15		T2	599		T3	137
valid_sources[0x29]	308167	1			T1	21		T2	490		T3	176
valid_sources[0x2a]	345587	1			T1	17		T2	525		T3	165
valid_sources[0x2b]	303257	1			T1	15		T2	521		T3	139
valid_sources[0x2c]	279882	1			T1	24		T2	489		T3	159
valid_sources[0x2d]	283214	1			T1	24		T2	493		T3	196
valid_sources[0x2e]	303591	1			T1	18		T2	547		T3	134
valid_sources[0x2f]	326409	1			T1	31		T2	524		T3	194
valid_sources[0x30]	321704	1			T1	20		T2	469		T3	207
valid_sources[0x31]	297137	1			T1	33		T2	489		T3	211
valid_sources[0x32]	228540	1			T1	22		T2	505		T3	197
valid_sources[0x33]	270115	1			T1	26		T2	537		T3	207
valid_sources[0x34]	272165	1			T1	13		T2	475		T3	127
valid_sources[0x35]	268474	1			T1	19		T2	497		T3	114
valid_sources[0x36]	284735	1			T1	17		T2	515		T3	96
valid_sources[0x37]	324461	1			T1	34		T2	535		T3	174
valid_sources[0x38]	341076	1			T1	19		T2	578		T3	166
valid_sources[0x39]	246158	1			T1	25		T2	576		T3	187
valid_sources[0x3a]	268789	1			T1	21		T2	585		T3	174
valid_sources[0x3b]	259356	1			T1	14		T2	470		T3	169
valid_sources[0x3c]	302353	1			T1	29		T2	553		T3	159
valid_sources[0x3d]	237855	1			T1	30		T2	562		T3	176
valid_sources[0x3e]	376851	1			T1	32		T2	525		T3	134
valid_sources[0x3f]	324659	1			T1	18		T2	573		T3	154
valid_sources[0x40]	250871	1			T1	22		T2	509		T3	106
valid_sources[0x41]	267429	1			T1	20		T2	519		T3	174
valid_sources[0x42]	237308	1			T1	20		T2	520		T3	139
valid_sources[0x43]	299314	1			T1	17		T2	542		T3	218
valid_sources[0x44]	274197	1			T1	23		T2	514		T3	203
valid_sources[0x45]	262378	1			T1	30		T2	547		T3	208
valid_sources[0x46]	286552	1			T1	12		T2	552		T3	111
valid_sources[0x47]	357383	1			T1	16		T2	479		T3	209
valid_sources[0x48]	261939	1			T1	27		T2	542		T3	142
valid_sources[0x49]	375461	1			T1	22		T2	568		T3	154
valid_sources[0x4a]	273101	1			T1	30		T2	503		T3	140
valid_sources[0x4b]	299224	1			T1	19		T2	542		T3	136
valid_sources[0x4c]	351409	1			T1	17		T2	482		T3	145
valid_sources[0x4d]	261875	1			T1	19		T2	513		T3	129
valid_sources[0x4e]	272939	1			T1	15		T2	470		T3	102
valid_sources[0x4f]	292292	1			T1	16		T2	547		T3	112
valid_sources[0x50]	362998	1			T1	24		T2	532		T3	222
valid_sources[0x51]	288282	1			T1	19		T2	553		T3	111
valid_sources[0x52]	277648	1			T1	26		T2	562		T3	143
valid_sources[0x53]	238192	1			T1	26		T2	476		T3	131
valid_sources[0x54]	235981	1			T1	27		T2	540		T3	165
valid_sources[0x55]	254943	1			T1	24		T2	544		T3	322
valid_sources[0x56]	340111	1			T1	12		T2	586		T3	146
valid_sources[0x57]	266404	1			T1	17		T2	480		T3	202
valid_sources[0x58]	356989	1			T1	18		T2	458		T3	185
valid_sources[0x59]	277507	1			T1	24		T2	556		T3	169
valid_sources[0x5a]	236397	1			T1	21		T2	513		T3	102
valid_sources[0x5b]	245964	1			T1	17		T2	529		T3	158
valid_sources[0x5c]	380025	1			T1	25		T2	569		T3	145
valid_sources[0x5d]	297084	1			T1	28		T2	563		T3	198
valid_sources[0x5e]	239225	1			T1	28		T2	524		T3	221
valid_sources[0x5f]	234365	1			T1	25		T2	574		T3	133
valid_sources[0x60]	344658	1			T1	19		T2	511		T3	146
valid_sources[0x61]	279914	1			T1	20		T2	472		T3	156
valid_sources[0x62]	255131	1			T1	24		T2	440		T3	77
valid_sources[0x63]	241968	1			T1	19		T2	569		T3	118
valid_sources[0x64]	275352	1			T1	16		T2	586		T3	154
valid_sources[0x65]	277826	1			T1	16		T2	473		T3	166
valid_sources[0x66]	258824	1			T1	34		T2	502		T3	191
valid_sources[0x67]	254299	1			T1	20		T2	523		T3	148
valid_sources[0x68]	263070	1			T1	16		T2	519		T3	190
valid_sources[0x69]	354094	1			T1	24		T2	507		T3	175
valid_sources[0x6a]	316259	1			T1	14		T2	492		T3	128
valid_sources[0x6b]	307954	1			T1	32		T2	510		T3	172
valid_sources[0x6c]	282368	1			T1	22		T2	551		T3	149
valid_sources[0x6d]	248378	1			T1	10		T2	509		T3	159
valid_sources[0x6e]	272422	1			T1	18		T2	512		T3	182
valid_sources[0x6f]	270993	1			T1	32		T2	577		T3	220
valid_sources[0x70]	308259	1			T1	27		T2	523		T3	169
valid_sources[0x71]	265205	1			T1	22		T2	522		T3	207
valid_sources[0x72]	278521	1			T1	26		T2	521		T3	215
valid_sources[0x73]	292843	1			T1	30		T2	545		T3	254
valid_sources[0x74]	236721	1			T1	24		T2	460		T3	168
valid_sources[0x75]	232441	1			T1	19		T2	456		T3	147
valid_sources[0x76]	315921	1			T1	16		T2	533		T3	183
valid_sources[0x77]	254239	1			T1	16		T2	489		T3	160
valid_sources[0x78]	291487	1			T1	20		T2	521		T3	193
valid_sources[0x79]	271897	1			T1	26		T2	540		T3	155
valid_sources[0x7a]	265830	1			T1	25		T2	466		T3	223
valid_sources[0x7b]	239198	1			T1	17		T2	533		T3	190
valid_sources[0x7c]	246984	1			T1	16		T2	533		T3	172
valid_sources[0x7d]	278822	1			T1	22		T2	548		T3	221
valid_sources[0x7e]	263117	1			T1	28		T2	546		T3	156
valid_sources[0x7f]	269437	1			T1	34		T2	502		T3	163
valid_sources[0x80]	271272	1			T1	16		T2	566		T3	162

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

28772884

1

T1

2461

T2

60415

T3

21504

values[0x0]

all_enables

biggest_size

14426972

1

T1

1277

T2

30372

T3

10654

values[0x1]

all_enables

biggest_size

14425932

1

T1

1247

T2

30188

T3

10850

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	2074702	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

16201

1

T2

40

T3

5

T4

41

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	2066014	1			T1	607		T2	4790		T3	1282
values[0x0]	12318	1			T2	38		T3	9		T4	54
values[0x1]	12571	1			T1	1		T2	33		T3	12

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	1386582	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

704321

1

T1

191

T2

1634

T3

430

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	6116	1			T1	5		T2	24		T4	125
valid_sources[0x01]	6090	1			T1	3		T2	10		T3	3
valid_sources[0x02]	5870	1			T1	3		T2	9		T3	7
valid_sources[0x03]	6370	1			T1	3		T2	35		T3	4
valid_sources[0x04]	6417	1			T1	1		T2	15		T3	11
valid_sources[0x05]	6130	1			T1	3		T2	12		T3	4
valid_sources[0x06]	6007	1			T1	2		T2	14		T3	9
valid_sources[0x07]	14985	1			T1	2		T2	14		T3	6
valid_sources[0x08]	6561	1			T1	3		T2	36		T3	6
valid_sources[0x09]	15046	1			T1	6		T2	8		T3	6
valid_sources[0x0a]	6923	1			T1	1		T2	24		T3	6
valid_sources[0x0b]	6881	1			T1	3		T2	14		T3	8
valid_sources[0x0c]	6232	1			T1	2		T2	27		T3	7
valid_sources[0x0d]	6566	1			T1	3		T2	31		T3	2
valid_sources[0x0e]	6306	1			T1	6		T2	35		T3	5
valid_sources[0x0f]	6578	1			T1	2		T2	17		T3	3
valid_sources[0x10]	6134	1			T2	23		T3	8		T4	158
valid_sources[0x11]	6434	1			T1	5		T2	13		T3	6
valid_sources[0x12]	5915	1			T1	1		T2	17		T3	7
valid_sources[0x13]	6326	1			T1	3		T2	48		T3	7
valid_sources[0x14]	10836	1			T2	10		T3	8		T4	149
valid_sources[0x15]	6282	1			T1	3		T2	31		T3	6
valid_sources[0x16]	7690	1			T1	3		T2	10		T3	5
valid_sources[0x17]	6459	1			T1	1		T2	34		T3	2
valid_sources[0x18]	6174	1			T1	4		T2	27		T3	4
valid_sources[0x19]	8617	1			T1	4		T2	28		T3	8
valid_sources[0x1a]	14644	1			T1	7		T2	13		T3	6
valid_sources[0x1b]	19101	1			T1	1		T2	13		T3	3
valid_sources[0x1c]	6011	1			T1	1		T2	8		T3	5
valid_sources[0x1d]	8781	1			T1	1		T2	7		T3	9
valid_sources[0x1e]	6215	1			T1	2		T2	21		T3	10
valid_sources[0x1f]	7244	1			T1	3		T2	22		T3	5
valid_sources[0x20]	7407	1			T2	23		T3	3		T4	133
valid_sources[0x21]	7891	1			T1	3		T2	13		T3	6
valid_sources[0x22]	6244	1			T1	3		T2	27		T3	3
valid_sources[0x23]	6492	1			T2	47		T3	5		T4	156
valid_sources[0x24]	7346	1			T1	6		T2	12		T3	1
valid_sources[0x25]	12206	1			T2	19		T3	2		T4	140
valid_sources[0x26]	11384	1			T1	3		T2	12		T3	5
valid_sources[0x27]	6091	1			T1	5		T2	2		T3	6
valid_sources[0x28]	6196	1			T1	1		T2	14		T3	9
valid_sources[0x29]	6534	1			T1	2		T2	3		T3	5
valid_sources[0x2a]	6027	1			T1	4		T2	9		T3	4
valid_sources[0x2b]	11897	1			T1	2		T2	17		T3	3
valid_sources[0x2c]	5983	1			T1	1		T2	23		T3	4
valid_sources[0x2d]	6035	1			T1	3		T2	17		T3	6
valid_sources[0x2e]	6615	1			T1	3		T2	15		T3	2
valid_sources[0x2f]	6087	1			T1	1		T2	8		T3	6
valid_sources[0x30]	10463	1			T2	22		T3	5		T4	163
valid_sources[0x31]	6007	1			T1	1		T2	15		T3	6
valid_sources[0x32]	8539	1			T1	3		T2	30		T3	4
valid_sources[0x33]	6710	1			T1	2		T2	19		T3	6
valid_sources[0x34]	7117	1			T2	18		T3	5		T4	141
valid_sources[0x35]	6378	1			T1	1		T2	17		T3	5
valid_sources[0x36]	13513	1			T1	1		T2	5		T3	9
valid_sources[0x37]	7218	1			T1	2		T2	22		T3	2
valid_sources[0x38]	6292	1			T1	1		T2	18		T3	6
valid_sources[0x39]	8464	1			T1	4		T2	25		T3	7
valid_sources[0x3a]	6632	1			T1	1		T2	27		T3	4
valid_sources[0x3b]	6061	1			T1	1		T2	40		T3	5
valid_sources[0x3c]	13261	1			T1	3		T2	8		T3	1
valid_sources[0x3d]	7265	1			T1	1		T2	6		T3	5
valid_sources[0x3e]	6082	1			T1	3		T2	22		T3	8
valid_sources[0x3f]	12088	1			T2	19		T3	1		T4	163
valid_sources[0x40]	6789	1			T1	3		T2	7		T3	9
valid_sources[0x41]	7015	1			T1	2		T2	17		T3	4
valid_sources[0x42]	6057	1			T1	2		T2	12		T3	6
valid_sources[0x43]	12900	1			T1	1		T2	21		T3	3
valid_sources[0x44]	6108	1			T2	27		T3	7		T4	154
valid_sources[0x45]	6428	1			T1	5		T2	7		T3	3
valid_sources[0x46]	8437	1			T1	1		T2	4		T3	5
valid_sources[0x47]	17856	1			T1	1		T2	23		T3	4
valid_sources[0x48]	7826	1			T1	3		T2	24		T3	3
valid_sources[0x49]	6034	1			T1	4		T2	11		T3	3
valid_sources[0x4a]	6125	1			T1	2		T2	4		T3	5
valid_sources[0x4b]	6564	1			T1	1		T2	19		T3	5
valid_sources[0x4c]	6487	1			T2	27		T3	7		T4	159
valid_sources[0x4d]	8777	1			T1	2		T2	31		T3	8
valid_sources[0x4e]	6247	1			T1	1		T2	15		T3	4
valid_sources[0x4f]	7091	1			T1	2		T2	28		T3	7
valid_sources[0x50]	5908	1			T1	6		T2	23		T3	4
valid_sources[0x51]	5994	1			T1	3		T2	23		T3	2
valid_sources[0x52]	6211	1			T2	3		T3	3		T4	132
valid_sources[0x53]	6368	1			T1	1		T2	16		T3	8
valid_sources[0x54]	10093	1			T1	1		T2	12		T3	5
valid_sources[0x55]	6324	1			T1	1		T2	8		T3	1
valid_sources[0x56]	7094	1			T1	5		T2	8		T3	4
valid_sources[0x57]	6290	1			T1	1		T2	22		T3	6
valid_sources[0x58]	6227	1			T1	1		T2	15		T3	3
valid_sources[0x59]	6122	1			T2	18		T3	1		T4	146
valid_sources[0x5a]	6616	1			T2	13		T3	8		T4	162
valid_sources[0x5b]	7388	1			T1	1		T2	44		T3	5
valid_sources[0x5c]	6318	1			T1	3		T2	26		T3	6
valid_sources[0x5d]	8318	1			T1	1		T2	37		T3	3
valid_sources[0x5e]	7218	1			T1	4		T2	10		T3	2
valid_sources[0x5f]	6025	1			T1	1		T2	17		T3	3
valid_sources[0x60]	7861	1			T2	32		T3	5		T4	154
valid_sources[0x61]	5923	1			T1	5		T2	29		T3	2
valid_sources[0x62]	6159	1			T1	3		T2	13		T3	3
valid_sources[0x63]	5885	1			T1	3		T2	47		T3	5
valid_sources[0x64]	8217	1			T1	1		T2	20		T3	7
valid_sources[0x65]	6262	1			T1	2		T2	19		T3	8
valid_sources[0x66]	6448	1			T1	2		T2	24		T3	6
valid_sources[0x67]	7306	1			T1	2		T2	23		T3	12
valid_sources[0x68]	8418	1			T1	4		T3	5		T4	149
valid_sources[0x69]	6278	1			T2	23		T3	3		T4	137
valid_sources[0x6a]	6414	1			T1	1		T2	33		T3	2
valid_sources[0x6b]	6257	1			T1	2		T2	21		T3	4
valid_sources[0x6c]	14739	1			T1	3		T2	21		T3	4
valid_sources[0x6d]	6797	1			T1	5		T2	7		T3	6
valid_sources[0x6e]	6203	1			T1	5		T2	20		T3	1
valid_sources[0x6f]	5913	1			T1	3		T2	27		T3	6
valid_sources[0x70]	6303	1			T1	4		T2	16		T3	2
valid_sources[0x71]	6386	1			T1	2		T2	8		T3	7
valid_sources[0x72]	6341	1			T1	3		T2	26		T3	7
valid_sources[0x73]	6324	1			T1	2		T2	13		T3	7
valid_sources[0x74]	6149	1			T1	1		T2	16		T3	4
valid_sources[0x75]	6577	1			T1	1		T2	14		T3	3
valid_sources[0x76]	7409	1			T1	3		T2	8		T3	4
valid_sources[0x77]	7149	1			T1	3		T2	13		T3	8
valid_sources[0x78]	5837	1			T1	6		T2	24		T3	4
valid_sources[0x79]	9163	1			T1	7		T2	23		T3	5
valid_sources[0x7a]	6147	1			T1	2		T2	9		T3	4
valid_sources[0x7b]	38801	1			T1	4		T2	12		T3	1
valid_sources[0x7c]	7430	1			T1	1		T2	21		T3	4
valid_sources[0x7d]	6915	1			T1	5		T2	18		T3	2
valid_sources[0x7e]	6490	1			T1	1		T2	9		T3	10
valid_sources[0x7f]	6224	1			T1	2		T2	27		T3	5
valid_sources[0x80]	6246	1			T1	2		T2	13		T3	2

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

6136

1

T2

25

T4

14

T13

9

values[0x0]

all_enables

biggest_size

5816

1

T2

10

T3

2

T4

16

values[0x1]

all_enables

biggest_size

4249

1

T2

5

T3

3

T4

11