Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
dashboard | hierarchy | modlist | groups | tests | asserts

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
SCOREINSTANCESWEIGHTGOALAT LEASTPER INSTANCEAUTO BIN MAXPRINT MISSING
100.00 100.00 1 100 1 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

2 Instances:
NAMESCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg 100.00 1 100 1 64 64
tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg 100.00 1 100 1 64 64




Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 134 0 134 100.00
Crosses 3 0 3 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_mask 1 0 1 100.00 100 1 1 0
cp_opcode 3 0 3 100.00 100 1 1 0
cp_size 1 0 1 100.00 100 1 1 0
cp_source 129 0 129 100.00 100 1 1 0


Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
tl_a_chan_cov_cg_cc 3 0 3 100.00 100 1 1 0



Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 134 0 134 100.00
Crosses 3 0 3 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_mask 1 0 1 100.00 100 1 1 0
cp_opcode 3 0 3 100.00 100 1 1 0
cp_size 1 0 1 100.00 100 1 1 0
cp_source 129 0 129 100.00 100 1 1 0


Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
tl_a_chan_cov_cg_cc 3 0 3 100.00 100 1 1 0


Summary for Variable cp_mask

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_mask

Excluded/Illegal bins
NAMECOUNTSTATUS
others 13845100 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_enables 57685999 1 T1 57 T2 56 T3 263404



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_opcode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] 35720206 1 T1 378 T2 372 T3 144878
values[0x0] 16518213 1 T1 207 T2 187 T3 69775
values[0x1] 19292680 1 T1 395 T2 408 T3 75082



Summary for Variable cp_size

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_size

Excluded/Illegal bins
NAMECOUNTSTATUS
others 6901824 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
biggest_size 64629275 1 T1 442 T2 469 T3 276638



Summary for Variable cp_source

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 129 0 129 100.00


User Defined Bins for cp_source

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
valid_sources[0x00] 269311 1 T1 1 T2 6 T3 1131
valid_sources[0x01] 296163 1 T1 2 T2 4 T3 1167
valid_sources[0x02] 254273 1 T1 5 T2 6 T3 1226
valid_sources[0x03] 283235 1 T1 1 T2 3 T3 1139
valid_sources[0x04] 276863 1 T1 5 T2 6 T3 1144
valid_sources[0x05] 312866 1 T1 3 T2 1 T3 1172
valid_sources[0x06] 306217 1 T1 7 T2 4 T3 1145
valid_sources[0x07] 265461 1 T1 7 T2 3 T3 1136
valid_sources[0x08] 238666 1 T1 8 T2 11 T3 1141
valid_sources[0x09] 299768 1 T1 4 T2 4 T3 1118
valid_sources[0x0a] 259380 1 T1 5 T2 11 T3 1143
valid_sources[0x0b] 265626 1 T1 4 T2 6 T3 1118
valid_sources[0x0c] 254584 1 T1 8 T2 2 T3 1223
valid_sources[0x0d] 254553 1 T1 3 T2 3 T3 1170
valid_sources[0x0e] 271129 1 T1 4 T2 3 T3 1135
valid_sources[0x0f] 252188 1 T1 1 T3 1091 T4 481
valid_sources[0x10] 257064 1 T1 2 T2 7 T3 1083
valid_sources[0x11] 269788 1 T1 5 T2 4 T3 1124
valid_sources[0x12] 266619 1 T1 4 T2 5 T3 1186
valid_sources[0x13] 360275 1 T1 5 T2 2 T3 1172
valid_sources[0x14] 295958 1 T1 3 T3 1201 T4 546
valid_sources[0x15] 353576 1 T1 2 T3 1131 T4 483
valid_sources[0x16] 312919 1 T1 3 T2 3 T3 1127
valid_sources[0x17] 293790 1 T1 2 T2 2 T3 1101
valid_sources[0x18] 267727 1 T1 5 T2 4 T3 1132
valid_sources[0x19] 262449 1 T1 4 T2 2 T3 1158
valid_sources[0x1a] 310824 1 T1 6 T2 3 T3 1051
valid_sources[0x1b] 292114 1 T1 2 T2 5 T3 1151
valid_sources[0x1c] 266816 1 T1 2 T2 6 T3 1147
valid_sources[0x1d] 303981 1 T1 3 T2 5 T3 1138
valid_sources[0x1e] 318446 1 T1 2 T2 10 T3 1148
valid_sources[0x1f] 267402 1 T1 3 T2 2 T3 1131
valid_sources[0x20] 241760 1 T1 4 T2 1 T3 1225
valid_sources[0x21] 278187 1 T1 6 T2 4 T3 1131
valid_sources[0x22] 276883 1 T1 4 T2 6 T3 1129
valid_sources[0x23] 259646 1 T1 4 T2 2 T3 1192
valid_sources[0x24] 310890 1 T1 4 T2 3 T3 1114
valid_sources[0x25] 248942 1 T1 2 T2 5 T3 1106
valid_sources[0x26] 300225 1 T1 2 T2 3 T3 1110
valid_sources[0x27] 259278 1 T1 1 T2 3 T3 1067
valid_sources[0x28] 246131 1 T1 6 T2 3 T3 1082
valid_sources[0x29] 262934 1 T1 9 T2 7 T3 1123
valid_sources[0x2a] 269645 1 T1 2 T2 4 T3 1093
valid_sources[0x2b] 260619 1 T1 3 T2 2 T3 1173
valid_sources[0x2c] 258881 1 T1 5 T2 5 T3 1131
valid_sources[0x2d] 300502 1 T1 5 T2 8 T3 1139
valid_sources[0x2e] 277082 1 T1 6 T2 3 T3 1075
valid_sources[0x2f] 263852 1 T1 2 T2 14 T3 1049
valid_sources[0x30] 306845 1 T1 5 T2 2 T3 1110
valid_sources[0x31] 263750 1 T1 4 T2 5 T3 1114
valid_sources[0x32] 246363 1 T1 5 T2 3 T3 1186
valid_sources[0x33] 262176 1 T1 1 T2 10 T3 1207
valid_sources[0x34] 258850 1 T1 6 T2 5 T3 1042
valid_sources[0x35] 266111 1 T1 3 T2 5 T3 1091
valid_sources[0x36] 238497 1 T1 3 T2 4 T3 1114
valid_sources[0x37] 260916 1 T1 4 T2 4 T3 1143
valid_sources[0x38] 241686 1 T1 7 T2 3 T3 1148
valid_sources[0x39] 272846 1 T1 3 T2 7 T3 1106
valid_sources[0x3a] 242656 1 T1 2 T3 1133 T4 527
valid_sources[0x3b] 254426 1 T1 3 T2 6 T3 1171
valid_sources[0x3c] 250359 1 T1 5 T2 5 T3 1070
valid_sources[0x3d] 300091 1 T1 3 T2 3 T3 1187
valid_sources[0x3e] 254353 1 T1 4 T2 1 T3 1148
valid_sources[0x3f] 254273 1 T1 3 T2 3 T3 1097
valid_sources[0x40] 321914 1 T1 5 T2 1 T3 1150
valid_sources[0x41] 314789 1 T1 4 T2 5 T3 1054
valid_sources[0x42] 293509 1 T1 2 T2 5 T3 1019
valid_sources[0x43] 261142 1 T1 6 T2 6 T3 1101
valid_sources[0x44] 280153 1 T1 4 T2 5 T3 1117
valid_sources[0x45] 248024 1 T1 8 T3 1149 T4 466
valid_sources[0x46] 334062 1 T1 2 T2 2 T3 1207
valid_sources[0x47] 317619 1 T1 4 T2 2 T3 1096
valid_sources[0x48] 364859 1 T1 5 T2 3 T3 1173
valid_sources[0x49] 239376 1 T1 7 T2 11 T3 1123
valid_sources[0x4a] 403422 1 T2 7 T3 1105 T10 21
valid_sources[0x4b] 247967 1 T1 4 T2 2 T3 1097
valid_sources[0x4c] 347858 1 T1 3 T2 4 T3 1063
valid_sources[0x4d] 270806 1 T1 3 T2 7 T3 1157
valid_sources[0x4e] 239081 1 T1 3 T2 6 T3 1250
valid_sources[0x4f] 267977 1 T1 4 T3 1090 T4 468
valid_sources[0x50] 297660 1 T1 11 T2 2 T3 1188
valid_sources[0x51] 250669 1 T1 2 T2 3 T3 1195
valid_sources[0x52] 283018 1 T2 1 T3 1176 T10 21
valid_sources[0x53] 329589 1 T1 5 T2 8 T3 1107
valid_sources[0x54] 289219 1 T1 3 T2 4 T3 1126
valid_sources[0x55] 293714 1 T1 3 T2 3 T3 1174
valid_sources[0x56] 271509 1 T1 4 T2 4 T3 1079
valid_sources[0x57] 282403 1 T1 5 T2 4 T3 1135
valid_sources[0x58] 275447 1 T1 1 T2 6 T3 1166
valid_sources[0x59] 264663 1 T1 8 T2 7 T3 1251
valid_sources[0x5a] 243183 1 T1 4 T2 1 T3 1082
valid_sources[0x5b] 329995 1 T1 4 T2 7 T3 1167
valid_sources[0x5c] 300743 1 T1 4 T2 1 T3 1121
valid_sources[0x5d] 293394 1 T1 5 T2 5 T3 1125
valid_sources[0x5e] 348015 1 T1 2 T2 2 T3 1137
valid_sources[0x5f] 250631 1 T1 4 T2 2 T3 1005
valid_sources[0x60] 278474 1 T1 2 T2 5 T3 1058
valid_sources[0x61] 258125 1 T1 4 T2 4 T3 1117
valid_sources[0x62] 262273 1 T1 3 T2 1 T3 1144
valid_sources[0x63] 244666 1 T1 9 T2 2 T3 1159
valid_sources[0x64] 254137 1 T1 1 T2 4 T3 1122
valid_sources[0x65] 256838 1 T1 8 T2 4 T3 1075
valid_sources[0x66] 285178 1 T1 4 T2 5 T3 1142
valid_sources[0x67] 289426 1 T1 5 T2 1 T3 1124
valid_sources[0x68] 272505 1 T1 4 T2 2 T3 1129
valid_sources[0x69] 284395 1 T1 6 T2 1 T3 1164
valid_sources[0x6a] 269624 1 T1 10 T2 2 T3 1171
valid_sources[0x6b] 310431 1 T1 3 T2 6 T3 1164
valid_sources[0x6c] 249802 1 T1 3 T3 1232 T4 474
valid_sources[0x6d] 253809 1 T1 5 T2 2 T3 1096
valid_sources[0x6e] 257179 1 T1 2 T2 2 T3 1219
valid_sources[0x6f] 249674 1 T1 3 T3 1123 T4 450
valid_sources[0x70] 377994 1 T1 1 T2 3 T3 1170
valid_sources[0x71] 280391 1 T1 2 T2 2 T3 1156
valid_sources[0x72] 262855 1 T2 3 T3 1130 T4 483
valid_sources[0x73] 257452 1 T1 1 T2 5 T3 1134
valid_sources[0x74] 293805 1 T1 3 T2 2 T3 1148
valid_sources[0x75] 379136 1 T1 3 T2 7 T3 1101
valid_sources[0x76] 253114 1 T1 2 T2 2 T3 1132
valid_sources[0x77] 292426 1 T1 7 T2 5 T3 1205
valid_sources[0x78] 299829 1 T1 8 T2 3 T3 1168
valid_sources[0x79] 243733 1 T1 5 T2 2 T3 1090
valid_sources[0x7a] 256367 1 T1 4 T2 2 T3 1147
valid_sources[0x7b] 271847 1 T1 3 T2 4 T3 1183
valid_sources[0x7c] 288258 1 T1 1 T2 4 T3 1197
valid_sources[0x7d] 255887 1 T1 3 T2 3 T3 1139
valid_sources[0x7e] 253231 1 T1 3 T2 4 T3 1144
valid_sources[0x7f] 265460 1 T1 2 T2 1 T3 1220
valid_sources[0x80] 244932 1 T1 1 T2 6 T3 1110



Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 3 0 3 100.00


Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins
cp_opcodecp_maskcp_sizeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] all_enables biggest_size 28802622 1 T1 3 T2 1 T3 131660
values[0x0] all_enables biggest_size 14439407 1 T1 32 T2 30 T3 65879
values[0x1] all_enables biggest_size 14443970 1 T1 22 T2 25 T3 65865


Summary for Variable cp_mask

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_mask

Excluded/Illegal bins
NAMECOUNTSTATUS
others 2065434 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_enables 18001 1 T2 1 T3 39 T11 8



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_opcode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] 2055957 1 T1 520 T2 521 T3 196
values[0x0] 13658 1 T2 1 T3 59 T4 3
values[0x1] 13820 1 T1 1 T3 65 T10 1



Summary for Variable cp_size

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_size

Excluded/Illegal bins
NAMECOUNTSTATUS
others 1381382 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
biggest_size 702053 1 T1 152 T2 166 T3 111



Summary for Variable cp_source

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 129 0 129 100.00


User Defined Bins for cp_source

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
valid_sources[0x00] 14065 1 T2 1 T3 3 T12 2
valid_sources[0x01] 6308 1 T1 2 T2 3 T12 1
valid_sources[0x02] 6316 1 T1 2 T3 3 T14 40
valid_sources[0x03] 5978 1 T1 1 T2 2 T14 28
valid_sources[0x04] 6439 1 T1 2 T2 5 T14 29
valid_sources[0x05] 13318 1 T1 2 T2 1 T3 3
valid_sources[0x06] 7075 1 T2 4 T3 2 T14 41
valid_sources[0x07] 11001 1 T1 2 T2 1 T3 1
valid_sources[0x08] 20990 1 T1 1 T11 13602 T14 39
valid_sources[0x09] 6682 1 T1 3 T14 31 T39 13
valid_sources[0x0a] 9833 1 T1 3 T2 2 T12 1
valid_sources[0x0b] 7053 1 T1 1 T2 4 T14 43
valid_sources[0x0c] 6293 1 T1 1 T12 2 T14 28
valid_sources[0x0d] 17600 1 T1 2 T2 2 T3 3
valid_sources[0x0e] 7508 1 T1 3 T2 1 T12 2
valid_sources[0x0f] 7947 1 T2 1 T9 1 T14 28
valid_sources[0x10] 10315 1 T1 1 T2 3 T3 7
valid_sources[0x11] 6659 1 T1 3 T2 2 T3 2
valid_sources[0x12] 8649 1 T1 3 T2 1 T12 2
valid_sources[0x13] 13512 1 T1 4 T2 1 T12 1
valid_sources[0x14] 10041 1 T1 5 T2 1 T12 3
valid_sources[0x15] 6557 1 T1 3 T2 4 T3 6
valid_sources[0x16] 6062 1 T1 1 T12 1 T14 32
valid_sources[0x17] 8147 1 T1 3 T2 3 T3 4
valid_sources[0x18] 6394 1 T1 2 T2 1 T12 1
valid_sources[0x19] 6417 1 T1 3 T14 35 T39 20
valid_sources[0x1a] 6902 1 T1 1 T2 2 T12 1
valid_sources[0x1b] 6556 1 T1 2 T2 2 T14 28
valid_sources[0x1c] 6402 1 T1 3 T2 3 T14 29
valid_sources[0x1d] 6532 1 T1 1 T2 3 T3 2
valid_sources[0x1e] 6418 1 T1 3 T2 4 T12 1
valid_sources[0x1f] 7021 1 T1 3 T2 1 T12 1
valid_sources[0x20] 6194 1 T1 1 T2 1 T3 6
valid_sources[0x21] 6252 1 T1 1 T2 1 T9 3
valid_sources[0x22] 6520 1 T1 3 T3 2 T12 1
valid_sources[0x23] 6410 1 T1 2 T2 6 T14 32
valid_sources[0x24] 6489 1 T1 1 T2 3 T3 2
valid_sources[0x25] 6204 1 T1 3 T2 1 T3 1
valid_sources[0x26] 6381 1 T1 3 T2 3 T3 3
valid_sources[0x27] 6330 1 T2 1 T14 27 T39 24
valid_sources[0x28] 10121 1 T1 1 T2 4 T3 3
valid_sources[0x29] 6180 1 T1 5 T2 1 T3 1
valid_sources[0x2a] 6443 1 T1 2 T2 1 T14 30
valid_sources[0x2b] 8338 1 T1 3 T12 1 T14 25
valid_sources[0x2c] 6659 1 T2 2 T14 35 T39 17
valid_sources[0x2d] 6806 1 T1 4 T2 5 T14 31
valid_sources[0x2e] 6557 1 T2 2 T3 2 T12 1
valid_sources[0x2f] 16306 1 T1 2 T14 35 T39 5
valid_sources[0x30] 6230 1 T1 2 T2 3 T3 10
valid_sources[0x31] 8207 1 T1 3 T2 2 T3 2
valid_sources[0x32] 6934 1 T2 4 T3 4 T12 1
valid_sources[0x33] 23317 1 T1 2 T2 2 T3 1
valid_sources[0x34] 8967 1 T1 3 T2 3 T14 35
valid_sources[0x35] 8139 1 T2 3 T3 1 T12 4
valid_sources[0x36] 10180 1 T2 1 T9 2 T14 31
valid_sources[0x37] 7084 1 T1 3 T12 2 T14 33
valid_sources[0x38] 6307 1 T1 3 T2 2 T3 2
valid_sources[0x39] 6322 1 T2 3 T14 26 T39 25
valid_sources[0x3a] 6058 1 T1 1 T2 1 T14 26
valid_sources[0x3b] 10190 1 T1 1 T2 4 T14 35
valid_sources[0x3c] 8741 1 T1 3 T2 2 T14 27
valid_sources[0x3d] 6480 1 T1 4 T9 1 T14 29
valid_sources[0x3e] 6482 1 T1 1 T14 33 T39 18
valid_sources[0x3f] 6115 1 T1 2 T9 3 T14 31
valid_sources[0x40] 6281 1 T1 4 T2 2 T14 23
valid_sources[0x41] 6648 1 T1 4 T2 2 T12 1
valid_sources[0x42] 6483 1 T1 1 T2 5 T3 7
valid_sources[0x43] 6698 1 T1 3 T2 3 T3 2
valid_sources[0x44] 7184 1 T2 5 T3 11 T14 36
valid_sources[0x45] 6515 1 T1 3 T2 3 T14 31
valid_sources[0x46] 6231 1 T1 2 T2 4 T3 3
valid_sources[0x47] 6883 1 T2 5 T3 2 T14 29
valid_sources[0x48] 9131 1 T1 5 T2 3 T14 28
valid_sources[0x49] 6214 1 T1 4 T14 31 T39 15
valid_sources[0x4a] 18215 1 T1 1 T9 2 T14 36
valid_sources[0x4b] 6573 1 T1 1 T2 1 T12 1
valid_sources[0x4c] 6456 1 T1 1 T14 24 T39 28
valid_sources[0x4d] 7558 1 T1 6 T3 12 T12 1
valid_sources[0x4e] 6540 1 T1 2 T2 1 T12 1
valid_sources[0x4f] 7163 1 T1 1 T12 1 T14 33
valid_sources[0x50] 10695 1 T2 2 T14 29 T39 16
valid_sources[0x51] 6244 1 T2 4 T12 2 T14 23
valid_sources[0x52] 8878 1 T2 7 T12 1 T14 23
valid_sources[0x53] 7562 1 T1 1 T14 28 T39 27
valid_sources[0x54] 7231 1 T2 4 T14 42 T39 10
valid_sources[0x55] 6833 1 T1 2 T2 3 T3 1
valid_sources[0x56] 9447 1 T1 1 T2 5 T14 33
valid_sources[0x57] 10529 1 T1 1 T14 32 T39 24
valid_sources[0x58] 7089 1 T1 2 T12 1 T14 32
valid_sources[0x59] 7341 1 T1 2 T2 3 T14 31
valid_sources[0x5a] 6930 1 T2 2 T14 27 T39 21
valid_sources[0x5b] 6679 1 T1 1 T2 2 T14 33
valid_sources[0x5c] 6597 1 T2 1 T14 26 T39 16
valid_sources[0x5d] 6392 1 T1 2 T2 1 T12 1
valid_sources[0x5e] 6592 1 T1 2 T2 4 T3 2
valid_sources[0x5f] 6771 1 T1 3 T2 1 T12 1
valid_sources[0x60] 6153 1 T1 1 T2 3 T14 39
valid_sources[0x61] 6660 1 T1 5 T2 2 T3 1
valid_sources[0x62] 6313 1 T1 3 T2 3 T14 35
valid_sources[0x63] 6539 1 T1 2 T2 2 T12 1
valid_sources[0x64] 6366 1 T1 1 T2 5 T14 34
valid_sources[0x65] 6269 1 T1 5 T2 1 T9 1
valid_sources[0x66] 6291 1 T1 1 T3 6 T14 28
valid_sources[0x67] 6464 1 T1 2 T2 2 T3 4
valid_sources[0x68] 7250 1 T1 5 T2 2 T3 12
valid_sources[0x69] 16889 1 T1 2 T2 3 T14 31
valid_sources[0x6a] 6744 1 T2 4 T3 1 T14 31
valid_sources[0x6b] 7884 1 T3 2 T14 31 T39 30
valid_sources[0x6c] 7786 1 T1 3 T2 3 T3 6
valid_sources[0x6d] 6190 1 T1 2 T12 1 T14 23
valid_sources[0x6e] 7485 1 T1 3 T2 1 T14 30
valid_sources[0x6f] 12699 1 T1 3 T2 2 T14 36
valid_sources[0x70] 7872 1 T3 1 T12 1 T14 23
valid_sources[0x71] 6944 1 T1 4 T2 1 T12 1
valid_sources[0x72] 16167 1 T1 2 T2 2 T14 29
valid_sources[0x73] 6244 1 T1 3 T2 5 T12 1
valid_sources[0x74] 7169 1 T1 1 T2 1 T12 2
valid_sources[0x75] 6929 1 T2 5 T3 2 T14 26
valid_sources[0x76] 6385 1 T2 1 T3 4 T14 29
valid_sources[0x77] 17351 1 T1 4 T2 2 T3 4
valid_sources[0x78] 7301 1 T1 8 T2 4 T3 1
valid_sources[0x79] 6706 1 T1 3 T2 2 T12 1
valid_sources[0x7a] 13233 1 T1 1 T2 2 T3 4
valid_sources[0x7b] 6419 1 T1 3 T2 3 T14 25
valid_sources[0x7c] 11078 1 T1 1 T2 4 T14 36
valid_sources[0x7d] 9357 1 T1 1 T2 1 T14 27
valid_sources[0x7e] 7370 1 T1 2 T14 32 T39 17
valid_sources[0x7f] 10275 1 T1 2 T2 4 T3 3
valid_sources[0x80] 6227 1 T2 3 T12 1 T14 27



Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 3 0 3 100.00


Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins
cp_opcodecp_maskcp_sizeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] all_enables biggest_size 6909 1 T3 15 T13 3 T6 23
values[0x0] all_enables biggest_size 6507 1 T2 1 T3 18 T11 4
values[0x1] all_enables biggest_size 4585 1 T3 6 T11 4 T13 4

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%