T317 |
/workspace/coverage/default/28.sram_ctrl_mem_walk.2816130346 |
|
|
Feb 25 02:47:52 PM PST 24 |
Feb 25 02:47:58 PM PST 24 |
237437234 ps |
T318 |
/workspace/coverage/default/5.sram_ctrl_partial_access.360897381 |
|
|
Feb 25 02:46:01 PM PST 24 |
Feb 25 02:47:58 PM PST 24 |
395833657 ps |
T319 |
/workspace/coverage/default/15.sram_ctrl_executable.3684576574 |
|
|
Feb 25 02:46:23 PM PST 24 |
Feb 25 03:11:33 PM PST 24 |
12231782670 ps |
T320 |
/workspace/coverage/default/17.sram_ctrl_mem_partial_access.1091952225 |
|
|
Feb 25 02:46:45 PM PST 24 |
Feb 25 02:46:49 PM PST 24 |
81853893 ps |
T321 |
/workspace/coverage/default/10.sram_ctrl_executable.1853805088 |
|
|
Feb 25 02:46:10 PM PST 24 |
Feb 25 03:01:55 PM PST 24 |
12708307308 ps |
T322 |
/workspace/coverage/default/44.sram_ctrl_alert_test.2862115341 |
|
|
Feb 25 02:49:42 PM PST 24 |
Feb 25 02:49:44 PM PST 24 |
19947433 ps |
T323 |
/workspace/coverage/default/4.sram_ctrl_max_throughput.3543203783 |
|
|
Feb 25 02:45:51 PM PST 24 |
Feb 25 02:46:42 PM PST 24 |
442049946 ps |
T324 |
/workspace/coverage/default/27.sram_ctrl_multiple_keys.1407175382 |
|
|
Feb 25 02:47:25 PM PST 24 |
Feb 25 02:58:22 PM PST 24 |
6170890106 ps |
T325 |
/workspace/coverage/default/20.sram_ctrl_stress_all.3795367169 |
|
|
Feb 25 02:47:09 PM PST 24 |
Feb 25 03:52:39 PM PST 24 |
119313745819 ps |
T326 |
/workspace/coverage/default/16.sram_ctrl_lc_escalation.4261415277 |
|
|
Feb 25 02:46:33 PM PST 24 |
Feb 25 02:46:42 PM PST 24 |
2050178517 ps |
T327 |
/workspace/coverage/default/34.sram_ctrl_throughput_w_partial_write.1448226833 |
|
|
Feb 25 02:48:19 PM PST 24 |
Feb 25 02:48:29 PM PST 24 |
203793860 ps |
T328 |
/workspace/coverage/default/43.sram_ctrl_partial_access_b2b.1241847944 |
|
|
Feb 25 02:49:33 PM PST 24 |
Feb 25 02:53:12 PM PST 24 |
9781292912 ps |
T329 |
/workspace/coverage/default/43.sram_ctrl_regwen.3342401591 |
|
|
Feb 25 02:49:36 PM PST 24 |
Feb 25 03:42:47 PM PST 24 |
96001770633 ps |
T330 |
/workspace/coverage/default/44.sram_ctrl_partial_access.1133436028 |
|
|
Feb 25 02:49:41 PM PST 24 |
Feb 25 02:49:53 PM PST 24 |
845206261 ps |
T331 |
/workspace/coverage/default/7.sram_ctrl_partial_access.2093957250 |
|
|
Feb 25 02:46:00 PM PST 24 |
Feb 25 02:47:59 PM PST 24 |
4014165148 ps |
T332 |
/workspace/coverage/default/23.sram_ctrl_throughput_w_partial_write.279769765 |
|
|
Feb 25 02:47:15 PM PST 24 |
Feb 25 02:48:26 PM PST 24 |
855606344 ps |
T333 |
/workspace/coverage/default/30.sram_ctrl_regwen.3735737046 |
|
|
Feb 25 02:48:00 PM PST 24 |
Feb 25 03:23:11 PM PST 24 |
4473967283 ps |
T334 |
/workspace/coverage/default/9.sram_ctrl_regwen.2775456370 |
|
|
Feb 25 02:46:27 PM PST 24 |
Feb 25 02:58:37 PM PST 24 |
8170643050 ps |
T335 |
/workspace/coverage/default/12.sram_ctrl_partial_access_b2b.832977580 |
|
|
Feb 25 02:46:22 PM PST 24 |
Feb 25 02:49:59 PM PST 24 |
3108949559 ps |
T336 |
/workspace/coverage/default/34.sram_ctrl_smoke.1627242740 |
|
|
Feb 25 02:48:20 PM PST 24 |
Feb 25 02:48:33 PM PST 24 |
588078334 ps |
T337 |
/workspace/coverage/default/14.sram_ctrl_smoke.826542342 |
|
|
Feb 25 02:46:30 PM PST 24 |
Feb 25 02:46:36 PM PST 24 |
193792847 ps |
T338 |
/workspace/coverage/default/15.sram_ctrl_access_during_key_req.403646674 |
|
|
Feb 25 02:46:24 PM PST 24 |
Feb 25 02:55:33 PM PST 24 |
3332525357 ps |
T339 |
/workspace/coverage/default/45.sram_ctrl_multiple_keys.3326690201 |
|
|
Feb 25 02:49:41 PM PST 24 |
Feb 25 03:03:45 PM PST 24 |
2334882247 ps |
T340 |
/workspace/coverage/default/46.sram_ctrl_mem_partial_access.506074242 |
|
|
Feb 25 02:50:13 PM PST 24 |
Feb 25 02:50:18 PM PST 24 |
525215838 ps |
T341 |
/workspace/coverage/default/2.sram_ctrl_ram_cfg.3804036734 |
|
|
Feb 25 02:45:51 PM PST 24 |
Feb 25 02:45:53 PM PST 24 |
42577837 ps |
T342 |
/workspace/coverage/default/31.sram_ctrl_mem_walk.3225590274 |
|
|
Feb 25 02:48:11 PM PST 24 |
Feb 25 02:48:17 PM PST 24 |
305040168 ps |
T20 |
/workspace/coverage/default/2.sram_ctrl_sec_cm.3505530199 |
|
|
Feb 25 02:45:48 PM PST 24 |
Feb 25 02:45:52 PM PST 24 |
481876040 ps |
T44 |
/workspace/coverage/default/5.sram_ctrl_multiple_keys.1428693063 |
|
|
Feb 25 02:46:00 PM PST 24 |
Feb 25 02:59:12 PM PST 24 |
8964340276 ps |
T21 |
/workspace/coverage/default/1.sram_ctrl_sec_cm.442355656 |
|
|
Feb 25 02:45:48 PM PST 24 |
Feb 25 02:45:53 PM PST 24 |
681401406 ps |
T45 |
/workspace/coverage/default/43.sram_ctrl_mem_walk.413778545 |
|
|
Feb 25 02:49:38 PM PST 24 |
Feb 25 02:49:44 PM PST 24 |
77320232 ps |
T46 |
/workspace/coverage/default/26.sram_ctrl_partial_access_b2b.3964351280 |
|
|
Feb 25 02:47:31 PM PST 24 |
Feb 25 02:53:37 PM PST 24 |
13960605361 ps |
T47 |
/workspace/coverage/default/20.sram_ctrl_ram_cfg.120386676 |
|
|
Feb 25 02:46:53 PM PST 24 |
Feb 25 02:46:54 PM PST 24 |
47003168 ps |
T48 |
/workspace/coverage/default/11.sram_ctrl_partial_access.3511987892 |
|
|
Feb 25 02:46:18 PM PST 24 |
Feb 25 02:47:00 PM PST 24 |
1055575184 ps |
T49 |
/workspace/coverage/default/17.sram_ctrl_alert_test.2059373934 |
|
|
Feb 25 02:46:45 PM PST 24 |
Feb 25 02:46:46 PM PST 24 |
14275154 ps |
T50 |
/workspace/coverage/default/9.sram_ctrl_executable.1947531655 |
|
|
Feb 25 02:46:27 PM PST 24 |
Feb 25 03:00:33 PM PST 24 |
13241759438 ps |
T51 |
/workspace/coverage/default/24.sram_ctrl_access_during_key_req.306055614 |
|
|
Feb 25 02:47:16 PM PST 24 |
Feb 25 02:55:15 PM PST 24 |
3377679771 ps |
T343 |
/workspace/coverage/default/0.sram_ctrl_access_during_key_req.1282500391 |
|
|
Feb 25 02:45:32 PM PST 24 |
Feb 25 02:56:22 PM PST 24 |
15945992875 ps |
T344 |
/workspace/coverage/default/5.sram_ctrl_max_throughput.1812531578 |
|
|
Feb 25 02:46:05 PM PST 24 |
Feb 25 02:46:39 PM PST 24 |
842814444 ps |
T345 |
/workspace/coverage/default/23.sram_ctrl_regwen.2518430581 |
|
|
Feb 25 02:47:12 PM PST 24 |
Feb 25 03:08:49 PM PST 24 |
35361218412 ps |
T346 |
/workspace/coverage/default/0.sram_ctrl_mem_partial_access.3731748530 |
|
|
Feb 25 02:45:30 PM PST 24 |
Feb 25 02:45:35 PM PST 24 |
373242347 ps |
T347 |
/workspace/coverage/default/20.sram_ctrl_max_throughput.3228496804 |
|
|
Feb 25 02:46:58 PM PST 24 |
Feb 25 02:48:26 PM PST 24 |
550531845 ps |
T348 |
/workspace/coverage/default/38.sram_ctrl_partial_access_b2b.1585092620 |
|
|
Feb 25 02:48:54 PM PST 24 |
Feb 25 02:55:15 PM PST 24 |
275906408349 ps |
T349 |
/workspace/coverage/default/29.sram_ctrl_regwen.2393334512 |
|
|
Feb 25 02:48:00 PM PST 24 |
Feb 25 02:52:46 PM PST 24 |
1831593282 ps |
T350 |
/workspace/coverage/default/43.sram_ctrl_smoke.2433129936 |
|
|
Feb 25 02:49:34 PM PST 24 |
Feb 25 02:52:08 PM PST 24 |
536238399 ps |
T351 |
/workspace/coverage/default/40.sram_ctrl_throughput_w_partial_write.1021770424 |
|
|
Feb 25 02:49:14 PM PST 24 |
Feb 25 02:50:28 PM PST 24 |
507920095 ps |
T352 |
/workspace/coverage/default/33.sram_ctrl_partial_access.1830817400 |
|
|
Feb 25 02:48:24 PM PST 24 |
Feb 25 02:48:28 PM PST 24 |
118912438 ps |
T353 |
/workspace/coverage/default/24.sram_ctrl_multiple_keys.3937734772 |
|
|
Feb 25 02:47:12 PM PST 24 |
Feb 25 02:52:38 PM PST 24 |
34422329670 ps |
T354 |
/workspace/coverage/default/42.sram_ctrl_stress_all.216870901 |
|
|
Feb 25 02:49:34 PM PST 24 |
Feb 25 03:32:00 PM PST 24 |
44053182703 ps |
T355 |
/workspace/coverage/default/44.sram_ctrl_access_during_key_req.917281193 |
|
|
Feb 25 02:49:41 PM PST 24 |
Feb 25 02:57:11 PM PST 24 |
1963202206 ps |
T356 |
/workspace/coverage/default/7.sram_ctrl_mem_walk.1806996825 |
|
|
Feb 25 02:46:01 PM PST 24 |
Feb 25 02:46:10 PM PST 24 |
277761879 ps |
T357 |
/workspace/coverage/default/20.sram_ctrl_regwen.659279528 |
|
|
Feb 25 02:46:57 PM PST 24 |
Feb 25 02:59:50 PM PST 24 |
47722526135 ps |
T358 |
/workspace/coverage/default/14.sram_ctrl_multiple_keys.1798184315 |
|
|
Feb 25 02:46:26 PM PST 24 |
Feb 25 02:53:33 PM PST 24 |
13031711328 ps |
T359 |
/workspace/coverage/default/1.sram_ctrl_smoke.307976558 |
|
|
Feb 25 02:45:31 PM PST 24 |
Feb 25 02:45:44 PM PST 24 |
155332385 ps |
T360 |
/workspace/coverage/default/11.sram_ctrl_multiple_keys.2967904599 |
|
|
Feb 25 02:46:19 PM PST 24 |
Feb 25 03:07:40 PM PST 24 |
13740923043 ps |
T361 |
/workspace/coverage/default/35.sram_ctrl_partial_access_b2b.1559268857 |
|
|
Feb 25 02:48:28 PM PST 24 |
Feb 25 02:54:58 PM PST 24 |
31023476500 ps |
T362 |
/workspace/coverage/default/29.sram_ctrl_smoke.1084629340 |
|
|
Feb 25 02:47:53 PM PST 24 |
Feb 25 02:47:56 PM PST 24 |
191999702 ps |
T363 |
/workspace/coverage/default/31.sram_ctrl_lc_escalation.2070104706 |
|
|
Feb 25 02:48:10 PM PST 24 |
Feb 25 02:48:16 PM PST 24 |
1224685048 ps |
T364 |
/workspace/coverage/default/2.sram_ctrl_regwen.2462908547 |
|
|
Feb 25 02:45:54 PM PST 24 |
Feb 25 02:56:58 PM PST 24 |
11907562506 ps |
T365 |
/workspace/coverage/default/42.sram_ctrl_bijection.4191871632 |
|
|
Feb 25 02:49:22 PM PST 24 |
Feb 25 02:50:11 PM PST 24 |
1223365196 ps |
T366 |
/workspace/coverage/default/24.sram_ctrl_smoke.3657232891 |
|
|
Feb 25 02:47:12 PM PST 24 |
Feb 25 02:47:29 PM PST 24 |
1387179546 ps |
T367 |
/workspace/coverage/default/2.sram_ctrl_bijection.2131563211 |
|
|
Feb 25 02:45:54 PM PST 24 |
Feb 25 02:46:56 PM PST 24 |
3948287657 ps |
T368 |
/workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.1741619910 |
|
|
Feb 25 02:45:47 PM PST 24 |
Feb 25 02:45:53 PM PST 24 |
69521360 ps |
T369 |
/workspace/coverage/default/30.sram_ctrl_ram_cfg.676329267 |
|
|
Feb 25 02:47:58 PM PST 24 |
Feb 25 02:47:59 PM PST 24 |
40928932 ps |
T370 |
/workspace/coverage/default/39.sram_ctrl_mem_partial_access.3344012124 |
|
|
Feb 25 02:49:04 PM PST 24 |
Feb 25 02:49:07 PM PST 24 |
372526466 ps |
T371 |
/workspace/coverage/default/27.sram_ctrl_mem_partial_access.3565374271 |
|
|
Feb 25 02:47:33 PM PST 24 |
Feb 25 02:47:36 PM PST 24 |
47450026 ps |
T372 |
/workspace/coverage/default/37.sram_ctrl_throughput_w_partial_write.410996134 |
|
|
Feb 25 02:48:44 PM PST 24 |
Feb 25 02:49:17 PM PST 24 |
105401636 ps |
T373 |
/workspace/coverage/default/24.sram_ctrl_max_throughput.2498281503 |
|
|
Feb 25 02:47:11 PM PST 24 |
Feb 25 02:47:14 PM PST 24 |
84413347 ps |
T374 |
/workspace/coverage/default/3.sram_ctrl_bijection.2888293082 |
|
|
Feb 25 02:45:51 PM PST 24 |
Feb 25 02:46:24 PM PST 24 |
492680997 ps |
T375 |
/workspace/coverage/default/35.sram_ctrl_stress_pipeline.828966127 |
|
|
Feb 25 02:48:28 PM PST 24 |
Feb 25 02:53:47 PM PST 24 |
3319906402 ps |
T376 |
/workspace/coverage/default/17.sram_ctrl_mem_walk.214176652 |
|
|
Feb 25 02:46:43 PM PST 24 |
Feb 25 02:46:55 PM PST 24 |
2593178740 ps |
T377 |
/workspace/coverage/default/44.sram_ctrl_multiple_keys.2003006502 |
|
|
Feb 25 02:49:35 PM PST 24 |
Feb 25 02:57:03 PM PST 24 |
62766171489 ps |
T378 |
/workspace/coverage/default/13.sram_ctrl_throughput_w_partial_write.1212606176 |
|
|
Feb 25 02:46:26 PM PST 24 |
Feb 25 02:46:28 PM PST 24 |
35588098 ps |
T379 |
/workspace/coverage/default/9.sram_ctrl_mem_walk.4251777290 |
|
|
Feb 25 02:46:15 PM PST 24 |
Feb 25 02:46:20 PM PST 24 |
1057897753 ps |
T380 |
/workspace/coverage/default/36.sram_ctrl_max_throughput.1258421294 |
|
|
Feb 25 02:48:42 PM PST 24 |
Feb 25 02:48:47 PM PST 24 |
182649151 ps |
T381 |
/workspace/coverage/default/40.sram_ctrl_mem_walk.2447266718 |
|
|
Feb 25 02:49:18 PM PST 24 |
Feb 25 02:49:23 PM PST 24 |
335748233 ps |
T382 |
/workspace/coverage/default/20.sram_ctrl_partial_access.2072189126 |
|
|
Feb 25 02:46:56 PM PST 24 |
Feb 25 02:48:03 PM PST 24 |
1973419272 ps |
T383 |
/workspace/coverage/default/39.sram_ctrl_max_throughput.3533637099 |
|
|
Feb 25 02:48:53 PM PST 24 |
Feb 25 02:51:13 PM PST 24 |
503274890 ps |
T384 |
/workspace/coverage/default/19.sram_ctrl_max_throughput.35160917 |
|
|
Feb 25 02:46:57 PM PST 24 |
Feb 25 02:47:31 PM PST 24 |
88891755 ps |
T385 |
/workspace/coverage/default/12.sram_ctrl_mem_walk.718825952 |
|
|
Feb 25 02:46:30 PM PST 24 |
Feb 25 02:46:38 PM PST 24 |
153852931 ps |
T386 |
/workspace/coverage/default/1.sram_ctrl_ram_cfg.1458114503 |
|
|
Feb 25 02:45:30 PM PST 24 |
Feb 25 02:45:31 PM PST 24 |
37275687 ps |
T387 |
/workspace/coverage/default/41.sram_ctrl_access_during_key_req.2920193922 |
|
|
Feb 25 02:49:14 PM PST 24 |
Feb 25 03:01:32 PM PST 24 |
2647349698 ps |
T388 |
/workspace/coverage/default/15.sram_ctrl_stress_all.1183759556 |
|
|
Feb 25 02:46:32 PM PST 24 |
Feb 25 03:53:22 PM PST 24 |
59372652163 ps |
T389 |
/workspace/coverage/default/17.sram_ctrl_access_during_key_req.3840220871 |
|
|
Feb 25 02:46:33 PM PST 24 |
Feb 25 03:07:04 PM PST 24 |
4451016948 ps |
T390 |
/workspace/coverage/default/33.sram_ctrl_bijection.3295393461 |
|
|
Feb 25 02:48:19 PM PST 24 |
Feb 25 02:49:16 PM PST 24 |
2780100118 ps |
T391 |
/workspace/coverage/default/3.sram_ctrl_executable.3254115218 |
|
|
Feb 25 02:45:48 PM PST 24 |
Feb 25 02:59:56 PM PST 24 |
13512807033 ps |
T392 |
/workspace/coverage/default/40.sram_ctrl_smoke.2302671186 |
|
|
Feb 25 02:49:04 PM PST 24 |
Feb 25 02:49:46 PM PST 24 |
548142281 ps |
T393 |
/workspace/coverage/default/30.sram_ctrl_bijection.3322028227 |
|
|
Feb 25 02:48:10 PM PST 24 |
Feb 25 02:49:19 PM PST 24 |
26287231888 ps |
T394 |
/workspace/coverage/default/16.sram_ctrl_multiple_keys.2746956609 |
|
|
Feb 25 02:46:34 PM PST 24 |
Feb 25 02:52:38 PM PST 24 |
12552409952 ps |
T395 |
/workspace/coverage/default/10.sram_ctrl_partial_access_b2b.667537878 |
|
|
Feb 25 02:46:06 PM PST 24 |
Feb 25 02:50:15 PM PST 24 |
18494602987 ps |
T396 |
/workspace/coverage/default/28.sram_ctrl_mem_partial_access.1331906125 |
|
|
Feb 25 02:47:53 PM PST 24 |
Feb 25 02:47:58 PM PST 24 |
65950051 ps |
T397 |
/workspace/coverage/default/35.sram_ctrl_smoke.1388965953 |
|
|
Feb 25 02:48:28 PM PST 24 |
Feb 25 02:48:47 PM PST 24 |
80000062 ps |
T398 |
/workspace/coverage/default/49.sram_ctrl_partial_access.1233542762 |
|
|
Feb 25 02:50:37 PM PST 24 |
Feb 25 02:51:06 PM PST 24 |
130190722 ps |
T399 |
/workspace/coverage/default/7.sram_ctrl_stress_pipeline.1131867388 |
|
|
Feb 25 02:46:02 PM PST 24 |
Feb 25 02:49:39 PM PST 24 |
35687159888 ps |
T400 |
/workspace/coverage/default/36.sram_ctrl_throughput_w_partial_write.1332124886 |
|
|
Feb 25 02:48:36 PM PST 24 |
Feb 25 02:50:29 PM PST 24 |
150033356 ps |
T401 |
/workspace/coverage/default/36.sram_ctrl_executable.3532100189 |
|
|
Feb 25 02:48:45 PM PST 24 |
Feb 25 02:55:53 PM PST 24 |
26307103208 ps |
T402 |
/workspace/coverage/default/20.sram_ctrl_partial_access_b2b.144483771 |
|
|
Feb 25 02:46:53 PM PST 24 |
Feb 25 02:51:31 PM PST 24 |
30343274303 ps |
T403 |
/workspace/coverage/default/38.sram_ctrl_multiple_keys.2654157520 |
|
|
Feb 25 02:49:11 PM PST 24 |
Feb 25 03:02:58 PM PST 24 |
1836847100 ps |
T404 |
/workspace/coverage/default/28.sram_ctrl_bijection.1824187319 |
|
|
Feb 25 02:47:40 PM PST 24 |
Feb 25 02:48:50 PM PST 24 |
4767473351 ps |
T405 |
/workspace/coverage/default/45.sram_ctrl_ram_cfg.3205923190 |
|
|
Feb 25 02:49:51 PM PST 24 |
Feb 25 02:49:52 PM PST 24 |
60920165 ps |
T406 |
/workspace/coverage/default/11.sram_ctrl_access_during_key_req.1796179717 |
|
|
Feb 25 02:46:16 PM PST 24 |
Feb 25 03:09:09 PM PST 24 |
3170144452 ps |
T407 |
/workspace/coverage/default/35.sram_ctrl_mem_walk.3258201906 |
|
|
Feb 25 02:48:34 PM PST 24 |
Feb 25 02:48:40 PM PST 24 |
684122523 ps |
T408 |
/workspace/coverage/default/26.sram_ctrl_stress_pipeline.1116930047 |
|
|
Feb 25 02:47:29 PM PST 24 |
Feb 25 02:52:09 PM PST 24 |
3021134060 ps |
T83 |
/workspace/coverage/default/35.sram_ctrl_mem_partial_access.173388642 |
|
|
Feb 25 02:48:38 PM PST 24 |
Feb 25 02:48:41 PM PST 24 |
89359668 ps |
T409 |
/workspace/coverage/default/24.sram_ctrl_executable.2122421372 |
|
|
Feb 25 02:47:16 PM PST 24 |
Feb 25 03:15:39 PM PST 24 |
55619723763 ps |
T410 |
/workspace/coverage/default/38.sram_ctrl_mem_walk.1031954228 |
|
|
Feb 25 02:48:55 PM PST 24 |
Feb 25 02:48:59 PM PST 24 |
81144380 ps |
T411 |
/workspace/coverage/default/25.sram_ctrl_alert_test.2947902804 |
|
|
Feb 25 02:47:27 PM PST 24 |
Feb 25 02:47:27 PM PST 24 |
23053546 ps |
T412 |
/workspace/coverage/default/43.sram_ctrl_max_throughput.3409090961 |
|
|
Feb 25 02:49:30 PM PST 24 |
Feb 25 02:49:46 PM PST 24 |
69565415 ps |
T413 |
/workspace/coverage/default/7.sram_ctrl_bijection.4178554086 |
|
|
Feb 25 02:46:00 PM PST 24 |
Feb 25 02:46:17 PM PST 24 |
1565281540 ps |
T414 |
/workspace/coverage/default/39.sram_ctrl_throughput_w_partial_write.2676200392 |
|
|
Feb 25 02:49:03 PM PST 24 |
Feb 25 02:51:21 PM PST 24 |
910659740 ps |
T415 |
/workspace/coverage/default/26.sram_ctrl_partial_access.656345532 |
|
|
Feb 25 02:47:31 PM PST 24 |
Feb 25 02:47:38 PM PST 24 |
375324184 ps |
T416 |
/workspace/coverage/default/28.sram_ctrl_lc_escalation.4127769044 |
|
|
Feb 25 02:48:03 PM PST 24 |
Feb 25 02:48:15 PM PST 24 |
975512584 ps |
T417 |
/workspace/coverage/default/3.sram_ctrl_max_throughput.261941808 |
|
|
Feb 25 02:45:52 PM PST 24 |
Feb 25 02:46:34 PM PST 24 |
178001496 ps |
T418 |
/workspace/coverage/default/45.sram_ctrl_lc_escalation.92287453 |
|
|
Feb 25 02:49:50 PM PST 24 |
Feb 25 02:50:11 PM PST 24 |
2602226757 ps |
T419 |
/workspace/coverage/default/10.sram_ctrl_alert_test.18110711 |
|
|
Feb 25 02:46:08 PM PST 24 |
Feb 25 02:46:09 PM PST 24 |
18564784 ps |
T420 |
/workspace/coverage/default/6.sram_ctrl_mem_partial_access.3202819646 |
|
|
Feb 25 02:46:08 PM PST 24 |
Feb 25 02:46:14 PM PST 24 |
168322626 ps |
T421 |
/workspace/coverage/default/16.sram_ctrl_throughput_w_partial_write.1747645390 |
|
|
Feb 25 02:46:33 PM PST 24 |
Feb 25 02:48:21 PM PST 24 |
801801756 ps |
T422 |
/workspace/coverage/default/22.sram_ctrl_smoke.3031974435 |
|
|
Feb 25 02:47:10 PM PST 24 |
Feb 25 02:47:16 PM PST 24 |
43768881 ps |
T423 |
/workspace/coverage/default/18.sram_ctrl_regwen.3143994451 |
|
|
Feb 25 02:46:45 PM PST 24 |
Feb 25 02:57:29 PM PST 24 |
53018123341 ps |
T424 |
/workspace/coverage/default/32.sram_ctrl_smoke.1904173633 |
|
|
Feb 25 02:48:13 PM PST 24 |
Feb 25 02:48:24 PM PST 24 |
163491348 ps |
T22 |
/workspace/coverage/default/3.sram_ctrl_sec_cm.2202992759 |
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|
Feb 25 02:45:54 PM PST 24 |
Feb 25 02:45:56 PM PST 24 |
197516050 ps |
T425 |
/workspace/coverage/default/44.sram_ctrl_stress_pipeline.1716131626 |
|
|
Feb 25 02:49:38 PM PST 24 |
Feb 25 02:52:29 PM PST 24 |
29429538319 ps |
T426 |
/workspace/coverage/default/9.sram_ctrl_alert_test.1204418360 |
|
|
Feb 25 02:46:07 PM PST 24 |
Feb 25 02:46:08 PM PST 24 |
53209310 ps |
T427 |
/workspace/coverage/default/25.sram_ctrl_regwen.3277167540 |
|
|
Feb 25 02:47:26 PM PST 24 |
Feb 25 02:57:18 PM PST 24 |
12268207259 ps |
T428 |
/workspace/coverage/default/22.sram_ctrl_access_during_key_req.2146056620 |
|
|
Feb 25 02:47:15 PM PST 24 |
Feb 25 03:02:54 PM PST 24 |
8773891198 ps |
T429 |
/workspace/coverage/default/11.sram_ctrl_mem_walk.3742751611 |
|
|
Feb 25 02:46:18 PM PST 24 |
Feb 25 02:46:27 PM PST 24 |
223625510 ps |
T430 |
/workspace/coverage/default/37.sram_ctrl_partial_access_b2b.3270750253 |
|
|
Feb 25 02:48:48 PM PST 24 |
Feb 25 02:53:08 PM PST 24 |
3510565557 ps |
T431 |
/workspace/coverage/default/38.sram_ctrl_mem_partial_access.758615294 |
|
|
Feb 25 02:48:54 PM PST 24 |
Feb 25 02:48:57 PM PST 24 |
381263308 ps |
T432 |
/workspace/coverage/default/47.sram_ctrl_smoke.332097416 |
|
|
Feb 25 02:50:13 PM PST 24 |
Feb 25 02:51:26 PM PST 24 |
218837621 ps |
T433 |
/workspace/coverage/default/8.sram_ctrl_regwen.3512697604 |
|
|
Feb 25 02:46:19 PM PST 24 |
Feb 25 03:11:52 PM PST 24 |
18156330998 ps |
T434 |
/workspace/coverage/default/46.sram_ctrl_executable.24609328 |
|
|
Feb 25 02:50:02 PM PST 24 |
Feb 25 02:59:20 PM PST 24 |
16135220873 ps |
T435 |
/workspace/coverage/default/14.sram_ctrl_access_during_key_req.1358373865 |
|
|
Feb 25 02:46:25 PM PST 24 |
Feb 25 02:57:24 PM PST 24 |
1988363644 ps |
T436 |
/workspace/coverage/default/40.sram_ctrl_alert_test.3315433418 |
|
|
Feb 25 02:49:23 PM PST 24 |
Feb 25 02:49:24 PM PST 24 |
11155730 ps |
T437 |
/workspace/coverage/default/10.sram_ctrl_lc_escalation.3248595036 |
|
|
Feb 25 02:46:11 PM PST 24 |
Feb 25 02:46:18 PM PST 24 |
1101211883 ps |
T438 |
/workspace/coverage/default/47.sram_ctrl_regwen.554616860 |
|
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Feb 25 02:50:18 PM PST 24 |
Feb 25 03:05:25 PM PST 24 |
16022163781 ps |
T439 |
/workspace/coverage/default/37.sram_ctrl_regwen.110697694 |
|
|
Feb 25 02:48:46 PM PST 24 |
Feb 25 03:24:33 PM PST 24 |
9327764985 ps |
T440 |
/workspace/coverage/default/11.sram_ctrl_partial_access_b2b.178369359 |
|
|
Feb 25 02:46:19 PM PST 24 |
Feb 25 02:53:43 PM PST 24 |
44279319820 ps |
T441 |
/workspace/coverage/default/45.sram_ctrl_partial_access_b2b.2910922063 |
|
|
Feb 25 02:49:54 PM PST 24 |
Feb 25 02:54:33 PM PST 24 |
15255870989 ps |
T442 |
/workspace/coverage/default/32.sram_ctrl_stress_pipeline.1623030289 |
|
|
Feb 25 02:48:18 PM PST 24 |
Feb 25 02:53:34 PM PST 24 |
3386857355 ps |
T443 |
/workspace/coverage/default/35.sram_ctrl_executable.1689636121 |
|
|
Feb 25 02:48:28 PM PST 24 |
Feb 25 03:00:52 PM PST 24 |
90398183536 ps |
T444 |
/workspace/coverage/default/19.sram_ctrl_alert_test.1178808705 |
|
|
Feb 25 02:46:56 PM PST 24 |
Feb 25 02:46:57 PM PST 24 |
13984539 ps |
T445 |
/workspace/coverage/default/22.sram_ctrl_bijection.3682454312 |
|
|
Feb 25 02:47:10 PM PST 24 |
Feb 25 02:47:25 PM PST 24 |
240036528 ps |
T446 |
/workspace/coverage/default/2.sram_ctrl_access_during_key_req.2010485668 |
|
|
Feb 25 02:45:56 PM PST 24 |
Feb 25 02:47:41 PM PST 24 |
1352179156 ps |
T447 |
/workspace/coverage/default/8.sram_ctrl_multiple_keys.2306753198 |
|
|
Feb 25 02:46:00 PM PST 24 |
Feb 25 03:09:14 PM PST 24 |
28036877150 ps |
T448 |
/workspace/coverage/default/29.sram_ctrl_executable.1527307577 |
|
|
Feb 25 02:48:02 PM PST 24 |
Feb 25 02:59:27 PM PST 24 |
2127887157 ps |
T449 |
/workspace/coverage/default/41.sram_ctrl_ram_cfg.1199182692 |
|
|
Feb 25 02:49:13 PM PST 24 |
Feb 25 02:49:14 PM PST 24 |
46647237 ps |
T450 |
/workspace/coverage/default/32.sram_ctrl_throughput_w_partial_write.2013108887 |
|
|
Feb 25 02:48:11 PM PST 24 |
Feb 25 02:50:00 PM PST 24 |
158792278 ps |
T451 |
/workspace/coverage/default/14.sram_ctrl_stress_pipeline.2816113848 |
|
|
Feb 25 02:46:31 PM PST 24 |
Feb 25 02:49:39 PM PST 24 |
2028319162 ps |
T452 |
/workspace/coverage/default/9.sram_ctrl_max_throughput.3097619441 |
|
|
Feb 25 02:46:14 PM PST 24 |
Feb 25 02:47:14 PM PST 24 |
411420430 ps |
T453 |
/workspace/coverage/default/9.sram_ctrl_lc_escalation.163385004 |
|
|
Feb 25 02:46:18 PM PST 24 |
Feb 25 02:46:26 PM PST 24 |
826944048 ps |
T454 |
/workspace/coverage/default/30.sram_ctrl_mem_partial_access.2942875530 |
|
|
Feb 25 02:48:06 PM PST 24 |
Feb 25 02:48:09 PM PST 24 |
90621361 ps |
T455 |
/workspace/coverage/default/32.sram_ctrl_lc_escalation.2441244393 |
|
|
Feb 25 02:48:18 PM PST 24 |
Feb 25 02:48:27 PM PST 24 |
512802898 ps |
T456 |
/workspace/coverage/default/39.sram_ctrl_ram_cfg.4197275136 |
|
|
Feb 25 02:49:06 PM PST 24 |
Feb 25 02:49:07 PM PST 24 |
75224273 ps |
T457 |
/workspace/coverage/default/26.sram_ctrl_multiple_keys.4078877760 |
|
|
Feb 25 02:47:29 PM PST 24 |
Feb 25 03:08:16 PM PST 24 |
10519188942 ps |
T458 |
/workspace/coverage/default/0.sram_ctrl_max_throughput.2774461136 |
|
|
Feb 25 02:45:30 PM PST 24 |
Feb 25 02:45:43 PM PST 24 |
407970798 ps |
T459 |
/workspace/coverage/default/41.sram_ctrl_mem_partial_access.1983230599 |
|
|
Feb 25 02:49:23 PM PST 24 |
Feb 25 02:49:29 PM PST 24 |
587067942 ps |
T460 |
/workspace/coverage/default/34.sram_ctrl_regwen.1110992123 |
|
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Feb 25 02:48:23 PM PST 24 |
Feb 25 02:55:34 PM PST 24 |
11444632960 ps |
T461 |
/workspace/coverage/default/12.sram_ctrl_alert_test.3547049322 |
|
|
Feb 25 02:46:13 PM PST 24 |
Feb 25 02:46:14 PM PST 24 |
16710141 ps |
T462 |
/workspace/coverage/default/22.sram_ctrl_regwen.1362775000 |
|
|
Feb 25 02:47:15 PM PST 24 |
Feb 25 02:53:07 PM PST 24 |
2028170343 ps |
T463 |
/workspace/coverage/default/2.sram_ctrl_max_throughput.4049704124 |
|
|
Feb 25 02:45:48 PM PST 24 |
Feb 25 02:45:53 PM PST 24 |
161412477 ps |
T464 |
/workspace/coverage/default/32.sram_ctrl_access_during_key_req.2272202034 |
|
|
Feb 25 02:48:12 PM PST 24 |
Feb 25 02:57:02 PM PST 24 |
9283463568 ps |
T465 |
/workspace/coverage/default/27.sram_ctrl_max_throughput.956302015 |
|
|
Feb 25 02:47:34 PM PST 24 |
Feb 25 02:47:49 PM PST 24 |
247295716 ps |
T466 |
/workspace/coverage/default/39.sram_ctrl_smoke.569411550 |
|
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Feb 25 02:49:11 PM PST 24 |
Feb 25 02:50:46 PM PST 24 |
130288704 ps |
T467 |
/workspace/coverage/default/44.sram_ctrl_mem_walk.2414401308 |
|
|
Feb 25 02:49:40 PM PST 24 |
Feb 25 02:49:48 PM PST 24 |
1576065598 ps |
T468 |
/workspace/coverage/default/30.sram_ctrl_alert_test.4035060035 |
|
|
Feb 25 02:48:04 PM PST 24 |
Feb 25 02:48:05 PM PST 24 |
25372480 ps |
T469 |
/workspace/coverage/default/46.sram_ctrl_access_during_key_req.3262174853 |
|
|
Feb 25 02:50:01 PM PST 24 |
Feb 25 03:26:51 PM PST 24 |
67034138609 ps |
T470 |
/workspace/coverage/default/36.sram_ctrl_access_during_key_req.709144915 |
|
|
Feb 25 02:48:34 PM PST 24 |
Feb 25 03:02:28 PM PST 24 |
13550494874 ps |
T471 |
/workspace/coverage/default/31.sram_ctrl_multiple_keys.3284222748 |
|
|
Feb 25 02:48:00 PM PST 24 |
Feb 25 03:15:25 PM PST 24 |
17757966472 ps |
T472 |
/workspace/coverage/default/30.sram_ctrl_smoke.1536459394 |
|
|
Feb 25 02:48:05 PM PST 24 |
Feb 25 02:48:07 PM PST 24 |
107755768 ps |
T473 |
/workspace/coverage/default/11.sram_ctrl_smoke.2936671799 |
|
|
Feb 25 02:46:09 PM PST 24 |
Feb 25 02:46:19 PM PST 24 |
2055902700 ps |
T474 |
/workspace/coverage/default/9.sram_ctrl_access_during_key_req.1378107059 |
|
|
Feb 25 02:46:11 PM PST 24 |
Feb 25 03:00:35 PM PST 24 |
2655822607 ps |
T475 |
/workspace/coverage/default/7.sram_ctrl_mem_partial_access.1015109943 |
|
|
Feb 25 02:46:16 PM PST 24 |
Feb 25 02:46:19 PM PST 24 |
272889800 ps |
T476 |
/workspace/coverage/default/24.sram_ctrl_ram_cfg.2141071589 |
|
|
Feb 25 02:47:26 PM PST 24 |
Feb 25 02:47:28 PM PST 24 |
47659191 ps |
T477 |
/workspace/coverage/default/43.sram_ctrl_partial_access.2829584888 |
|
|
Feb 25 02:49:29 PM PST 24 |
Feb 25 02:49:35 PM PST 24 |
104203587 ps |
T478 |
/workspace/coverage/default/47.sram_ctrl_mem_partial_access.1682925312 |
|
|
Feb 25 02:50:13 PM PST 24 |
Feb 25 02:50:18 PM PST 24 |
68224951 ps |
T479 |
/workspace/coverage/default/47.sram_ctrl_lc_escalation.3988352294 |
|
|
Feb 25 02:50:12 PM PST 24 |
Feb 25 02:50:21 PM PST 24 |
2145177426 ps |
T480 |
/workspace/coverage/default/48.sram_ctrl_partial_access.2044887635 |
|
|
Feb 25 02:50:20 PM PST 24 |
Feb 25 02:52:36 PM PST 24 |
735800556 ps |
T481 |
/workspace/coverage/default/29.sram_ctrl_multiple_keys.4015737973 |
|
|
Feb 25 02:47:55 PM PST 24 |
Feb 25 03:04:24 PM PST 24 |
6837143496 ps |
T482 |
/workspace/coverage/default/24.sram_ctrl_stress_pipeline.3791240146 |
|
|
Feb 25 02:47:12 PM PST 24 |
Feb 25 02:51:42 PM PST 24 |
2836177009 ps |
T483 |
/workspace/coverage/default/47.sram_ctrl_stress_all.1016185297 |
|
|
Feb 25 02:50:19 PM PST 24 |
Feb 25 03:27:10 PM PST 24 |
17537561270 ps |
T484 |
/workspace/coverage/default/15.sram_ctrl_lc_escalation.3182538830 |
|
|
Feb 25 02:46:28 PM PST 24 |
Feb 25 02:46:33 PM PST 24 |
748114491 ps |
T485 |
/workspace/coverage/default/3.sram_ctrl_lc_escalation.182085965 |
|
|
Feb 25 02:45:42 PM PST 24 |
Feb 25 02:45:51 PM PST 24 |
599403272 ps |
T486 |
/workspace/coverage/default/14.sram_ctrl_max_throughput.564377249 |
|
|
Feb 25 02:46:22 PM PST 24 |
Feb 25 02:48:29 PM PST 24 |
582954213 ps |
T487 |
/workspace/coverage/default/45.sram_ctrl_mem_partial_access.3929224652 |
|
|
Feb 25 02:50:00 PM PST 24 |
Feb 25 02:50:06 PM PST 24 |
67263930 ps |
T488 |
/workspace/coverage/default/37.sram_ctrl_mem_walk.3903728088 |
|
|
Feb 25 02:48:50 PM PST 24 |
Feb 25 02:48:55 PM PST 24 |
290633739 ps |
T489 |
/workspace/coverage/default/22.sram_ctrl_mem_walk.3013751851 |
|
|
Feb 25 02:47:15 PM PST 24 |
Feb 25 02:47:23 PM PST 24 |
267619231 ps |
T490 |
/workspace/coverage/default/26.sram_ctrl_smoke.1750905818 |
|
|
Feb 25 02:47:27 PM PST 24 |
Feb 25 02:48:15 PM PST 24 |
416650245 ps |
T491 |
/workspace/coverage/default/44.sram_ctrl_stress_all.1897756946 |
|
|
Feb 25 02:49:38 PM PST 24 |
Feb 25 03:56:29 PM PST 24 |
233395737985 ps |
T492 |
/workspace/coverage/default/43.sram_ctrl_executable.348036530 |
|
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Feb 25 02:49:41 PM PST 24 |
Feb 25 03:01:55 PM PST 24 |
27985684862 ps |
T493 |
/workspace/coverage/default/12.sram_ctrl_multiple_keys.438926406 |
|
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Feb 25 02:46:14 PM PST 24 |
Feb 25 02:53:32 PM PST 24 |
46984626941 ps |
T494 |
/workspace/coverage/default/32.sram_ctrl_ram_cfg.672940138 |
|
|
Feb 25 02:48:12 PM PST 24 |
Feb 25 02:48:14 PM PST 24 |
80134224 ps |
T495 |
/workspace/coverage/default/5.sram_ctrl_smoke.366929740 |
|
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Feb 25 02:45:59 PM PST 24 |
Feb 25 02:46:05 PM PST 24 |
1387842154 ps |
T496 |
/workspace/coverage/default/6.sram_ctrl_ram_cfg.2142579709 |
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|
Feb 25 02:45:58 PM PST 24 |
Feb 25 02:46:00 PM PST 24 |
50830034 ps |
T497 |
/workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.2838757089 |
|
|
Feb 25 02:46:10 PM PST 24 |
Feb 25 02:48:45 PM PST 24 |
292311005 ps |
T498 |
/workspace/coverage/default/22.sram_ctrl_throughput_w_partial_write.1473458504 |
|
|
Feb 25 02:47:16 PM PST 24 |
Feb 25 02:49:23 PM PST 24 |
614616029 ps |
T499 |
/workspace/coverage/default/46.sram_ctrl_lc_escalation.4012656292 |
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|
Feb 25 02:50:00 PM PST 24 |
Feb 25 02:50:13 PM PST 24 |
561162864 ps |
T500 |
/workspace/coverage/default/2.sram_ctrl_stress_all.3588793103 |
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Feb 25 02:45:51 PM PST 24 |
Feb 25 03:31:49 PM PST 24 |
33988628725 ps |
T501 |
/workspace/coverage/default/35.sram_ctrl_stress_all.1687278314 |
|
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Feb 25 02:48:33 PM PST 24 |
Feb 25 04:02:50 PM PST 24 |
175911084226 ps |
T502 |
/workspace/coverage/default/15.sram_ctrl_throughput_w_partial_write.2157429319 |
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Feb 25 02:46:27 PM PST 24 |
Feb 25 02:46:50 PM PST 24 |
354995249 ps |
T503 |
/workspace/coverage/default/37.sram_ctrl_partial_access.170690690 |
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Feb 25 02:48:45 PM PST 24 |
Feb 25 02:50:24 PM PST 24 |
2863889519 ps |
T504 |
/workspace/coverage/default/12.sram_ctrl_bijection.3649830203 |
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Feb 25 02:46:17 PM PST 24 |
Feb 25 02:47:05 PM PST 24 |
2986165286 ps |
T505 |
/workspace/coverage/default/34.sram_ctrl_executable.1482554211 |
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Feb 25 02:48:24 PM PST 24 |
Feb 25 03:04:49 PM PST 24 |
18561758934 ps |
T506 |
/workspace/coverage/default/25.sram_ctrl_mem_partial_access.1609251524 |
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Feb 25 02:47:21 PM PST 24 |
Feb 25 02:47:25 PM PST 24 |
889903970 ps |
T507 |
/workspace/coverage/default/2.sram_ctrl_executable.3547845258 |
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Feb 25 02:45:48 PM PST 24 |
Feb 25 03:06:55 PM PST 24 |
11727938414 ps |
T508 |
/workspace/coverage/default/25.sram_ctrl_stress_pipeline.3932756328 |
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Feb 25 02:47:19 PM PST 24 |
Feb 25 02:52:00 PM PST 24 |
19139708785 ps |
T509 |
/workspace/coverage/default/43.sram_ctrl_throughput_w_partial_write.2444435563 |
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Feb 25 02:49:30 PM PST 24 |
Feb 25 02:49:52 PM PST 24 |
160392570 ps |
T510 |
/workspace/coverage/default/28.sram_ctrl_access_during_key_req.3366181267 |
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Feb 25 02:47:58 PM PST 24 |
Feb 25 02:51:43 PM PST 24 |
5876474688 ps |
T511 |
/workspace/coverage/default/25.sram_ctrl_partial_access_b2b.2957970420 |
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Feb 25 02:47:21 PM PST 24 |
Feb 25 02:52:40 PM PST 24 |
17326884439 ps |
T512 |
/workspace/coverage/default/14.sram_ctrl_mem_walk.4025001404 |
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Feb 25 02:46:23 PM PST 24 |
Feb 25 02:46:34 PM PST 24 |
2402459744 ps |
T513 |
/workspace/coverage/default/24.sram_ctrl_bijection.2502393528 |
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Feb 25 02:47:15 PM PST 24 |
Feb 25 02:48:06 PM PST 24 |
6640666932 ps |
T514 |
/workspace/coverage/default/2.sram_ctrl_partial_access.1952700378 |
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Feb 25 02:45:52 PM PST 24 |
Feb 25 02:47:41 PM PST 24 |
198378745 ps |
T515 |
/workspace/coverage/default/49.sram_ctrl_executable.775186960 |
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Feb 25 02:50:34 PM PST 24 |
Feb 25 02:55:43 PM PST 24 |
15736394305 ps |
T516 |
/workspace/coverage/default/5.sram_ctrl_stress_pipeline.900199831 |
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Feb 25 02:46:01 PM PST 24 |
Feb 25 02:49:58 PM PST 24 |
2608677234 ps |
T517 |
/workspace/coverage/default/41.sram_ctrl_stress_pipeline.3028090449 |
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Feb 25 02:49:22 PM PST 24 |
Feb 25 02:52:32 PM PST 24 |
3793412518 ps |
T518 |
/workspace/coverage/default/36.sram_ctrl_lc_escalation.3912436090 |
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Feb 25 02:48:35 PM PST 24 |
Feb 25 02:48:49 PM PST 24 |
1833804048 ps |
T519 |
/workspace/coverage/default/48.sram_ctrl_mem_partial_access.867713021 |
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Feb 25 02:50:20 PM PST 24 |
Feb 25 02:50:26 PM PST 24 |
1583195783 ps |
T520 |
/workspace/coverage/default/0.sram_ctrl_partial_access_b2b.136782776 |
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Feb 25 02:45:46 PM PST 24 |
Feb 25 02:51:50 PM PST 24 |
54473605074 ps |
T521 |
/workspace/coverage/default/29.sram_ctrl_throughput_w_partial_write.3003191211 |
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Feb 25 02:48:03 PM PST 24 |
Feb 25 02:50:32 PM PST 24 |
252189022 ps |
T522 |
/workspace/coverage/default/10.sram_ctrl_ram_cfg.807517974 |
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Feb 25 02:46:15 PM PST 24 |
Feb 25 02:46:16 PM PST 24 |
38791304 ps |
T523 |
/workspace/coverage/default/40.sram_ctrl_partial_access_b2b.1964142476 |
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Feb 25 02:49:04 PM PST 24 |
Feb 25 02:54:33 PM PST 24 |
25891158463 ps |
T524 |
/workspace/coverage/default/5.sram_ctrl_regwen.2241546872 |
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Feb 25 02:46:03 PM PST 24 |
Feb 25 02:56:05 PM PST 24 |
2316429566 ps |
T525 |
/workspace/coverage/default/21.sram_ctrl_partial_access_b2b.2923433205 |
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Feb 25 02:47:10 PM PST 24 |
Feb 25 02:51:04 PM PST 24 |
12730132709 ps |
T526 |
/workspace/coverage/default/31.sram_ctrl_throughput_w_partial_write.2061476882 |
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Feb 25 02:48:11 PM PST 24 |
Feb 25 02:48:15 PM PST 24 |
175502467 ps |
T527 |
/workspace/coverage/default/26.sram_ctrl_mem_walk.618280464 |
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Feb 25 02:47:32 PM PST 24 |
Feb 25 02:47:41 PM PST 24 |
900583576 ps |
T528 |
/workspace/coverage/default/21.sram_ctrl_mem_partial_access.1140325358 |
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Feb 25 02:47:08 PM PST 24 |
Feb 25 02:47:11 PM PST 24 |
263875497 ps |
T529 |
/workspace/coverage/default/36.sram_ctrl_mem_partial_access.143524209 |
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Feb 25 02:48:46 PM PST 24 |
Feb 25 02:48:51 PM PST 24 |
153052173 ps |
T530 |
/workspace/coverage/default/0.sram_ctrl_alert_test.2888824014 |
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Feb 25 02:45:34 PM PST 24 |
Feb 25 02:45:34 PM PST 24 |
36709791 ps |
T531 |
/workspace/coverage/default/23.sram_ctrl_max_throughput.483525692 |
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Feb 25 02:47:09 PM PST 24 |
Feb 25 02:47:21 PM PST 24 |
125718645 ps |
T532 |
/workspace/coverage/default/42.sram_ctrl_mem_partial_access.3440132001 |
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Feb 25 02:49:29 PM PST 24 |
Feb 25 02:49:32 PM PST 24 |
90239755 ps |
T533 |
/workspace/coverage/default/29.sram_ctrl_bijection.2628547694 |
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Feb 25 02:48:04 PM PST 24 |
Feb 25 02:48:41 PM PST 24 |
2103781074 ps |
T534 |
/workspace/coverage/default/20.sram_ctrl_throughput_w_partial_write.4068187413 |
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Feb 25 02:47:00 PM PST 24 |
Feb 25 02:47:06 PM PST 24 |
57664409 ps |
T535 |
/workspace/coverage/default/11.sram_ctrl_stress_pipeline.583751697 |
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Feb 25 02:46:12 PM PST 24 |
Feb 25 02:49:25 PM PST 24 |
8262491790 ps |
T536 |
/workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.3512411722 |
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Feb 25 02:50:22 PM PST 24 |
Feb 25 02:50:26 PM PST 24 |
54699605 ps |
T537 |
/workspace/coverage/default/46.sram_ctrl_max_throughput.994255082 |
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Feb 25 02:50:04 PM PST 24 |
Feb 25 02:50:08 PM PST 24 |
149124851 ps |
T538 |
/workspace/coverage/default/45.sram_ctrl_alert_test.2431927923 |
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Feb 25 02:50:03 PM PST 24 |
Feb 25 02:50:04 PM PST 24 |
14872635 ps |
T539 |
/workspace/coverage/default/46.sram_ctrl_multiple_keys.1468700633 |
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Feb 25 02:50:03 PM PST 24 |
Feb 25 03:09:24 PM PST 24 |
26223840133 ps |
T540 |
/workspace/coverage/default/34.sram_ctrl_stress_pipeline.842861680 |
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Feb 25 02:48:15 PM PST 24 |
Feb 25 02:51:51 PM PST 24 |
9217248327 ps |
T541 |
/workspace/coverage/default/34.sram_ctrl_partial_access_b2b.590380037 |
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Feb 25 02:48:24 PM PST 24 |
Feb 25 02:52:35 PM PST 24 |
21962514416 ps |
T542 |
/workspace/coverage/default/45.sram_ctrl_partial_access.1097960245 |
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Feb 25 02:49:42 PM PST 24 |
Feb 25 02:49:44 PM PST 24 |
106988828 ps |
T543 |
/workspace/coverage/default/46.sram_ctrl_mem_walk.3012242231 |
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Feb 25 02:50:11 PM PST 24 |
Feb 25 02:50:21 PM PST 24 |
2716274757 ps |
T544 |
/workspace/coverage/default/22.sram_ctrl_executable.3640805285 |
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Feb 25 02:47:13 PM PST 24 |
Feb 25 03:11:50 PM PST 24 |
14740065893 ps |
T545 |
/workspace/coverage/default/37.sram_ctrl_lc_escalation.687186937 |
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Feb 25 02:48:47 PM PST 24 |
Feb 25 02:49:02 PM PST 24 |
503013105 ps |
T546 |
/workspace/coverage/default/42.sram_ctrl_alert_test.3735571589 |
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Feb 25 02:49:28 PM PST 24 |
Feb 25 02:49:29 PM PST 24 |
21790696 ps |
T547 |
/workspace/coverage/default/6.sram_ctrl_max_throughput.2441746069 |
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Feb 25 02:46:05 PM PST 24 |
Feb 25 02:46:08 PM PST 24 |
71632778 ps |
T548 |
/workspace/coverage/default/25.sram_ctrl_access_during_key_req.2346092692 |
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Feb 25 02:47:20 PM PST 24 |
Feb 25 02:57:38 PM PST 24 |
5424033472 ps |
T549 |
/workspace/coverage/default/20.sram_ctrl_lc_escalation.956819794 |
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|
Feb 25 02:47:00 PM PST 24 |
Feb 25 02:47:14 PM PST 24 |
5124572247 ps |
T550 |
/workspace/coverage/default/4.sram_ctrl_mem_partial_access.433197514 |
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|
Feb 25 02:46:08 PM PST 24 |
Feb 25 02:46:11 PM PST 24 |
184081071 ps |
T551 |
/workspace/coverage/default/42.sram_ctrl_regwen.2794970953 |
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Feb 25 02:49:31 PM PST 24 |
Feb 25 03:01:48 PM PST 24 |
19510778110 ps |
T552 |
/workspace/coverage/default/31.sram_ctrl_partial_access_b2b.2835495630 |
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Feb 25 02:48:18 PM PST 24 |
Feb 25 02:54:13 PM PST 24 |
31308684390 ps |
T553 |
/workspace/coverage/default/20.sram_ctrl_mem_partial_access.2593897072 |
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Feb 25 02:47:12 PM PST 24 |
Feb 25 02:47:18 PM PST 24 |
166363955 ps |
T554 |
/workspace/coverage/default/42.sram_ctrl_ram_cfg.3187443526 |
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Feb 25 02:49:30 PM PST 24 |
Feb 25 02:49:32 PM PST 24 |
159412270 ps |