| T554 |
/workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.3041434421 |
|
|
Mar 03 02:28:40 PM PST 24 |
Mar 03 02:29:27 PM PST 24 |
1453890382 ps |
| T555 |
/workspace/coverage/default/7.sram_ctrl_regwen.2033827189 |
|
|
Mar 03 02:28:48 PM PST 24 |
Mar 03 02:48:47 PM PST 24 |
29178978304 ps |
| T556 |
/workspace/coverage/default/3.sram_ctrl_partial_access_b2b.2501173104 |
|
|
Mar 03 02:28:25 PM PST 24 |
Mar 03 02:36:00 PM PST 24 |
12437265454 ps |
| T557 |
/workspace/coverage/default/8.sram_ctrl_stress_all_with_rand_reset.3157352476 |
|
|
Mar 03 02:28:37 PM PST 24 |
Mar 03 02:35:07 PM PST 24 |
2916280670 ps |
| T558 |
/workspace/coverage/default/40.sram_ctrl_multiple_keys.741856261 |
|
|
Mar 03 02:30:25 PM PST 24 |
Mar 03 02:35:13 PM PST 24 |
2638624796 ps |
| T559 |
/workspace/coverage/default/48.sram_ctrl_multiple_keys.1550429127 |
|
|
Mar 03 02:31:04 PM PST 24 |
Mar 03 02:44:25 PM PST 24 |
12180651089 ps |
| T560 |
/workspace/coverage/default/15.sram_ctrl_regwen.3020559494 |
|
|
Mar 03 02:29:09 PM PST 24 |
Mar 03 02:46:24 PM PST 24 |
128876659148 ps |
| T561 |
/workspace/coverage/default/42.sram_ctrl_multiple_keys.3388216571 |
|
|
Mar 03 02:30:39 PM PST 24 |
Mar 03 02:39:21 PM PST 24 |
1961061390 ps |
| T562 |
/workspace/coverage/default/41.sram_ctrl_alert_test.2688433006 |
|
|
Mar 03 02:30:40 PM PST 24 |
Mar 03 02:30:41 PM PST 24 |
19210953 ps |
| T22 |
/workspace/coverage/default/0.sram_ctrl_sec_cm.3587017143 |
|
|
Mar 03 02:28:23 PM PST 24 |
Mar 03 02:28:27 PM PST 24 |
429998002 ps |
| T563 |
/workspace/coverage/default/23.sram_ctrl_mem_partial_access.2108882613 |
|
|
Mar 03 02:29:30 PM PST 24 |
Mar 03 02:29:33 PM PST 24 |
329937471 ps |
| T564 |
/workspace/coverage/default/0.sram_ctrl_regwen.1382468519 |
|
|
Mar 03 02:28:33 PM PST 24 |
Mar 03 02:49:35 PM PST 24 |
21207845905 ps |
| T565 |
/workspace/coverage/default/46.sram_ctrl_ram_cfg.2074344333 |
|
|
Mar 03 02:30:58 PM PST 24 |
Mar 03 02:30:59 PM PST 24 |
98530037 ps |
| T566 |
/workspace/coverage/default/29.sram_ctrl_smoke.344055158 |
|
|
Mar 03 02:29:41 PM PST 24 |
Mar 03 02:30:02 PM PST 24 |
9058796354 ps |
| T567 |
/workspace/coverage/default/47.sram_ctrl_executable.523565132 |
|
|
Mar 03 02:31:04 PM PST 24 |
Mar 03 02:31:35 PM PST 24 |
1173800451 ps |
| T568 |
/workspace/coverage/default/5.sram_ctrl_lc_escalation.3567119769 |
|
|
Mar 03 02:28:40 PM PST 24 |
Mar 03 02:28:47 PM PST 24 |
644964350 ps |
| T569 |
/workspace/coverage/default/0.sram_ctrl_stress_all_with_rand_reset.986445576 |
|
|
Mar 03 02:28:19 PM PST 24 |
Mar 03 02:31:29 PM PST 24 |
2751153336 ps |
| T570 |
/workspace/coverage/default/37.sram_ctrl_stress_all_with_rand_reset.3927048549 |
|
|
Mar 03 02:30:20 PM PST 24 |
Mar 03 02:33:26 PM PST 24 |
6544977467 ps |
| T571 |
/workspace/coverage/default/40.sram_ctrl_regwen.2220308236 |
|
|
Mar 03 02:30:33 PM PST 24 |
Mar 03 02:46:56 PM PST 24 |
77058655997 ps |
| T572 |
/workspace/coverage/default/23.sram_ctrl_stress_all_with_rand_reset.1454685292 |
|
|
Mar 03 02:29:40 PM PST 24 |
Mar 03 02:31:34 PM PST 24 |
1167896574 ps |
| T573 |
/workspace/coverage/default/0.sram_ctrl_smoke.4198208427 |
|
|
Mar 03 02:28:12 PM PST 24 |
Mar 03 02:28:38 PM PST 24 |
1170796840 ps |
| T574 |
/workspace/coverage/default/25.sram_ctrl_ram_cfg.1621826037 |
|
|
Mar 03 02:29:30 PM PST 24 |
Mar 03 02:29:31 PM PST 24 |
27922932 ps |
| T575 |
/workspace/coverage/default/3.sram_ctrl_mem_walk.1907127297 |
|
|
Mar 03 02:28:27 PM PST 24 |
Mar 03 02:28:35 PM PST 24 |
144036070 ps |
| T576 |
/workspace/coverage/default/47.sram_ctrl_stress_all.2168623415 |
|
|
Mar 03 02:31:04 PM PST 24 |
Mar 03 03:23:40 PM PST 24 |
27490611513 ps |
| T577 |
/workspace/coverage/default/29.sram_ctrl_multiple_keys.4047022787 |
|
|
Mar 03 02:29:44 PM PST 24 |
Mar 03 02:59:53 PM PST 24 |
139434681298 ps |
| T578 |
/workspace/coverage/default/7.sram_ctrl_executable.1154288713 |
|
|
Mar 03 02:28:46 PM PST 24 |
Mar 03 02:36:33 PM PST 24 |
12304611517 ps |
| T33 |
/workspace/coverage/default/2.sram_ctrl_sec_cm.2800406951 |
|
|
Mar 03 02:28:27 PM PST 24 |
Mar 03 02:28:30 PM PST 24 |
914540420 ps |
| T579 |
/workspace/coverage/default/47.sram_ctrl_partial_access_b2b.350411415 |
|
|
Mar 03 02:31:04 PM PST 24 |
Mar 03 02:34:57 PM PST 24 |
15660167735 ps |
| T580 |
/workspace/coverage/default/39.sram_ctrl_executable.2323222395 |
|
|
Mar 03 02:30:29 PM PST 24 |
Mar 03 02:37:15 PM PST 24 |
38753927887 ps |
| T115 |
/workspace/coverage/default/30.sram_ctrl_stress_all_with_rand_reset.936474277 |
|
|
Mar 03 02:29:52 PM PST 24 |
Mar 03 02:31:52 PM PST 24 |
6280827867 ps |
| T581 |
/workspace/coverage/default/32.sram_ctrl_smoke.173128379 |
|
|
Mar 03 02:29:59 PM PST 24 |
Mar 03 02:30:00 PM PST 24 |
182893114 ps |
| T582 |
/workspace/coverage/default/15.sram_ctrl_partial_access_b2b.162327185 |
|
|
Mar 03 02:28:59 PM PST 24 |
Mar 03 02:34:23 PM PST 24 |
51178467482 ps |
| T583 |
/workspace/coverage/default/20.sram_ctrl_regwen.3850333045 |
|
|
Mar 03 02:29:17 PM PST 24 |
Mar 03 02:49:37 PM PST 24 |
10535912544 ps |
| T584 |
/workspace/coverage/default/33.sram_ctrl_executable.3127969839 |
|
|
Mar 03 02:30:02 PM PST 24 |
Mar 03 02:32:25 PM PST 24 |
2033716950 ps |
| T585 |
/workspace/coverage/default/32.sram_ctrl_regwen.1834018420 |
|
|
Mar 03 02:29:56 PM PST 24 |
Mar 03 02:41:58 PM PST 24 |
13669821421 ps |
| T586 |
/workspace/coverage/default/9.sram_ctrl_bijection.3563767430 |
|
|
Mar 03 02:28:51 PM PST 24 |
Mar 03 02:29:11 PM PST 24 |
319215262 ps |
| T587 |
/workspace/coverage/default/26.sram_ctrl_ram_cfg.1242757476 |
|
|
Mar 03 02:29:36 PM PST 24 |
Mar 03 02:29:38 PM PST 24 |
79814961 ps |
| T588 |
/workspace/coverage/default/30.sram_ctrl_mem_partial_access.1089494812 |
|
|
Mar 03 02:29:56 PM PST 24 |
Mar 03 02:30:02 PM PST 24 |
501513584 ps |
| T589 |
/workspace/coverage/default/8.sram_ctrl_partial_access.604411144 |
|
|
Mar 03 02:28:42 PM PST 24 |
Mar 03 02:29:31 PM PST 24 |
142915608 ps |
| T590 |
/workspace/coverage/default/5.sram_ctrl_executable.4099096253 |
|
|
Mar 03 02:28:44 PM PST 24 |
Mar 03 02:46:46 PM PST 24 |
8029021259 ps |
| T591 |
/workspace/coverage/default/22.sram_ctrl_regwen.307448621 |
|
|
Mar 03 02:29:26 PM PST 24 |
Mar 03 02:33:59 PM PST 24 |
3555404040 ps |
| T592 |
/workspace/coverage/default/49.sram_ctrl_mem_walk.2761467239 |
|
|
Mar 03 02:31:16 PM PST 24 |
Mar 03 02:31:26 PM PST 24 |
654657547 ps |
| T593 |
/workspace/coverage/default/0.sram_ctrl_multiple_keys.194200193 |
|
|
Mar 03 02:28:14 PM PST 24 |
Mar 03 02:47:30 PM PST 24 |
22481457550 ps |
| T594 |
/workspace/coverage/default/27.sram_ctrl_smoke.92942638 |
|
|
Mar 03 02:29:35 PM PST 24 |
Mar 03 02:29:45 PM PST 24 |
5617370800 ps |
| T595 |
/workspace/coverage/default/42.sram_ctrl_ram_cfg.2271958968 |
|
|
Mar 03 02:30:39 PM PST 24 |
Mar 03 02:30:40 PM PST 24 |
89187396 ps |
| T596 |
/workspace/coverage/default/25.sram_ctrl_mem_partial_access.3789736494 |
|
|
Mar 03 02:29:35 PM PST 24 |
Mar 03 02:29:40 PM PST 24 |
156467948 ps |
| T597 |
/workspace/coverage/default/18.sram_ctrl_smoke.2005886171 |
|
|
Mar 03 02:29:19 PM PST 24 |
Mar 03 02:29:33 PM PST 24 |
1805265697 ps |
| T598 |
/workspace/coverage/default/17.sram_ctrl_partial_access.1019947005 |
|
|
Mar 03 02:29:09 PM PST 24 |
Mar 03 02:29:22 PM PST 24 |
2913929957 ps |
| T34 |
/workspace/coverage/default/1.sram_ctrl_sec_cm.4072710056 |
|
|
Mar 03 02:28:26 PM PST 24 |
Mar 03 02:28:29 PM PST 24 |
273134162 ps |
| T599 |
/workspace/coverage/default/30.sram_ctrl_ram_cfg.3700495933 |
|
|
Mar 03 02:29:46 PM PST 24 |
Mar 03 02:29:47 PM PST 24 |
87106266 ps |
| T600 |
/workspace/coverage/default/47.sram_ctrl_alert_test.3798990944 |
|
|
Mar 03 02:31:03 PM PST 24 |
Mar 03 02:31:04 PM PST 24 |
21128955 ps |
| T601 |
/workspace/coverage/default/34.sram_ctrl_mem_walk.3462339767 |
|
|
Mar 03 02:30:01 PM PST 24 |
Mar 03 02:30:06 PM PST 24 |
281999289 ps |
| T602 |
/workspace/coverage/default/23.sram_ctrl_bijection.2923323294 |
|
|
Mar 03 02:29:25 PM PST 24 |
Mar 03 02:30:16 PM PST 24 |
3406255904 ps |
| T603 |
/workspace/coverage/default/49.sram_ctrl_regwen.3930978673 |
|
|
Mar 03 02:31:16 PM PST 24 |
Mar 03 02:44:37 PM PST 24 |
6662670149 ps |
| T604 |
/workspace/coverage/default/26.sram_ctrl_multiple_keys.2377968400 |
|
|
Mar 03 02:29:42 PM PST 24 |
Mar 03 03:01:53 PM PST 24 |
68752214111 ps |
| T605 |
/workspace/coverage/default/37.sram_ctrl_alert_test.52210326 |
|
|
Mar 03 02:30:21 PM PST 24 |
Mar 03 02:30:21 PM PST 24 |
18398593 ps |
| T606 |
/workspace/coverage/default/44.sram_ctrl_partial_access_b2b.1247972146 |
|
|
Mar 03 02:30:53 PM PST 24 |
Mar 03 02:33:26 PM PST 24 |
2244436227 ps |
| T607 |
/workspace/coverage/default/23.sram_ctrl_regwen.3506051175 |
|
|
Mar 03 02:29:34 PM PST 24 |
Mar 03 02:51:36 PM PST 24 |
20691144743 ps |
| T608 |
/workspace/coverage/default/8.sram_ctrl_stress_all.1166877689 |
|
|
Mar 03 02:28:44 PM PST 24 |
Mar 03 03:11:36 PM PST 24 |
36555115271 ps |
| T609 |
/workspace/coverage/default/38.sram_ctrl_partial_access_b2b.2686380370 |
|
|
Mar 03 02:30:21 PM PST 24 |
Mar 03 02:38:50 PM PST 24 |
20100789252 ps |
| T610 |
/workspace/coverage/default/15.sram_ctrl_alert_test.1510656367 |
|
|
Mar 03 02:29:09 PM PST 24 |
Mar 03 02:29:10 PM PST 24 |
14072403 ps |
| T611 |
/workspace/coverage/default/14.sram_ctrl_stress_pipeline.3816978009 |
|
|
Mar 03 02:29:04 PM PST 24 |
Mar 03 02:34:44 PM PST 24 |
27101174402 ps |
| T612 |
/workspace/coverage/default/47.sram_ctrl_mem_walk.3313159281 |
|
|
Mar 03 02:31:05 PM PST 24 |
Mar 03 02:31:10 PM PST 24 |
79496734 ps |
| T613 |
/workspace/coverage/default/14.sram_ctrl_regwen.4104513578 |
|
|
Mar 03 02:28:58 PM PST 24 |
Mar 03 02:29:11 PM PST 24 |
843243521 ps |
| T614 |
/workspace/coverage/default/32.sram_ctrl_mem_partial_access.2944691038 |
|
|
Mar 03 02:29:59 PM PST 24 |
Mar 03 02:30:04 PM PST 24 |
299459184 ps |
| T615 |
/workspace/coverage/default/36.sram_ctrl_alert_test.3441965023 |
|
|
Mar 03 02:30:15 PM PST 24 |
Mar 03 02:30:17 PM PST 24 |
14126032 ps |
| T616 |
/workspace/coverage/default/36.sram_ctrl_regwen.364812695 |
|
|
Mar 03 02:30:20 PM PST 24 |
Mar 03 02:37:02 PM PST 24 |
3928017397 ps |
| T617 |
/workspace/coverage/default/17.sram_ctrl_stress_all.3011180605 |
|
|
Mar 03 02:29:11 PM PST 24 |
Mar 03 02:47:41 PM PST 24 |
15814429516 ps |
| T618 |
/workspace/coverage/default/40.sram_ctrl_executable.2227592914 |
|
|
Mar 03 02:30:33 PM PST 24 |
Mar 03 02:34:28 PM PST 24 |
6759304909 ps |
| T619 |
/workspace/coverage/default/37.sram_ctrl_smoke.3333281559 |
|
|
Mar 03 02:30:15 PM PST 24 |
Mar 03 02:30:27 PM PST 24 |
616169515 ps |
| T620 |
/workspace/coverage/default/40.sram_ctrl_partial_access.2983267082 |
|
|
Mar 03 02:30:29 PM PST 24 |
Mar 03 02:32:36 PM PST 24 |
2570312619 ps |
| T621 |
/workspace/coverage/default/34.sram_ctrl_stress_pipeline.667206123 |
|
|
Mar 03 02:30:01 PM PST 24 |
Mar 03 02:32:43 PM PST 24 |
14120186118 ps |
| T622 |
/workspace/coverage/default/43.sram_ctrl_stress_all.912943018 |
|
|
Mar 03 02:30:46 PM PST 24 |
Mar 03 03:39:07 PM PST 24 |
194410684020 ps |
| T623 |
/workspace/coverage/default/20.sram_ctrl_stress_pipeline.1355174287 |
|
|
Mar 03 02:29:31 PM PST 24 |
Mar 03 02:31:40 PM PST 24 |
5538287434 ps |
| T624 |
/workspace/coverage/default/49.sram_ctrl_smoke.1458664083 |
|
|
Mar 03 02:31:09 PM PST 24 |
Mar 03 02:31:15 PM PST 24 |
84368025 ps |
| T625 |
/workspace/coverage/default/27.sram_ctrl_lc_escalation.3366635622 |
|
|
Mar 03 02:29:37 PM PST 24 |
Mar 03 02:29:42 PM PST 24 |
832216643 ps |
| T626 |
/workspace/coverage/default/21.sram_ctrl_alert_test.313175584 |
|
|
Mar 03 02:29:24 PM PST 24 |
Mar 03 02:29:24 PM PST 24 |
37435801 ps |
| T627 |
/workspace/coverage/default/11.sram_ctrl_stress_pipeline.1911700421 |
|
|
Mar 03 02:28:51 PM PST 24 |
Mar 03 02:31:38 PM PST 24 |
7031462333 ps |
| T628 |
/workspace/coverage/default/15.sram_ctrl_mem_walk.2170915669 |
|
|
Mar 03 02:29:09 PM PST 24 |
Mar 03 02:29:15 PM PST 24 |
1375833725 ps |
| T629 |
/workspace/coverage/default/6.sram_ctrl_alert_test.1213017449 |
|
|
Mar 03 02:28:38 PM PST 24 |
Mar 03 02:28:39 PM PST 24 |
16702007 ps |
| T630 |
/workspace/coverage/default/48.sram_ctrl_ram_cfg.2970587738 |
|
|
Mar 03 02:31:09 PM PST 24 |
Mar 03 02:31:11 PM PST 24 |
28832094 ps |
| T631 |
/workspace/coverage/default/48.sram_ctrl_regwen.2876093858 |
|
|
Mar 03 02:31:11 PM PST 24 |
Mar 03 02:50:46 PM PST 24 |
12252314947 ps |
| T632 |
/workspace/coverage/default/13.sram_ctrl_ram_cfg.3584425040 |
|
|
Mar 03 02:29:04 PM PST 24 |
Mar 03 02:29:05 PM PST 24 |
144107668 ps |
| T633 |
/workspace/coverage/default/12.sram_ctrl_stress_all_with_rand_reset.3950351996 |
|
|
Mar 03 02:28:59 PM PST 24 |
Mar 03 02:35:08 PM PST 24 |
1196740074 ps |
| T634 |
/workspace/coverage/default/17.sram_ctrl_ram_cfg.980644129 |
|
|
Mar 03 02:29:15 PM PST 24 |
Mar 03 02:29:16 PM PST 24 |
71985641 ps |
| T635 |
/workspace/coverage/default/29.sram_ctrl_mem_partial_access.3488559894 |
|
|
Mar 03 02:29:50 PM PST 24 |
Mar 03 02:29:53 PM PST 24 |
92885307 ps |
| T636 |
/workspace/coverage/default/45.sram_ctrl_partial_access.3863222875 |
|
|
Mar 03 02:30:53 PM PST 24 |
Mar 03 02:33:40 PM PST 24 |
1211137223 ps |
| T637 |
/workspace/coverage/default/7.sram_ctrl_smoke.3481014807 |
|
|
Mar 03 02:28:43 PM PST 24 |
Mar 03 02:28:56 PM PST 24 |
739829193 ps |
| T638 |
/workspace/coverage/default/2.sram_ctrl_bijection.4223785087 |
|
|
Mar 03 02:28:25 PM PST 24 |
Mar 03 02:28:50 PM PST 24 |
4910083003 ps |
| T639 |
/workspace/coverage/default/4.sram_ctrl_partial_access_b2b.3057167497 |
|
|
Mar 03 02:28:42 PM PST 24 |
Mar 03 02:35:51 PM PST 24 |
19307904969 ps |
| T640 |
/workspace/coverage/default/47.sram_ctrl_regwen.219964629 |
|
|
Mar 03 02:31:05 PM PST 24 |
Mar 03 02:35:14 PM PST 24 |
9442187959 ps |
| T641 |
/workspace/coverage/default/11.sram_ctrl_stress_all_with_rand_reset.3785316699 |
|
|
Mar 03 02:28:54 PM PST 24 |
Mar 03 02:29:12 PM PST 24 |
201386531 ps |
| T642 |
/workspace/coverage/default/44.sram_ctrl_stress_all.1376820005 |
|
|
Mar 03 02:30:53 PM PST 24 |
Mar 03 03:09:18 PM PST 24 |
119869139116 ps |
| T643 |
/workspace/coverage/default/11.sram_ctrl_ram_cfg.1475757417 |
|
|
Mar 03 02:28:50 PM PST 24 |
Mar 03 02:28:51 PM PST 24 |
46508643 ps |
| T644 |
/workspace/coverage/default/19.sram_ctrl_mem_partial_access.3507952304 |
|
|
Mar 03 02:29:18 PM PST 24 |
Mar 03 02:29:23 PM PST 24 |
118281672 ps |
| T645 |
/workspace/coverage/default/30.sram_ctrl_executable.888548767 |
|
|
Mar 03 02:29:45 PM PST 24 |
Mar 03 02:35:36 PM PST 24 |
11483975413 ps |
| T646 |
/workspace/coverage/default/45.sram_ctrl_regwen.1780377854 |
|
|
Mar 03 02:30:53 PM PST 24 |
Mar 03 02:49:37 PM PST 24 |
50512991317 ps |
| T647 |
/workspace/coverage/default/33.sram_ctrl_multiple_keys.1777113607 |
|
|
Mar 03 02:29:56 PM PST 24 |
Mar 03 02:50:42 PM PST 24 |
3100492836 ps |
| T648 |
/workspace/coverage/default/7.sram_ctrl_stress_pipeline.723392123 |
|
|
Mar 03 02:28:38 PM PST 24 |
Mar 03 02:34:00 PM PST 24 |
13865702005 ps |
| T649 |
/workspace/coverage/default/8.sram_ctrl_mem_walk.2493517852 |
|
|
Mar 03 02:28:49 PM PST 24 |
Mar 03 02:28:55 PM PST 24 |
338737486 ps |
| T650 |
/workspace/coverage/default/39.sram_ctrl_ram_cfg.1180903105 |
|
|
Mar 03 02:30:29 PM PST 24 |
Mar 03 02:30:30 PM PST 24 |
63897194 ps |
| T651 |
/workspace/coverage/default/44.sram_ctrl_smoke.3412807564 |
|
|
Mar 03 02:30:48 PM PST 24 |
Mar 03 02:32:56 PM PST 24 |
1218690958 ps |
| T652 |
/workspace/coverage/default/12.sram_ctrl_partial_access_b2b.1237717511 |
|
|
Mar 03 02:28:53 PM PST 24 |
Mar 03 02:34:11 PM PST 24 |
44030911510 ps |
| T653 |
/workspace/coverage/default/23.sram_ctrl_lc_escalation.3882371331 |
|
|
Mar 03 02:29:23 PM PST 24 |
Mar 03 02:29:30 PM PST 24 |
929011627 ps |
| T654 |
/workspace/coverage/default/7.sram_ctrl_partial_access_b2b.1392533189 |
|
|
Mar 03 02:28:41 PM PST 24 |
Mar 03 02:34:48 PM PST 24 |
23093495941 ps |
| T655 |
/workspace/coverage/default/41.sram_ctrl_partial_access.1138681387 |
|
|
Mar 03 02:30:33 PM PST 24 |
Mar 03 02:30:41 PM PST 24 |
388415832 ps |
| T656 |
/workspace/coverage/default/7.sram_ctrl_multiple_keys.476177729 |
|
|
Mar 03 02:28:40 PM PST 24 |
Mar 03 02:48:56 PM PST 24 |
13834113752 ps |
| T657 |
/workspace/coverage/default/24.sram_ctrl_partial_access.3549609011 |
|
|
Mar 03 02:29:37 PM PST 24 |
Mar 03 02:30:20 PM PST 24 |
374820418 ps |
| T658 |
/workspace/coverage/default/2.sram_ctrl_stress_pipeline.466136967 |
|
|
Mar 03 02:28:30 PM PST 24 |
Mar 03 02:33:01 PM PST 24 |
11437684251 ps |
| T659 |
/workspace/coverage/default/45.sram_ctrl_stress_pipeline.2784531461 |
|
|
Mar 03 02:30:56 PM PST 24 |
Mar 03 02:34:29 PM PST 24 |
4423832652 ps |
| T660 |
/workspace/coverage/default/4.sram_ctrl_multiple_keys.83675669 |
|
|
Mar 03 02:28:41 PM PST 24 |
Mar 03 02:33:24 PM PST 24 |
8470548101 ps |
| T661 |
/workspace/coverage/default/28.sram_ctrl_stress_all_with_rand_reset.3000860266 |
|
|
Mar 03 02:29:48 PM PST 24 |
Mar 03 02:30:21 PM PST 24 |
917593722 ps |
| T662 |
/workspace/coverage/default/25.sram_ctrl_smoke.2929036347 |
|
|
Mar 03 02:29:35 PM PST 24 |
Mar 03 02:29:48 PM PST 24 |
143913908 ps |
| T663 |
/workspace/coverage/default/46.sram_ctrl_stress_all_with_rand_reset.3465963995 |
|
|
Mar 03 02:31:01 PM PST 24 |
Mar 03 02:39:44 PM PST 24 |
2871311572 ps |
| T664 |
/workspace/coverage/default/17.sram_ctrl_alert_test.106426257 |
|
|
Mar 03 02:29:11 PM PST 24 |
Mar 03 02:29:11 PM PST 24 |
20511626 ps |
| T665 |
/workspace/coverage/default/11.sram_ctrl_executable.2389830339 |
|
|
Mar 03 02:28:51 PM PST 24 |
Mar 03 02:48:37 PM PST 24 |
7490413550 ps |
| T666 |
/workspace/coverage/default/43.sram_ctrl_lc_escalation.2954554544 |
|
|
Mar 03 02:30:47 PM PST 24 |
Mar 03 02:30:58 PM PST 24 |
2401270286 ps |
| T667 |
/workspace/coverage/default/9.sram_ctrl_multiple_keys.2249094373 |
|
|
Mar 03 02:28:49 PM PST 24 |
Mar 03 02:32:26 PM PST 24 |
971122631 ps |
| T668 |
/workspace/coverage/default/16.sram_ctrl_mem_partial_access.2091984979 |
|
|
Mar 03 02:29:05 PM PST 24 |
Mar 03 02:29:11 PM PST 24 |
400614667 ps |
| T669 |
/workspace/coverage/default/15.sram_ctrl_stress_pipeline.424036041 |
|
|
Mar 03 02:29:08 PM PST 24 |
Mar 03 02:35:54 PM PST 24 |
4268383591 ps |
| T670 |
/workspace/coverage/default/25.sram_ctrl_multiple_keys.3247419099 |
|
|
Mar 03 02:29:32 PM PST 24 |
Mar 03 02:33:05 PM PST 24 |
1237487279 ps |
| T671 |
/workspace/coverage/default/29.sram_ctrl_partial_access.2847420762 |
|
|
Mar 03 02:29:48 PM PST 24 |
Mar 03 02:30:07 PM PST 24 |
10073328987 ps |
| T672 |
/workspace/coverage/default/3.sram_ctrl_executable.1273076121 |
|
|
Mar 03 02:28:28 PM PST 24 |
Mar 03 02:57:22 PM PST 24 |
60973059146 ps |
| T673 |
/workspace/coverage/default/21.sram_ctrl_regwen.588013102 |
|
|
Mar 03 02:29:23 PM PST 24 |
Mar 03 02:49:51 PM PST 24 |
15143664839 ps |
| T674 |
/workspace/coverage/default/40.sram_ctrl_stress_all_with_rand_reset.1447800662 |
|
|
Mar 03 02:30:35 PM PST 24 |
Mar 03 02:31:20 PM PST 24 |
3045901408 ps |
| T675 |
/workspace/coverage/default/9.sram_ctrl_executable.3847310351 |
|
|
Mar 03 02:28:52 PM PST 24 |
Mar 03 02:35:59 PM PST 24 |
2871111136 ps |
| T676 |
/workspace/coverage/default/41.sram_ctrl_mem_walk.3936782392 |
|
|
Mar 03 02:30:42 PM PST 24 |
Mar 03 02:30:51 PM PST 24 |
1823470585 ps |
| T677 |
/workspace/coverage/default/42.sram_ctrl_mem_walk.1288007356 |
|
|
Mar 03 02:30:42 PM PST 24 |
Mar 03 02:30:51 PM PST 24 |
138688051 ps |
| T678 |
/workspace/coverage/default/6.sram_ctrl_multiple_keys.3727197905 |
|
|
Mar 03 02:28:49 PM PST 24 |
Mar 03 02:52:12 PM PST 24 |
11832633916 ps |
| T679 |
/workspace/coverage/default/49.sram_ctrl_executable.912208900 |
|
|
Mar 03 02:31:16 PM PST 24 |
Mar 03 02:48:31 PM PST 24 |
11368804230 ps |
| T680 |
/workspace/coverage/default/8.sram_ctrl_executable.1382290027 |
|
|
Mar 03 02:28:46 PM PST 24 |
Mar 03 02:41:49 PM PST 24 |
13520062651 ps |
| T681 |
/workspace/coverage/default/10.sram_ctrl_mem_partial_access.2755314892 |
|
|
Mar 03 02:28:48 PM PST 24 |
Mar 03 02:28:51 PM PST 24 |
50122663 ps |
| T682 |
/workspace/coverage/default/35.sram_ctrl_mem_partial_access.2445483804 |
|
|
Mar 03 02:30:09 PM PST 24 |
Mar 03 02:30:14 PM PST 24 |
104379774 ps |
| T683 |
/workspace/coverage/default/44.sram_ctrl_stress_all_with_rand_reset.2217936082 |
|
|
Mar 03 02:30:56 PM PST 24 |
Mar 03 02:41:11 PM PST 24 |
4641205130 ps |
| T684 |
/workspace/coverage/default/42.sram_ctrl_lc_escalation.1555903282 |
|
|
Mar 03 02:30:39 PM PST 24 |
Mar 03 02:30:41 PM PST 24 |
244587489 ps |
| T685 |
/workspace/coverage/default/25.sram_ctrl_stress_all_with_rand_reset.3997188617 |
|
|
Mar 03 02:29:33 PM PST 24 |
Mar 03 02:36:33 PM PST 24 |
3500901944 ps |
| T686 |
/workspace/coverage/default/38.sram_ctrl_partial_access.4102791446 |
|
|
Mar 03 02:30:22 PM PST 24 |
Mar 03 02:30:24 PM PST 24 |
165054643 ps |
| T687 |
/workspace/coverage/default/35.sram_ctrl_partial_access_b2b.3854107414 |
|
|
Mar 03 02:30:07 PM PST 24 |
Mar 03 02:35:31 PM PST 24 |
26182228030 ps |
| T688 |
/workspace/coverage/default/41.sram_ctrl_stress_pipeline.2838173321 |
|
|
Mar 03 02:30:36 PM PST 24 |
Mar 03 02:34:32 PM PST 24 |
2485525612 ps |
| T689 |
/workspace/coverage/default/13.sram_ctrl_stress_pipeline.1365377616 |
|
|
Mar 03 02:28:54 PM PST 24 |
Mar 03 02:32:37 PM PST 24 |
8774578768 ps |
| T690 |
/workspace/coverage/default/21.sram_ctrl_lc_escalation.2323271995 |
|
|
Mar 03 02:29:23 PM PST 24 |
Mar 03 02:29:30 PM PST 24 |
1944730061 ps |
| T691 |
/workspace/coverage/default/24.sram_ctrl_executable.2866983173 |
|
|
Mar 03 02:29:33 PM PST 24 |
Mar 03 02:49:12 PM PST 24 |
53517750261 ps |
| T692 |
/workspace/coverage/default/11.sram_ctrl_partial_access_b2b.464282272 |
|
|
Mar 03 02:28:48 PM PST 24 |
Mar 03 02:35:37 PM PST 24 |
29249447606 ps |
| T693 |
/workspace/coverage/default/49.sram_ctrl_multiple_keys.3985746781 |
|
|
Mar 03 02:31:09 PM PST 24 |
Mar 03 02:39:56 PM PST 24 |
10200023985 ps |
| T694 |
/workspace/coverage/default/20.sram_ctrl_mem_walk.608276613 |
|
|
Mar 03 02:29:21 PM PST 24 |
Mar 03 02:29:27 PM PST 24 |
2535957249 ps |
| T695 |
/workspace/coverage/default/12.sram_ctrl_stress_all.4174995234 |
|
|
Mar 03 02:28:57 PM PST 24 |
Mar 03 02:58:53 PM PST 24 |
140112877270 ps |
| T696 |
/workspace/coverage/default/30.sram_ctrl_regwen.3256260909 |
|
|
Mar 03 02:29:47 PM PST 24 |
Mar 03 02:41:54 PM PST 24 |
9621450504 ps |
| T697 |
/workspace/coverage/default/48.sram_ctrl_partial_access_b2b.4174763429 |
|
|
Mar 03 02:31:03 PM PST 24 |
Mar 03 02:34:13 PM PST 24 |
49558039535 ps |
| T698 |
/workspace/coverage/default/7.sram_ctrl_lc_escalation.410268802 |
|
|
Mar 03 02:28:49 PM PST 24 |
Mar 03 02:28:54 PM PST 24 |
918500200 ps |
| T699 |
/workspace/coverage/default/10.sram_ctrl_multiple_keys.2855201897 |
|
|
Mar 03 02:28:52 PM PST 24 |
Mar 03 02:30:10 PM PST 24 |
1852807871 ps |
| T700 |
/workspace/coverage/default/17.sram_ctrl_executable.2670606195 |
|
|
Mar 03 02:29:13 PM PST 24 |
Mar 03 02:38:52 PM PST 24 |
11414412815 ps |
| T701 |
/workspace/coverage/default/17.sram_ctrl_stress_pipeline.2877703934 |
|
|
Mar 03 02:29:09 PM PST 24 |
Mar 03 02:35:03 PM PST 24 |
3678022325 ps |
| T702 |
/workspace/coverage/default/42.sram_ctrl_stress_pipeline.1944845402 |
|
|
Mar 03 02:30:44 PM PST 24 |
Mar 03 02:36:05 PM PST 24 |
13384690724 ps |
| T116 |
/workspace/coverage/default/13.sram_ctrl_stress_all_with_rand_reset.116303180 |
|
|
Mar 03 02:29:07 PM PST 24 |
Mar 03 02:30:39 PM PST 24 |
6390039467 ps |
| T703 |
/workspace/coverage/default/49.sram_ctrl_alert_test.1808705944 |
|
|
Mar 03 02:31:17 PM PST 24 |
Mar 03 02:31:18 PM PST 24 |
13968715 ps |
| T704 |
/workspace/coverage/default/37.sram_ctrl_executable.3663141700 |
|
|
Mar 03 02:30:21 PM PST 24 |
Mar 03 02:48:17 PM PST 24 |
13222410568 ps |
| T705 |
/workspace/coverage/default/17.sram_ctrl_mem_partial_access.2207899335 |
|
|
Mar 03 02:29:12 PM PST 24 |
Mar 03 02:29:15 PM PST 24 |
368801190 ps |
| T706 |
/workspace/coverage/default/21.sram_ctrl_executable.691063005 |
|
|
Mar 03 02:29:23 PM PST 24 |
Mar 03 02:45:19 PM PST 24 |
55768260602 ps |
| T707 |
/workspace/coverage/default/1.sram_ctrl_smoke.2868009517 |
|
|
Mar 03 02:28:24 PM PST 24 |
Mar 03 02:28:28 PM PST 24 |
94008317 ps |
| T708 |
/workspace/coverage/default/0.sram_ctrl_lc_escalation.302610835 |
|
|
Mar 03 02:28:19 PM PST 24 |
Mar 03 02:28:29 PM PST 24 |
721210052 ps |
| T709 |
/workspace/coverage/default/44.sram_ctrl_mem_partial_access.3906026062 |
|
|
Mar 03 02:30:52 PM PST 24 |
Mar 03 02:30:58 PM PST 24 |
383687803 ps |
| T710 |
/workspace/coverage/default/45.sram_ctrl_ram_cfg.3944689856 |
|
|
Mar 03 02:30:52 PM PST 24 |
Mar 03 02:30:53 PM PST 24 |
137558655 ps |
| T711 |
/workspace/coverage/default/48.sram_ctrl_mem_partial_access.54881734 |
|
|
Mar 03 02:31:09 PM PST 24 |
Mar 03 02:31:12 PM PST 24 |
169455768 ps |
| T712 |
/workspace/coverage/default/37.sram_ctrl_mem_partial_access.1687989827 |
|
|
Mar 03 02:30:22 PM PST 24 |
Mar 03 02:30:26 PM PST 24 |
138973091 ps |
| T713 |
/workspace/coverage/default/8.sram_ctrl_regwen.3446883965 |
|
|
Mar 03 02:28:48 PM PST 24 |
Mar 03 02:41:31 PM PST 24 |
51993516342 ps |
| T714 |
/workspace/coverage/default/16.sram_ctrl_partial_access.2085618276 |
|
|
Mar 03 02:29:05 PM PST 24 |
Mar 03 02:29:18 PM PST 24 |
525192593 ps |
| T715 |
/workspace/coverage/default/38.sram_ctrl_regwen.3273815205 |
|
|
Mar 03 02:30:20 PM PST 24 |
Mar 03 02:41:23 PM PST 24 |
1890655533 ps |
| T716 |
/workspace/coverage/default/27.sram_ctrl_partial_access.2707935319 |
|
|
Mar 03 02:29:35 PM PST 24 |
Mar 03 02:29:54 PM PST 24 |
4319912489 ps |
| T717 |
/workspace/coverage/default/30.sram_ctrl_partial_access_b2b.1350844605 |
|
|
Mar 03 02:29:48 PM PST 24 |
Mar 03 02:35:38 PM PST 24 |
21003507174 ps |
| T718 |
/workspace/coverage/default/7.sram_ctrl_mem_partial_access.1166920938 |
|
|
Mar 03 02:28:49 PM PST 24 |
Mar 03 02:28:55 PM PST 24 |
290435715 ps |
| T719 |
/workspace/coverage/default/23.sram_ctrl_stress_pipeline.2489998533 |
|
|
Mar 03 02:29:20 PM PST 24 |
Mar 03 02:32:27 PM PST 24 |
7704456408 ps |
| T720 |
/workspace/coverage/default/45.sram_ctrl_mem_walk.576928908 |
|
|
Mar 03 02:30:52 PM PST 24 |
Mar 03 02:30:58 PM PST 24 |
751520694 ps |
| T721 |
/workspace/coverage/default/20.sram_ctrl_stress_all_with_rand_reset.1219392361 |
|
|
Mar 03 02:29:26 PM PST 24 |
Mar 03 02:32:50 PM PST 24 |
4446409055 ps |
| T722 |
/workspace/coverage/default/7.sram_ctrl_ram_cfg.1169479445 |
|
|
Mar 03 02:28:43 PM PST 24 |
Mar 03 02:28:45 PM PST 24 |
27848896 ps |
| T723 |
/workspace/coverage/default/6.sram_ctrl_bijection.2561806294 |
|
|
Mar 03 02:28:40 PM PST 24 |
Mar 03 02:29:37 PM PST 24 |
8849695446 ps |
| T724 |
/workspace/coverage/default/29.sram_ctrl_regwen.1965156234 |
|
|
Mar 03 02:29:45 PM PST 24 |
Mar 03 03:01:53 PM PST 24 |
18702560666 ps |
| T725 |
/workspace/coverage/default/23.sram_ctrl_executable.2227544116 |
|
|
Mar 03 02:29:35 PM PST 24 |
Mar 03 02:52:55 PM PST 24 |
10442418684 ps |
| T726 |
/workspace/coverage/default/22.sram_ctrl_alert_test.1169422029 |
|
|
Mar 03 02:29:25 PM PST 24 |
Mar 03 02:29:26 PM PST 24 |
30974313 ps |
| T727 |
/workspace/coverage/default/21.sram_ctrl_mem_walk.2259451397 |
|
|
Mar 03 02:29:29 PM PST 24 |
Mar 03 02:29:40 PM PST 24 |
2722788018 ps |
| T728 |
/workspace/coverage/default/34.sram_ctrl_partial_access.2882395394 |
|
|
Mar 03 02:30:04 PM PST 24 |
Mar 03 02:30:37 PM PST 24 |
142216062 ps |
| T729 |
/workspace/coverage/default/38.sram_ctrl_multiple_keys.460091572 |
|
|
Mar 03 02:30:20 PM PST 24 |
Mar 03 02:39:56 PM PST 24 |
14771793354 ps |
| T730 |
/workspace/coverage/default/49.sram_ctrl_mem_partial_access.2428506075 |
|
|
Mar 03 02:31:15 PM PST 24 |
Mar 03 02:31:18 PM PST 24 |
165150779 ps |
| T731 |
/workspace/coverage/default/12.sram_ctrl_mem_walk.838951547 |
|
|
Mar 03 02:28:56 PM PST 24 |
Mar 03 02:29:04 PM PST 24 |
139474464 ps |
| T732 |
/workspace/coverage/default/49.sram_ctrl_bijection.1348432435 |
|
|
Mar 03 02:31:10 PM PST 24 |
Mar 03 02:32:17 PM PST 24 |
5929730136 ps |
| T733 |
/workspace/coverage/default/26.sram_ctrl_stress_pipeline.4109983237 |
|
|
Mar 03 02:29:37 PM PST 24 |
Mar 03 02:35:17 PM PST 24 |
17360868867 ps |
| T734 |
/workspace/coverage/default/6.sram_ctrl_executable.404934473 |
|
|
Mar 03 02:28:40 PM PST 24 |
Mar 03 02:38:11 PM PST 24 |
9978179664 ps |
| T735 |
/workspace/coverage/default/7.sram_ctrl_mem_walk.3628978388 |
|
|
Mar 03 02:28:42 PM PST 24 |
Mar 03 02:28:51 PM PST 24 |
601132245 ps |
| T736 |
/workspace/coverage/default/45.sram_ctrl_executable.1010302027 |
|
|
Mar 03 02:30:56 PM PST 24 |
Mar 03 02:39:16 PM PST 24 |
26433230331 ps |
| T737 |
/workspace/coverage/default/17.sram_ctrl_bijection.3593892278 |
|
|
Mar 03 02:29:09 PM PST 24 |
Mar 03 02:30:13 PM PST 24 |
16074116517 ps |
| T738 |
/workspace/coverage/default/22.sram_ctrl_ram_cfg.2823805122 |
|
|
Mar 03 02:29:24 PM PST 24 |
Mar 03 02:29:25 PM PST 24 |
81590901 ps |
| T739 |
/workspace/coverage/default/39.sram_ctrl_partial_access.3681528412 |
|
|
Mar 03 02:30:28 PM PST 24 |
Mar 03 02:30:33 PM PST 24 |
372039651 ps |
| T740 |
/workspace/coverage/default/20.sram_ctrl_lc_escalation.2081575148 |
|
|
Mar 03 02:29:17 PM PST 24 |
Mar 03 02:29:22 PM PST 24 |
644911096 ps |
| T741 |
/workspace/coverage/default/2.sram_ctrl_alert_test.760828655 |
|
|
Mar 03 02:28:28 PM PST 24 |
Mar 03 02:28:29 PM PST 24 |
16161803 ps |
| T742 |
/workspace/coverage/default/20.sram_ctrl_executable.4179331278 |
|
|
Mar 03 02:29:17 PM PST 24 |
Mar 03 02:33:07 PM PST 24 |
1176084722 ps |
| T743 |
/workspace/coverage/default/25.sram_ctrl_mem_walk.2387425853 |
|
|
Mar 03 02:29:35 PM PST 24 |
Mar 03 02:29:41 PM PST 24 |
234290387 ps |
| T744 |
/workspace/coverage/default/18.sram_ctrl_regwen.2701593122 |
|
|
Mar 03 02:29:12 PM PST 24 |
Mar 03 02:39:29 PM PST 24 |
2136306406 ps |
| T745 |
/workspace/coverage/default/39.sram_ctrl_mem_walk.3259531705 |
|
|
Mar 03 02:30:29 PM PST 24 |
Mar 03 02:30:39 PM PST 24 |
6286062997 ps |
| T746 |
/workspace/coverage/default/26.sram_ctrl_bijection.2621713242 |
|
|
Mar 03 02:29:38 PM PST 24 |
Mar 03 02:30:13 PM PST 24 |
8734193245 ps |
| T747 |
/workspace/coverage/default/10.sram_ctrl_stress_all_with_rand_reset.1574223357 |
|
|
Mar 03 02:28:47 PM PST 24 |
Mar 03 02:39:58 PM PST 24 |
10514768990 ps |
| T748 |
/workspace/coverage/default/11.sram_ctrl_alert_test.1446158496 |
|
|
Mar 03 02:28:54 PM PST 24 |
Mar 03 02:28:54 PM PST 24 |
42942592 ps |
| T749 |
/workspace/coverage/default/38.sram_ctrl_mem_partial_access.2742090933 |
|
|
Mar 03 02:30:28 PM PST 24 |
Mar 03 02:30:33 PM PST 24 |
73324270 ps |
| T750 |
/workspace/coverage/default/21.sram_ctrl_mem_partial_access.3499526451 |
|
|
Mar 03 02:29:28 PM PST 24 |
Mar 03 02:29:34 PM PST 24 |
647721501 ps |
| T751 |
/workspace/coverage/default/39.sram_ctrl_bijection.1616531870 |
|
|
Mar 03 02:30:30 PM PST 24 |
Mar 03 02:31:31 PM PST 24 |
4011104679 ps |
| T752 |
/workspace/coverage/default/26.sram_ctrl_regwen.1646487537 |
|
|
Mar 03 02:29:34 PM PST 24 |
Mar 03 02:40:07 PM PST 24 |
15091625401 ps |
| T753 |
/workspace/coverage/default/43.sram_ctrl_mem_partial_access.2287997642 |
|
|
Mar 03 02:30:47 PM PST 24 |
Mar 03 02:30:50 PM PST 24 |
327837670 ps |
| T117 |
/workspace/coverage/default/33.sram_ctrl_stress_all_with_rand_reset.1296995636 |
|
|
Mar 03 02:30:06 PM PST 24 |
Mar 03 02:30:36 PM PST 24 |
4245484245 ps |
| T754 |
/workspace/coverage/default/38.sram_ctrl_alert_test.3244047803 |
|
|
Mar 03 02:30:30 PM PST 24 |
Mar 03 02:30:30 PM PST 24 |
40221757 ps |
| T755 |
/workspace/coverage/default/39.sram_ctrl_stress_pipeline.1562876943 |
|
|
Mar 03 02:30:26 PM PST 24 |
Mar 03 02:33:37 PM PST 24 |
2138374116 ps |
| T756 |
/workspace/coverage/default/16.sram_ctrl_stress_all_with_rand_reset.454495000 |
|
|
Mar 03 02:29:07 PM PST 24 |
Mar 03 02:33:38 PM PST 24 |
7569578431 ps |
| T757 |
/workspace/coverage/default/30.sram_ctrl_partial_access.1065874313 |
|
|
Mar 03 02:29:49 PM PST 24 |
Mar 03 02:30:52 PM PST 24 |
1105937056 ps |
| T758 |
/workspace/coverage/default/32.sram_ctrl_partial_access.2721227125 |
|
|
Mar 03 02:29:57 PM PST 24 |
Mar 03 02:30:04 PM PST 24 |
1326264746 ps |
| T759 |
/workspace/coverage/default/16.sram_ctrl_executable.1681147856 |
|
|
Mar 03 02:29:07 PM PST 24 |
Mar 03 02:30:22 PM PST 24 |
1197002172 ps |
| T760 |
/workspace/coverage/default/15.sram_ctrl_partial_access.1356163049 |
|
|
Mar 03 02:29:09 PM PST 24 |
Mar 03 02:29:10 PM PST 24 |
52803749 ps |
| T761 |
/workspace/coverage/default/11.sram_ctrl_bijection.3548304324 |
|
|
Mar 03 02:28:47 PM PST 24 |
Mar 03 02:29:32 PM PST 24 |
28201415154 ps |
| T762 |
/workspace/coverage/default/33.sram_ctrl_ram_cfg.1745685735 |
|
|
Mar 03 02:30:02 PM PST 24 |
Mar 03 02:30:03 PM PST 24 |
45273855 ps |
| T763 |
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_errors.981606370 |
|
|
Mar 03 02:04:51 PM PST 24 |
Mar 03 02:04:53 PM PST 24 |
21638941 ps |
| T108 |
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_intg_err.1570507698 |
|
|
Mar 03 02:04:57 PM PST 24 |
Mar 03 02:05:02 PM PST 24 |
740388563 ps |
| T109 |
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_intg_err.1882501117 |
|
|
Mar 03 02:05:02 PM PST 24 |
Mar 03 02:05:04 PM PST 24 |
1316403776 ps |
| T59 |
/workspace/coverage/cover_reg_top/8.sram_ctrl_same_csr_outstanding.2936601813 |
|
|
Mar 03 02:04:45 PM PST 24 |
Mar 03 02:04:46 PM PST 24 |
20004703 ps |
| T93 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_passthru_mem_tl_intg_err.2944569259 |
|
|
Mar 03 02:04:39 PM PST 24 |
Mar 03 02:04:42 PM PST 24 |
415089595 ps |
| T118 |
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_mem_rw_with_rand_reset.1326635844 |
|
|
Mar 03 02:04:50 PM PST 24 |
Mar 03 02:04:51 PM PST 24 |
30373725 ps |
| T60 |
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_rw.1256458667 |
|
|
Mar 03 02:05:00 PM PST 24 |
Mar 03 02:05:02 PM PST 24 |
11212140 ps |
| T110 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_intg_err.18972178 |
|
|
Mar 03 02:04:38 PM PST 24 |
Mar 03 02:04:42 PM PST 24 |
187882824 ps |
| T106 |
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_rw.242467119 |
|
|
Mar 03 02:05:00 PM PST 24 |
Mar 03 02:05:02 PM PST 24 |
20870117 ps |
| T94 |
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_rw.1680787334 |
|
|
Mar 03 02:04:57 PM PST 24 |
Mar 03 02:04:58 PM PST 24 |
30119577 ps |
| T764 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_errors.2569043383 |
|
|
Mar 03 02:04:40 PM PST 24 |
Mar 03 02:04:45 PM PST 24 |
482297612 ps |
| T765 |
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_errors.606510267 |
|
|
Mar 03 02:04:58 PM PST 24 |
Mar 03 02:05:04 PM PST 24 |
94490134 ps |
| T95 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_same_csr_outstanding.1255912731 |
|
|
Mar 03 02:04:37 PM PST 24 |
Mar 03 02:04:41 PM PST 24 |
62158346 ps |
| T766 |
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_mem_rw_with_rand_reset.1473576207 |
|
|
Mar 03 02:04:52 PM PST 24 |
Mar 03 02:04:54 PM PST 24 |
31189779 ps |
| T767 |
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_mem_rw_with_rand_reset.2226133525 |
|
|
Mar 03 02:04:59 PM PST 24 |
Mar 03 02:05:02 PM PST 24 |
52142397 ps |
| T768 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_bit_bash.161095540 |
|
|
Mar 03 02:04:38 PM PST 24 |
Mar 03 02:04:42 PM PST 24 |
68534980 ps |
| T769 |
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_errors.1217548754 |
|
|
Mar 03 02:04:50 PM PST 24 |
Mar 03 02:04:53 PM PST 24 |
99725218 ps |
| T770 |
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_mem_rw_with_rand_reset.323952641 |
|
|
Mar 03 02:04:53 PM PST 24 |
Mar 03 02:04:54 PM PST 24 |
443960852 ps |
| T120 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_intg_err.3838789474 |
|
|
Mar 03 02:04:38 PM PST 24 |
Mar 03 02:04:42 PM PST 24 |
626799920 ps |
| T771 |
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_mem_rw_with_rand_reset.1203230251 |
|
|
Mar 03 02:05:03 PM PST 24 |
Mar 03 02:05:05 PM PST 24 |
372098939 ps |
| T124 |
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_intg_err.956206366 |
|
|
Mar 03 02:04:45 PM PST 24 |
Mar 03 02:04:47 PM PST 24 |
409864690 ps |
| T96 |
/workspace/coverage/cover_reg_top/11.sram_ctrl_passthru_mem_tl_intg_err.3286818142 |
|
|
Mar 03 02:04:51 PM PST 24 |
Mar 03 02:04:53 PM PST 24 |
732911469 ps |
| T772 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_errors.4246895333 |
|
|
Mar 03 02:04:47 PM PST 24 |
Mar 03 02:04:51 PM PST 24 |
207840132 ps |
| T61 |
/workspace/coverage/cover_reg_top/19.sram_ctrl_passthru_mem_tl_intg_err.977357948 |
|
|
Mar 03 02:04:59 PM PST 24 |
Mar 03 02:05:03 PM PST 24 |
235918241 ps |
| T97 |
/workspace/coverage/cover_reg_top/12.sram_ctrl_same_csr_outstanding.2811345807 |
|
|
Mar 03 02:04:55 PM PST 24 |
Mar 03 02:04:56 PM PST 24 |
47963767 ps |
| T107 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_aliasing.3294860325 |
|
|
Mar 03 02:04:44 PM PST 24 |
Mar 03 02:04:45 PM PST 24 |
36218005 ps |
| T773 |
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_errors.1878290127 |
|
|
Mar 03 02:04:47 PM PST 24 |
Mar 03 02:04:50 PM PST 24 |
77643937 ps |
| T774 |
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_errors.672011873 |
|
|
Mar 03 02:04:46 PM PST 24 |
Mar 03 02:04:48 PM PST 24 |
60698012 ps |
| T62 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_aliasing.3398344390 |
|
|
Mar 03 02:04:37 PM PST 24 |
Mar 03 02:04:41 PM PST 24 |
14744544 ps |
| T63 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_same_csr_outstanding.2711635240 |
|
|
Mar 03 02:04:43 PM PST 24 |
Mar 03 02:04:44 PM PST 24 |
23165199 ps |
| T98 |
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_rw.3772923451 |
|
|
Mar 03 02:04:43 PM PST 24 |
Mar 03 02:04:44 PM PST 24 |
11074979 ps |
| T64 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_hw_reset.2917105405 |
|
|
Mar 03 02:04:39 PM PST 24 |
Mar 03 02:04:41 PM PST 24 |
62174142 ps |
| T65 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_bit_bash.2052577600 |
|
|
Mar 03 02:04:39 PM PST 24 |
Mar 03 02:04:42 PM PST 24 |
169849817 ps |
| T66 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_passthru_mem_tl_intg_err.977953603 |
|
|
Mar 03 02:04:36 PM PST 24 |
Mar 03 02:04:40 PM PST 24 |
621211867 ps |
| T67 |
/workspace/coverage/cover_reg_top/17.sram_ctrl_passthru_mem_tl_intg_err.4109161496 |
|
|
Mar 03 02:04:57 PM PST 24 |
Mar 03 02:05:00 PM PST 24 |
2400224902 ps |