Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
99.44 100.00 98.18 100.00 100.00 99.71 99.70 98.52


Total tests in report: 847
Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP  
TOTAL INCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRNAME
86.16 86.16 97.86 97.86 84.03 84.03 93.17 93.17 100.00 100.00 92.51 92.51 94.90 94.90 40.63 40.63 /workspace/coverage/default/26.sram_ctrl_lc_escalation.3562298063
93.31 7.15 99.03 1.17 91.32 7.28 94.17 1.00 100.00 0.00 95.68 3.17 96.70 1.80 76.25 35.62 /workspace/coverage/default/39.sram_ctrl_stress_all_with_rand_reset.1494107924
95.87 2.56 99.51 0.49 94.40 3.08 97.42 3.25 100.00 0.00 97.69 2.02 96.70 0.00 85.34 9.09 /workspace/coverage/default/18.sram_ctrl_stress_all.1687848117
96.93 1.06 99.71 0.19 95.38 0.98 97.64 0.21 100.00 0.00 98.56 0.86 96.70 0.00 90.54 5.19 /workspace/coverage/cover_reg_top/1.sram_ctrl_tl_intg_err.18972178
97.67 0.73 99.90 0.19 97.48 2.10 98.64 1.00 100.00 0.00 99.42 0.86 97.30 0.60 90.91 0.37 /workspace/coverage/default/3.sram_ctrl_sec_cm.3073910102
98.00 0.34 99.90 0.00 97.48 0.00 98.64 0.00 100.00 0.00 99.42 0.00 97.45 0.15 93.14 2.23 /workspace/coverage/default/49.sram_ctrl_partial_access_b2b.87417087
98.26 0.25 99.90 0.00 97.90 0.42 99.14 0.50 100.00 0.00 99.71 0.29 97.45 0.00 93.69 0.56 /workspace/coverage/default/45.sram_ctrl_alert_test.2268587019
98.49 0.23 99.90 0.00 97.90 0.00 99.14 0.00 100.00 0.00 99.71 0.00 98.35 0.90 94.43 0.74 /workspace/coverage/default/31.sram_ctrl_mem_partial_access.1098013525
98.67 0.18 99.90 0.00 97.90 0.00 99.21 0.07 100.00 0.00 99.71 0.00 99.55 1.20 94.43 0.00 /workspace/coverage/cover_reg_top/1.sram_ctrl_passthru_mem_tl_intg_err.977953603
98.85 0.18 99.90 0.00 98.04 0.14 99.21 0.00 100.00 0.00 99.71 0.00 99.55 0.00 95.55 1.11 /workspace/coverage/default/26.sram_ctrl_stress_all_with_rand_reset.1726044800
98.99 0.14 99.90 0.00 98.04 0.00 99.28 0.07 100.00 0.00 99.71 0.00 99.55 0.00 96.47 0.93 /workspace/coverage/default/10.sram_ctrl_stress_all.1596707354
99.11 0.12 100.00 0.10 98.04 0.00 100.00 0.72 100.00 0.00 99.71 0.00 99.55 0.00 96.47 0.00 /workspace/coverage/default/0.sram_ctrl_ram_cfg.648717625
99.22 0.11 100.00 0.00 98.04 0.00 100.00 0.00 100.00 0.00 99.71 0.00 99.55 0.00 97.22 0.74 /workspace/coverage/cover_reg_top/15.sram_ctrl_tl_intg_err.3004108730
99.27 0.05 100.00 0.00 98.04 0.00 100.00 0.00 100.00 0.00 99.71 0.00 99.55 0.00 97.59 0.37 /workspace/coverage/cover_reg_top/13.sram_ctrl_tl_intg_err.3218989826
99.32 0.05 100.00 0.00 98.04 0.00 100.00 0.00 100.00 0.00 99.71 0.00 99.55 0.00 97.96 0.37 /workspace/coverage/default/1.sram_ctrl_stress_pipeline.651664314
99.38 0.05 100.00 0.00 98.04 0.00 100.00 0.00 100.00 0.00 99.71 0.00 99.55 0.00 98.33 0.37 /workspace/coverage/default/27.sram_ctrl_stress_all.2533586165
99.40 0.03 100.00 0.00 98.04 0.00 100.00 0.00 100.00 0.00 99.71 0.00 99.55 0.00 98.52 0.19 /workspace/coverage/cover_reg_top/12.sram_ctrl_tl_intg_err.3640553800
99.42 0.02 100.00 0.00 98.04 0.00 100.00 0.00 100.00 0.00 99.71 0.00 99.70 0.15 98.52 0.00 /workspace/coverage/cover_reg_top/11.sram_ctrl_passthru_mem_tl_intg_err.3286818142

Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_aliasing.2102842874
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_bit_bash.161095540
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_hw_reset.1102267879
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_mem_rw_with_rand_reset.1681336433
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_rw.93577350
/workspace/coverage/cover_reg_top/0.sram_ctrl_passthru_mem_tl_intg_err.3508380442
/workspace/coverage/cover_reg_top/0.sram_ctrl_same_csr_outstanding.2471938091
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_errors.972132893
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_intg_err.374028135
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_aliasing.3398344390
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_bit_bash.2052577600
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_hw_reset.3978958988
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_mem_rw_with_rand_reset.3923679688
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_rw.2382960049
/workspace/coverage/cover_reg_top/1.sram_ctrl_same_csr_outstanding.1414798114
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_errors.3472918578
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_mem_rw_with_rand_reset.1372215414
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_rw.1440367263
/workspace/coverage/cover_reg_top/10.sram_ctrl_passthru_mem_tl_intg_err.1142871811
/workspace/coverage/cover_reg_top/10.sram_ctrl_same_csr_outstanding.207172651
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_errors.981606370
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_intg_err.2667363532
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_mem_rw_with_rand_reset.1326635844
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_rw.312892439
/workspace/coverage/cover_reg_top/11.sram_ctrl_same_csr_outstanding.528400215
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_errors.2271978545
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_intg_err.966849940
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_mem_rw_with_rand_reset.1473576207
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_rw.3910658853
/workspace/coverage/cover_reg_top/12.sram_ctrl_same_csr_outstanding.2811345807
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_errors.3445244504
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_mem_rw_with_rand_reset.323952641
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_rw.485413444
/workspace/coverage/cover_reg_top/13.sram_ctrl_passthru_mem_tl_intg_err.1095163504
/workspace/coverage/cover_reg_top/13.sram_ctrl_same_csr_outstanding.890515094
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_errors.829233397
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_mem_rw_with_rand_reset.3148190660
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_rw.3678620618
/workspace/coverage/cover_reg_top/14.sram_ctrl_passthru_mem_tl_intg_err.1486812713
/workspace/coverage/cover_reg_top/14.sram_ctrl_same_csr_outstanding.1431513855
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_errors.1217548754
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_intg_err.1653604344
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_mem_rw_with_rand_reset.2722001938
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_rw.3447877371
/workspace/coverage/cover_reg_top/15.sram_ctrl_passthru_mem_tl_intg_err.3953553292
/workspace/coverage/cover_reg_top/15.sram_ctrl_same_csr_outstanding.3133351257
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_errors.4157165986
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_rw.1256458667
/workspace/coverage/cover_reg_top/16.sram_ctrl_passthru_mem_tl_intg_err.673656450
/workspace/coverage/cover_reg_top/16.sram_ctrl_same_csr_outstanding.1334710956
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_errors.606510267
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_intg_err.3623805502
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_mem_rw_with_rand_reset.2226133525
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_rw.3893447622
/workspace/coverage/cover_reg_top/17.sram_ctrl_passthru_mem_tl_intg_err.4109161496
/workspace/coverage/cover_reg_top/17.sram_ctrl_same_csr_outstanding.2373377849
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_errors.894890344
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_intg_err.1570507698
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_mem_rw_with_rand_reset.1203230251
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_rw.1680787334
/workspace/coverage/cover_reg_top/18.sram_ctrl_passthru_mem_tl_intg_err.198237522
/workspace/coverage/cover_reg_top/18.sram_ctrl_same_csr_outstanding.488566771
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_errors.1546600160
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_intg_err.422293609
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_mem_rw_with_rand_reset.1032132889
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_rw.242467119
/workspace/coverage/cover_reg_top/19.sram_ctrl_passthru_mem_tl_intg_err.977357948
/workspace/coverage/cover_reg_top/19.sram_ctrl_same_csr_outstanding.3110498471
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_errors.3626112038
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_intg_err.1882501117
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_aliasing.57857619
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_bit_bash.3948373362
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_hw_reset.3625420791
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_mem_rw_with_rand_reset.1099467160
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_rw.1231578310
/workspace/coverage/cover_reg_top/2.sram_ctrl_passthru_mem_tl_intg_err.2944569259
/workspace/coverage/cover_reg_top/2.sram_ctrl_same_csr_outstanding.1255912731
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_errors.2569043383
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_intg_err.3951337193
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_aliasing.3294860325
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_bit_bash.970895016
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_hw_reset.2917105405
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_mem_rw_with_rand_reset.632905691
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_rw.509621870
/workspace/coverage/cover_reg_top/3.sram_ctrl_passthru_mem_tl_intg_err.4222783517
/workspace/coverage/cover_reg_top/3.sram_ctrl_same_csr_outstanding.2711635240
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_errors.555787596
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_intg_err.3838789474
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_aliasing.2167881205
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_bit_bash.556708147
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_hw_reset.1032125660
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_mem_rw_with_rand_reset.1981174909
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_rw.1356828130
/workspace/coverage/cover_reg_top/4.sram_ctrl_passthru_mem_tl_intg_err.744419761
/workspace/coverage/cover_reg_top/4.sram_ctrl_same_csr_outstanding.2432222377
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_errors.4246895333
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_intg_err.875782661
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_mem_rw_with_rand_reset.913134743
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_rw.3772923451
/workspace/coverage/cover_reg_top/5.sram_ctrl_passthru_mem_tl_intg_err.2235507704
/workspace/coverage/cover_reg_top/5.sram_ctrl_same_csr_outstanding.1722167750
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_errors.504996803
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_intg_err.2173274071
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_mem_rw_with_rand_reset.3476946096
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_rw.1294145375
/workspace/coverage/cover_reg_top/6.sram_ctrl_same_csr_outstanding.3303369092
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_errors.253968398
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_intg_err.956206366
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_mem_rw_with_rand_reset.3327343247
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_rw.2438147569
/workspace/coverage/cover_reg_top/7.sram_ctrl_passthru_mem_tl_intg_err.3279347766
/workspace/coverage/cover_reg_top/7.sram_ctrl_same_csr_outstanding.3505452278
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_errors.672011873
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_intg_err.3445720308
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_mem_rw_with_rand_reset.2184883086
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_rw.3327300205
/workspace/coverage/cover_reg_top/8.sram_ctrl_passthru_mem_tl_intg_err.2536958132
/workspace/coverage/cover_reg_top/8.sram_ctrl_same_csr_outstanding.2936601813
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_errors.3206890353
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_intg_err.1359603194
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_mem_rw_with_rand_reset.618971917
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_rw.2673448345
/workspace/coverage/cover_reg_top/9.sram_ctrl_passthru_mem_tl_intg_err.326260162
/workspace/coverage/cover_reg_top/9.sram_ctrl_same_csr_outstanding.1351973091
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_errors.1878290127
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_intg_err.1913253185
/workspace/coverage/default/0.sram_ctrl_alert_test.2168250401
/workspace/coverage/default/0.sram_ctrl_bijection.469748631
/workspace/coverage/default/0.sram_ctrl_executable.2890446278
/workspace/coverage/default/0.sram_ctrl_lc_escalation.302610835
/workspace/coverage/default/0.sram_ctrl_mem_partial_access.4190832401
/workspace/coverage/default/0.sram_ctrl_mem_walk.3328519672
/workspace/coverage/default/0.sram_ctrl_multiple_keys.194200193
/workspace/coverage/default/0.sram_ctrl_partial_access.2211504636
/workspace/coverage/default/0.sram_ctrl_partial_access_b2b.1957559402
/workspace/coverage/default/0.sram_ctrl_regwen.1382468519
/workspace/coverage/default/0.sram_ctrl_sec_cm.3587017143
/workspace/coverage/default/0.sram_ctrl_smoke.4198208427
/workspace/coverage/default/0.sram_ctrl_stress_all.327244008
/workspace/coverage/default/0.sram_ctrl_stress_all_with_rand_reset.986445576
/workspace/coverage/default/0.sram_ctrl_stress_pipeline.2760721920
/workspace/coverage/default/1.sram_ctrl_alert_test.741597321
/workspace/coverage/default/1.sram_ctrl_bijection.2197044962
/workspace/coverage/default/1.sram_ctrl_executable.1689549742
/workspace/coverage/default/1.sram_ctrl_lc_escalation.990668408
/workspace/coverage/default/1.sram_ctrl_mem_partial_access.4211646584
/workspace/coverage/default/1.sram_ctrl_mem_walk.3505556445
/workspace/coverage/default/1.sram_ctrl_multiple_keys.1884555967
/workspace/coverage/default/1.sram_ctrl_partial_access.712420726
/workspace/coverage/default/1.sram_ctrl_partial_access_b2b.3811097603
/workspace/coverage/default/1.sram_ctrl_ram_cfg.2190115060
/workspace/coverage/default/1.sram_ctrl_regwen.863111388
/workspace/coverage/default/1.sram_ctrl_sec_cm.4072710056
/workspace/coverage/default/1.sram_ctrl_smoke.2868009517
/workspace/coverage/default/1.sram_ctrl_stress_all.2955014305
/workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.698850222
/workspace/coverage/default/10.sram_ctrl_alert_test.1001059128
/workspace/coverage/default/10.sram_ctrl_bijection.315103350
/workspace/coverage/default/10.sram_ctrl_executable.3966680642
/workspace/coverage/default/10.sram_ctrl_mem_partial_access.2755314892
/workspace/coverage/default/10.sram_ctrl_mem_walk.255474321
/workspace/coverage/default/10.sram_ctrl_multiple_keys.2855201897
/workspace/coverage/default/10.sram_ctrl_partial_access.4194231334
/workspace/coverage/default/10.sram_ctrl_partial_access_b2b.130194356
/workspace/coverage/default/10.sram_ctrl_ram_cfg.771184474
/workspace/coverage/default/10.sram_ctrl_regwen.4242690764
/workspace/coverage/default/10.sram_ctrl_smoke.680497865
/workspace/coverage/default/10.sram_ctrl_stress_all_with_rand_reset.1574223357
/workspace/coverage/default/10.sram_ctrl_stress_pipeline.2476406696
/workspace/coverage/default/11.sram_ctrl_alert_test.1446158496
/workspace/coverage/default/11.sram_ctrl_bijection.3548304324
/workspace/coverage/default/11.sram_ctrl_executable.2389830339
/workspace/coverage/default/11.sram_ctrl_mem_partial_access.1567311308
/workspace/coverage/default/11.sram_ctrl_mem_walk.237582527
/workspace/coverage/default/11.sram_ctrl_multiple_keys.1124228402
/workspace/coverage/default/11.sram_ctrl_partial_access.726724696
/workspace/coverage/default/11.sram_ctrl_partial_access_b2b.464282272
/workspace/coverage/default/11.sram_ctrl_ram_cfg.1475757417
/workspace/coverage/default/11.sram_ctrl_regwen.2180988192
/workspace/coverage/default/11.sram_ctrl_smoke.2491003790
/workspace/coverage/default/11.sram_ctrl_stress_all.840645757
/workspace/coverage/default/11.sram_ctrl_stress_all_with_rand_reset.3785316699
/workspace/coverage/default/11.sram_ctrl_stress_pipeline.1911700421
/workspace/coverage/default/12.sram_ctrl_alert_test.1020380357
/workspace/coverage/default/12.sram_ctrl_bijection.1361112656
/workspace/coverage/default/12.sram_ctrl_executable.3758031647
/workspace/coverage/default/12.sram_ctrl_lc_escalation.1579894852
/workspace/coverage/default/12.sram_ctrl_mem_partial_access.1866699282
/workspace/coverage/default/12.sram_ctrl_mem_walk.838951547
/workspace/coverage/default/12.sram_ctrl_multiple_keys.3697218186
/workspace/coverage/default/12.sram_ctrl_partial_access.1251992663
/workspace/coverage/default/12.sram_ctrl_partial_access_b2b.1237717511
/workspace/coverage/default/12.sram_ctrl_ram_cfg.311028173
/workspace/coverage/default/12.sram_ctrl_regwen.2510771308
/workspace/coverage/default/12.sram_ctrl_smoke.3772315186
/workspace/coverage/default/12.sram_ctrl_stress_all.4174995234
/workspace/coverage/default/12.sram_ctrl_stress_all_with_rand_reset.3950351996
/workspace/coverage/default/12.sram_ctrl_stress_pipeline.4048696089
/workspace/coverage/default/13.sram_ctrl_alert_test.1224666348
/workspace/coverage/default/13.sram_ctrl_bijection.710682537
/workspace/coverage/default/13.sram_ctrl_executable.1370595669
/workspace/coverage/default/13.sram_ctrl_lc_escalation.1612822415
/workspace/coverage/default/13.sram_ctrl_mem_partial_access.2096140723
/workspace/coverage/default/13.sram_ctrl_mem_walk.750090238
/workspace/coverage/default/13.sram_ctrl_multiple_keys.968585782
/workspace/coverage/default/13.sram_ctrl_partial_access.2165077664
/workspace/coverage/default/13.sram_ctrl_partial_access_b2b.1492724254
/workspace/coverage/default/13.sram_ctrl_ram_cfg.3584425040
/workspace/coverage/default/13.sram_ctrl_regwen.2768621838
/workspace/coverage/default/13.sram_ctrl_smoke.3237046157
/workspace/coverage/default/13.sram_ctrl_stress_all.553794627
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/workspace/coverage/default/8.sram_ctrl_stress_pipeline.4185434300
/workspace/coverage/default/9.sram_ctrl_alert_test.3765688165
/workspace/coverage/default/9.sram_ctrl_bijection.3563767430
/workspace/coverage/default/9.sram_ctrl_executable.3847310351
/workspace/coverage/default/9.sram_ctrl_lc_escalation.3775221751
/workspace/coverage/default/9.sram_ctrl_mem_partial_access.1908214570
/workspace/coverage/default/9.sram_ctrl_mem_walk.3319823191
/workspace/coverage/default/9.sram_ctrl_multiple_keys.2249094373
/workspace/coverage/default/9.sram_ctrl_partial_access.3425693804
/workspace/coverage/default/9.sram_ctrl_partial_access_b2b.1664577915
/workspace/coverage/default/9.sram_ctrl_ram_cfg.537614962
/workspace/coverage/default/9.sram_ctrl_regwen.3491703177
/workspace/coverage/default/9.sram_ctrl_smoke.3324579947
/workspace/coverage/default/9.sram_ctrl_stress_all.2713666817
/workspace/coverage/default/9.sram_ctrl_stress_all_with_rand_reset.1578068402
/workspace/coverage/default/9.sram_ctrl_stress_pipeline.1600291745



Total test records in report: 847
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html
TEST NOTEST LOCATIONTEST NAMESTATUSSTARTEDFINISHEDSIMULATION TIME
T1 /workspace/coverage/default/8.sram_ctrl_bijection.242323788 Mar 03 02:28:45 PM PST 24 Mar 03 02:29:34 PM PST 24 1040630493 ps
T2 /workspace/coverage/default/26.sram_ctrl_lc_escalation.3562298063 Mar 03 02:29:40 PM PST 24 Mar 03 02:29:44 PM PST 24 909922610 ps
T3 /workspace/coverage/default/49.sram_ctrl_stress_pipeline.3853430559 Mar 03 02:31:11 PM PST 24 Mar 03 02:34:23 PM PST 24 2015044505 ps
T4 /workspace/coverage/default/18.sram_ctrl_stress_all.1687848117 Mar 03 02:29:28 PM PST 24 Mar 03 03:08:23 PM PST 24 5748544935 ps
T6 /workspace/coverage/default/34.sram_ctrl_ram_cfg.3920534281 Mar 03 02:30:07 PM PST 24 Mar 03 02:30:09 PM PST 24 28853140 ps
T7 /workspace/coverage/default/28.sram_ctrl_partial_access.3458898736 Mar 03 02:29:44 PM PST 24 Mar 03 02:29:48 PM PST 24 115609571 ps
T8 /workspace/coverage/default/28.sram_ctrl_mem_walk.1940825086 Mar 03 02:29:43 PM PST 24 Mar 03 02:29:53 PM PST 24 524871761 ps
T5 /workspace/coverage/default/13.sram_ctrl_lc_escalation.1612822415 Mar 03 02:29:00 PM PST 24 Mar 03 02:29:10 PM PST 24 5556716191 ps
T9 /workspace/coverage/default/11.sram_ctrl_mem_walk.237582527 Mar 03 02:28:53 PM PST 24 Mar 03 02:29:02 PM PST 24 272386614 ps
T10 /workspace/coverage/default/3.sram_ctrl_lc_escalation.815626138 Mar 03 02:28:26 PM PST 24 Mar 03 02:28:32 PM PST 24 1815669216 ps
T13 /workspace/coverage/default/0.sram_ctrl_bijection.469748631 Mar 03 02:28:14 PM PST 24 Mar 03 02:29:37 PM PST 24 10842958452 ps
T19 /workspace/coverage/default/19.sram_ctrl_ram_cfg.1058444584 Mar 03 02:29:18 PM PST 24 Mar 03 02:29:19 PM PST 24 30246062 ps
T55 /workspace/coverage/default/3.sram_ctrl_bijection.42799401 Mar 03 02:28:26 PM PST 24 Mar 03 02:29:29 PM PST 24 987628250 ps
T25 /workspace/coverage/default/24.sram_ctrl_alert_test.1252943527 Mar 03 02:29:35 PM PST 24 Mar 03 02:29:36 PM PST 24 13949800 ps
T14 /workspace/coverage/default/25.sram_ctrl_partial_access.2994404203 Mar 03 02:29:37 PM PST 24 Mar 03 02:29:41 PM PST 24 77928951 ps
T15 /workspace/coverage/default/32.sram_ctrl_stress_pipeline.1233212804 Mar 03 02:29:55 PM PST 24 Mar 03 02:34:07 PM PST 24 11691352385 ps
T16 /workspace/coverage/default/9.sram_ctrl_mem_partial_access.1908214570 Mar 03 02:28:48 PM PST 24 Mar 03 02:28:54 PM PST 24 157127491 ps
T11 /workspace/coverage/default/31.sram_ctrl_mem_partial_access.1098013525 Mar 03 02:29:54 PM PST 24 Mar 03 02:29:57 PM PST 24 105676396 ps
T12 /workspace/coverage/default/15.sram_ctrl_multiple_keys.1215784774 Mar 03 02:29:02 PM PST 24 Mar 03 02:31:16 PM PST 24 4331549708 ps
T70 /workspace/coverage/default/48.sram_ctrl_partial_access.713986711 Mar 03 02:31:03 PM PST 24 Mar 03 02:31:07 PM PST 24 242523088 ps
T71 /workspace/coverage/default/32.sram_ctrl_mem_walk.2744400349 Mar 03 02:29:56 PM PST 24 Mar 03 02:30:06 PM PST 24 896304178 ps
T69 /workspace/coverage/default/2.sram_ctrl_multiple_keys.2498339545 Mar 03 02:28:31 PM PST 24 Mar 03 02:48:10 PM PST 24 3543812951 ps
T17 /workspace/coverage/default/4.sram_ctrl_stress_all_with_rand_reset.727772553 Mar 03 02:28:36 PM PST 24 Mar 03 02:30:05 PM PST 24 10391386854 ps
T18 /workspace/coverage/default/5.sram_ctrl_stress_all_with_rand_reset.2585613512 Mar 03 02:28:40 PM PST 24 Mar 03 02:29:21 PM PST 24 1156459312 ps
T49 /workspace/coverage/default/42.sram_ctrl_smoke.827115876 Mar 03 02:30:41 PM PST 24 Mar 03 02:30:59 PM PST 24 2249660068 ps
T50 /workspace/coverage/default/2.sram_ctrl_smoke.1308731270 Mar 03 02:28:27 PM PST 24 Mar 03 02:28:37 PM PST 24 164017827 ps
T51 /workspace/coverage/default/42.sram_ctrl_partial_access.3529714194 Mar 03 02:30:43 PM PST 24 Mar 03 02:31:00 PM PST 24 918400243 ps
T52 /workspace/coverage/default/1.sram_ctrl_mem_partial_access.4211646584 Mar 03 02:28:26 PM PST 24 Mar 03 02:28:31 PM PST 24 252328747 ps
T32 /workspace/coverage/default/2.sram_ctrl_ram_cfg.1120741760 Mar 03 02:28:26 PM PST 24 Mar 03 02:28:27 PM PST 24 73443257 ps
T53 /workspace/coverage/default/43.sram_ctrl_multiple_keys.767438728 Mar 03 02:30:53 PM PST 24 Mar 03 02:41:52 PM PST 24 10393730188 ps
T26 /workspace/coverage/default/7.sram_ctrl_alert_test.3120042409 Mar 03 02:28:45 PM PST 24 Mar 03 02:28:46 PM PST 24 14263411 ps
T54 /workspace/coverage/default/34.sram_ctrl_mem_partial_access.1498409823 Mar 03 02:30:09 PM PST 24 Mar 03 02:30:16 PM PST 24 174178823 ps
T136 /workspace/coverage/default/21.sram_ctrl_multiple_keys.2837544552 Mar 03 02:29:28 PM PST 24 Mar 03 02:31:25 PM PST 24 4470839799 ps
T23 /workspace/coverage/default/1.sram_ctrl_stress_all.2955014305 Mar 03 02:28:30 PM PST 24 Mar 03 03:05:31 PM PST 24 30705578453 ps
T145 /workspace/coverage/default/15.sram_ctrl_bijection.1305632187 Mar 03 02:29:04 PM PST 24 Mar 03 02:30:07 PM PST 24 10006150706 ps
T147 /workspace/coverage/default/38.sram_ctrl_ram_cfg.3134182180 Mar 03 02:30:19 PM PST 24 Mar 03 02:30:20 PM PST 24 30340356 ps
T140 /workspace/coverage/default/24.sram_ctrl_bijection.464240836 Mar 03 02:29:30 PM PST 24 Mar 03 02:30:31 PM PST 24 9622886807 ps
T139 /workspace/coverage/default/41.sram_ctrl_bijection.2476138872 Mar 03 02:30:33 PM PST 24 Mar 03 02:31:39 PM PST 24 3156193453 ps
T28 /workspace/coverage/default/43.sram_ctrl_regwen.2020492830 Mar 03 02:30:48 PM PST 24 Mar 03 02:51:03 PM PST 24 16847642609 ps
T99 /workspace/coverage/default/10.sram_ctrl_stress_pipeline.2476406696 Mar 03 02:28:51 PM PST 24 Mar 03 02:32:53 PM PST 24 4935921072 ps
T137 /workspace/coverage/default/19.sram_ctrl_multiple_keys.1514367916 Mar 03 02:29:15 PM PST 24 Mar 03 02:46:38 PM PST 24 60784417593 ps
T56 /workspace/coverage/default/29.sram_ctrl_lc_escalation.1735389625 Mar 03 02:29:45 PM PST 24 Mar 03 02:29:49 PM PST 24 311858810 ps
T142 /workspace/coverage/default/1.sram_ctrl_ram_cfg.2190115060 Mar 03 02:28:25 PM PST 24 Mar 03 02:28:26 PM PST 24 44889768 ps
T31 /workspace/coverage/default/26.sram_ctrl_stress_all_with_rand_reset.1726044800 Mar 03 02:29:44 PM PST 24 Mar 03 02:30:29 PM PST 24 1453063416 ps
T27 /workspace/coverage/default/9.sram_ctrl_alert_test.3765688165 Mar 03 02:28:51 PM PST 24 Mar 03 02:28:52 PM PST 24 53161101 ps
T144 /workspace/coverage/default/28.sram_ctrl_bijection.3259047597 Mar 03 02:29:44 PM PST 24 Mar 03 02:30:55 PM PST 24 1094352213 ps
T148 /workspace/coverage/default/0.sram_ctrl_partial_access.2211504636 Mar 03 02:28:11 PM PST 24 Mar 03 02:28:17 PM PST 24 122556489 ps
T146 /workspace/coverage/default/14.sram_ctrl_bijection.3040171598 Mar 03 02:29:00 PM PST 24 Mar 03 02:29:49 PM PST 24 3410386799 ps
T149 /workspace/coverage/default/23.sram_ctrl_partial_access.545179169 Mar 03 02:29:24 PM PST 24 Mar 03 02:29:28 PM PST 24 709246329 ps
T150 /workspace/coverage/default/41.sram_ctrl_ram_cfg.2981096387 Mar 03 02:30:41 PM PST 24 Mar 03 02:30:42 PM PST 24 38506390 ps
T100 /workspace/coverage/default/40.sram_ctrl_stress_pipeline.2246245989 Mar 03 02:30:27 PM PST 24 Mar 03 02:33:59 PM PST 24 7967956733 ps
T151 /workspace/coverage/default/17.sram_ctrl_smoke.2676936322 Mar 03 02:29:09 PM PST 24 Mar 03 02:30:45 PM PST 24 2601130720 ps
T152 /workspace/coverage/default/45.sram_ctrl_smoke.1031976166 Mar 03 02:30:56 PM PST 24 Mar 03 02:32:51 PM PST 24 126419393 ps
T141 /workspace/coverage/default/13.sram_ctrl_alert_test.1224666348 Mar 03 02:29:03 PM PST 24 Mar 03 02:29:04 PM PST 24 15679884 ps
T153 /workspace/coverage/default/18.sram_ctrl_bijection.2365655216 Mar 03 02:29:12 PM PST 24 Mar 03 02:29:55 PM PST 24 3941606210 ps
T143 /workspace/coverage/default/45.sram_ctrl_alert_test.2268587019 Mar 03 02:30:59 PM PST 24 Mar 03 02:31:00 PM PST 24 12745710 ps
T24 /workspace/coverage/default/39.sram_ctrl_stress_all_with_rand_reset.1494107924 Mar 03 02:30:27 PM PST 24 Mar 03 02:31:01 PM PST 24 2414877511 ps
T57 /workspace/coverage/default/10.sram_ctrl_stress_all.1596707354 Mar 03 02:28:55 PM PST 24 Mar 03 03:28:21 PM PST 24 16093114687 ps
T154 /workspace/coverage/default/0.sram_ctrl_alert_test.2168250401 Mar 03 02:28:19 PM PST 24 Mar 03 02:28:21 PM PST 24 14595728 ps
T155 /workspace/coverage/default/4.sram_ctrl_bijection.1703046355 Mar 03 02:28:40 PM PST 24 Mar 03 02:29:32 PM PST 24 856379806 ps
T101 /workspace/coverage/default/1.sram_ctrl_stress_pipeline.651664314 Mar 03 02:28:33 PM PST 24 Mar 03 02:32:30 PM PST 24 5114196163 ps
T156 /workspace/coverage/default/43.sram_ctrl_bijection.1006611721 Mar 03 02:30:48 PM PST 24 Mar 03 02:31:09 PM PST 24 1232074793 ps
T43 /workspace/coverage/default/48.sram_ctrl_stress_all_with_rand_reset.684182492 Mar 03 02:31:09 PM PST 24 Mar 03 02:31:39 PM PST 24 878042486 ps
T131 /workspace/coverage/default/32.sram_ctrl_executable.967594229 Mar 03 02:30:00 PM PST 24 Mar 03 02:57:14 PM PST 24 19362163571 ps
T29 /workspace/coverage/default/28.sram_ctrl_stress_all.1911647717 Mar 03 02:29:43 PM PST 24 Mar 03 02:58:09 PM PST 24 33702323845 ps
T58 /workspace/coverage/default/3.sram_ctrl_regwen.3128984980 Mar 03 02:28:27 PM PST 24 Mar 03 02:59:41 PM PST 24 4089692341 ps
T102 /workspace/coverage/default/5.sram_ctrl_partial_access_b2b.159810588 Mar 03 02:28:40 PM PST 24 Mar 03 02:35:58 PM PST 24 23579015872 ps
T157 /workspace/coverage/default/14.sram_ctrl_multiple_keys.2537638016 Mar 03 02:29:09 PM PST 24 Mar 03 02:34:39 PM PST 24 2791005901 ps
T103 /workspace/coverage/default/49.sram_ctrl_partial_access_b2b.87417087 Mar 03 02:31:09 PM PST 24 Mar 03 02:38:53 PM PST 24 74043964682 ps
T135 /workspace/coverage/default/39.sram_ctrl_stress_all.2893786258 Mar 03 02:30:26 PM PST 24 Mar 03 02:52:47 PM PST 24 18763922336 ps
T158 /workspace/coverage/default/19.sram_ctrl_alert_test.3610048679 Mar 03 02:29:22 PM PST 24 Mar 03 02:29:23 PM PST 24 12716239 ps
T159 /workspace/coverage/default/14.sram_ctrl_partial_access.1123811223 Mar 03 02:29:03 PM PST 24 Mar 03 02:29:58 PM PST 24 251753606 ps
T44 /workspace/coverage/default/22.sram_ctrl_stress_all_with_rand_reset.812421549 Mar 03 02:29:23 PM PST 24 Mar 03 02:36:59 PM PST 24 999337066 ps
T104 /workspace/coverage/default/39.sram_ctrl_partial_access_b2b.3482010354 Mar 03 02:30:25 PM PST 24 Mar 03 02:40:23 PM PST 24 22205576919 ps
T119 /workspace/coverage/default/16.sram_ctrl_lc_escalation.1753138551 Mar 03 02:29:13 PM PST 24 Mar 03 02:29:16 PM PST 24 955579734 ps
T160 /workspace/coverage/default/37.sram_ctrl_lc_escalation.3797370474 Mar 03 02:30:14 PM PST 24 Mar 03 02:30:23 PM PST 24 2048302371 ps
T161 /workspace/coverage/default/28.sram_ctrl_smoke.1591865189 Mar 03 02:29:48 PM PST 24 Mar 03 02:29:50 PM PST 24 193161040 ps
T30 /workspace/coverage/default/41.sram_ctrl_stress_all.2187676386 Mar 03 02:30:42 PM PST 24 Mar 03 02:57:11 PM PST 24 116204431647 ps
T162 /workspace/coverage/default/43.sram_ctrl_smoke.1069927579 Mar 03 02:30:48 PM PST 24 Mar 03 02:31:32 PM PST 24 1129749950 ps
T163 /workspace/coverage/default/35.sram_ctrl_lc_escalation.3159454991 Mar 03 02:30:08 PM PST 24 Mar 03 02:30:16 PM PST 24 690216703 ps
T164 /workspace/coverage/default/20.sram_ctrl_smoke.567648108 Mar 03 02:29:17 PM PST 24 Mar 03 02:29:18 PM PST 24 204278104 ps
T165 /workspace/coverage/default/7.sram_ctrl_bijection.1463057154 Mar 03 02:28:36 PM PST 24 Mar 03 02:29:50 PM PST 24 3677196612 ps
T166 /workspace/coverage/default/46.sram_ctrl_regwen.853212504 Mar 03 02:31:00 PM PST 24 Mar 03 02:56:28 PM PST 24 77995118856 ps
T167 /workspace/coverage/default/0.sram_ctrl_ram_cfg.648717625 Mar 03 02:28:22 PM PST 24 Mar 03 02:28:23 PM PST 24 26895594 ps
T168 /workspace/coverage/default/44.sram_ctrl_executable.1292520083 Mar 03 02:30:52 PM PST 24 Mar 03 02:41:17 PM PST 24 27507944705 ps
T105 /workspace/coverage/default/6.sram_ctrl_partial_access_b2b.2847242112 Mar 03 02:28:40 PM PST 24 Mar 03 02:34:57 PM PST 24 18082168284 ps
T76 /workspace/coverage/default/46.sram_ctrl_mem_partial_access.1075389052 Mar 03 02:31:04 PM PST 24 Mar 03 02:31:10 PM PST 24 190098572 ps
T169 /workspace/coverage/default/46.sram_ctrl_bijection.928958905 Mar 03 02:30:58 PM PST 24 Mar 03 02:32:09 PM PST 24 7373808398 ps
T170 /workspace/coverage/default/43.sram_ctrl_mem_walk.2272622487 Mar 03 02:30:52 PM PST 24 Mar 03 02:31:01 PM PST 24 1003506818 ps
T45 /workspace/coverage/default/36.sram_ctrl_stress_all_with_rand_reset.3615893462 Mar 03 02:30:14 PM PST 24 Mar 03 02:35:24 PM PST 24 5923061169 ps
T171 /workspace/coverage/default/5.sram_ctrl_multiple_keys.1387619876 Mar 03 02:28:35 PM PST 24 Mar 03 02:41:54 PM PST 24 3331406611 ps
T172 /workspace/coverage/default/6.sram_ctrl_stress_pipeline.1992391939 Mar 03 02:28:40 PM PST 24 Mar 03 02:32:03 PM PST 24 8880864082 ps
T173 /workspace/coverage/default/1.sram_ctrl_lc_escalation.990668408 Mar 03 02:28:23 PM PST 24 Mar 03 02:28:30 PM PST 24 680009120 ps
T174 /workspace/coverage/default/20.sram_ctrl_alert_test.3598928802 Mar 03 02:29:17 PM PST 24 Mar 03 02:29:18 PM PST 24 45219702 ps
T175 /workspace/coverage/default/22.sram_ctrl_partial_access.3933054143 Mar 03 02:29:29 PM PST 24 Mar 03 02:29:41 PM PST 24 4966640285 ps
T134 /workspace/coverage/default/11.sram_ctrl_regwen.2180988192 Mar 03 02:28:55 PM PST 24 Mar 03 02:41:54 PM PST 24 10191664465 ps
T77 /workspace/coverage/default/40.sram_ctrl_mem_partial_access.1003888909 Mar 03 02:30:34 PM PST 24 Mar 03 02:30:39 PM PST 24 172828197 ps
T176 /workspace/coverage/default/9.sram_ctrl_smoke.3324579947 Mar 03 02:28:51 PM PST 24 Mar 03 02:28:59 PM PST 24 2042122994 ps
T177 /workspace/coverage/default/3.sram_ctrl_smoke.2505546229 Mar 03 02:28:28 PM PST 24 Mar 03 02:30:44 PM PST 24 1420933200 ps
T178 /workspace/coverage/default/36.sram_ctrl_mem_walk.3369703574 Mar 03 02:30:19 PM PST 24 Mar 03 02:30:25 PM PST 24 916259298 ps
T179 /workspace/coverage/default/48.sram_ctrl_mem_walk.914839663 Mar 03 02:31:11 PM PST 24 Mar 03 02:31:21 PM PST 24 461804547 ps
T180 /workspace/coverage/default/35.sram_ctrl_executable.2935755094 Mar 03 02:30:08 PM PST 24 Mar 03 02:40:29 PM PST 24 40213793491 ps
T181 /workspace/coverage/default/12.sram_ctrl_smoke.3772315186 Mar 03 02:28:54 PM PST 24 Mar 03 02:29:41 PM PST 24 387673104 ps
T182 /workspace/coverage/default/4.sram_ctrl_smoke.3154250691 Mar 03 02:28:37 PM PST 24 Mar 03 02:30:02 PM PST 24 2189000006 ps
T183 /workspace/coverage/default/24.sram_ctrl_regwen.2051323280 Mar 03 02:29:30 PM PST 24 Mar 03 02:47:44 PM PST 24 16002788221 ps
T184 /workspace/coverage/default/16.sram_ctrl_smoke.2933554690 Mar 03 02:29:13 PM PST 24 Mar 03 02:29:26 PM PST 24 634586128 ps
T185 /workspace/coverage/default/19.sram_ctrl_regwen.3303892910 Mar 03 02:29:25 PM PST 24 Mar 03 02:49:33 PM PST 24 6503292705 ps
T186 /workspace/coverage/default/25.sram_ctrl_bijection.2403813881 Mar 03 02:29:29 PM PST 24 Mar 03 02:29:47 PM PST 24 2238749810 ps
T187 /workspace/coverage/default/46.sram_ctrl_stress_pipeline.3833209299 Mar 03 02:30:58 PM PST 24 Mar 03 02:35:08 PM PST 24 10103567288 ps
T188 /workspace/coverage/default/38.sram_ctrl_mem_walk.3507601382 Mar 03 02:30:32 PM PST 24 Mar 03 02:30:37 PM PST 24 233095413 ps
T138 /workspace/coverage/default/31.sram_ctrl_partial_access_b2b.3257748543 Mar 03 02:29:53 PM PST 24 Mar 03 02:36:38 PM PST 24 76090397762 ps
T78 /workspace/coverage/default/15.sram_ctrl_mem_partial_access.4149632586 Mar 03 02:29:13 PM PST 24 Mar 03 02:29:16 PM PST 24 179891555 ps
T189 /workspace/coverage/default/27.sram_ctrl_multiple_keys.877133495 Mar 03 02:29:35 PM PST 24 Mar 03 02:37:17 PM PST 24 5547487798 ps
T190 /workspace/coverage/default/24.sram_ctrl_partial_access_b2b.2586653061 Mar 03 02:29:36 PM PST 24 Mar 03 02:34:50 PM PST 24 66886167118 ps
T191 /workspace/coverage/default/37.sram_ctrl_mem_walk.980897709 Mar 03 02:30:21 PM PST 24 Mar 03 02:30:31 PM PST 24 2116727770 ps
T79 /workspace/coverage/default/28.sram_ctrl_mem_partial_access.3351477947 Mar 03 02:29:43 PM PST 24 Mar 03 02:29:49 PM PST 24 125654610 ps
T192 /workspace/coverage/default/31.sram_ctrl_partial_access.3712230032 Mar 03 02:29:52 PM PST 24 Mar 03 02:30:15 PM PST 24 105674235 ps
T193 /workspace/coverage/default/36.sram_ctrl_bijection.1315901863 Mar 03 02:30:15 PM PST 24 Mar 03 02:30:30 PM PST 24 250054916 ps
T194 /workspace/coverage/default/47.sram_ctrl_multiple_keys.2724324243 Mar 03 02:31:02 PM PST 24 Mar 03 02:31:55 PM PST 24 2605922451 ps
T195 /workspace/coverage/default/49.sram_ctrl_stress_all.3000757344 Mar 03 02:31:19 PM PST 24 Mar 03 02:56:29 PM PST 24 4974659851 ps
T196 /workspace/coverage/default/14.sram_ctrl_executable.3375961143 Mar 03 02:29:09 PM PST 24 Mar 03 02:48:42 PM PST 24 13001509002 ps
T197 /workspace/coverage/default/18.sram_ctrl_partial_access.1513027222 Mar 03 02:29:12 PM PST 24 Mar 03 02:30:37 PM PST 24 9476021308 ps
T198 /workspace/coverage/default/0.sram_ctrl_stress_all.327244008 Mar 03 02:28:20 PM PST 24 Mar 03 03:02:13 PM PST 24 32216951180 ps
T199 /workspace/coverage/default/43.sram_ctrl_stress_pipeline.2009631242 Mar 03 02:30:52 PM PST 24 Mar 03 02:36:54 PM PST 24 14259030280 ps
T200 /workspace/coverage/default/44.sram_ctrl_stress_pipeline.109533752 Mar 03 02:30:53 PM PST 24 Mar 03 02:34:42 PM PST 24 16970113710 ps
T201 /workspace/coverage/default/30.sram_ctrl_mem_walk.2227740287 Mar 03 02:29:45 PM PST 24 Mar 03 02:29:55 PM PST 24 2595724958 ps
T202 /workspace/coverage/default/9.sram_ctrl_regwen.3491703177 Mar 03 02:28:48 PM PST 24 Mar 03 02:37:28 PM PST 24 6684213214 ps
T203 /workspace/coverage/default/3.sram_ctrl_stress_all.2801783953 Mar 03 02:28:38 PM PST 24 Mar 03 03:17:31 PM PST 24 189140082225 ps
T204 /workspace/coverage/default/10.sram_ctrl_alert_test.1001059128 Mar 03 02:28:49 PM PST 24 Mar 03 02:28:50 PM PST 24 28236471 ps
T205 /workspace/coverage/default/18.sram_ctrl_alert_test.1593753871 Mar 03 02:29:13 PM PST 24 Mar 03 02:29:14 PM PST 24 32555840 ps
T206 /workspace/coverage/default/9.sram_ctrl_partial_access.3425693804 Mar 03 02:28:51 PM PST 24 Mar 03 02:28:55 PM PST 24 87871724 ps
T132 /workspace/coverage/default/27.sram_ctrl_stress_all.2533586165 Mar 03 02:29:44 PM PST 24 Mar 03 03:09:23 PM PST 24 81840858141 ps
T207 /workspace/coverage/default/4.sram_ctrl_alert_test.3519148774 Mar 03 02:28:40 PM PST 24 Mar 03 02:28:41 PM PST 24 13005554 ps
T208 /workspace/coverage/default/21.sram_ctrl_partial_access_b2b.2112721971 Mar 03 02:29:19 PM PST 24 Mar 03 02:35:38 PM PST 24 14956452461 ps
T209 /workspace/coverage/default/43.sram_ctrl_executable.1139662407 Mar 03 02:30:54 PM PST 24 Mar 03 02:34:38 PM PST 24 11653912790 ps
T210 /workspace/coverage/default/30.sram_ctrl_lc_escalation.3430134527 Mar 03 02:29:44 PM PST 24 Mar 03 02:29:47 PM PST 24 1546255457 ps
T80 /workspace/coverage/default/22.sram_ctrl_mem_partial_access.3135562289 Mar 03 02:29:24 PM PST 24 Mar 03 02:29:28 PM PST 24 123784647 ps
T211 /workspace/coverage/default/18.sram_ctrl_ram_cfg.2711459487 Mar 03 02:29:15 PM PST 24 Mar 03 02:29:16 PM PST 24 42600778 ps
T212 /workspace/coverage/default/17.sram_ctrl_partial_access_b2b.1750253727 Mar 03 02:29:08 PM PST 24 Mar 03 02:32:41 PM PST 24 8641226929 ps
T213 /workspace/coverage/default/12.sram_ctrl_alert_test.1020380357 Mar 03 02:28:57 PM PST 24 Mar 03 02:28:58 PM PST 24 17793974 ps
T214 /workspace/coverage/default/24.sram_ctrl_ram_cfg.3541188705 Mar 03 02:29:36 PM PST 24 Mar 03 02:29:38 PM PST 24 28916633 ps
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