Unified Coverage Report :: Group :: sram_ctrl_env_pkg::sram_ctrl_env_cov#(10)::subword_access_cg

Group : sram_ctrl_env_pkg::sram_ctrl_env_cov#(10)::subword_access_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_sram_ctrl_env_0.1/sram_ctrl_env_cov.sv

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Summary for Group sram_ctrl_env_pkg::sram_ctrl_env_cov#(10)::subword_access_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	7	0	7	100.00
Crosses	10	0	10	100.00

Variables for Group sram_ctrl_env_pkg::sram_ctrl_env_cov#(10)::subword_access_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
subword_granularity_cp	5	0	5	100.00	100	1	1	0
subword_we_cp	2	0	2	100.00	100	1	1	2

Crosses for Group sram_ctrl_env_pkg::sram_ctrl_env_cov#(10)::subword_access_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
subword_access	10	0	10	100.00	100	1	1	0

Summary for Variable subword_granularity_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	5	0	5	100.00

User Defined Bins for subword_granularity_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ill_access	0	Illegal

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
word_access	42938295	1			T1	150		T2	70		T3	170991
triple_byte_access	2520670	1			T1	4		T2	127		T3	3023
halfword_access	3790055	1			T1	7		T2	216		T3	4625
byte_access	5056029	1			T1	7		T2	407		T3	6273
zero_access	1271621	1			T1	2		T2	191		T3	1541

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Summary for Variable subword_we_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for subword_we_cp

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

27728709

1

T1

93

T2

373

T3

93321

auto[1]

27847961

1

T1

77

T2

638

T3

93132

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Summary for Cross subword_access

Samples crossed: subword_we_cp subword_granularity_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	10	0	10	100.00

Automatically Generated Cross Bins for subword_access

Bins

subword_we_cp	subword_granularity_cp	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0]	word_access	21414625	1			T1	86		T2	4		T3	85607
auto[0]	triple_byte_access	1256826	1			T1	1		T2	16		T3	1483
auto[0]	halfword_access	1891553	1			T1	1		T2	48		T3	2332
auto[0]	byte_access	2526562	1			T1	4		T2	171		T3	3121
auto[0]	zero_access	639143	1			T1	1		T2	134		T3	778
auto[1]	word_access	21523670	1			T1	64		T2	66		T3	85384
auto[1]	triple_byte_access	1263844	1			T1	3		T2	111		T3	1540
auto[1]	halfword_access	1898502	1			T1	6		T2	168		T3	2293
auto[1]	byte_access	2529467	1			T1	3		T2	236		T3	3152
auto[1]	zero_access	632478	1			T1	1		T2	57		T3	763