Unified Coverage Report :: Group :: sram_ctrl_env_pkg::sram_ctrl_env_cov#(10)::subword_access_cg

Group : sram_ctrl_env_pkg::sram_ctrl_env_cov#(10)::subword_access_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_sram_ctrl_env_0.1/sram_ctrl_env_cov.sv

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Summary for Group sram_ctrl_env_pkg::sram_ctrl_env_cov#(10)::subword_access_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	7	0	7	100.00
Crosses	10	0	10	100.00

Variables for Group sram_ctrl_env_pkg::sram_ctrl_env_cov#(10)::subword_access_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
subword_granularity_cp	5	0	5	100.00	100	1	1	0
subword_we_cp	2	0	2	100.00	100	1	1	2

Crosses for Group sram_ctrl_env_pkg::sram_ctrl_env_cov#(10)::subword_access_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
subword_access	10	0	10	100.00	100	1	1	0

Summary for Variable subword_granularity_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	5	0	5	100.00

User Defined Bins for subword_granularity_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ill_access	0	Illegal

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
word_access	26211700	1			T1	5257		T2	6642		T3	8182
triple_byte_access	2224268	1			T2	116		T3	394		T4	186
halfword_access	3329635	1			T2	200		T3	535		T4	241
byte_access	4451933	1			T2	274		T3	680		T4	349
zero_access	1121708	1			T2	56		T3	209		T4	99

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Summary for Variable subword_we_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for subword_we_cp

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

18624844

1

T1

2617

T2

3700

T3

5074

auto[1]

18714400

1

T1

2640

T2

3588

T3

4926

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Summary for Cross subword_access

Samples crossed: subword_we_cp subword_granularity_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	10	0	10	100.00

Automatically Generated Cross Bins for subword_access

Bins

subword_we_cp	subword_granularity_cp	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0]	word_access	13067826	1			T1	2617		T2	3347		T3	4170
auto[0]	triple_byte_access	1109818	1			T2	66		T3	190		T4	97
auto[0]	halfword_access	1658142	1			T2	110		T3	279		T4	104
auto[0]	byte_access	2224373	1			T2	147		T3	345		T4	174
auto[0]	zero_access	564685	1			T2	30		T3	90		T4	51
auto[1]	word_access	13143874	1			T1	2640		T2	3295		T3	4012
auto[1]	triple_byte_access	1114450	1			T2	50		T3	204		T4	89
auto[1]	halfword_access	1671493	1			T2	90		T3	256		T4	137
auto[1]	byte_access	2227560	1			T2	127		T3	335		T4	175
auto[1]	zero_access	557023	1			T2	26		T3	119		T4	48