Tests
dashboard | hierarchy | modlist | groups | tests | asserts
Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
98.22 99.18 95.41 100.00 100.00 96.12 99.56 97.26


Total test records in report: 888
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html

T321 /workspace/coverage/default/12.sram_ctrl_mem_partial_access.2431923615 May 28 02:14:03 PM PDT 24 May 28 02:14:08 PM PDT 24 206349358 ps
T322 /workspace/coverage/default/23.sram_ctrl_alert_test.2730356759 May 28 02:15:28 PM PDT 24 May 28 02:15:29 PM PDT 24 44485230 ps
T323 /workspace/coverage/default/46.sram_ctrl_ram_cfg.1762219287 May 28 02:19:02 PM PDT 24 May 28 02:19:04 PM PDT 24 34320962 ps
T324 /workspace/coverage/default/45.sram_ctrl_multiple_keys.265634913 May 28 02:18:39 PM PDT 24 May 28 02:25:40 PM PDT 24 10139709141 ps
T325 /workspace/coverage/default/1.sram_ctrl_mem_walk.3531707598 May 28 02:13:17 PM PDT 24 May 28 02:13:24 PM PDT 24 364942786 ps
T326 /workspace/coverage/default/9.sram_ctrl_executable.703798310 May 28 02:13:54 PM PDT 24 May 28 02:16:31 PM PDT 24 1763140016 ps
T327 /workspace/coverage/default/0.sram_ctrl_stress_pipeline.1326473480 May 28 02:13:13 PM PDT 24 May 28 02:19:14 PM PDT 24 24071957712 ps
T167 /workspace/coverage/default/37.sram_ctrl_executable.2979902442 May 28 02:17:21 PM PDT 24 May 28 02:29:41 PM PDT 24 13294034331 ps
T328 /workspace/coverage/default/17.sram_ctrl_stress_pipeline.3540297868 May 28 02:14:29 PM PDT 24 May 28 02:21:00 PM PDT 24 16314835460 ps
T329 /workspace/coverage/default/18.sram_ctrl_ram_cfg.3249953221 May 28 02:14:46 PM PDT 24 May 28 02:14:50 PM PDT 24 46020729 ps
T330 /workspace/coverage/default/37.sram_ctrl_mem_walk.3268071290 May 28 02:17:21 PM PDT 24 May 28 02:17:28 PM PDT 24 803378276 ps
T331 /workspace/coverage/default/38.sram_ctrl_executable.88430156 May 28 02:17:33 PM PDT 24 May 28 02:28:09 PM PDT 24 1694285376 ps
T332 /workspace/coverage/default/36.sram_ctrl_throughput_w_partial_write.3825409592 May 28 02:17:14 PM PDT 24 May 28 02:17:38 PM PDT 24 82529686 ps
T333 /workspace/coverage/default/24.sram_ctrl_multiple_keys.2503937404 May 28 02:15:24 PM PDT 24 May 28 02:21:30 PM PDT 24 13737135756 ps
T334 /workspace/coverage/default/1.sram_ctrl_max_throughput.1845564309 May 28 02:13:17 PM PDT 24 May 28 02:14:42 PM PDT 24 223112535 ps
T335 /workspace/coverage/default/49.sram_ctrl_bijection.76715562 May 28 02:19:25 PM PDT 24 May 28 02:20:26 PM PDT 24 4130871836 ps
T336 /workspace/coverage/default/47.sram_ctrl_multiple_keys.1373254263 May 28 02:19:03 PM PDT 24 May 28 02:49:16 PM PDT 24 80163520048 ps
T337 /workspace/coverage/default/48.sram_ctrl_stress_pipeline.1267213486 May 28 02:19:16 PM PDT 24 May 28 02:22:37 PM PDT 24 5237055041 ps
T338 /workspace/coverage/default/24.sram_ctrl_lc_escalation.2488914124 May 28 02:15:29 PM PDT 24 May 28 02:15:36 PM PDT 24 1915942312 ps
T25 /workspace/coverage/default/2.sram_ctrl_sec_cm.3984607569 May 28 02:13:36 PM PDT 24 May 28 02:13:41 PM PDT 24 238102402 ps
T339 /workspace/coverage/default/25.sram_ctrl_mem_walk.3117125949 May 28 02:15:40 PM PDT 24 May 28 02:15:47 PM PDT 24 338631579 ps
T340 /workspace/coverage/default/44.sram_ctrl_smoke.3159347158 May 28 02:18:28 PM PDT 24 May 28 02:18:34 PM PDT 24 184725868 ps
T341 /workspace/coverage/default/48.sram_ctrl_bijection.2952212052 May 28 02:19:14 PM PDT 24 May 28 02:20:19 PM PDT 24 32611293914 ps
T342 /workspace/coverage/default/8.sram_ctrl_lc_escalation.654120134 May 28 02:13:46 PM PDT 24 May 28 02:13:49 PM PDT 24 359805000 ps
T343 /workspace/coverage/default/20.sram_ctrl_throughput_w_partial_write.135548283 May 28 02:14:56 PM PDT 24 May 28 02:16:13 PM PDT 24 505571783 ps
T344 /workspace/coverage/default/14.sram_ctrl_smoke.3956483452 May 28 02:14:05 PM PDT 24 May 28 02:14:20 PM PDT 24 2225827444 ps
T345 /workspace/coverage/default/45.sram_ctrl_executable.783407452 May 28 02:18:39 PM PDT 24 May 28 02:24:20 PM PDT 24 9146930130 ps
T346 /workspace/coverage/default/19.sram_ctrl_mem_walk.27676470 May 28 02:14:42 PM PDT 24 May 28 02:14:50 PM PDT 24 292503081 ps
T347 /workspace/coverage/default/34.sram_ctrl_alert_test.2536938487 May 28 02:16:54 PM PDT 24 May 28 02:16:57 PM PDT 24 12317621 ps
T348 /workspace/coverage/default/9.sram_ctrl_partial_access_b2b.74261377 May 28 02:13:53 PM PDT 24 May 28 02:19:31 PM PDT 24 69077423032 ps
T349 /workspace/coverage/default/39.sram_ctrl_mem_partial_access.1246432236 May 28 02:17:41 PM PDT 24 May 28 02:17:45 PM PDT 24 386116023 ps
T350 /workspace/coverage/default/12.sram_ctrl_partial_access.1675773063 May 28 02:13:56 PM PDT 24 May 28 02:14:19 PM PDT 24 368159891 ps
T351 /workspace/coverage/default/32.sram_ctrl_throughput_w_partial_write.1333844202 May 28 02:16:42 PM PDT 24 May 28 02:16:44 PM PDT 24 56699179 ps
T352 /workspace/coverage/default/19.sram_ctrl_executable.512558335 May 28 02:14:45 PM PDT 24 May 28 02:27:44 PM PDT 24 13462326925 ps
T353 /workspace/coverage/default/30.sram_ctrl_partial_access.2115008953 May 28 02:16:19 PM PDT 24 May 28 02:18:10 PM PDT 24 742862481 ps
T354 /workspace/coverage/default/36.sram_ctrl_regwen.1453720416 May 28 02:17:19 PM PDT 24 May 28 02:30:14 PM PDT 24 3819736826 ps
T355 /workspace/coverage/default/47.sram_ctrl_mem_partial_access.1624759135 May 28 02:19:14 PM PDT 24 May 28 02:19:20 PM PDT 24 71722385 ps
T356 /workspace/coverage/default/24.sram_ctrl_partial_access.1073355268 May 28 02:15:21 PM PDT 24 May 28 02:15:31 PM PDT 24 1487164510 ps
T357 /workspace/coverage/default/8.sram_ctrl_mem_walk.1844437318 May 28 02:13:51 PM PDT 24 May 28 02:14:04 PM PDT 24 1411522488 ps
T358 /workspace/coverage/default/18.sram_ctrl_smoke.3250970978 May 28 02:14:45 PM PDT 24 May 28 02:15:05 PM PDT 24 894412930 ps
T359 /workspace/coverage/default/37.sram_ctrl_partial_access.392433341 May 28 02:17:19 PM PDT 24 May 28 02:17:25 PM PDT 24 170293483 ps
T360 /workspace/coverage/default/3.sram_ctrl_executable.2793564917 May 28 02:13:32 PM PDT 24 May 28 02:31:20 PM PDT 24 194276104702 ps
T361 /workspace/coverage/default/46.sram_ctrl_multiple_keys.2656388397 May 28 02:18:51 PM PDT 24 May 28 02:27:19 PM PDT 24 17146318705 ps
T362 /workspace/coverage/default/36.sram_ctrl_bijection.2842001935 May 28 02:17:08 PM PDT 24 May 28 02:18:00 PM PDT 24 2070657063 ps
T363 /workspace/coverage/default/43.sram_ctrl_mem_walk.1295425355 May 28 02:18:28 PM PDT 24 May 28 02:18:35 PM PDT 24 1192607366 ps
T364 /workspace/coverage/default/6.sram_ctrl_executable.2689786830 May 28 02:13:50 PM PDT 24 May 28 02:20:32 PM PDT 24 9142976461 ps
T365 /workspace/coverage/default/41.sram_ctrl_partial_access.2065403450 May 28 02:18:08 PM PDT 24 May 28 02:18:16 PM PDT 24 597817777 ps
T366 /workspace/coverage/default/42.sram_ctrl_lc_escalation.392259030 May 28 02:18:09 PM PDT 24 May 28 02:18:12 PM PDT 24 494784317 ps
T367 /workspace/coverage/default/9.sram_ctrl_lc_escalation.3532650704 May 28 02:13:53 PM PDT 24 May 28 02:14:06 PM PDT 24 1057127164 ps
T368 /workspace/coverage/default/48.sram_ctrl_partial_access_b2b.1806720864 May 28 02:19:18 PM PDT 24 May 28 02:24:05 PM PDT 24 23365769591 ps
T369 /workspace/coverage/default/8.sram_ctrl_stress_pipeline.268764626 May 28 02:13:49 PM PDT 24 May 28 02:20:17 PM PDT 24 6695103807 ps
T370 /workspace/coverage/default/18.sram_ctrl_throughput_w_partial_write.3924677310 May 28 02:14:42 PM PDT 24 May 28 02:16:36 PM PDT 24 295331588 ps
T371 /workspace/coverage/default/12.sram_ctrl_stress_pipeline.1217592087 May 28 02:13:56 PM PDT 24 May 28 02:17:41 PM PDT 24 11536455653 ps
T372 /workspace/coverage/default/24.sram_ctrl_ram_cfg.3843012866 May 28 02:15:20 PM PDT 24 May 28 02:15:21 PM PDT 24 91452330 ps
T373 /workspace/coverage/default/3.sram_ctrl_ram_cfg.1750887971 May 28 02:13:33 PM PDT 24 May 28 02:13:37 PM PDT 24 88998380 ps
T374 /workspace/coverage/default/36.sram_ctrl_stress_pipeline.1052516558 May 28 02:17:05 PM PDT 24 May 28 02:22:04 PM PDT 24 10718830578 ps
T375 /workspace/coverage/default/15.sram_ctrl_partial_access_b2b.44854386 May 28 02:14:21 PM PDT 24 May 28 02:19:02 PM PDT 24 8959712561 ps
T376 /workspace/coverage/default/46.sram_ctrl_mem_walk.690354086 May 28 02:19:01 PM PDT 24 May 28 02:19:07 PM PDT 24 277383988 ps
T377 /workspace/coverage/default/44.sram_ctrl_executable.2559170882 May 28 02:18:39 PM PDT 24 May 28 02:35:10 PM PDT 24 10693390300 ps
T378 /workspace/coverage/default/25.sram_ctrl_regwen.525190357 May 28 02:15:40 PM PDT 24 May 28 02:32:11 PM PDT 24 10948347914 ps
T379 /workspace/coverage/default/45.sram_ctrl_regwen.3497305709 May 28 02:18:49 PM PDT 24 May 28 02:33:00 PM PDT 24 2755788233 ps
T380 /workspace/coverage/default/5.sram_ctrl_smoke.2376218570 May 28 02:13:35 PM PDT 24 May 28 02:13:57 PM PDT 24 4788844562 ps
T381 /workspace/coverage/default/39.sram_ctrl_max_throughput.3162851742 May 28 02:17:41 PM PDT 24 May 28 02:17:57 PM PDT 24 148199615 ps
T382 /workspace/coverage/default/28.sram_ctrl_mem_partial_access.58985283 May 28 02:16:07 PM PDT 24 May 28 02:16:11 PM PDT 24 174350886 ps
T383 /workspace/coverage/default/28.sram_ctrl_partial_access_b2b.3632083283 May 28 02:15:55 PM PDT 24 May 28 02:24:21 PM PDT 24 19934698729 ps
T105 /workspace/coverage/default/31.sram_ctrl_regwen.3810753990 May 28 02:16:30 PM PDT 24 May 28 02:34:52 PM PDT 24 4021229878 ps
T384 /workspace/coverage/default/12.sram_ctrl_mem_walk.2560915816 May 28 02:14:06 PM PDT 24 May 28 02:14:20 PM PDT 24 2396386521 ps
T385 /workspace/coverage/default/17.sram_ctrl_executable.1140177554 May 28 02:14:31 PM PDT 24 May 28 02:26:39 PM PDT 24 7532840385 ps
T386 /workspace/coverage/default/30.sram_ctrl_throughput_w_partial_write.355073275 May 28 02:16:21 PM PDT 24 May 28 02:16:47 PM PDT 24 96933707 ps
T387 /workspace/coverage/default/18.sram_ctrl_partial_access_b2b.1382054671 May 28 02:14:43 PM PDT 24 May 28 02:22:20 PM PDT 24 25598202544 ps
T388 /workspace/coverage/default/43.sram_ctrl_stress_pipeline.2839170876 May 28 02:18:15 PM PDT 24 May 28 02:22:24 PM PDT 24 14158875574 ps
T389 /workspace/coverage/default/34.sram_ctrl_throughput_w_partial_write.679335520 May 28 02:16:56 PM PDT 24 May 28 02:17:13 PM PDT 24 810094704 ps
T390 /workspace/coverage/default/20.sram_ctrl_mem_walk.3966499189 May 28 02:14:56 PM PDT 24 May 28 02:15:03 PM PDT 24 98689039 ps
T391 /workspace/coverage/default/2.sram_ctrl_mem_walk.2137862374 May 28 02:13:30 PM PDT 24 May 28 02:13:38 PM PDT 24 1194940637 ps
T392 /workspace/coverage/default/9.sram_ctrl_ram_cfg.1552318943 May 28 02:13:51 PM PDT 24 May 28 02:13:55 PM PDT 24 28556778 ps
T393 /workspace/coverage/default/27.sram_ctrl_stress_pipeline.350253898 May 28 02:15:55 PM PDT 24 May 28 02:21:01 PM PDT 24 12688345474 ps
T394 /workspace/coverage/default/26.sram_ctrl_smoke.3902478470 May 28 02:15:43 PM PDT 24 May 28 02:16:49 PM PDT 24 1062679721 ps
T395 /workspace/coverage/default/38.sram_ctrl_throughput_w_partial_write.3625216166 May 28 02:17:27 PM PDT 24 May 28 02:17:57 PM PDT 24 404374253 ps
T396 /workspace/coverage/default/13.sram_ctrl_throughput_w_partial_write.674992326 May 28 02:14:04 PM PDT 24 May 28 02:16:18 PM PDT 24 583735529 ps
T397 /workspace/coverage/default/15.sram_ctrl_alert_test.1753654801 May 28 02:14:17 PM PDT 24 May 28 02:14:19 PM PDT 24 40799927 ps
T398 /workspace/coverage/default/3.sram_ctrl_regwen.2737561002 May 28 02:13:31 PM PDT 24 May 28 02:19:44 PM PDT 24 17800688177 ps
T399 /workspace/coverage/default/48.sram_ctrl_ram_cfg.1097657024 May 28 02:19:26 PM PDT 24 May 28 02:19:28 PM PDT 24 108024437 ps
T400 /workspace/coverage/default/40.sram_ctrl_executable.3688304313 May 28 02:17:51 PM PDT 24 May 28 02:27:04 PM PDT 24 58437554313 ps
T401 /workspace/coverage/default/37.sram_ctrl_max_throughput.1440661812 May 28 02:17:17 PM PDT 24 May 28 02:18:26 PM PDT 24 117279484 ps
T402 /workspace/coverage/default/32.sram_ctrl_lc_escalation.2794812830 May 28 02:16:43 PM PDT 24 May 28 02:16:50 PM PDT 24 1467650507 ps
T403 /workspace/coverage/default/12.sram_ctrl_ram_cfg.2651278169 May 28 02:14:02 PM PDT 24 May 28 02:14:04 PM PDT 24 51635484 ps
T404 /workspace/coverage/default/6.sram_ctrl_alert_test.3577345648 May 28 02:13:45 PM PDT 24 May 28 02:13:47 PM PDT 24 59067513 ps
T405 /workspace/coverage/default/13.sram_ctrl_partial_access_b2b.4208333265 May 28 02:14:05 PM PDT 24 May 28 02:17:58 PM PDT 24 6651933574 ps
T40 /workspace/coverage/default/46.sram_ctrl_stress_all_with_rand_reset.1113412449 May 28 02:19:03 PM PDT 24 May 28 02:19:18 PM PDT 24 1016917488 ps
T406 /workspace/coverage/default/3.sram_ctrl_throughput_w_partial_write.816934865 May 28 02:13:34 PM PDT 24 May 28 02:13:39 PM PDT 24 334602877 ps
T407 /workspace/coverage/default/41.sram_ctrl_ram_cfg.92525236 May 28 02:18:06 PM PDT 24 May 28 02:18:08 PM PDT 24 67207077 ps
T408 /workspace/coverage/default/27.sram_ctrl_max_throughput.3118166728 May 28 02:15:55 PM PDT 24 May 28 02:18:23 PM PDT 24 410228827 ps
T409 /workspace/coverage/default/1.sram_ctrl_partial_access.2454221390 May 28 02:13:17 PM PDT 24 May 28 02:13:43 PM PDT 24 472262682 ps
T410 /workspace/coverage/default/45.sram_ctrl_max_throughput.3593656311 May 28 02:18:39 PM PDT 24 May 28 02:21:17 PM PDT 24 1825589891 ps
T411 /workspace/coverage/default/39.sram_ctrl_lc_escalation.980531555 May 28 02:17:38 PM PDT 24 May 28 02:17:47 PM PDT 24 5664460962 ps
T412 /workspace/coverage/default/12.sram_ctrl_lc_escalation.1970117599 May 28 02:14:02 PM PDT 24 May 28 02:14:10 PM PDT 24 3050744121 ps
T413 /workspace/coverage/default/21.sram_ctrl_throughput_w_partial_write.3413164966 May 28 02:14:56 PM PDT 24 May 28 02:15:22 PM PDT 24 102751927 ps
T414 /workspace/coverage/default/24.sram_ctrl_alert_test.2138348951 May 28 02:15:27 PM PDT 24 May 28 02:15:29 PM PDT 24 19180910 ps
T415 /workspace/coverage/default/30.sram_ctrl_mem_walk.968585210 May 28 02:16:22 PM PDT 24 May 28 02:16:33 PM PDT 24 691996805 ps
T416 /workspace/coverage/default/15.sram_ctrl_multiple_keys.1822770289 May 28 02:14:08 PM PDT 24 May 28 02:16:18 PM PDT 24 2348238287 ps
T417 /workspace/coverage/default/39.sram_ctrl_regwen.1266598902 May 28 02:17:42 PM PDT 24 May 28 02:32:26 PM PDT 24 5623006845 ps
T418 /workspace/coverage/default/43.sram_ctrl_regwen.3463239062 May 28 02:18:28 PM PDT 24 May 28 02:31:26 PM PDT 24 6033337993 ps
T419 /workspace/coverage/default/32.sram_ctrl_ram_cfg.595755185 May 28 02:16:44 PM PDT 24 May 28 02:16:46 PM PDT 24 43074984 ps
T420 /workspace/coverage/default/24.sram_ctrl_executable.816071307 May 28 02:15:29 PM PDT 24 May 28 02:30:07 PM PDT 24 16253527388 ps
T421 /workspace/coverage/default/21.sram_ctrl_max_throughput.2031276145 May 28 02:14:55 PM PDT 24 May 28 02:15:08 PM PDT 24 129519904 ps
T422 /workspace/coverage/default/38.sram_ctrl_multiple_keys.3721788595 May 28 02:17:30 PM PDT 24 May 28 02:28:03 PM PDT 24 4044135388 ps
T423 /workspace/coverage/default/13.sram_ctrl_partial_access.3872057909 May 28 02:14:05 PM PDT 24 May 28 02:14:20 PM PDT 24 2533043720 ps
T424 /workspace/coverage/default/25.sram_ctrl_multiple_keys.1221766679 May 28 02:15:24 PM PDT 24 May 28 02:32:13 PM PDT 24 5765096743 ps
T425 /workspace/coverage/default/18.sram_ctrl_mem_walk.2718936540 May 28 02:14:42 PM PDT 24 May 28 02:14:51 PM PDT 24 428723181 ps
T426 /workspace/coverage/default/3.sram_ctrl_multiple_keys.532419797 May 28 02:13:30 PM PDT 24 May 28 02:26:51 PM PDT 24 5381145936 ps
T427 /workspace/coverage/default/36.sram_ctrl_smoke.2027898488 May 28 02:17:06 PM PDT 24 May 28 02:17:19 PM PDT 24 480626239 ps
T428 /workspace/coverage/default/19.sram_ctrl_mem_partial_access.3379620460 May 28 02:14:44 PM PDT 24 May 28 02:14:51 PM PDT 24 372964255 ps
T429 /workspace/coverage/default/42.sram_ctrl_max_throughput.279741207 May 28 02:18:06 PM PDT 24 May 28 02:20:09 PM PDT 24 722801731 ps
T430 /workspace/coverage/default/34.sram_ctrl_mem_partial_access.350564913 May 28 02:16:53 PM PDT 24 May 28 02:16:58 PM PDT 24 109955622 ps
T431 /workspace/coverage/default/28.sram_ctrl_regwen.1333286061 May 28 02:16:06 PM PDT 24 May 28 02:29:06 PM PDT 24 4518536502 ps
T432 /workspace/coverage/default/20.sram_ctrl_regwen.73386696 May 28 02:14:57 PM PDT 24 May 28 02:23:31 PM PDT 24 16378773744 ps
T433 /workspace/coverage/default/24.sram_ctrl_regwen.1953174858 May 28 02:15:28 PM PDT 24 May 28 02:27:41 PM PDT 24 6188338181 ps
T434 /workspace/coverage/default/39.sram_ctrl_mem_walk.833681736 May 28 02:17:40 PM PDT 24 May 28 02:17:52 PM PDT 24 6192800965 ps
T435 /workspace/coverage/default/19.sram_ctrl_stress_pipeline.2525125631 May 28 02:14:43 PM PDT 24 May 28 02:21:11 PM PDT 24 10316378154 ps
T436 /workspace/coverage/default/17.sram_ctrl_smoke.252720991 May 28 02:14:31 PM PDT 24 May 28 02:14:50 PM PDT 24 1791476282 ps
T437 /workspace/coverage/default/44.sram_ctrl_multiple_keys.2573519442 May 28 02:18:27 PM PDT 24 May 28 02:37:19 PM PDT 24 33308472906 ps
T438 /workspace/coverage/default/30.sram_ctrl_regwen.1346600385 May 28 02:16:19 PM PDT 24 May 28 02:23:15 PM PDT 24 2494221194 ps
T439 /workspace/coverage/default/1.sram_ctrl_ram_cfg.2324441836 May 28 02:13:17 PM PDT 24 May 28 02:13:19 PM PDT 24 80469093 ps
T440 /workspace/coverage/default/39.sram_ctrl_stress_pipeline.2191826149 May 28 02:17:40 PM PDT 24 May 28 02:21:00 PM PDT 24 4081678377 ps
T441 /workspace/coverage/default/14.sram_ctrl_regwen.3176064729 May 28 02:14:07 PM PDT 24 May 28 02:19:51 PM PDT 24 4620276075 ps
T442 /workspace/coverage/default/23.sram_ctrl_smoke.2302968611 May 28 02:15:11 PM PDT 24 May 28 02:17:22 PM PDT 24 1721868745 ps
T443 /workspace/coverage/default/23.sram_ctrl_ram_cfg.4085940518 May 28 02:15:24 PM PDT 24 May 28 02:15:26 PM PDT 24 83800817 ps
T444 /workspace/coverage/default/37.sram_ctrl_bijection.678567897 May 28 02:17:19 PM PDT 24 May 28 02:18:51 PM PDT 24 5251912448 ps
T445 /workspace/coverage/default/33.sram_ctrl_throughput_w_partial_write.1327076417 May 28 02:16:42 PM PDT 24 May 28 02:17:14 PM PDT 24 580737447 ps
T446 /workspace/coverage/default/4.sram_ctrl_partial_access_b2b.3109803983 May 28 02:13:36 PM PDT 24 May 28 02:20:45 PM PDT 24 34284605550 ps
T447 /workspace/coverage/default/10.sram_ctrl_lc_escalation.708209184 May 28 02:13:53 PM PDT 24 May 28 02:14:06 PM PDT 24 5703621637 ps
T448 /workspace/coverage/default/26.sram_ctrl_regwen.1334408709 May 28 02:15:42 PM PDT 24 May 28 02:24:16 PM PDT 24 6856608656 ps
T449 /workspace/coverage/default/14.sram_ctrl_lc_escalation.3540949014 May 28 02:14:20 PM PDT 24 May 28 02:14:29 PM PDT 24 663496003 ps
T450 /workspace/coverage/default/37.sram_ctrl_mem_partial_access.2349796909 May 28 02:17:19 PM PDT 24 May 28 02:17:23 PM PDT 24 216146713 ps
T451 /workspace/coverage/default/30.sram_ctrl_ram_cfg.3479354689 May 28 02:16:18 PM PDT 24 May 28 02:16:21 PM PDT 24 33564790 ps
T452 /workspace/coverage/default/9.sram_ctrl_bijection.2779979835 May 28 02:13:55 PM PDT 24 May 28 02:14:34 PM PDT 24 2003904979 ps
T453 /workspace/coverage/default/31.sram_ctrl_lc_escalation.502770152 May 28 02:16:30 PM PDT 24 May 28 02:16:41 PM PDT 24 749997534 ps
T454 /workspace/coverage/default/9.sram_ctrl_multiple_keys.1607990379 May 28 02:13:49 PM PDT 24 May 28 02:29:25 PM PDT 24 68176511730 ps
T455 /workspace/coverage/default/3.sram_ctrl_partial_access_b2b.2591285024 May 28 02:13:31 PM PDT 24 May 28 02:22:53 PM PDT 24 49012832008 ps
T456 /workspace/coverage/default/14.sram_ctrl_bijection.3509424453 May 28 02:14:15 PM PDT 24 May 28 02:14:41 PM PDT 24 4467797200 ps
T457 /workspace/coverage/default/15.sram_ctrl_ram_cfg.2108023107 May 28 02:14:16 PM PDT 24 May 28 02:14:19 PM PDT 24 29708645 ps
T458 /workspace/coverage/default/1.sram_ctrl_stress_pipeline.734618495 May 28 02:13:12 PM PDT 24 May 28 02:15:41 PM PDT 24 5615446253 ps
T459 /workspace/coverage/default/23.sram_ctrl_partial_access.375382414 May 28 02:15:09 PM PDT 24 May 28 02:15:40 PM PDT 24 111326433 ps
T460 /workspace/coverage/default/21.sram_ctrl_mem_partial_access.2185070075 May 28 02:14:55 PM PDT 24 May 28 02:14:59 PM PDT 24 179120653 ps
T461 /workspace/coverage/default/37.sram_ctrl_alert_test.1953334664 May 28 02:17:29 PM PDT 24 May 28 02:17:31 PM PDT 24 43294007 ps
T462 /workspace/coverage/default/37.sram_ctrl_multiple_keys.2506242196 May 28 02:17:18 PM PDT 24 May 28 02:38:34 PM PDT 24 16365932808 ps
T463 /workspace/coverage/default/19.sram_ctrl_regwen.1357003887 May 28 02:14:45 PM PDT 24 May 28 02:21:29 PM PDT 24 1772250534 ps
T464 /workspace/coverage/default/1.sram_ctrl_executable.2496654411 May 28 02:13:19 PM PDT 24 May 28 02:15:28 PM PDT 24 697793007 ps
T465 /workspace/coverage/default/16.sram_ctrl_mem_walk.660551473 May 28 02:14:27 PM PDT 24 May 28 02:14:35 PM PDT 24 900259922 ps
T466 /workspace/coverage/default/39.sram_ctrl_ram_cfg.1437267851 May 28 02:17:42 PM PDT 24 May 28 02:17:44 PM PDT 24 269514875 ps
T467 /workspace/coverage/default/48.sram_ctrl_regwen.467482644 May 28 02:19:26 PM PDT 24 May 28 02:31:41 PM PDT 24 14771850369 ps
T468 /workspace/coverage/default/14.sram_ctrl_mem_walk.2728072538 May 28 02:14:09 PM PDT 24 May 28 02:14:21 PM PDT 24 1237174047 ps
T69 /workspace/coverage/default/27.sram_ctrl_stress_all_with_rand_reset.1114305357 May 28 02:15:54 PM PDT 24 May 28 02:16:21 PM PDT 24 388947530 ps
T469 /workspace/coverage/default/29.sram_ctrl_partial_access.3929756575 May 28 02:16:10 PM PDT 24 May 28 02:16:29 PM PDT 24 146636057 ps
T470 /workspace/coverage/default/22.sram_ctrl_ram_cfg.1471051219 May 28 02:15:10 PM PDT 24 May 28 02:15:14 PM PDT 24 76596789 ps
T471 /workspace/coverage/default/22.sram_ctrl_partial_access.1750603131 May 28 02:15:10 PM PDT 24 May 28 02:15:33 PM PDT 24 3963226614 ps
T472 /workspace/coverage/default/41.sram_ctrl_multiple_keys.3582195488 May 28 02:18:05 PM PDT 24 May 28 02:53:08 PM PDT 24 195994745990 ps
T473 /workspace/coverage/default/33.sram_ctrl_mem_walk.3044654147 May 28 02:16:43 PM PDT 24 May 28 02:16:55 PM PDT 24 450272749 ps
T474 /workspace/coverage/default/8.sram_ctrl_smoke.3316422643 May 28 02:13:47 PM PDT 24 May 28 02:13:59 PM PDT 24 1504522328 ps
T475 /workspace/coverage/default/11.sram_ctrl_smoke.60972799 May 28 02:13:55 PM PDT 24 May 28 02:14:16 PM PDT 24 751987046 ps
T476 /workspace/coverage/default/25.sram_ctrl_stress_pipeline.2069042017 May 28 02:15:21 PM PDT 24 May 28 02:20:46 PM PDT 24 19773004945 ps
T477 /workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.3256266265 May 28 02:19:24 PM PDT 24 May 28 02:20:47 PM PDT 24 145782913 ps
T478 /workspace/coverage/default/2.sram_ctrl_multiple_keys.20996301 May 28 02:13:34 PM PDT 24 May 28 02:19:54 PM PDT 24 22846672748 ps
T479 /workspace/coverage/default/5.sram_ctrl_regwen.1360406976 May 28 02:13:45 PM PDT 24 May 28 02:24:04 PM PDT 24 3072002634 ps
T480 /workspace/coverage/default/20.sram_ctrl_partial_access.249487037 May 28 02:14:56 PM PDT 24 May 28 02:17:15 PM PDT 24 3476650081 ps
T481 /workspace/coverage/default/23.sram_ctrl_throughput_w_partial_write.1759857412 May 28 02:15:09 PM PDT 24 May 28 02:17:47 PM PDT 24 601356696 ps
T482 /workspace/coverage/default/2.sram_ctrl_partial_access.3941747005 May 28 02:13:33 PM PDT 24 May 28 02:13:54 PM PDT 24 323498126 ps
T483 /workspace/coverage/default/17.sram_ctrl_regwen.2040260466 May 28 02:14:32 PM PDT 24 May 28 02:17:48 PM PDT 24 7041051843 ps
T484 /workspace/coverage/default/46.sram_ctrl_regwen.3158334757 May 28 02:19:02 PM PDT 24 May 28 02:54:14 PM PDT 24 72177935524 ps
T485 /workspace/coverage/default/1.sram_ctrl_partial_access_b2b.272682192 May 28 02:13:18 PM PDT 24 May 28 02:18:58 PM PDT 24 15880681589 ps
T486 /workspace/coverage/default/6.sram_ctrl_multiple_keys.1056767884 May 28 02:13:51 PM PDT 24 May 28 02:46:48 PM PDT 24 11315972428 ps
T487 /workspace/coverage/default/3.sram_ctrl_mem_partial_access.3917880971 May 28 02:13:32 PM PDT 24 May 28 02:13:37 PM PDT 24 105111614 ps
T488 /workspace/coverage/default/11.sram_ctrl_max_throughput.3297340891 May 28 02:13:57 PM PDT 24 May 28 02:14:35 PM PDT 24 468955787 ps
T489 /workspace/coverage/default/28.sram_ctrl_executable.3143462448 May 28 02:16:17 PM PDT 24 May 28 02:34:08 PM PDT 24 22896236822 ps
T490 /workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.3559594435 May 28 02:18:51 PM PDT 24 May 28 02:19:49 PM PDT 24 116614783 ps
T491 /workspace/coverage/default/21.sram_ctrl_mem_walk.3134452314 May 28 02:14:58 PM PDT 24 May 28 02:15:11 PM PDT 24 6480389010 ps
T492 /workspace/coverage/default/10.sram_ctrl_mem_partial_access.1508490361 May 28 02:13:53 PM PDT 24 May 28 02:14:02 PM PDT 24 2253355611 ps
T493 /workspace/coverage/default/9.sram_ctrl_alert_test.218232713 May 28 02:13:52 PM PDT 24 May 28 02:13:56 PM PDT 24 43453748 ps
T494 /workspace/coverage/default/37.sram_ctrl_stress_pipeline.1171130343 May 28 02:17:22 PM PDT 24 May 28 02:20:37 PM PDT 24 2346949666 ps
T495 /workspace/coverage/default/24.sram_ctrl_partial_access_b2b.1037934657 May 28 02:15:29 PM PDT 24 May 28 02:24:46 PM PDT 24 41215530280 ps
T496 /workspace/coverage/default/17.sram_ctrl_mem_walk.2319945387 May 28 02:14:33 PM PDT 24 May 28 02:14:43 PM PDT 24 941368036 ps
T497 /workspace/coverage/default/43.sram_ctrl_partial_access_b2b.2413580864 May 28 02:18:22 PM PDT 24 May 28 02:22:26 PM PDT 24 11381493483 ps
T498 /workspace/coverage/default/45.sram_ctrl_ram_cfg.822946550 May 28 02:18:50 PM PDT 24 May 28 02:18:52 PM PDT 24 36677731 ps
T499 /workspace/coverage/default/49.sram_ctrl_stress_pipeline.1116749634 May 28 02:19:27 PM PDT 24 May 28 02:23:02 PM PDT 24 35715898901 ps
T500 /workspace/coverage/default/35.sram_ctrl_throughput_w_partial_write.3558736611 May 28 02:17:05 PM PDT 24 May 28 02:18:05 PM PDT 24 197554321 ps
T501 /workspace/coverage/default/49.sram_ctrl_lc_escalation.3774235277 May 28 02:19:37 PM PDT 24 May 28 02:19:47 PM PDT 24 2631606749 ps
T26 /workspace/coverage/default/4.sram_ctrl_sec_cm.3339571417 May 28 02:13:35 PM PDT 24 May 28 02:13:41 PM PDT 24 1692225239 ps
T502 /workspace/coverage/default/34.sram_ctrl_stress_pipeline.2498867028 May 28 02:16:55 PM PDT 24 May 28 02:19:20 PM PDT 24 2482373697 ps
T503 /workspace/coverage/default/0.sram_ctrl_partial_access.507570228 May 28 02:13:15 PM PDT 24 May 28 02:13:20 PM PDT 24 353370771 ps
T504 /workspace/coverage/default/44.sram_ctrl_partial_access_b2b.2117924072 May 28 02:18:30 PM PDT 24 May 28 02:24:19 PM PDT 24 23501005303 ps
T505 /workspace/coverage/default/11.sram_ctrl_mem_walk.2706297171 May 28 02:13:56 PM PDT 24 May 28 02:14:09 PM PDT 24 1748255265 ps
T506 /workspace/coverage/default/17.sram_ctrl_alert_test.1615207422 May 28 02:14:43 PM PDT 24 May 28 02:14:48 PM PDT 24 17942768 ps
T507 /workspace/coverage/default/20.sram_ctrl_partial_access_b2b.1220781021 May 28 02:14:56 PM PDT 24 May 28 02:21:10 PM PDT 24 14707532316 ps
T508 /workspace/coverage/default/17.sram_ctrl_multiple_keys.2039663277 May 28 02:14:28 PM PDT 24 May 28 02:25:05 PM PDT 24 8638608983 ps
T509 /workspace/coverage/default/39.sram_ctrl_throughput_w_partial_write.170026600 May 28 02:17:41 PM PDT 24 May 28 02:18:32 PM PDT 24 235815693 ps
T510 /workspace/coverage/default/48.sram_ctrl_partial_access.578996168 May 28 02:19:14 PM PDT 24 May 28 02:19:21 PM PDT 24 1067926445 ps
T511 /workspace/coverage/default/32.sram_ctrl_smoke.3146563768 May 28 02:16:28 PM PDT 24 May 28 02:18:11 PM PDT 24 2542128919 ps
T512 /workspace/coverage/default/18.sram_ctrl_max_throughput.2491565899 May 28 02:14:43 PM PDT 24 May 28 02:16:27 PM PDT 24 249413762 ps
T513 /workspace/coverage/default/4.sram_ctrl_throughput_w_partial_write.2286909713 May 28 02:13:38 PM PDT 24 May 28 02:14:32 PM PDT 24 234623801 ps
T514 /workspace/coverage/default/39.sram_ctrl_partial_access_b2b.285786417 May 28 02:17:40 PM PDT 24 May 28 02:22:27 PM PDT 24 42627925912 ps
T515 /workspace/coverage/default/3.sram_ctrl_smoke.571447577 May 28 02:13:33 PM PDT 24 May 28 02:13:49 PM PDT 24 1941478728 ps
T516 /workspace/coverage/default/41.sram_ctrl_smoke.2609304687 May 28 02:18:06 PM PDT 24 May 28 02:20:41 PM PDT 24 719225029 ps
T517 /workspace/coverage/default/35.sram_ctrl_partial_access.2730582062 May 28 02:16:56 PM PDT 24 May 28 02:17:15 PM PDT 24 320088112 ps
T518 /workspace/coverage/default/14.sram_ctrl_partial_access_b2b.1387323658 May 28 02:14:06 PM PDT 24 May 28 02:18:04 PM PDT 24 8840642415 ps
T519 /workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.95538441 May 28 02:13:49 PM PDT 24 May 28 02:15:52 PM PDT 24 135422043 ps
T520 /workspace/coverage/default/5.sram_ctrl_throughput_w_partial_write.3320307426 May 28 02:13:34 PM PDT 24 May 28 02:14:20 PM PDT 24 291332340 ps
T521 /workspace/coverage/default/18.sram_ctrl_lc_escalation.2015383582 May 28 02:14:43 PM PDT 24 May 28 02:14:51 PM PDT 24 827061464 ps
T522 /workspace/coverage/default/44.sram_ctrl_bijection.2918911682 May 28 02:18:28 PM PDT 24 May 28 02:19:22 PM PDT 24 11294967332 ps
T523 /workspace/coverage/default/22.sram_ctrl_partial_access_b2b.3841934626 May 28 02:15:11 PM PDT 24 May 28 02:18:11 PM PDT 24 6732260723 ps
T524 /workspace/coverage/default/5.sram_ctrl_executable.2499447402 May 28 02:13:45 PM PDT 24 May 28 02:26:53 PM PDT 24 73422736049 ps
T525 /workspace/coverage/default/12.sram_ctrl_bijection.3731236170 May 28 02:13:56 PM PDT 24 May 28 02:15:20 PM PDT 24 4793286981 ps
T526 /workspace/coverage/default/5.sram_ctrl_max_throughput.990988583 May 28 02:13:33 PM PDT 24 May 28 02:14:59 PM PDT 24 424636100 ps
T527 /workspace/coverage/default/49.sram_ctrl_multiple_keys.3220061943 May 28 02:19:25 PM PDT 24 May 28 02:27:04 PM PDT 24 14999881284 ps
T528 /workspace/coverage/default/8.sram_ctrl_regwen.2101582933 May 28 02:13:51 PM PDT 24 May 28 02:39:47 PM PDT 24 79247295441 ps
T119 /workspace/coverage/default/13.sram_ctrl_mem_partial_access.1801540537 May 28 02:14:04 PM PDT 24 May 28 02:14:10 PM PDT 24 349124149 ps
T529 /workspace/coverage/default/49.sram_ctrl_smoke.3545718179 May 28 02:19:26 PM PDT 24 May 28 02:19:36 PM PDT 24 783796767 ps
T530 /workspace/coverage/default/20.sram_ctrl_max_throughput.3758669094 May 28 02:14:56 PM PDT 24 May 28 02:16:10 PM PDT 24 240127356 ps
T531 /workspace/coverage/default/45.sram_ctrl_partial_access_b2b.3436749195 May 28 02:18:39 PM PDT 24 May 28 02:22:49 PM PDT 24 24116678747 ps
T532 /workspace/coverage/default/49.sram_ctrl_regwen.1740933857 May 28 02:19:37 PM PDT 24 May 28 02:23:42 PM PDT 24 1808463763 ps
T533 /workspace/coverage/default/32.sram_ctrl_partial_access_b2b.4241968498 May 28 02:16:29 PM PDT 24 May 28 02:19:13 PM PDT 24 11105336456 ps
T534 /workspace/coverage/default/0.sram_ctrl_alert_test.3294184654 May 28 02:13:16 PM PDT 24 May 28 02:13:19 PM PDT 24 14427761 ps
T535 /workspace/coverage/default/28.sram_ctrl_smoke.2559346103 May 28 02:15:59 PM PDT 24 May 28 02:19:01 PM PDT 24 1370173413 ps
T536 /workspace/coverage/default/46.sram_ctrl_bijection.1793014957 May 28 02:18:50 PM PDT 24 May 28 02:20:27 PM PDT 24 22665356422 ps
T537 /workspace/coverage/default/35.sram_ctrl_mem_walk.3145344869 May 28 02:17:07 PM PDT 24 May 28 02:17:15 PM PDT 24 1423627232 ps
T538 /workspace/coverage/default/14.sram_ctrl_ram_cfg.293409269 May 28 02:14:20 PM PDT 24 May 28 02:14:23 PM PDT 24 44448048 ps
T539 /workspace/coverage/default/19.sram_ctrl_partial_access_b2b.3681547611 May 28 02:14:43 PM PDT 24 May 28 02:22:38 PM PDT 24 40066361407 ps
T540 /workspace/coverage/default/21.sram_ctrl_partial_access_b2b.2156019600 May 28 02:15:00 PM PDT 24 May 28 02:21:49 PM PDT 24 19395033754 ps
T541 /workspace/coverage/default/6.sram_ctrl_smoke.2281844651 May 28 02:13:49 PM PDT 24 May 28 02:16:01 PM PDT 24 639650421 ps
T542 /workspace/coverage/default/27.sram_ctrl_executable.3585458053 May 28 02:15:58 PM PDT 24 May 28 02:42:38 PM PDT 24 28328732790 ps
T543 /workspace/coverage/default/47.sram_ctrl_alert_test.3037757842 May 28 02:19:15 PM PDT 24 May 28 02:19:17 PM PDT 24 21042225 ps
T544 /workspace/coverage/default/33.sram_ctrl_lc_escalation.4095931927 May 28 02:16:47 PM PDT 24 May 28 02:16:54 PM PDT 24 1313255768 ps
T545 /workspace/coverage/default/38.sram_ctrl_mem_walk.295080987 May 28 02:17:29 PM PDT 24 May 28 02:17:40 PM PDT 24 2121869340 ps
T546 /workspace/coverage/default/49.sram_ctrl_partial_access.4152891027 May 28 02:19:25 PM PDT 24 May 28 02:19:41 PM PDT 24 1511831148 ps
T547 /workspace/coverage/default/30.sram_ctrl_partial_access_b2b.3115537062 May 28 02:16:20 PM PDT 24 May 28 02:22:45 PM PDT 24 72979543269 ps
T548 /workspace/coverage/default/38.sram_ctrl_partial_access.697971055 May 28 02:17:29 PM PDT 24 May 28 02:17:44 PM PDT 24 618962551 ps
T549 /workspace/coverage/default/18.sram_ctrl_executable.316491698 May 28 02:14:42 PM PDT 24 May 28 02:21:33 PM PDT 24 8791139924 ps
T550 /workspace/coverage/default/2.sram_ctrl_alert_test.3169924613 May 28 02:13:33 PM PDT 24 May 28 02:13:37 PM PDT 24 12497282 ps
T551 /workspace/coverage/default/33.sram_ctrl_ram_cfg.369422375 May 28 02:16:43 PM PDT 24 May 28 02:16:45 PM PDT 24 69310853 ps
T552 /workspace/coverage/default/34.sram_ctrl_partial_access.1302694687 May 28 02:16:56 PM PDT 24 May 28 02:17:05 PM PDT 24 1390881661 ps
T553 /workspace/coverage/default/1.sram_ctrl_regwen.1459712587 May 28 02:13:19 PM PDT 24 May 28 02:45:45 PM PDT 24 103967297477 ps
T554 /workspace/coverage/default/15.sram_ctrl_mem_partial_access.1702767592 May 28 02:14:17 PM PDT 24 May 28 02:14:23 PM PDT 24 94839240 ps
T555 /workspace/coverage/default/15.sram_ctrl_executable.1261084973 May 28 02:14:09 PM PDT 24 May 28 02:20:48 PM PDT 24 17381698997 ps
T556 /workspace/coverage/default/21.sram_ctrl_partial_access.4099209084 May 28 02:14:58 PM PDT 24 May 28 02:15:08 PM PDT 24 228823980 ps
T557 /workspace/coverage/default/41.sram_ctrl_stress_pipeline.2163593963 May 28 02:18:09 PM PDT 24 May 28 02:22:20 PM PDT 24 4037019491 ps
T558 /workspace/coverage/default/43.sram_ctrl_multiple_keys.3386282545 May 28 02:18:16 PM PDT 24 May 28 02:32:04 PM PDT 24 43983115911 ps
T559 /workspace/coverage/default/36.sram_ctrl_multiple_keys.1630281508 May 28 02:17:05 PM PDT 24 May 28 02:22:03 PM PDT 24 5805789365 ps
T560 /workspace/coverage/default/40.sram_ctrl_max_throughput.3153877587 May 28 02:17:53 PM PDT 24 May 28 02:17:59 PM PDT 24 202506491 ps
T561 /workspace/coverage/default/16.sram_ctrl_smoke.1634561548 May 28 02:14:16 PM PDT 24 May 28 02:14:32 PM PDT 24 241978401 ps
T562 /workspace/coverage/default/43.sram_ctrl_alert_test.1409944768 May 28 02:18:30 PM PDT 24 May 28 02:18:31 PM PDT 24 65085795 ps
T563 /workspace/coverage/default/23.sram_ctrl_regwen.1325697245 May 28 02:15:23 PM PDT 24 May 28 02:22:22 PM PDT 24 3033480539 ps
0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%