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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.95 99.16 94.27 99.72 100.00 95.95 99.12 97.44


Total test records in report: 1024
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html | tests21.html

T320 /workspace/coverage/default/27.sram_ctrl_alert_test.2250057530 Jul 25 06:09:20 PM PDT 24 Jul 25 06:09:21 PM PDT 24 19153185 ps
T321 /workspace/coverage/default/29.sram_ctrl_multiple_keys.3611520898 Jul 25 06:09:32 PM PDT 24 Jul 25 06:26:35 PM PDT 24 10580840429 ps
T322 /workspace/coverage/default/31.sram_ctrl_throughput_w_partial_write.2787871466 Jul 25 06:09:57 PM PDT 24 Jul 25 06:11:05 PM PDT 24 120359943 ps
T323 /workspace/coverage/default/17.sram_ctrl_partial_access_b2b.1586139636 Jul 25 06:08:06 PM PDT 24 Jul 25 06:11:51 PM PDT 24 128887671211 ps
T324 /workspace/coverage/default/18.sram_ctrl_multiple_keys.1019336601 Jul 25 06:08:05 PM PDT 24 Jul 25 06:23:26 PM PDT 24 22218043066 ps
T325 /workspace/coverage/default/0.sram_ctrl_ram_cfg.857238528 Jul 25 06:06:57 PM PDT 24 Jul 25 06:06:58 PM PDT 24 48538022 ps
T326 /workspace/coverage/default/30.sram_ctrl_partial_access.2503089741 Jul 25 06:09:45 PM PDT 24 Jul 25 06:09:47 PM PDT 24 154663785 ps
T327 /workspace/coverage/default/32.sram_ctrl_multiple_keys.3427490652 Jul 25 06:09:52 PM PDT 24 Jul 25 06:15:51 PM PDT 24 4315094833 ps
T328 /workspace/coverage/default/47.sram_ctrl_partial_access.3406672113 Jul 25 06:13:02 PM PDT 24 Jul 25 06:13:09 PM PDT 24 556099954 ps
T69 /workspace/coverage/default/29.sram_ctrl_stress_all_with_rand_reset.2343009750 Jul 25 06:09:43 PM PDT 24 Jul 25 06:17:50 PM PDT 24 7719998866 ps
T329 /workspace/coverage/default/19.sram_ctrl_smoke.3366012745 Jul 25 06:08:11 PM PDT 24 Jul 25 06:08:22 PM PDT 24 585477049 ps
T330 /workspace/coverage/default/25.sram_ctrl_smoke.184328385 Jul 25 06:08:45 PM PDT 24 Jul 25 06:08:46 PM PDT 24 108649204 ps
T331 /workspace/coverage/default/45.sram_ctrl_executable.4285879912 Jul 25 06:12:35 PM PDT 24 Jul 25 06:23:18 PM PDT 24 6547239013 ps
T332 /workspace/coverage/default/0.sram_ctrl_partial_access_b2b.4119921225 Jul 25 06:07:01 PM PDT 24 Jul 25 06:11:35 PM PDT 24 51088591432 ps
T333 /workspace/coverage/default/29.sram_ctrl_mem_walk.761200303 Jul 25 06:09:32 PM PDT 24 Jul 25 06:09:38 PM PDT 24 2539855321 ps
T334 /workspace/coverage/default/28.sram_ctrl_partial_access_b2b.881669068 Jul 25 06:09:21 PM PDT 24 Jul 25 06:12:38 PM PDT 24 28477313172 ps
T335 /workspace/coverage/default/7.sram_ctrl_multiple_keys.3029049475 Jul 25 06:07:27 PM PDT 24 Jul 25 06:22:56 PM PDT 24 10927436076 ps
T336 /workspace/coverage/default/1.sram_ctrl_mem_partial_access.4172818551 Jul 25 06:07:09 PM PDT 24 Jul 25 06:07:14 PM PDT 24 136732175 ps
T15 /workspace/coverage/default/1.sram_ctrl_sec_cm.583015703 Jul 25 06:07:10 PM PDT 24 Jul 25 06:07:14 PM PDT 24 289600654 ps
T27 /workspace/coverage/default/40.sram_ctrl_max_throughput.3110410184 Jul 25 06:11:34 PM PDT 24 Jul 25 06:12:49 PM PDT 24 114942229 ps
T28 /workspace/coverage/default/14.sram_ctrl_alert_test.4277857076 Jul 25 06:07:48 PM PDT 24 Jul 25 06:07:49 PM PDT 24 46090041 ps
T29 /workspace/coverage/default/31.sram_ctrl_mem_walk.3991134512 Jul 25 06:10:06 PM PDT 24 Jul 25 06:10:12 PM PDT 24 346954001 ps
T30 /workspace/coverage/default/22.sram_ctrl_stress_pipeline.1908822621 Jul 25 06:08:27 PM PDT 24 Jul 25 06:11:39 PM PDT 24 2123189022 ps
T31 /workspace/coverage/default/22.sram_ctrl_executable.3496889630 Jul 25 06:08:27 PM PDT 24 Jul 25 06:23:49 PM PDT 24 3146634914 ps
T32 /workspace/coverage/default/25.sram_ctrl_regwen.77219571 Jul 25 06:08:56 PM PDT 24 Jul 25 06:17:04 PM PDT 24 6458456511 ps
T33 /workspace/coverage/default/42.sram_ctrl_bijection.3725295253 Jul 25 06:11:59 PM PDT 24 Jul 25 06:12:32 PM PDT 24 8127344841 ps
T34 /workspace/coverage/default/44.sram_ctrl_smoke.2350782077 Jul 25 06:12:12 PM PDT 24 Jul 25 06:12:22 PM PDT 24 309792852 ps
T35 /workspace/coverage/default/36.sram_ctrl_lc_escalation.1288818843 Jul 25 06:10:45 PM PDT 24 Jul 25 06:10:55 PM PDT 24 1345847481 ps
T337 /workspace/coverage/default/13.sram_ctrl_throughput_w_partial_write.638120292 Jul 25 06:07:36 PM PDT 24 Jul 25 06:08:14 PM PDT 24 547102367 ps
T338 /workspace/coverage/default/26.sram_ctrl_mem_partial_access.710929066 Jul 25 06:09:10 PM PDT 24 Jul 25 06:09:15 PM PDT 24 345344468 ps
T339 /workspace/coverage/default/25.sram_ctrl_throughput_w_partial_write.2081382253 Jul 25 06:08:58 PM PDT 24 Jul 25 06:09:06 PM PDT 24 216208139 ps
T340 /workspace/coverage/default/28.sram_ctrl_stress_all.1089039197 Jul 25 06:09:34 PM PDT 24 Jul 25 06:35:41 PM PDT 24 222547688204 ps
T70 /workspace/coverage/default/14.sram_ctrl_stress_all_with_rand_reset.3986013773 Jul 25 06:07:41 PM PDT 24 Jul 25 06:08:14 PM PDT 24 1131824180 ps
T341 /workspace/coverage/default/26.sram_ctrl_partial_access.2318927855 Jul 25 06:08:58 PM PDT 24 Jul 25 06:09:12 PM PDT 24 157401024 ps
T342 /workspace/coverage/default/45.sram_ctrl_stress_pipeline.2231472544 Jul 25 06:12:30 PM PDT 24 Jul 25 06:16:02 PM PDT 24 4335585727 ps
T343 /workspace/coverage/default/27.sram_ctrl_smoke.581865572 Jul 25 06:09:07 PM PDT 24 Jul 25 06:09:51 PM PDT 24 1891105419 ps
T344 /workspace/coverage/default/20.sram_ctrl_executable.2025894352 Jul 25 06:08:20 PM PDT 24 Jul 25 06:18:19 PM PDT 24 4380497555 ps
T345 /workspace/coverage/default/2.sram_ctrl_alert_test.522138796 Jul 25 06:07:13 PM PDT 24 Jul 25 06:07:14 PM PDT 24 23021616 ps
T346 /workspace/coverage/default/24.sram_ctrl_access_during_key_req.1587173173 Jul 25 06:08:46 PM PDT 24 Jul 25 06:14:24 PM PDT 24 35296989450 ps
T347 /workspace/coverage/default/48.sram_ctrl_executable.1626520809 Jul 25 06:13:21 PM PDT 24 Jul 25 06:35:22 PM PDT 24 16572526003 ps
T348 /workspace/coverage/default/40.sram_ctrl_regwen.360035090 Jul 25 06:11:30 PM PDT 24 Jul 25 06:27:28 PM PDT 24 15246631669 ps
T349 /workspace/coverage/default/15.sram_ctrl_max_throughput.2111005556 Jul 25 06:07:45 PM PDT 24 Jul 25 06:08:14 PM PDT 24 168078224 ps
T350 /workspace/coverage/default/37.sram_ctrl_access_during_key_req.1121703707 Jul 25 06:11:04 PM PDT 24 Jul 25 06:44:44 PM PDT 24 8624238343 ps
T351 /workspace/coverage/default/10.sram_ctrl_multiple_keys.1874007541 Jul 25 06:07:35 PM PDT 24 Jul 25 06:19:26 PM PDT 24 26720444167 ps
T352 /workspace/coverage/default/39.sram_ctrl_stress_all.2656376352 Jul 25 06:11:24 PM PDT 24 Jul 25 07:09:05 PM PDT 24 17788398658 ps
T353 /workspace/coverage/default/8.sram_ctrl_smoke.3993190894 Jul 25 06:07:28 PM PDT 24 Jul 25 06:07:45 PM PDT 24 4061925209 ps
T354 /workspace/coverage/default/34.sram_ctrl_alert_test.1087226760 Jul 25 06:10:22 PM PDT 24 Jul 25 06:10:22 PM PDT 24 18388373 ps
T355 /workspace/coverage/default/34.sram_ctrl_ram_cfg.3691850270 Jul 25 06:10:23 PM PDT 24 Jul 25 06:10:24 PM PDT 24 77987637 ps
T356 /workspace/coverage/default/5.sram_ctrl_partial_access_b2b.86433788 Jul 25 06:07:20 PM PDT 24 Jul 25 06:14:03 PM PDT 24 39744038742 ps
T357 /workspace/coverage/default/29.sram_ctrl_alert_test.405877542 Jul 25 06:09:42 PM PDT 24 Jul 25 06:09:42 PM PDT 24 12468354 ps
T358 /workspace/coverage/default/48.sram_ctrl_bijection.4073102215 Jul 25 06:13:08 PM PDT 24 Jul 25 06:14:14 PM PDT 24 14193403284 ps
T359 /workspace/coverage/default/21.sram_ctrl_mem_walk.4131452612 Jul 25 06:08:30 PM PDT 24 Jul 25 06:08:36 PM PDT 24 6628989364 ps
T360 /workspace/coverage/default/47.sram_ctrl_alert_test.2612304646 Jul 25 06:13:10 PM PDT 24 Jul 25 06:13:11 PM PDT 24 32413544 ps
T361 /workspace/coverage/default/47.sram_ctrl_stress_all_with_rand_reset.520101200 Jul 25 06:13:09 PM PDT 24 Jul 25 06:29:20 PM PDT 24 1492743782 ps
T362 /workspace/coverage/default/35.sram_ctrl_stress_pipeline.2265856603 Jul 25 06:10:20 PM PDT 24 Jul 25 06:14:43 PM PDT 24 10188137870 ps
T363 /workspace/coverage/default/17.sram_ctrl_lc_escalation.782472699 Jul 25 06:08:03 PM PDT 24 Jul 25 06:08:09 PM PDT 24 925400303 ps
T364 /workspace/coverage/default/31.sram_ctrl_bijection.4186743433 Jul 25 06:09:47 PM PDT 24 Jul 25 06:10:47 PM PDT 24 2784340440 ps
T365 /workspace/coverage/default/2.sram_ctrl_mem_partial_access.2455958832 Jul 25 06:07:19 PM PDT 24 Jul 25 06:07:24 PM PDT 24 166483077 ps
T366 /workspace/coverage/default/1.sram_ctrl_max_throughput.1734625577 Jul 25 06:07:06 PM PDT 24 Jul 25 06:08:45 PM PDT 24 495726828 ps
T40 /workspace/coverage/default/27.sram_ctrl_stress_all_with_rand_reset.1440209093 Jul 25 06:09:22 PM PDT 24 Jul 25 06:11:03 PM PDT 24 16330726737 ps
T367 /workspace/coverage/default/4.sram_ctrl_stress_all.878537110 Jul 25 06:07:18 PM PDT 24 Jul 25 07:14:29 PM PDT 24 272096283269 ps
T368 /workspace/coverage/default/37.sram_ctrl_stress_all.866817156 Jul 25 06:11:04 PM PDT 24 Jul 25 07:17:35 PM PDT 24 61523401287 ps
T369 /workspace/coverage/default/30.sram_ctrl_mem_walk.2442564008 Jul 25 06:09:48 PM PDT 24 Jul 25 06:09:58 PM PDT 24 2930942477 ps
T370 /workspace/coverage/default/49.sram_ctrl_regwen.3852366873 Jul 25 06:13:29 PM PDT 24 Jul 25 06:46:28 PM PDT 24 5849783472 ps
T371 /workspace/coverage/default/24.sram_ctrl_bijection.3203561456 Jul 25 06:08:39 PM PDT 24 Jul 25 06:09:22 PM PDT 24 7853107855 ps
T372 /workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.3131427380 Jul 25 06:07:00 PM PDT 24 Jul 25 06:08:32 PM PDT 24 747722697 ps
T373 /workspace/coverage/default/36.sram_ctrl_alert_test.3775942778 Jul 25 06:10:52 PM PDT 24 Jul 25 06:10:53 PM PDT 24 32162084 ps
T374 /workspace/coverage/default/38.sram_ctrl_bijection.1238487895 Jul 25 06:11:02 PM PDT 24 Jul 25 06:11:54 PM PDT 24 2217128437 ps
T375 /workspace/coverage/default/35.sram_ctrl_stress_all_with_rand_reset.2477453361 Jul 25 06:10:46 PM PDT 24 Jul 25 06:16:17 PM PDT 24 664713469 ps
T376 /workspace/coverage/default/8.sram_ctrl_access_during_key_req.1818980383 Jul 25 06:07:33 PM PDT 24 Jul 25 06:13:21 PM PDT 24 1073632616 ps
T377 /workspace/coverage/default/7.sram_ctrl_partial_access_b2b.1625586328 Jul 25 06:07:24 PM PDT 24 Jul 25 06:12:53 PM PDT 24 4556360990 ps
T378 /workspace/coverage/default/8.sram_ctrl_mem_partial_access.2197423593 Jul 25 06:07:26 PM PDT 24 Jul 25 06:07:31 PM PDT 24 66995257 ps
T379 /workspace/coverage/default/15.sram_ctrl_executable.1325955402 Jul 25 06:07:55 PM PDT 24 Jul 25 06:28:49 PM PDT 24 2798663560 ps
T380 /workspace/coverage/default/35.sram_ctrl_mem_partial_access.1997512056 Jul 25 06:10:34 PM PDT 24 Jul 25 06:10:39 PM PDT 24 65877156 ps
T381 /workspace/coverage/default/36.sram_ctrl_regwen.1033026166 Jul 25 06:10:40 PM PDT 24 Jul 25 06:24:00 PM PDT 24 31295745286 ps
T382 /workspace/coverage/default/36.sram_ctrl_throughput_w_partial_write.3400041828 Jul 25 06:10:45 PM PDT 24 Jul 25 06:12:08 PM PDT 24 475384636 ps
T383 /workspace/coverage/default/20.sram_ctrl_throughput_w_partial_write.538406043 Jul 25 06:08:19 PM PDT 24 Jul 25 06:08:27 PM PDT 24 517751815 ps
T384 /workspace/coverage/default/29.sram_ctrl_regwen.2670104090 Jul 25 06:09:28 PM PDT 24 Jul 25 06:17:43 PM PDT 24 2745181722 ps
T110 /workspace/coverage/default/34.sram_ctrl_stress_all_with_rand_reset.1285518781 Jul 25 06:10:17 PM PDT 24 Jul 25 06:10:24 PM PDT 24 1434163747 ps
T385 /workspace/coverage/default/30.sram_ctrl_throughput_w_partial_write.1671298578 Jul 25 06:09:45 PM PDT 24 Jul 25 06:09:52 PM PDT 24 310156255 ps
T386 /workspace/coverage/default/24.sram_ctrl_partial_access.1491421304 Jul 25 06:08:47 PM PDT 24 Jul 25 06:09:07 PM PDT 24 3881178628 ps
T387 /workspace/coverage/default/27.sram_ctrl_throughput_w_partial_write.3420937068 Jul 25 06:09:07 PM PDT 24 Jul 25 06:10:31 PM PDT 24 256741922 ps
T388 /workspace/coverage/default/14.sram_ctrl_smoke.3726965794 Jul 25 06:07:50 PM PDT 24 Jul 25 06:09:16 PM PDT 24 467273735 ps
T89 /workspace/coverage/default/38.sram_ctrl_mem_partial_access.543865084 Jul 25 06:11:15 PM PDT 24 Jul 25 06:11:21 PM PDT 24 206198296 ps
T389 /workspace/coverage/default/20.sram_ctrl_stress_all_with_rand_reset.1062968720 Jul 25 06:08:17 PM PDT 24 Jul 25 06:15:42 PM PDT 24 1780014231 ps
T390 /workspace/coverage/default/27.sram_ctrl_stress_pipeline.2596226993 Jul 25 06:09:13 PM PDT 24 Jul 25 06:12:56 PM PDT 24 2837897380 ps
T391 /workspace/coverage/default/34.sram_ctrl_stress_all.4186568500 Jul 25 06:10:19 PM PDT 24 Jul 25 06:43:31 PM PDT 24 36365519096 ps
T392 /workspace/coverage/default/37.sram_ctrl_mem_walk.1222783610 Jul 25 06:11:03 PM PDT 24 Jul 25 06:11:09 PM PDT 24 229317875 ps
T393 /workspace/coverage/default/12.sram_ctrl_access_during_key_req.956508555 Jul 25 06:07:42 PM PDT 24 Jul 25 06:27:01 PM PDT 24 2659912727 ps
T394 /workspace/coverage/default/19.sram_ctrl_partial_access_b2b.488186351 Jul 25 06:08:09 PM PDT 24 Jul 25 06:15:00 PM PDT 24 30556029721 ps
T395 /workspace/coverage/default/4.sram_ctrl_stress_all_with_rand_reset.602139999 Jul 25 06:07:22 PM PDT 24 Jul 25 06:25:10 PM PDT 24 1802434058 ps
T396 /workspace/coverage/default/17.sram_ctrl_mem_walk.3928515463 Jul 25 06:08:05 PM PDT 24 Jul 25 06:08:10 PM PDT 24 82797465 ps
T397 /workspace/coverage/default/22.sram_ctrl_smoke.1388924590 Jul 25 06:08:23 PM PDT 24 Jul 25 06:08:34 PM PDT 24 452826461 ps
T398 /workspace/coverage/default/25.sram_ctrl_stress_pipeline.2585107579 Jul 25 06:08:59 PM PDT 24 Jul 25 06:14:53 PM PDT 24 14188210189 ps
T399 /workspace/coverage/default/20.sram_ctrl_ram_cfg.2201528825 Jul 25 06:08:22 PM PDT 24 Jul 25 06:08:23 PM PDT 24 28016594 ps
T400 /workspace/coverage/default/39.sram_ctrl_mem_partial_access.1701662805 Jul 25 06:11:22 PM PDT 24 Jul 25 06:11:25 PM PDT 24 114729677 ps
T401 /workspace/coverage/default/9.sram_ctrl_partial_access_b2b.1470682502 Jul 25 06:07:36 PM PDT 24 Jul 25 06:13:41 PM PDT 24 16110720151 ps
T402 /workspace/coverage/default/37.sram_ctrl_bijection.3605159330 Jul 25 06:10:51 PM PDT 24 Jul 25 06:11:34 PM PDT 24 2777957907 ps
T403 /workspace/coverage/default/8.sram_ctrl_stress_pipeline.3145464681 Jul 25 06:07:26 PM PDT 24 Jul 25 06:11:21 PM PDT 24 4872387578 ps
T404 /workspace/coverage/default/3.sram_ctrl_stress_all_with_rand_reset.753164178 Jul 25 06:07:12 PM PDT 24 Jul 25 06:10:41 PM PDT 24 1317749662 ps
T405 /workspace/coverage/default/42.sram_ctrl_stress_pipeline.3432504869 Jul 25 06:11:58 PM PDT 24 Jul 25 06:16:47 PM PDT 24 3022353622 ps
T406 /workspace/coverage/default/26.sram_ctrl_bijection.838074144 Jul 25 06:09:01 PM PDT 24 Jul 25 06:09:41 PM PDT 24 2387243777 ps
T407 /workspace/coverage/default/13.sram_ctrl_regwen.2643876228 Jul 25 06:07:39 PM PDT 24 Jul 25 06:21:40 PM PDT 24 26885207070 ps
T408 /workspace/coverage/default/4.sram_ctrl_lc_escalation.1121581859 Jul 25 06:07:21 PM PDT 24 Jul 25 06:07:31 PM PDT 24 683957160 ps
T409 /workspace/coverage/default/38.sram_ctrl_throughput_w_partial_write.3467063518 Jul 25 06:11:00 PM PDT 24 Jul 25 06:11:05 PM PDT 24 88577876 ps
T410 /workspace/coverage/default/21.sram_ctrl_regwen.3439552514 Jul 25 06:08:27 PM PDT 24 Jul 25 06:21:38 PM PDT 24 41032398903 ps
T411 /workspace/coverage/default/0.sram_ctrl_bijection.4144368898 Jul 25 06:06:57 PM PDT 24 Jul 25 06:07:31 PM PDT 24 965528373 ps
T412 /workspace/coverage/default/19.sram_ctrl_throughput_w_partial_write.2170559133 Jul 25 06:08:13 PM PDT 24 Jul 25 06:10:19 PM PDT 24 1046093354 ps
T413 /workspace/coverage/default/3.sram_ctrl_max_throughput.2421594217 Jul 25 06:07:17 PM PDT 24 Jul 25 06:07:23 PM PDT 24 945207677 ps
T414 /workspace/coverage/default/1.sram_ctrl_ram_cfg.134088981 Jul 25 06:07:06 PM PDT 24 Jul 25 06:07:07 PM PDT 24 80346167 ps
T415 /workspace/coverage/default/3.sram_ctrl_mem_partial_access.3471654386 Jul 25 06:07:14 PM PDT 24 Jul 25 06:07:17 PM PDT 24 99849906 ps
T416 /workspace/coverage/default/25.sram_ctrl_stress_all_with_rand_reset.3569213356 Jul 25 06:08:58 PM PDT 24 Jul 25 06:09:06 PM PDT 24 185680538 ps
T417 /workspace/coverage/default/46.sram_ctrl_stress_pipeline.3899146597 Jul 25 06:12:42 PM PDT 24 Jul 25 06:19:20 PM PDT 24 16916064055 ps
T418 /workspace/coverage/default/35.sram_ctrl_smoke.2312601967 Jul 25 06:10:20 PM PDT 24 Jul 25 06:10:31 PM PDT 24 2222580706 ps
T419 /workspace/coverage/default/45.sram_ctrl_mem_partial_access.1261027349 Jul 25 06:12:49 PM PDT 24 Jul 25 06:12:54 PM PDT 24 122188581 ps
T420 /workspace/coverage/default/18.sram_ctrl_alert_test.3742693713 Jul 25 06:08:11 PM PDT 24 Jul 25 06:08:12 PM PDT 24 26164241 ps
T421 /workspace/coverage/default/13.sram_ctrl_ram_cfg.2637972364 Jul 25 06:07:39 PM PDT 24 Jul 25 06:07:40 PM PDT 24 100015943 ps
T422 /workspace/coverage/default/41.sram_ctrl_smoke.1455340295 Jul 25 06:11:43 PM PDT 24 Jul 25 06:11:47 PM PDT 24 273306975 ps
T423 /workspace/coverage/default/32.sram_ctrl_access_during_key_req.1070881809 Jul 25 06:09:54 PM PDT 24 Jul 25 06:14:10 PM PDT 24 1117413395 ps
T424 /workspace/coverage/default/12.sram_ctrl_mem_walk.3439227723 Jul 25 06:07:39 PM PDT 24 Jul 25 06:07:51 PM PDT 24 441182566 ps
T425 /workspace/coverage/default/23.sram_ctrl_alert_test.2447798966 Jul 25 06:08:39 PM PDT 24 Jul 25 06:08:40 PM PDT 24 25691961 ps
T426 /workspace/coverage/default/42.sram_ctrl_regwen.3899497662 Jul 25 06:12:06 PM PDT 24 Jul 25 06:24:38 PM PDT 24 2379579253 ps
T427 /workspace/coverage/default/38.sram_ctrl_partial_access_b2b.778444195 Jul 25 06:11:00 PM PDT 24 Jul 25 06:16:00 PM PDT 24 11517804714 ps
T428 /workspace/coverage/default/23.sram_ctrl_throughput_w_partial_write.3077983793 Jul 25 06:08:31 PM PDT 24 Jul 25 06:09:37 PM PDT 24 120634998 ps
T429 /workspace/coverage/default/12.sram_ctrl_regwen.1857345534 Jul 25 06:07:39 PM PDT 24 Jul 25 06:16:45 PM PDT 24 6516266969 ps
T111 /workspace/coverage/default/39.sram_ctrl_stress_all_with_rand_reset.3501580760 Jul 25 06:11:23 PM PDT 24 Jul 25 06:11:32 PM PDT 24 536090438 ps
T430 /workspace/coverage/default/49.sram_ctrl_stress_all.4233231853 Jul 25 06:13:29 PM PDT 24 Jul 25 07:05:42 PM PDT 24 49802148623 ps
T431 /workspace/coverage/default/4.sram_ctrl_mem_partial_access.2228673987 Jul 25 06:07:21 PM PDT 24 Jul 25 06:07:24 PM PDT 24 101977158 ps
T432 /workspace/coverage/default/38.sram_ctrl_ram_cfg.2598889515 Jul 25 06:11:12 PM PDT 24 Jul 25 06:11:13 PM PDT 24 33811950 ps
T433 /workspace/coverage/default/45.sram_ctrl_partial_access_b2b.82758155 Jul 25 06:12:30 PM PDT 24 Jul 25 06:20:41 PM PDT 24 35353374494 ps
T434 /workspace/coverage/default/39.sram_ctrl_bijection.2569189625 Jul 25 06:11:15 PM PDT 24 Jul 25 06:12:31 PM PDT 24 9499793317 ps
T435 /workspace/coverage/default/40.sram_ctrl_multiple_keys.107026272 Jul 25 06:11:24 PM PDT 24 Jul 25 06:20:22 PM PDT 24 21974847923 ps
T436 /workspace/coverage/default/28.sram_ctrl_stress_pipeline.3649274564 Jul 25 06:09:19 PM PDT 24 Jul 25 06:14:46 PM PDT 24 3339817099 ps
T437 /workspace/coverage/default/4.sram_ctrl_ram_cfg.2886280650 Jul 25 06:07:31 PM PDT 24 Jul 25 06:07:32 PM PDT 24 372420712 ps
T438 /workspace/coverage/default/25.sram_ctrl_multiple_keys.2581506104 Jul 25 06:09:20 PM PDT 24 Jul 25 06:13:01 PM PDT 24 7398366822 ps
T439 /workspace/coverage/default/1.sram_ctrl_multiple_keys.4225630840 Jul 25 06:07:01 PM PDT 24 Jul 25 06:18:56 PM PDT 24 30717209580 ps
T440 /workspace/coverage/default/30.sram_ctrl_executable.2886563774 Jul 25 06:09:42 PM PDT 24 Jul 25 06:30:05 PM PDT 24 12051399130 ps
T441 /workspace/coverage/default/17.sram_ctrl_regwen.1181057448 Jul 25 06:08:02 PM PDT 24 Jul 25 06:12:52 PM PDT 24 2316166600 ps
T442 /workspace/coverage/default/46.sram_ctrl_mem_partial_access.2977312808 Jul 25 06:12:54 PM PDT 24 Jul 25 06:12:57 PM PDT 24 45583655 ps
T443 /workspace/coverage/default/12.sram_ctrl_stress_all_with_rand_reset.2364346971 Jul 25 06:07:38 PM PDT 24 Jul 25 06:10:19 PM PDT 24 2718232185 ps
T444 /workspace/coverage/default/32.sram_ctrl_mem_walk.3033115031 Jul 25 06:10:07 PM PDT 24 Jul 25 06:10:13 PM PDT 24 370351445 ps
T445 /workspace/coverage/default/24.sram_ctrl_stress_all_with_rand_reset.736609473 Jul 25 06:08:50 PM PDT 24 Jul 25 06:11:56 PM PDT 24 360659720 ps
T446 /workspace/coverage/default/9.sram_ctrl_smoke.2604975280 Jul 25 06:07:31 PM PDT 24 Jul 25 06:07:37 PM PDT 24 241165824 ps
T447 /workspace/coverage/default/23.sram_ctrl_access_during_key_req.3587927514 Jul 25 06:08:37 PM PDT 24 Jul 25 06:14:43 PM PDT 24 4095406385 ps
T448 /workspace/coverage/default/40.sram_ctrl_throughput_w_partial_write.1795158187 Jul 25 06:11:33 PM PDT 24 Jul 25 06:11:36 PM PDT 24 50164393 ps
T449 /workspace/coverage/default/31.sram_ctrl_stress_pipeline.1391692895 Jul 25 06:09:52 PM PDT 24 Jul 25 06:13:01 PM PDT 24 1961602223 ps
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T450 /workspace/coverage/default/6.sram_ctrl_multiple_keys.1431695284 Jul 25 06:07:24 PM PDT 24 Jul 25 06:19:23 PM PDT 24 45580722123 ps
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T452 /workspace/coverage/default/42.sram_ctrl_multiple_keys.154815376 Jul 25 06:11:59 PM PDT 24 Jul 25 06:17:34 PM PDT 24 1207880090 ps
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T454 /workspace/coverage/default/9.sram_ctrl_bijection.494741402 Jul 25 06:07:36 PM PDT 24 Jul 25 06:08:59 PM PDT 24 19805805828 ps
T455 /workspace/coverage/default/43.sram_ctrl_partial_access_b2b.4229541769 Jul 25 06:12:04 PM PDT 24 Jul 25 06:14:28 PM PDT 24 26087258294 ps
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T457 /workspace/coverage/default/39.sram_ctrl_partial_access_b2b.1165113845 Jul 25 06:11:13 PM PDT 24 Jul 25 06:16:52 PM PDT 24 13079433556 ps
T458 /workspace/coverage/default/27.sram_ctrl_access_during_key_req.3226112916 Jul 25 06:09:09 PM PDT 24 Jul 25 06:20:16 PM PDT 24 2623007451 ps
T459 /workspace/coverage/default/25.sram_ctrl_bijection.2930579638 Jul 25 06:08:58 PM PDT 24 Jul 25 06:09:19 PM PDT 24 644820988 ps
T460 /workspace/coverage/default/16.sram_ctrl_regwen.1418557244 Jul 25 06:08:05 PM PDT 24 Jul 25 06:15:45 PM PDT 24 9943600245 ps
T461 /workspace/coverage/default/43.sram_ctrl_bijection.879174185 Jul 25 06:12:05 PM PDT 24 Jul 25 06:13:24 PM PDT 24 3856366607 ps
T462 /workspace/coverage/default/21.sram_ctrl_throughput_w_partial_write.3773869420 Jul 25 06:08:21 PM PDT 24 Jul 25 06:08:27 PM PDT 24 215900239 ps
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T464 /workspace/coverage/default/12.sram_ctrl_executable.784549819 Jul 25 06:07:41 PM PDT 24 Jul 25 06:22:51 PM PDT 24 4331089232 ps
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T469 /workspace/coverage/default/14.sram_ctrl_access_during_key_req.1851457581 Jul 25 06:07:39 PM PDT 24 Jul 25 06:22:15 PM PDT 24 12318406868 ps
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T473 /workspace/coverage/default/41.sram_ctrl_mem_partial_access.4173824280 Jul 25 06:11:45 PM PDT 24 Jul 25 06:11:48 PM PDT 24 83330493 ps
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T485 /workspace/coverage/default/35.sram_ctrl_throughput_w_partial_write.1875251692 Jul 25 06:10:32 PM PDT 24 Jul 25 06:10:55 PM PDT 24 831112219 ps
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T488 /workspace/coverage/default/22.sram_ctrl_partial_access_b2b.752348967 Jul 25 06:08:24 PM PDT 24 Jul 25 06:16:53 PM PDT 24 21255009629 ps
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T494 /workspace/coverage/default/49.sram_ctrl_partial_access_b2b.1122380272 Jul 25 06:13:28 PM PDT 24 Jul 25 06:17:15 PM PDT 24 12453893391 ps
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T496 /workspace/coverage/default/42.sram_ctrl_access_during_key_req.1309334000 Jul 25 06:11:59 PM PDT 24 Jul 25 06:41:45 PM PDT 24 21317131610 ps
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T501 /workspace/coverage/default/15.sram_ctrl_ram_cfg.1974017052 Jul 25 06:07:48 PM PDT 24 Jul 25 06:07:48 PM PDT 24 28537989 ps
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T503 /workspace/coverage/default/13.sram_ctrl_mem_partial_access.4067808815 Jul 25 06:07:53 PM PDT 24 Jul 25 06:07:56 PM PDT 24 281769998 ps
T504 /workspace/coverage/default/35.sram_ctrl_alert_test.2556319822 Jul 25 06:10:44 PM PDT 24 Jul 25 06:10:45 PM PDT 24 31672290 ps
T505 /workspace/coverage/default/45.sram_ctrl_throughput_w_partial_write.1417008531 Jul 25 06:12:39 PM PDT 24 Jul 25 06:12:55 PM PDT 24 81009673 ps
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T508 /workspace/coverage/default/40.sram_ctrl_partial_access_b2b.629708747 Jul 25 06:11:34 PM PDT 24 Jul 25 06:18:35 PM PDT 24 38584954831 ps
T16 /workspace/coverage/default/4.sram_ctrl_sec_cm.3506810286 Jul 25 06:07:18 PM PDT 24 Jul 25 06:07:20 PM PDT 24 310680037 ps
T509 /workspace/coverage/default/37.sram_ctrl_ram_cfg.719292911 Jul 25 06:11:01 PM PDT 24 Jul 25 06:11:02 PM PDT 24 49470389 ps
T510 /workspace/coverage/default/37.sram_ctrl_partial_access.3073399307 Jul 25 06:10:58 PM PDT 24 Jul 25 06:11:12 PM PDT 24 754257776 ps
T511 /workspace/coverage/default/14.sram_ctrl_partial_access_b2b.4132443069 Jul 25 06:07:40 PM PDT 24 Jul 25 06:14:26 PM PDT 24 35045451059 ps
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T513 /workspace/coverage/default/14.sram_ctrl_partial_access.329525714 Jul 25 06:07:41 PM PDT 24 Jul 25 06:09:43 PM PDT 24 1260073250 ps
T514 /workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.1727956205 Jul 25 06:07:32 PM PDT 24 Jul 25 06:08:52 PM PDT 24 340509429 ps
T515 /workspace/coverage/default/18.sram_ctrl_partial_access.429383960 Jul 25 06:08:07 PM PDT 24 Jul 25 06:08:21 PM PDT 24 679989191 ps
T112 /workspace/coverage/default/10.sram_ctrl_stress_all_with_rand_reset.273165683 Jul 25 06:07:34 PM PDT 24 Jul 25 06:09:28 PM PDT 24 9663596608 ps
T516 /workspace/coverage/default/19.sram_ctrl_bijection.3563572942 Jul 25 06:08:10 PM PDT 24 Jul 25 06:08:53 PM PDT 24 782711699 ps
T517 /workspace/coverage/default/41.sram_ctrl_regwen.3183908320 Jul 25 06:11:51 PM PDT 24 Jul 25 06:48:10 PM PDT 24 9229098483 ps
T518 /workspace/coverage/default/26.sram_ctrl_partial_access_b2b.4030388314 Jul 25 06:09:13 PM PDT 24 Jul 25 06:11:14 PM PDT 24 6695336036 ps
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T520 /workspace/coverage/default/5.sram_ctrl_lc_escalation.3444760354 Jul 25 06:07:27 PM PDT 24 Jul 25 06:07:34 PM PDT 24 892647165 ps
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T522 /workspace/coverage/default/44.sram_ctrl_mem_partial_access.2743552328 Jul 25 06:12:30 PM PDT 24 Jul 25 06:12:34 PM PDT 24 118838604 ps
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T524 /workspace/coverage/default/46.sram_ctrl_stress_all.1043912806 Jul 25 06:12:52 PM PDT 24 Jul 25 06:57:12 PM PDT 24 54748401158 ps
T525 /workspace/coverage/default/11.sram_ctrl_regwen.877697599 Jul 25 06:07:34 PM PDT 24 Jul 25 06:08:53 PM PDT 24 494296876 ps
T526 /workspace/coverage/default/33.sram_ctrl_ram_cfg.1565791474 Jul 25 06:10:15 PM PDT 24 Jul 25 06:10:16 PM PDT 24 47875859 ps
T527 /workspace/coverage/default/48.sram_ctrl_partial_access.3513144469 Jul 25 06:13:10 PM PDT 24 Jul 25 06:13:14 PM PDT 24 66246685 ps
T528 /workspace/coverage/default/43.sram_ctrl_lc_escalation.3346407304 Jul 25 06:12:13 PM PDT 24 Jul 25 06:12:22 PM PDT 24 2263134849 ps
T529 /workspace/coverage/default/16.sram_ctrl_partial_access_b2b.2358774901 Jul 25 06:08:04 PM PDT 24 Jul 25 06:12:15 PM PDT 24 21540360462 ps
T530 /workspace/coverage/default/28.sram_ctrl_access_during_key_req.3137550685 Jul 25 06:09:16 PM PDT 24 Jul 25 06:23:16 PM PDT 24 16110804307 ps
T531 /workspace/coverage/default/22.sram_ctrl_mem_partial_access.3283997984 Jul 25 06:08:28 PM PDT 24 Jul 25 06:08:33 PM PDT 24 154621355 ps
T532 /workspace/coverage/default/38.sram_ctrl_smoke.1856177136 Jul 25 06:10:59 PM PDT 24 Jul 25 06:11:10 PM PDT 24 1952473841 ps
T533 /workspace/coverage/default/3.sram_ctrl_stress_all.57362182 Jul 25 06:07:13 PM PDT 24 Jul 25 06:17:08 PM PDT 24 21257119219 ps
T534 /workspace/coverage/default/19.sram_ctrl_regwen.2722215245 Jul 25 06:08:14 PM PDT 24 Jul 25 06:10:54 PM PDT 24 17571214975 ps
T535 /workspace/coverage/default/23.sram_ctrl_stress_pipeline.1537252075 Jul 25 06:08:32 PM PDT 24 Jul 25 06:11:00 PM PDT 24 1518620557 ps
T536 /workspace/coverage/default/1.sram_ctrl_lc_escalation.2673551087 Jul 25 06:07:05 PM PDT 24 Jul 25 06:07:10 PM PDT 24 1377687137 ps
T537 /workspace/coverage/default/20.sram_ctrl_mem_partial_access.2687042922 Jul 25 06:08:18 PM PDT 24 Jul 25 06:08:21 PM PDT 24 434390464 ps
T538 /workspace/coverage/default/13.sram_ctrl_stress_pipeline.3267971337 Jul 25 06:07:40 PM PDT 24 Jul 25 06:10:44 PM PDT 24 3724797784 ps
T90 /workspace/coverage/default/48.sram_ctrl_mem_partial_access.462255527 Jul 25 06:13:18 PM PDT 24 Jul 25 06:13:24 PM PDT 24 679862435 ps
T539 /workspace/coverage/default/40.sram_ctrl_lc_escalation.3303252063 Jul 25 06:11:32 PM PDT 24 Jul 25 06:11:35 PM PDT 24 3077208848 ps
T540 /workspace/coverage/default/33.sram_ctrl_partial_access_b2b.29121428 Jul 25 06:10:01 PM PDT 24 Jul 25 06:16:41 PM PDT 24 32565172449 ps
T541 /workspace/coverage/default/49.sram_ctrl_executable.2972129413 Jul 25 06:13:38 PM PDT 24 Jul 25 06:20:08 PM PDT 24 4227672227 ps
T542 /workspace/coverage/default/33.sram_ctrl_lc_escalation.3800865752 Jul 25 06:10:10 PM PDT 24 Jul 25 06:10:17 PM PDT 24 822370194 ps
T543 /workspace/coverage/default/29.sram_ctrl_partial_access_b2b.1262055470 Jul 25 06:09:32 PM PDT 24 Jul 25 06:16:39 PM PDT 24 5737733424 ps
T544 /workspace/coverage/default/39.sram_ctrl_access_during_key_req.362891284 Jul 25 06:11:19 PM PDT 24 Jul 25 06:13:11 PM PDT 24 3653618018 ps
T545 /workspace/coverage/default/7.sram_ctrl_alert_test.267755497 Jul 25 06:07:27 PM PDT 24 Jul 25 06:07:28 PM PDT 24 27995844 ps
T546 /workspace/coverage/default/41.sram_ctrl_stress_all.2271416936 Jul 25 06:11:47 PM PDT 24 Jul 25 06:28:50 PM PDT 24 68903647393 ps
T547 /workspace/coverage/default/48.sram_ctrl_ram_cfg.2767974833 Jul 25 06:13:16 PM PDT 24 Jul 25 06:13:17 PM PDT 24 250864199 ps
T548 /workspace/coverage/default/42.sram_ctrl_alert_test.2852589882 Jul 25 06:12:05 PM PDT 24 Jul 25 06:12:06 PM PDT 24 19760147 ps
T549 /workspace/coverage/default/48.sram_ctrl_max_throughput.2371602526 Jul 25 06:13:15 PM PDT 24 Jul 25 06:13:57 PM PDT 24 381589014 ps
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