Unified Coverage Report :: Group :: sram_ctrl_env_pkg::sram_ctrl_env_cov#(10)::subword_access_cg

Group : sram_ctrl_env_pkg::sram_ctrl_env_cov#(10)::subword_access_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_sram_ctrl_env_0.1/sram_ctrl_env_cov.sv

---

Summary for Group sram_ctrl_env_pkg::sram_ctrl_env_cov#(10)::subword_access_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	7	0	7	100.00
Crosses	10	0	10	100.00

Variables for Group sram_ctrl_env_pkg::sram_ctrl_env_cov#(10)::subword_access_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
subword_granularity_cp	5	0	5	100.00	100	1	1	0
subword_we_cp	2	0	2	100.00	100	1	1	2

Crosses for Group sram_ctrl_env_pkg::sram_ctrl_env_cov#(10)::subword_access_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
subword_access	10	0	10	100.00	100	1	1	0

Summary for Variable subword_granularity_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	5	0	5	100.00

User Defined Bins for subword_granularity_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ill_access	0	Illegal

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
word_access	44130139	1			T1	22066		T2	22234		T3	69948
triple_byte_access	2461513	1			T1	427		T2	429		T3	1462
halfword_access	3694542	1			T1	630		T2	663		T3	2146
byte_access	4934456	1			T1	894		T2	911		T3	2815
zero_access	1242372	1			T1	198		T2	239		T3	701

---

Summary for Variable subword_we_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for subword_we_cp

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

28171700

1

T1

11977

T2

12253

T3

38603

auto[1]

28291322

1

T1

12238

T2

12223

T3

38469

---

Summary for Cross subword_access

Samples crossed: subword_we_cp subword_granularity_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	10	0	10	100.00

Automatically Generated Cross Bins for subword_access

Bins

subword_we_cp	subword_granularity_cp	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0]	word_access	22012328	1			T1	10915		T2	11140		T3	35034
auto[0]	triple_byte_access	1226163	1			T1	211		T2	226		T3	722
auto[0]	halfword_access	1844513	1			T1	311		T2	335		T3	1056
auto[0]	byte_access	2464007	1			T1	443		T2	434		T3	1444
auto[0]	zero_access	624689	1			T1	97		T2	118		T3	347
auto[1]	word_access	22117811	1			T1	11151		T2	11094		T3	34914
auto[1]	triple_byte_access	1235350	1			T1	216		T2	203		T3	740
auto[1]	halfword_access	1850029	1			T1	319		T2	328		T3	1090
auto[1]	byte_access	2470449	1			T1	451		T2	477		T3	1371
auto[1]	zero_access	617683	1			T1	101		T2	121		T3	354