Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.98 99.16 94.27 99.72 100.00 95.95 99.12 97.62


Total tests in report: 1021
Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP  
TOTAL INCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRNAME
71.89 71.89 90.68 90.68 73.46 73.46 93.83 93.83 23.81 23.81 80.19 80.19 93.22 93.22 48.08 48.08 /workspace/coverage/default/5.sram_ctrl_executable.116239270
87.32 15.42 95.68 5.00 83.18 9.72 96.46 2.64 71.43 47.62 88.41 8.21 95.28 2.06 80.80 32.72 /workspace/coverage/default/19.sram_ctrl_stress_all_with_rand_reset.1228688850
90.65 3.33 97.03 1.36 87.20 4.03 97.78 1.32 80.95 9.52 92.03 3.62 95.28 0.00 84.28 3.47 /workspace/coverage/default/12.sram_ctrl_stress_all.4099940001
93.94 3.29 98.05 1.02 87.56 0.36 97.78 0.00 100.00 19.05 93.72 1.69 96.17 0.88 84.28 0.00 /workspace/coverage/default/41.sram_ctrl_mem_partial_access.1152174095
95.09 1.15 99.07 1.02 89.69 2.13 98.75 0.97 100.00 0.00 95.65 1.93 96.90 0.74 85.56 1.28 /workspace/coverage/default/2.sram_ctrl_sec_cm.1549963062
95.79 0.70 99.07 0.00 90.05 0.36 98.75 0.00 100.00 0.00 95.65 0.00 96.90 0.00 90.13 4.57 /workspace/coverage/cover_reg_top/11.sram_ctrl_tl_intg_err.3309386199
96.28 0.49 99.07 0.00 90.05 0.00 98.75 0.00 100.00 0.00 95.65 0.00 97.05 0.15 93.42 3.29 /workspace/coverage/default/13.sram_ctrl_partial_access_b2b.3617442834
96.51 0.22 99.07 0.00 90.28 0.24 98.75 0.00 100.00 0.00 95.65 0.00 98.38 1.33 93.42 0.00 /workspace/coverage/cover_reg_top/1.sram_ctrl_csr_rw.4093375935
96.70 0.19 99.07 0.00 90.40 0.12 98.75 0.00 100.00 0.00 96.14 0.48 99.12 0.74 93.42 0.00 /workspace/coverage/default/20.sram_ctrl_stress_all_with_rand_reset.3150293469
96.86 0.16 99.07 0.00 90.40 0.00 98.75 0.00 100.00 0.00 96.14 0.00 99.12 0.00 94.52 1.10 /workspace/coverage/default/27.sram_ctrl_stress_all.634807937
96.99 0.13 99.15 0.08 90.40 0.00 99.58 0.83 100.00 0.00 96.14 0.00 99.12 0.00 94.52 0.00 /workspace/coverage/default/1.sram_ctrl_ram_cfg.4229450140
97.12 0.13 99.15 0.00 90.40 0.00 99.58 0.00 100.00 0.00 96.14 0.00 99.12 0.00 95.43 0.91 /workspace/coverage/cover_reg_top/3.sram_ctrl_tl_intg_err.1550955936
97.22 0.10 99.15 0.00 90.40 0.00 99.58 0.00 100.00 0.00 96.14 0.00 99.12 0.00 96.16 0.73 /workspace/coverage/default/19.sram_ctrl_regwen.102153577
97.31 0.09 99.15 0.00 90.76 0.36 99.65 0.07 100.00 0.00 96.14 0.00 99.12 0.00 96.34 0.18 /workspace/coverage/default/22.sram_ctrl_alert_test.941587214
97.39 0.08 99.15 0.00 90.76 0.00 99.65 0.00 100.00 0.00 96.14 0.00 99.12 0.00 96.89 0.55 /workspace/coverage/cover_reg_top/2.sram_ctrl_tl_intg_err.3284954936
97.42 0.04 99.15 0.00 90.76 0.00 99.72 0.07 100.00 0.00 96.14 0.00 99.12 0.00 97.07 0.18 /workspace/coverage/cover_reg_top/2.sram_ctrl_passthru_mem_tl_intg_err.1765024957
97.46 0.03 99.15 0.00 91.00 0.24 99.72 0.00 100.00 0.00 96.14 0.00 99.12 0.00 97.07 0.00 /workspace/coverage/default/10.sram_ctrl_lc_escalation.2866445800
97.48 0.03 99.15 0.00 91.00 0.00 99.72 0.00 100.00 0.00 96.14 0.00 99.12 0.00 97.26 0.18 /workspace/coverage/cover_reg_top/0.sram_ctrl_tl_intg_err.2810351816
97.51 0.03 99.15 0.00 91.00 0.00 99.72 0.00 100.00 0.00 96.14 0.00 99.12 0.00 97.44 0.18 /workspace/coverage/cover_reg_top/18.sram_ctrl_tl_intg_err.493744439
97.53 0.03 99.15 0.00 91.00 0.00 99.72 0.00 100.00 0.00 96.14 0.00 99.12 0.00 97.62 0.18 /workspace/coverage/default/0.sram_ctrl_stress_all.319800563

Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_aliasing.4038947038
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_bit_bash.2627927061
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_hw_reset.334311009
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_mem_rw_with_rand_reset.1181219121
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_rw.2814566446
/workspace/coverage/cover_reg_top/0.sram_ctrl_passthru_mem_tl_intg_err.2477401886
/workspace/coverage/cover_reg_top/0.sram_ctrl_same_csr_outstanding.4258196179
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_errors.591933325
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_aliasing.1698037480
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_bit_bash.4039283682
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_hw_reset.825053868
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_mem_rw_with_rand_reset.3806051562
/workspace/coverage/cover_reg_top/1.sram_ctrl_passthru_mem_tl_intg_err.2533577633
/workspace/coverage/cover_reg_top/1.sram_ctrl_same_csr_outstanding.352809026
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_errors.3791199423
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_intg_err.1043312069
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_mem_rw_with_rand_reset.3673816170
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_rw.3781322429
/workspace/coverage/cover_reg_top/10.sram_ctrl_passthru_mem_tl_intg_err.2790562722
/workspace/coverage/cover_reg_top/10.sram_ctrl_same_csr_outstanding.3607414115
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_errors.2694020228
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_intg_err.512301386
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_mem_rw_with_rand_reset.2033454531
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_rw.1262455563
/workspace/coverage/cover_reg_top/11.sram_ctrl_passthru_mem_tl_intg_err.4009884723
/workspace/coverage/cover_reg_top/11.sram_ctrl_same_csr_outstanding.296093821
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_errors.2288348386
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_mem_rw_with_rand_reset.1299906532
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_rw.2530671913
/workspace/coverage/cover_reg_top/12.sram_ctrl_passthru_mem_tl_intg_err.5223189
/workspace/coverage/cover_reg_top/12.sram_ctrl_same_csr_outstanding.3939249437
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_errors.3227072655
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_intg_err.3533580108
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_rw.915330065
/workspace/coverage/cover_reg_top/13.sram_ctrl_passthru_mem_tl_intg_err.644487331
/workspace/coverage/cover_reg_top/13.sram_ctrl_same_csr_outstanding.297141677
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_errors.238146347
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_intg_err.1969529523
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_mem_rw_with_rand_reset.2139569661
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_rw.209443364
/workspace/coverage/cover_reg_top/14.sram_ctrl_passthru_mem_tl_intg_err.261339448
/workspace/coverage/cover_reg_top/14.sram_ctrl_same_csr_outstanding.4007481152
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_errors.576116492
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_intg_err.2636470032
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_mem_rw_with_rand_reset.2492746332
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_rw.657914297
/workspace/coverage/cover_reg_top/15.sram_ctrl_passthru_mem_tl_intg_err.1768363658
/workspace/coverage/cover_reg_top/15.sram_ctrl_same_csr_outstanding.3507545574
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_errors.1018841313
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_intg_err.1751335509
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_mem_rw_with_rand_reset.3909308382
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_rw.2322151365
/workspace/coverage/cover_reg_top/16.sram_ctrl_passthru_mem_tl_intg_err.733362905
/workspace/coverage/cover_reg_top/16.sram_ctrl_same_csr_outstanding.2677451846
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_errors.1570349905
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_intg_err.2827040619
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_mem_rw_with_rand_reset.794218383
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_rw.651224932
/workspace/coverage/cover_reg_top/17.sram_ctrl_passthru_mem_tl_intg_err.558158399
/workspace/coverage/cover_reg_top/17.sram_ctrl_same_csr_outstanding.1329784830
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_errors.1271747101
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_intg_err.4016280695
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_mem_rw_with_rand_reset.608920192
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_rw.51004981
/workspace/coverage/cover_reg_top/18.sram_ctrl_passthru_mem_tl_intg_err.3242551645
/workspace/coverage/cover_reg_top/18.sram_ctrl_same_csr_outstanding.3690234744
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_errors.3306693331
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_mem_rw_with_rand_reset.2025894597
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_rw.98720926
/workspace/coverage/cover_reg_top/19.sram_ctrl_passthru_mem_tl_intg_err.612148079
/workspace/coverage/cover_reg_top/19.sram_ctrl_same_csr_outstanding.1939652636
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_errors.1111051451
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_intg_err.3281996597
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_aliasing.1218730894
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_bit_bash.3960687892
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_hw_reset.922097118
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_mem_rw_with_rand_reset.577128564
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_rw.306517219
/workspace/coverage/cover_reg_top/2.sram_ctrl_same_csr_outstanding.3334826479
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_errors.2424308161
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_aliasing.4054955353
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_bit_bash.127838666
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_hw_reset.2994082396
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_mem_rw_with_rand_reset.2396002572
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_rw.3912313677
/workspace/coverage/cover_reg_top/3.sram_ctrl_passthru_mem_tl_intg_err.1469355639
/workspace/coverage/cover_reg_top/3.sram_ctrl_same_csr_outstanding.3351412801
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_errors.1327952023
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_aliasing.657862192
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_bit_bash.1116504689
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_hw_reset.650950054
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_mem_rw_with_rand_reset.1256658777
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_rw.1212653717
/workspace/coverage/cover_reg_top/4.sram_ctrl_passthru_mem_tl_intg_err.4218129178
/workspace/coverage/cover_reg_top/4.sram_ctrl_same_csr_outstanding.793824005
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_errors.2090750604
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_intg_err.1926081723
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_mem_rw_with_rand_reset.1980686021
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_rw.3801557357
/workspace/coverage/cover_reg_top/5.sram_ctrl_passthru_mem_tl_intg_err.3153671889
/workspace/coverage/cover_reg_top/5.sram_ctrl_same_csr_outstanding.3873388600
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_errors.2480575205
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_intg_err.3145492286
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_rw.2805538184
/workspace/coverage/cover_reg_top/6.sram_ctrl_passthru_mem_tl_intg_err.3740249401
/workspace/coverage/cover_reg_top/6.sram_ctrl_same_csr_outstanding.1162222094
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_errors.3787809940
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_intg_err.2795631969
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_mem_rw_with_rand_reset.2103404410
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_rw.2430831995
/workspace/coverage/cover_reg_top/7.sram_ctrl_passthru_mem_tl_intg_err.4020463561
/workspace/coverage/cover_reg_top/7.sram_ctrl_same_csr_outstanding.3859836304
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_errors.2393609510
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_intg_err.2651640083
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_mem_rw_with_rand_reset.3342732138
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_rw.3696769691
/workspace/coverage/cover_reg_top/8.sram_ctrl_passthru_mem_tl_intg_err.694088432
/workspace/coverage/cover_reg_top/8.sram_ctrl_same_csr_outstanding.2040149624
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_errors.69659041
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_intg_err.3354823353
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_mem_rw_with_rand_reset.3092701905
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_rw.1989901538
/workspace/coverage/cover_reg_top/9.sram_ctrl_passthru_mem_tl_intg_err.3182221957
/workspace/coverage/cover_reg_top/9.sram_ctrl_same_csr_outstanding.1276945699
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_errors.3970048730
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_intg_err.3319679039
/workspace/coverage/default/0.sram_ctrl_access_during_key_req.2081509230
/workspace/coverage/default/0.sram_ctrl_alert_test.1467098943
/workspace/coverage/default/0.sram_ctrl_bijection.2802961053
/workspace/coverage/default/0.sram_ctrl_executable.520339187
/workspace/coverage/default/0.sram_ctrl_lc_escalation.895062152
/workspace/coverage/default/0.sram_ctrl_max_throughput.2666229342
/workspace/coverage/default/0.sram_ctrl_mem_partial_access.2012617466
/workspace/coverage/default/0.sram_ctrl_mem_walk.3271388673
/workspace/coverage/default/0.sram_ctrl_multiple_keys.2051775906
/workspace/coverage/default/0.sram_ctrl_partial_access.3958484210
/workspace/coverage/default/0.sram_ctrl_partial_access_b2b.3008647600
/workspace/coverage/default/0.sram_ctrl_ram_cfg.3053161103
/workspace/coverage/default/0.sram_ctrl_sec_cm.1423327200
/workspace/coverage/default/0.sram_ctrl_smoke.1601355462
/workspace/coverage/default/0.sram_ctrl_stress_all_with_rand_reset.3835563413
/workspace/coverage/default/0.sram_ctrl_stress_pipeline.2894233729
/workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.1638943537
/workspace/coverage/default/1.sram_ctrl_access_during_key_req.3413360231
/workspace/coverage/default/1.sram_ctrl_alert_test.1721738468
/workspace/coverage/default/1.sram_ctrl_bijection.76576363
/workspace/coverage/default/1.sram_ctrl_executable.1728547325
/workspace/coverage/default/1.sram_ctrl_lc_escalation.1119143693
/workspace/coverage/default/1.sram_ctrl_max_throughput.3143338968
/workspace/coverage/default/1.sram_ctrl_mem_partial_access.1880556351
/workspace/coverage/default/1.sram_ctrl_mem_walk.1083224265
/workspace/coverage/default/1.sram_ctrl_multiple_keys.3371414107
/workspace/coverage/default/1.sram_ctrl_partial_access.418430428
/workspace/coverage/default/1.sram_ctrl_partial_access_b2b.3807757392
/workspace/coverage/default/1.sram_ctrl_regwen.1960357441
/workspace/coverage/default/1.sram_ctrl_sec_cm.1526198660
/workspace/coverage/default/1.sram_ctrl_smoke.1005325339
/workspace/coverage/default/1.sram_ctrl_stress_all.3339868970
/workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.3957030107
/workspace/coverage/default/1.sram_ctrl_stress_pipeline.1726991461
/workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.2222489281
/workspace/coverage/default/10.sram_ctrl_access_during_key_req.2364455140
/workspace/coverage/default/10.sram_ctrl_alert_test.2851632021
/workspace/coverage/default/10.sram_ctrl_bijection.3309940324
/workspace/coverage/default/10.sram_ctrl_executable.2336489596
/workspace/coverage/default/10.sram_ctrl_max_throughput.3761358986
/workspace/coverage/default/10.sram_ctrl_mem_partial_access.3661824717
/workspace/coverage/default/10.sram_ctrl_mem_walk.386820981
/workspace/coverage/default/10.sram_ctrl_multiple_keys.3774730391
/workspace/coverage/default/10.sram_ctrl_partial_access.4183623406
/workspace/coverage/default/10.sram_ctrl_partial_access_b2b.2041946871
/workspace/coverage/default/10.sram_ctrl_ram_cfg.3912984645
/workspace/coverage/default/10.sram_ctrl_regwen.587104001
/workspace/coverage/default/10.sram_ctrl_smoke.1861732320
/workspace/coverage/default/10.sram_ctrl_stress_all.2686486770
/workspace/coverage/default/10.sram_ctrl_stress_pipeline.2806169446
/workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.3488371804
/workspace/coverage/default/11.sram_ctrl_access_during_key_req.2461270845
/workspace/coverage/default/11.sram_ctrl_alert_test.943754952
/workspace/coverage/default/11.sram_ctrl_bijection.325330855
/workspace/coverage/default/11.sram_ctrl_executable.4049569801
/workspace/coverage/default/11.sram_ctrl_lc_escalation.1473186542
/workspace/coverage/default/11.sram_ctrl_max_throughput.312331706
/workspace/coverage/default/11.sram_ctrl_mem_partial_access.1687612319
/workspace/coverage/default/11.sram_ctrl_mem_walk.2597292313
/workspace/coverage/default/11.sram_ctrl_multiple_keys.725641048
/workspace/coverage/default/11.sram_ctrl_partial_access.1251690525
/workspace/coverage/default/11.sram_ctrl_partial_access_b2b.2124646778
/workspace/coverage/default/11.sram_ctrl_ram_cfg.1067298092
/workspace/coverage/default/11.sram_ctrl_regwen.740831801
/workspace/coverage/default/11.sram_ctrl_smoke.1028674953
/workspace/coverage/default/11.sram_ctrl_stress_all.1831708332
/workspace/coverage/default/11.sram_ctrl_stress_all_with_rand_reset.3818576359
/workspace/coverage/default/11.sram_ctrl_stress_pipeline.2714784326
/workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.2542806931
/workspace/coverage/default/12.sram_ctrl_access_during_key_req.411503495
/workspace/coverage/default/12.sram_ctrl_alert_test.88098025
/workspace/coverage/default/12.sram_ctrl_bijection.1461092514
/workspace/coverage/default/12.sram_ctrl_executable.425198189
/workspace/coverage/default/12.sram_ctrl_lc_escalation.3952527979
/workspace/coverage/default/12.sram_ctrl_max_throughput.991261245
/workspace/coverage/default/12.sram_ctrl_mem_partial_access.1927047119
/workspace/coverage/default/12.sram_ctrl_mem_walk.1578874028
/workspace/coverage/default/12.sram_ctrl_multiple_keys.4076885180
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/workspace/coverage/default/43.sram_ctrl_stress_all.367555003
/workspace/coverage/default/43.sram_ctrl_stress_all_with_rand_reset.391511496
/workspace/coverage/default/43.sram_ctrl_stress_pipeline.3059717014
/workspace/coverage/default/43.sram_ctrl_throughput_w_partial_write.967550667
/workspace/coverage/default/44.sram_ctrl_access_during_key_req.1494241887
/workspace/coverage/default/44.sram_ctrl_alert_test.3746001100
/workspace/coverage/default/44.sram_ctrl_bijection.1398998187
/workspace/coverage/default/44.sram_ctrl_executable.1103462154
/workspace/coverage/default/44.sram_ctrl_lc_escalation.1837389573
/workspace/coverage/default/44.sram_ctrl_max_throughput.1941753503
/workspace/coverage/default/44.sram_ctrl_mem_partial_access.2813136363
/workspace/coverage/default/44.sram_ctrl_mem_walk.2409903271
/workspace/coverage/default/44.sram_ctrl_multiple_keys.2447051229
/workspace/coverage/default/44.sram_ctrl_partial_access.2653070851
/workspace/coverage/default/44.sram_ctrl_partial_access_b2b.417640536
/workspace/coverage/default/44.sram_ctrl_ram_cfg.2680406102
/workspace/coverage/default/44.sram_ctrl_regwen.747237265
/workspace/coverage/default/44.sram_ctrl_smoke.3388111674
/workspace/coverage/default/44.sram_ctrl_stress_all.1317249594
/workspace/coverage/default/44.sram_ctrl_stress_all_with_rand_reset.4166484926
/workspace/coverage/default/44.sram_ctrl_stress_pipeline.3602867642
/workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.961246936
/workspace/coverage/default/45.sram_ctrl_access_during_key_req.2107602129
/workspace/coverage/default/45.sram_ctrl_alert_test.2973419434
/workspace/coverage/default/45.sram_ctrl_bijection.3912802106
/workspace/coverage/default/45.sram_ctrl_executable.1792645122
/workspace/coverage/default/45.sram_ctrl_lc_escalation.317539141
/workspace/coverage/default/45.sram_ctrl_max_throughput.2888996419
/workspace/coverage/default/45.sram_ctrl_mem_partial_access.3228490307
/workspace/coverage/default/45.sram_ctrl_mem_walk.3855198501
/workspace/coverage/default/45.sram_ctrl_multiple_keys.415133275
/workspace/coverage/default/45.sram_ctrl_partial_access.1004000824
/workspace/coverage/default/45.sram_ctrl_partial_access_b2b.3757225284
/workspace/coverage/default/45.sram_ctrl_ram_cfg.2942782238
/workspace/coverage/default/45.sram_ctrl_regwen.4051168971
/workspace/coverage/default/45.sram_ctrl_smoke.303583757
/workspace/coverage/default/45.sram_ctrl_stress_all.1956108804
/workspace/coverage/default/45.sram_ctrl_stress_all_with_rand_reset.801936747
/workspace/coverage/default/45.sram_ctrl_stress_pipeline.3838537625
/workspace/coverage/default/45.sram_ctrl_throughput_w_partial_write.1698677323
/workspace/coverage/default/46.sram_ctrl_access_during_key_req.1465987496
/workspace/coverage/default/46.sram_ctrl_alert_test.2310778518
/workspace/coverage/default/46.sram_ctrl_bijection.4051204260
/workspace/coverage/default/46.sram_ctrl_executable.3815108985
/workspace/coverage/default/46.sram_ctrl_lc_escalation.3469326105
/workspace/coverage/default/46.sram_ctrl_max_throughput.1383059983
/workspace/coverage/default/46.sram_ctrl_mem_partial_access.4263700116
/workspace/coverage/default/46.sram_ctrl_mem_walk.1263660824
/workspace/coverage/default/46.sram_ctrl_multiple_keys.3474118866
/workspace/coverage/default/46.sram_ctrl_partial_access.2301659107
/workspace/coverage/default/46.sram_ctrl_partial_access_b2b.2052914611
/workspace/coverage/default/46.sram_ctrl_ram_cfg.928986189
/workspace/coverage/default/46.sram_ctrl_regwen.2252088832
/workspace/coverage/default/46.sram_ctrl_smoke.1585059848
/workspace/coverage/default/46.sram_ctrl_stress_all.1365361826
/workspace/coverage/default/46.sram_ctrl_stress_all_with_rand_reset.870277429
/workspace/coverage/default/46.sram_ctrl_stress_pipeline.3345951865
/workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.1109335894
/workspace/coverage/default/47.sram_ctrl_access_during_key_req.173755275
/workspace/coverage/default/47.sram_ctrl_alert_test.3561170698
/workspace/coverage/default/47.sram_ctrl_bijection.579673933
/workspace/coverage/default/47.sram_ctrl_executable.3450903970
/workspace/coverage/default/47.sram_ctrl_lc_escalation.1804437746
/workspace/coverage/default/47.sram_ctrl_max_throughput.4253222345
/workspace/coverage/default/47.sram_ctrl_mem_partial_access.1782879865
/workspace/coverage/default/47.sram_ctrl_mem_walk.3539330442
/workspace/coverage/default/47.sram_ctrl_multiple_keys.1892512291
/workspace/coverage/default/47.sram_ctrl_partial_access.1943407104
/workspace/coverage/default/47.sram_ctrl_partial_access_b2b.2513467012
/workspace/coverage/default/47.sram_ctrl_ram_cfg.388054921
/workspace/coverage/default/47.sram_ctrl_regwen.2471298256
/workspace/coverage/default/47.sram_ctrl_smoke.2408428512
/workspace/coverage/default/47.sram_ctrl_stress_all.3532290596
/workspace/coverage/default/47.sram_ctrl_stress_all_with_rand_reset.3046968363
/workspace/coverage/default/47.sram_ctrl_stress_pipeline.3639590896
/workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.3328048929
/workspace/coverage/default/48.sram_ctrl_access_during_key_req.3068554810
/workspace/coverage/default/48.sram_ctrl_alert_test.4081425791
/workspace/coverage/default/48.sram_ctrl_bijection.1430860441
/workspace/coverage/default/48.sram_ctrl_executable.2229975374
/workspace/coverage/default/48.sram_ctrl_lc_escalation.179722932
/workspace/coverage/default/48.sram_ctrl_max_throughput.126081674
/workspace/coverage/default/48.sram_ctrl_mem_partial_access.340133430
/workspace/coverage/default/48.sram_ctrl_mem_walk.1664249341
/workspace/coverage/default/48.sram_ctrl_multiple_keys.3980768582
/workspace/coverage/default/48.sram_ctrl_partial_access.3303877897
/workspace/coverage/default/48.sram_ctrl_partial_access_b2b.3038680269
/workspace/coverage/default/48.sram_ctrl_ram_cfg.3765208247
/workspace/coverage/default/48.sram_ctrl_regwen.2787949918
/workspace/coverage/default/48.sram_ctrl_smoke.3687279970
/workspace/coverage/default/48.sram_ctrl_stress_all.282174598
/workspace/coverage/default/48.sram_ctrl_stress_all_with_rand_reset.3671262049
/workspace/coverage/default/48.sram_ctrl_stress_pipeline.556103245
/workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.1818739457
/workspace/coverage/default/49.sram_ctrl_access_during_key_req.501480997
/workspace/coverage/default/49.sram_ctrl_alert_test.1625273932
/workspace/coverage/default/49.sram_ctrl_bijection.259910416
/workspace/coverage/default/49.sram_ctrl_executable.3578855849
/workspace/coverage/default/49.sram_ctrl_lc_escalation.2870602226
/workspace/coverage/default/49.sram_ctrl_max_throughput.751733349
/workspace/coverage/default/49.sram_ctrl_mem_partial_access.3230756747
/workspace/coverage/default/49.sram_ctrl_mem_walk.3275640602
/workspace/coverage/default/49.sram_ctrl_multiple_keys.4203723180
/workspace/coverage/default/49.sram_ctrl_partial_access.3452099200
/workspace/coverage/default/49.sram_ctrl_partial_access_b2b.1123997775
/workspace/coverage/default/49.sram_ctrl_ram_cfg.4069071202
/workspace/coverage/default/49.sram_ctrl_regwen.3313939159
/workspace/coverage/default/49.sram_ctrl_smoke.3548168639
/workspace/coverage/default/49.sram_ctrl_stress_all.673843918
/workspace/coverage/default/49.sram_ctrl_stress_all_with_rand_reset.4079112759
/workspace/coverage/default/49.sram_ctrl_stress_pipeline.996958983
/workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.2690891785
/workspace/coverage/default/5.sram_ctrl_access_during_key_req.1575719811
/workspace/coverage/default/5.sram_ctrl_alert_test.3652786762
/workspace/coverage/default/5.sram_ctrl_bijection.2910831824
/workspace/coverage/default/5.sram_ctrl_lc_escalation.2216807425
/workspace/coverage/default/5.sram_ctrl_max_throughput.2215216155
/workspace/coverage/default/5.sram_ctrl_mem_partial_access.2606013425
/workspace/coverage/default/5.sram_ctrl_mem_walk.1451499912
/workspace/coverage/default/5.sram_ctrl_multiple_keys.3122587857
/workspace/coverage/default/5.sram_ctrl_partial_access.3772671096
/workspace/coverage/default/5.sram_ctrl_partial_access_b2b.1932811787
/workspace/coverage/default/5.sram_ctrl_ram_cfg.1087088797
/workspace/coverage/default/5.sram_ctrl_regwen.704978940
/workspace/coverage/default/5.sram_ctrl_smoke.4225992409
/workspace/coverage/default/5.sram_ctrl_stress_all.806021444
/workspace/coverage/default/5.sram_ctrl_stress_pipeline.67895167
/workspace/coverage/default/5.sram_ctrl_throughput_w_partial_write.3967674627
/workspace/coverage/default/6.sram_ctrl_access_during_key_req.2685964333
/workspace/coverage/default/6.sram_ctrl_alert_test.1856770597
/workspace/coverage/default/6.sram_ctrl_bijection.905870345
/workspace/coverage/default/6.sram_ctrl_executable.1313437743
/workspace/coverage/default/6.sram_ctrl_lc_escalation.354795610
/workspace/coverage/default/6.sram_ctrl_max_throughput.1670638909
/workspace/coverage/default/6.sram_ctrl_mem_partial_access.3049198865
/workspace/coverage/default/6.sram_ctrl_mem_walk.2574780239
/workspace/coverage/default/6.sram_ctrl_multiple_keys.2314974241
/workspace/coverage/default/6.sram_ctrl_partial_access.1773278267
/workspace/coverage/default/6.sram_ctrl_partial_access_b2b.1645225507
/workspace/coverage/default/6.sram_ctrl_ram_cfg.4029271849
/workspace/coverage/default/6.sram_ctrl_regwen.1555625731
/workspace/coverage/default/6.sram_ctrl_smoke.946385214
/workspace/coverage/default/6.sram_ctrl_stress_all.633834747
/workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.1537997692
/workspace/coverage/default/6.sram_ctrl_stress_pipeline.1906856664
/workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.1005633325
/workspace/coverage/default/7.sram_ctrl_access_during_key_req.486701351
/workspace/coverage/default/7.sram_ctrl_alert_test.616161072
/workspace/coverage/default/7.sram_ctrl_bijection.150139909
/workspace/coverage/default/7.sram_ctrl_executable.4141060956
/workspace/coverage/default/7.sram_ctrl_lc_escalation.2757963167
/workspace/coverage/default/7.sram_ctrl_max_throughput.1380343425
/workspace/coverage/default/7.sram_ctrl_mem_partial_access.955196161
/workspace/coverage/default/7.sram_ctrl_mem_walk.929036269
/workspace/coverage/default/7.sram_ctrl_multiple_keys.2265400015
/workspace/coverage/default/7.sram_ctrl_partial_access.1073726422
/workspace/coverage/default/7.sram_ctrl_partial_access_b2b.160076935
/workspace/coverage/default/7.sram_ctrl_ram_cfg.1305582033
/workspace/coverage/default/7.sram_ctrl_regwen.3005038560
/workspace/coverage/default/7.sram_ctrl_smoke.2617898299
/workspace/coverage/default/7.sram_ctrl_stress_all_with_rand_reset.88385337
/workspace/coverage/default/7.sram_ctrl_stress_pipeline.1634650048
/workspace/coverage/default/7.sram_ctrl_throughput_w_partial_write.3052782014
/workspace/coverage/default/8.sram_ctrl_access_during_key_req.2461405462
/workspace/coverage/default/8.sram_ctrl_alert_test.2763784124
/workspace/coverage/default/8.sram_ctrl_bijection.1232322831
/workspace/coverage/default/8.sram_ctrl_executable.2678473812
/workspace/coverage/default/8.sram_ctrl_lc_escalation.1406315196
/workspace/coverage/default/8.sram_ctrl_max_throughput.2903466844
/workspace/coverage/default/8.sram_ctrl_mem_partial_access.4180817312
/workspace/coverage/default/8.sram_ctrl_mem_walk.3735719092
/workspace/coverage/default/8.sram_ctrl_multiple_keys.1832276786
/workspace/coverage/default/8.sram_ctrl_partial_access.3612577199
/workspace/coverage/default/8.sram_ctrl_partial_access_b2b.3322724093
/workspace/coverage/default/8.sram_ctrl_ram_cfg.3955008993
/workspace/coverage/default/8.sram_ctrl_regwen.296327424
/workspace/coverage/default/8.sram_ctrl_smoke.3718544725
/workspace/coverage/default/8.sram_ctrl_stress_all.3992945277
/workspace/coverage/default/8.sram_ctrl_stress_all_with_rand_reset.3395937662
/workspace/coverage/default/8.sram_ctrl_stress_pipeline.2080601315
/workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.808913290
/workspace/coverage/default/9.sram_ctrl_access_during_key_req.2859119112
/workspace/coverage/default/9.sram_ctrl_alert_test.772016921
/workspace/coverage/default/9.sram_ctrl_bijection.1295517442
/workspace/coverage/default/9.sram_ctrl_executable.1389827491
/workspace/coverage/default/9.sram_ctrl_lc_escalation.3086352930
/workspace/coverage/default/9.sram_ctrl_max_throughput.1895186533
/workspace/coverage/default/9.sram_ctrl_mem_partial_access.1452524524
/workspace/coverage/default/9.sram_ctrl_mem_walk.1791917345
/workspace/coverage/default/9.sram_ctrl_multiple_keys.3182667711
/workspace/coverage/default/9.sram_ctrl_partial_access.2548247088
/workspace/coverage/default/9.sram_ctrl_partial_access_b2b.1477271171
/workspace/coverage/default/9.sram_ctrl_ram_cfg.2715862920
/workspace/coverage/default/9.sram_ctrl_regwen.1919729590
/workspace/coverage/default/9.sram_ctrl_smoke.1433917254
/workspace/coverage/default/9.sram_ctrl_stress_all.2313235204
/workspace/coverage/default/9.sram_ctrl_stress_all_with_rand_reset.4170877445
/workspace/coverage/default/9.sram_ctrl_stress_pipeline.1371215450
/workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.4248900986



Total test records in report: 1021
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html
TEST NOTEST LOCATIONTEST NAMESTATUSSTARTEDFINISHEDSIMULATION TIME
T1 /workspace/coverage/default/4.sram_ctrl_access_during_key_req.2066340230 Aug 16 04:56:35 PM PDT 24 Aug 16 04:57:16 PM PDT 24 4910120259 ps
T2 /workspace/coverage/default/11.sram_ctrl_access_during_key_req.2461270845 Aug 16 04:56:43 PM PDT 24 Aug 16 04:57:45 PM PDT 24 1037808539 ps
T3 /workspace/coverage/default/5.sram_ctrl_executable.116239270 Aug 16 04:56:37 PM PDT 24 Aug 16 05:27:49 PM PDT 24 25255553579 ps
T9 /workspace/coverage/default/43.sram_ctrl_throughput_w_partial_write.967550667 Aug 16 04:59:05 PM PDT 24 Aug 16 04:59:39 PM PDT 24 113347685 ps
T10 /workspace/coverage/default/2.sram_ctrl_ram_cfg.1385927574 Aug 16 04:56:20 PM PDT 24 Aug 16 04:56:21 PM PDT 24 46041792 ps
T11 /workspace/coverage/default/13.sram_ctrl_multiple_keys.826074204 Aug 16 04:56:58 PM PDT 24 Aug 16 05:10:22 PM PDT 24 10898408441 ps
T12 /workspace/coverage/default/15.sram_ctrl_access_during_key_req.1101111895 Aug 16 04:56:44 PM PDT 24 Aug 16 05:08:34 PM PDT 24 12648478571 ps
T4 /workspace/coverage/default/43.sram_ctrl_mem_walk.2145594825 Aug 16 04:59:06 PM PDT 24 Aug 16 04:59:15 PM PDT 24 268697222 ps
T13 /workspace/coverage/default/19.sram_ctrl_regwen.102153577 Aug 16 04:57:10 PM PDT 24 Aug 16 05:09:31 PM PDT 24 10993087812 ps
T8 /workspace/coverage/default/2.sram_ctrl_sec_cm.1549963062 Aug 16 04:56:19 PM PDT 24 Aug 16 04:56:22 PM PDT 24 452346296 ps
T25 /workspace/coverage/default/34.sram_ctrl_access_during_key_req.2555685990 Aug 16 04:58:15 PM PDT 24 Aug 16 05:03:46 PM PDT 24 4840750240 ps
T26 /workspace/coverage/default/34.sram_ctrl_max_throughput.1211554000 Aug 16 04:58:08 PM PDT 24 Aug 16 04:59:27 PM PDT 24 388564130 ps
T19 /workspace/coverage/default/4.sram_ctrl_stress_all_with_rand_reset.3356569712 Aug 16 04:56:31 PM PDT 24 Aug 16 05:08:28 PM PDT 24 1758229392 ps
T32 /workspace/coverage/default/45.sram_ctrl_mem_partial_access.3228490307 Aug 16 04:59:17 PM PDT 24 Aug 16 04:59:20 PM PDT 24 47517299 ps
T33 /workspace/coverage/default/13.sram_ctrl_partial_access_b2b.3617442834 Aug 16 04:56:43 PM PDT 24 Aug 16 05:04:43 PM PDT 24 194377396174 ps
T20 /workspace/coverage/default/48.sram_ctrl_bijection.1430860441 Aug 16 04:59:30 PM PDT 24 Aug 16 05:00:03 PM PDT 24 2058804805 ps
T21 /workspace/coverage/default/19.sram_ctrl_stress_all_with_rand_reset.1228688850 Aug 16 04:57:16 PM PDT 24 Aug 16 04:59:49 PM PDT 24 39780052653 ps
T34 /workspace/coverage/default/33.sram_ctrl_throughput_w_partial_write.1100516610 Aug 16 04:58:08 PM PDT 24 Aug 16 04:58:11 PM PDT 24 56648731 ps
T28 /workspace/coverage/default/44.sram_ctrl_ram_cfg.2680406102 Aug 16 04:59:11 PM PDT 24 Aug 16 04:59:12 PM PDT 24 172936452 ps
T27 /workspace/coverage/default/16.sram_ctrl_stress_all_with_rand_reset.72146940 Aug 16 04:56:51 PM PDT 24 Aug 16 04:59:53 PM PDT 24 4873466700 ps
T48 /workspace/coverage/default/8.sram_ctrl_partial_access.3612577199 Aug 16 04:56:40 PM PDT 24 Aug 16 04:56:42 PM PDT 24 222109289 ps
T35 /workspace/coverage/default/27.sram_ctrl_mem_walk.3711653588 Aug 16 04:57:40 PM PDT 24 Aug 16 04:57:53 PM PDT 24 1768801715 ps
T45 /workspace/coverage/default/13.sram_ctrl_mem_walk.2622783671 Aug 16 04:56:58 PM PDT 24 Aug 16 04:57:09 PM PDT 24 174458659 ps
T89 /workspace/coverage/default/41.sram_ctrl_stress_pipeline.2427955996 Aug 16 04:58:52 PM PDT 24 Aug 16 05:01:12 PM PDT 24 2884371274 ps
T14 /workspace/coverage/default/26.sram_ctrl_alert_test.1761939051 Aug 16 04:57:36 PM PDT 24 Aug 16 04:57:36 PM PDT 24 38195286 ps
T41 /workspace/coverage/default/8.sram_ctrl_mem_walk.3735719092 Aug 16 04:56:42 PM PDT 24 Aug 16 04:56:48 PM PDT 24 922447605 ps
T141 /workspace/coverage/default/36.sram_ctrl_bijection.4254037833 Aug 16 04:58:19 PM PDT 24 Aug 16 04:58:54 PM PDT 24 538101007 ps
T55 /workspace/coverage/default/27.sram_ctrl_stress_all.634807937 Aug 16 04:57:44 PM PDT 24 Aug 16 06:29:53 PM PDT 24 61831469944 ps
T131 /workspace/coverage/default/48.sram_ctrl_executable.2229975374 Aug 16 04:59:35 PM PDT 24 Aug 16 05:06:26 PM PDT 24 1955448566 ps
T90 /workspace/coverage/default/1.sram_ctrl_partial_access_b2b.3807757392 Aug 16 04:56:18 PM PDT 24 Aug 16 05:00:41 PM PDT 24 69680684092 ps
T91 /workspace/coverage/default/30.sram_ctrl_partial_access_b2b.2646535263 Aug 16 04:57:51 PM PDT 24 Aug 16 05:00:10 PM PDT 24 15811313484 ps
T139 /workspace/coverage/default/49.sram_ctrl_bijection.259910416 Aug 16 04:59:37 PM PDT 24 Aug 16 05:00:55 PM PDT 24 34148975706 ps
T140 /workspace/coverage/default/5.sram_ctrl_throughput_w_partial_write.3967674627 Aug 16 04:56:32 PM PDT 24 Aug 16 04:57:26 PM PDT 24 626913363 ps
T136 /workspace/coverage/default/3.sram_ctrl_multiple_keys.1045012197 Aug 16 04:56:29 PM PDT 24 Aug 16 05:05:29 PM PDT 24 72178343764 ps
T36 /workspace/coverage/default/21.sram_ctrl_executable.1413764808 Aug 16 04:57:20 PM PDT 24 Aug 16 05:01:14 PM PDT 24 12409275203 ps
T46 /workspace/coverage/default/33.sram_ctrl_mem_walk.3980819530 Aug 16 04:58:07 PM PDT 24 Aug 16 04:58:18 PM PDT 24 1744072123 ps
T15 /workspace/coverage/default/45.sram_ctrl_alert_test.2973419434 Aug 16 04:59:18 PM PDT 24 Aug 16 04:59:19 PM PDT 24 14507188 ps
T142 /workspace/coverage/default/6.sram_ctrl_smoke.946385214 Aug 16 04:56:38 PM PDT 24 Aug 16 04:56:53 PM PDT 24 719233418 ps
T22 /workspace/coverage/default/20.sram_ctrl_regwen.3063909313 Aug 16 04:57:10 PM PDT 24 Aug 16 05:07:23 PM PDT 24 20518050899 ps
T37 /workspace/coverage/default/22.sram_ctrl_stress_all_with_rand_reset.3121828333 Aug 16 04:57:21 PM PDT 24 Aug 16 04:57:40 PM PDT 24 480934797 ps
T143 /workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.3328048929 Aug 16 04:59:28 PM PDT 24 Aug 16 05:01:33 PM PDT 24 314451783 ps
T92 /workspace/coverage/default/49.sram_ctrl_stress_pipeline.996958983 Aug 16 04:59:36 PM PDT 24 Aug 16 05:04:35 PM PDT 24 3188909716 ps
T47 /workspace/coverage/default/23.sram_ctrl_stress_all_with_rand_reset.1388760981 Aug 16 04:57:20 PM PDT 24 Aug 16 05:14:59 PM PDT 24 2608818568 ps
T144 /workspace/coverage/default/17.sram_ctrl_bijection.2719867740 Aug 16 04:56:55 PM PDT 24 Aug 16 04:58:08 PM PDT 24 3373853296 ps
T44 /workspace/coverage/default/48.sram_ctrl_mem_partial_access.340133430 Aug 16 04:59:41 PM PDT 24 Aug 16 04:59:46 PM PDT 24 97512700 ps
T23 /workspace/coverage/default/29.sram_ctrl_stress_all.1369587298 Aug 16 04:57:48 PM PDT 24 Aug 16 05:20:36 PM PDT 24 15722387051 ps
T93 /workspace/coverage/default/9.sram_ctrl_partial_access_b2b.1477271171 Aug 16 04:56:39 PM PDT 24 Aug 16 05:00:37 PM PDT 24 24712613794 ps
T145 /workspace/coverage/default/22.sram_ctrl_max_throughput.1745115223 Aug 16 04:57:24 PM PDT 24 Aug 16 04:57:41 PM PDT 24 664170050 ps
T61 /workspace/coverage/default/49.sram_ctrl_regwen.3313939159 Aug 16 04:59:44 PM PDT 24 Aug 16 05:06:47 PM PDT 24 4461162828 ps
T146 /workspace/coverage/default/19.sram_ctrl_multiple_keys.2795565895 Aug 16 04:57:07 PM PDT 24 Aug 16 05:01:27 PM PDT 24 10133982106 ps
T16 /workspace/coverage/default/7.sram_ctrl_alert_test.616161072 Aug 16 04:56:41 PM PDT 24 Aug 16 04:56:42 PM PDT 24 32763176 ps
T5 /workspace/coverage/default/1.sram_ctrl_lc_escalation.1119143693 Aug 16 04:56:21 PM PDT 24 Aug 16 04:56:30 PM PDT 24 896599820 ps
T147 /workspace/coverage/default/27.sram_ctrl_max_throughput.241793359 Aug 16 04:57:33 PM PDT 24 Aug 16 05:00:12 PM PDT 24 147320109 ps
T148 /workspace/coverage/default/18.sram_ctrl_partial_access.12275922 Aug 16 04:57:00 PM PDT 24 Aug 16 04:57:08 PM PDT 24 456662968 ps
T149 /workspace/coverage/default/30.sram_ctrl_max_throughput.2408421195 Aug 16 04:57:46 PM PDT 24 Aug 16 05:00:14 PM PDT 24 272169208 ps
T94 /workspace/coverage/default/41.sram_ctrl_partial_access_b2b.1373747071 Aug 16 04:58:52 PM PDT 24 Aug 16 05:02:16 PM PDT 24 3403308360 ps
T150 /workspace/coverage/default/9.sram_ctrl_smoke.1433917254 Aug 16 04:56:35 PM PDT 24 Aug 16 04:56:59 PM PDT 24 354460858 ps
T29 /workspace/coverage/default/23.sram_ctrl_ram_cfg.1675180341 Aug 16 04:57:22 PM PDT 24 Aug 16 04:57:23 PM PDT 24 66129331 ps
T135 /workspace/coverage/default/47.sram_ctrl_executable.3450903970 Aug 16 04:59:32 PM PDT 24 Aug 16 05:15:51 PM PDT 24 46692776757 ps
T95 /workspace/coverage/default/17.sram_ctrl_stress_pipeline.3491262340 Aug 16 04:57:05 PM PDT 24 Aug 16 05:01:30 PM PDT 24 5290961837 ps
T59 /workspace/coverage/default/0.sram_ctrl_stress_all_with_rand_reset.3835563413 Aug 16 04:56:26 PM PDT 24 Aug 16 05:00:52 PM PDT 24 1636578935 ps
T151 /workspace/coverage/default/47.sram_ctrl_mem_walk.3539330442 Aug 16 04:59:30 PM PDT 24 Aug 16 04:59:35 PM PDT 24 74599921 ps
T152 /workspace/coverage/default/13.sram_ctrl_max_throughput.1088126631 Aug 16 04:56:42 PM PDT 24 Aug 16 04:58:11 PM PDT 24 616730761 ps
T153 /workspace/coverage/default/24.sram_ctrl_max_throughput.3000767595 Aug 16 04:57:25 PM PDT 24 Aug 16 04:57:28 PM PDT 24 86745609 ps
T154 /workspace/coverage/default/25.sram_ctrl_bijection.2575727598 Aug 16 04:57:27 PM PDT 24 Aug 16 04:58:52 PM PDT 24 39749315034 ps
T6 /workspace/coverage/default/48.sram_ctrl_lc_escalation.179722932 Aug 16 04:59:36 PM PDT 24 Aug 16 04:59:44 PM PDT 24 1374058255 ps
T155 /workspace/coverage/default/42.sram_ctrl_ram_cfg.1256615561 Aug 16 04:58:58 PM PDT 24 Aug 16 04:58:59 PM PDT 24 71368617 ps
T156 /workspace/coverage/default/39.sram_ctrl_alert_test.574890225 Aug 16 04:58:42 PM PDT 24 Aug 16 04:58:43 PM PDT 24 17694047 ps
T157 /workspace/coverage/default/45.sram_ctrl_mem_walk.3855198501 Aug 16 04:59:16 PM PDT 24 Aug 16 04:59:25 PM PDT 24 137302603 ps
T158 /workspace/coverage/default/21.sram_ctrl_multiple_keys.8212712 Aug 16 04:57:13 PM PDT 24 Aug 16 05:09:44 PM PDT 24 10240975662 ps
T159 /workspace/coverage/default/22.sram_ctrl_mem_walk.3710147425 Aug 16 04:57:21 PM PDT 24 Aug 16 04:57:31 PM PDT 24 523457028 ps
T160 /workspace/coverage/default/22.sram_ctrl_alert_test.941587214 Aug 16 04:57:20 PM PDT 24 Aug 16 04:57:21 PM PDT 24 12824328 ps
T161 /workspace/coverage/default/2.sram_ctrl_partial_access.2257017335 Aug 16 04:56:19 PM PDT 24 Aug 16 04:56:36 PM PDT 24 624613811 ps
T162 /workspace/coverage/default/22.sram_ctrl_stress_pipeline.3692472378 Aug 16 04:57:20 PM PDT 24 Aug 16 05:00:34 PM PDT 24 2038761813 ps
T163 /workspace/coverage/default/32.sram_ctrl_stress_pipeline.842120139 Aug 16 04:58:01 PM PDT 24 Aug 16 05:02:01 PM PDT 24 9273758277 ps
T164 /workspace/coverage/default/39.sram_ctrl_throughput_w_partial_write.3408834383 Aug 16 04:58:36 PM PDT 24 Aug 16 04:59:06 PM PDT 24 189046923 ps
T165 /workspace/coverage/default/9.sram_ctrl_max_throughput.1895186533 Aug 16 04:56:40 PM PDT 24 Aug 16 04:56:46 PM PDT 24 157165655 ps
T62 /workspace/coverage/default/12.sram_ctrl_regwen.13753560 Aug 16 04:56:49 PM PDT 24 Aug 16 04:59:00 PM PDT 24 15090852039 ps
T166 /workspace/coverage/default/19.sram_ctrl_partial_access_b2b.4153965008 Aug 16 04:57:24 PM PDT 24 Aug 16 05:02:56 PM PDT 24 32785387685 ps
T167 /workspace/coverage/default/34.sram_ctrl_smoke.1801193094 Aug 16 04:58:09 PM PDT 24 Aug 16 04:58:24 PM PDT 24 3030799558 ps
T168 /workspace/coverage/default/21.sram_ctrl_max_throughput.2415568647 Aug 16 04:57:18 PM PDT 24 Aug 16 04:58:20 PM PDT 24 1633735340 ps
T169 /workspace/coverage/default/25.sram_ctrl_executable.90465119 Aug 16 04:57:29 PM PDT 24 Aug 16 05:06:24 PM PDT 24 5045806783 ps
T170 /workspace/coverage/default/11.sram_ctrl_alert_test.943754952 Aug 16 04:56:41 PM PDT 24 Aug 16 04:56:42 PM PDT 24 13189827 ps
T42 /workspace/coverage/default/41.sram_ctrl_mem_partial_access.1152174095 Aug 16 04:58:48 PM PDT 24 Aug 16 04:58:55 PM PDT 24 214086865 ps
T171 /workspace/coverage/default/12.sram_ctrl_max_throughput.991261245 Aug 16 04:56:41 PM PDT 24 Aug 16 04:57:51 PM PDT 24 452094236 ps
T172 /workspace/coverage/default/35.sram_ctrl_smoke.2748170186 Aug 16 04:58:14 PM PDT 24 Aug 16 05:00:27 PM PDT 24 132170262 ps
T173 /workspace/coverage/default/9.sram_ctrl_multiple_keys.3182667711 Aug 16 04:56:39 PM PDT 24 Aug 16 05:17:59 PM PDT 24 65820008177 ps
T174 /workspace/coverage/default/16.sram_ctrl_bijection.2606597246 Aug 16 04:57:05 PM PDT 24 Aug 16 04:58:01 PM PDT 24 5706944660 ps
T175 /workspace/coverage/default/40.sram_ctrl_ram_cfg.1149102076 Aug 16 04:58:43 PM PDT 24 Aug 16 04:58:44 PM PDT 24 31283256 ps
T132 /workspace/coverage/default/2.sram_ctrl_executable.1128094534 Aug 16 04:56:27 PM PDT 24 Aug 16 05:07:46 PM PDT 24 2274187353 ps
T176 /workspace/coverage/default/3.sram_ctrl_alert_test.2650902246 Aug 16 04:56:29 PM PDT 24 Aug 16 04:56:30 PM PDT 24 40159591 ps
T177 /workspace/coverage/default/29.sram_ctrl_max_throughput.2252442999 Aug 16 04:57:50 PM PDT 24 Aug 16 04:57:52 PM PDT 24 77683208 ps
T7 /workspace/coverage/default/2.sram_ctrl_lc_escalation.942645281 Aug 16 04:56:22 PM PDT 24 Aug 16 04:56:29 PM PDT 24 514110647 ps
T178 /workspace/coverage/default/26.sram_ctrl_smoke.4185306759 Aug 16 04:57:27 PM PDT 24 Aug 16 05:00:05 PM PDT 24 1155758577 ps
T133 /workspace/coverage/default/37.sram_ctrl_executable.1477512489 Aug 16 04:58:28 PM PDT 24 Aug 16 05:20:17 PM PDT 24 4743508656 ps
T179 /workspace/coverage/default/7.sram_ctrl_throughput_w_partial_write.3052782014 Aug 16 04:56:39 PM PDT 24 Aug 16 04:59:02 PM PDT 24 2069155460 ps
T24 /workspace/coverage/default/12.sram_ctrl_stress_all.4099940001 Aug 16 04:56:43 PM PDT 24 Aug 16 05:42:07 PM PDT 24 34800384163 ps
T180 /workspace/coverage/default/26.sram_ctrl_partial_access.2485813843 Aug 16 04:57:37 PM PDT 24 Aug 16 04:57:45 PM PDT 24 1416020791 ps
T181 /workspace/coverage/default/29.sram_ctrl_alert_test.640064285 Aug 16 04:57:47 PM PDT 24 Aug 16 04:57:48 PM PDT 24 14033273 ps
T75 /workspace/coverage/default/8.sram_ctrl_access_during_key_req.2461405462 Aug 16 04:56:38 PM PDT 24 Aug 16 05:08:51 PM PDT 24 2313817797 ps
T182 /workspace/coverage/default/43.sram_ctrl_max_throughput.2499946379 Aug 16 04:59:03 PM PDT 24 Aug 16 04:59:53 PM PDT 24 192359150 ps
T183 /workspace/coverage/default/29.sram_ctrl_multiple_keys.2248901355 Aug 16 04:57:52 PM PDT 24 Aug 16 05:22:17 PM PDT 24 11236200540 ps
T184 /workspace/coverage/default/4.sram_ctrl_alert_test.4152509735 Aug 16 04:56:31 PM PDT 24 Aug 16 04:56:32 PM PDT 24 38370696 ps
T185 /workspace/coverage/default/28.sram_ctrl_partial_access_b2b.2467297675 Aug 16 04:57:42 PM PDT 24 Aug 16 05:02:56 PM PDT 24 4562554940 ps
T186 /workspace/coverage/default/39.sram_ctrl_stress_pipeline.2551961672 Aug 16 04:58:36 PM PDT 24 Aug 16 05:04:39 PM PDT 24 8029839619 ps
T137 /workspace/coverage/default/20.sram_ctrl_partial_access_b2b.4089764433 Aug 16 04:57:10 PM PDT 24 Aug 16 05:06:36 PM PDT 24 94584977591 ps
T187 /workspace/coverage/default/33.sram_ctrl_stress_all.3405275364 Aug 16 04:58:09 PM PDT 24 Aug 16 05:25:43 PM PDT 24 26585512259 ps
T188 /workspace/coverage/default/16.sram_ctrl_smoke.2923265763 Aug 16 04:57:05 PM PDT 24 Aug 16 04:57:13 PM PDT 24 150442035 ps
T189 /workspace/coverage/default/20.sram_ctrl_alert_test.3813688611 Aug 16 04:57:20 PM PDT 24 Aug 16 04:57:21 PM PDT 24 15289025 ps
T76 /workspace/coverage/default/36.sram_ctrl_access_during_key_req.2091104075 Aug 16 04:58:20 PM PDT 24 Aug 16 05:03:00 PM PDT 24 1420561209 ps
T134 /workspace/coverage/default/30.sram_ctrl_executable.2942806715 Aug 16 04:57:55 PM PDT 24 Aug 16 05:17:06 PM PDT 24 29837349586 ps
T190 /workspace/coverage/default/47.sram_ctrl_stress_pipeline.3639590896 Aug 16 04:59:26 PM PDT 24 Aug 16 05:02:09 PM PDT 24 6754034003 ps
T77 /workspace/coverage/default/33.sram_ctrl_access_during_key_req.2660275164 Aug 16 04:58:08 PM PDT 24 Aug 16 05:16:51 PM PDT 24 9981326494 ps
T191 /workspace/coverage/default/8.sram_ctrl_regwen.296327424 Aug 16 04:56:41 PM PDT 24 Aug 16 05:07:37 PM PDT 24 10376802486 ps
T114 /workspace/coverage/default/4.sram_ctrl_lc_escalation.3141238837 Aug 16 04:56:34 PM PDT 24 Aug 16 04:56:40 PM PDT 24 2077083412 ps
T192 /workspace/coverage/default/7.sram_ctrl_mem_walk.929036269 Aug 16 04:56:41 PM PDT 24 Aug 16 04:56:51 PM PDT 24 685827217 ps
T193 /workspace/coverage/default/15.sram_ctrl_smoke.4187407247 Aug 16 04:56:46 PM PDT 24 Aug 16 04:56:55 PM PDT 24 3526974354 ps
T194 /workspace/coverage/default/31.sram_ctrl_max_throughput.1985945573 Aug 16 04:57:54 PM PDT 24 Aug 16 04:58:12 PM PDT 24 283929959 ps
T60 /workspace/coverage/default/21.sram_ctrl_stress_all_with_rand_reset.3698043407 Aug 16 04:57:25 PM PDT 24 Aug 16 05:00:23 PM PDT 24 437514672 ps
T195 /workspace/coverage/default/34.sram_ctrl_executable.3408913212 Aug 16 04:58:14 PM PDT 24 Aug 16 05:18:43 PM PDT 24 203244028455 ps
T196 /workspace/coverage/default/43.sram_ctrl_access_during_key_req.1618801089 Aug 16 04:59:04 PM PDT 24 Aug 16 05:11:48 PM PDT 24 4441211610 ps
T197 /workspace/coverage/default/0.sram_ctrl_partial_access_b2b.3008647600 Aug 16 04:56:10 PM PDT 24 Aug 16 05:00:38 PM PDT 24 11171794739 ps
T198 /workspace/coverage/default/29.sram_ctrl_smoke.2258637444 Aug 16 04:57:47 PM PDT 24 Aug 16 04:57:55 PM PDT 24 235241273 ps
T199 /workspace/coverage/default/38.sram_ctrl_lc_escalation.1643382729 Aug 16 04:58:29 PM PDT 24 Aug 16 04:58:34 PM PDT 24 422981353 ps
T200 /workspace/coverage/default/10.sram_ctrl_executable.2336489596 Aug 16 04:56:41 PM PDT 24 Aug 16 05:05:50 PM PDT 24 14994868545 ps
T201 /workspace/coverage/default/12.sram_ctrl_throughput_w_partial_write.1867171743 Aug 16 04:56:55 PM PDT 24 Aug 16 04:57:04 PM PDT 24 121895737 ps
T202 /workspace/coverage/default/26.sram_ctrl_ram_cfg.623717316 Aug 16 04:57:36 PM PDT 24 Aug 16 04:57:36 PM PDT 24 27693132 ps
T203 /workspace/coverage/default/29.sram_ctrl_stress_pipeline.1648890394 Aug 16 04:57:48 PM PDT 24 Aug 16 05:01:39 PM PDT 24 17800067297 ps
T204 /workspace/coverage/default/0.sram_ctrl_executable.520339187 Aug 16 04:56:28 PM PDT 24 Aug 16 05:09:53 PM PDT 24 19659481868 ps
T205 /workspace/coverage/default/32.sram_ctrl_smoke.2533735517 Aug 16 04:58:04 PM PDT 24 Aug 16 04:59:01 PM PDT 24 115667992 ps
T206 /workspace/coverage/default/10.sram_ctrl_multiple_keys.3774730391 Aug 16 04:56:39 PM PDT 24 Aug 16 05:06:23 PM PDT 24 4678306020 ps
T207 /workspace/coverage/default/0.sram_ctrl_alert_test.1467098943 Aug 16 04:56:29 PM PDT 24 Aug 16 04:56:30 PM PDT 24 15440377 ps
T208 /workspace/coverage/default/46.sram_ctrl_alert_test.2310778518 Aug 16 04:59:25 PM PDT 24 Aug 16 04:59:26 PM PDT 24 38562093 ps
T209 /workspace/coverage/default/26.sram_ctrl_stress_pipeline.864663941 Aug 16 04:57:33 PM PDT 24 Aug 16 05:02:15 PM PDT 24 11406242982 ps
T210 /workspace/coverage/default/25.sram_ctrl_regwen.3691050038 Aug 16 04:57:28 PM PDT 24 Aug 16 05:17:52 PM PDT 24 37222853604 ps
T211 /workspace/coverage/default/11.sram_ctrl_mem_walk.2597292313 Aug 16 04:56:43 PM PDT 24 Aug 16 04:56:55 PM PDT 24 1562921597 ps
T212 /workspace/coverage/default/20.sram_ctrl_executable.2846844420 Aug 16 04:57:10 PM PDT 24 Aug 16 05:07:10 PM PDT 24 6942611723 ps
T213 /workspace/coverage/default/49.sram_ctrl_access_during_key_req.501480997 Aug 16 04:59:44 PM PDT 24 Aug 16 05:17:03 PM PDT 24 11843609277 ps
T214 /workspace/coverage/default/23.sram_ctrl_stress_pipeline.379876007 Aug 16 04:57:20 PM PDT 24 Aug 16 05:00:47 PM PDT 24 10119746778 ps
T215 /workspace/coverage/default/30.sram_ctrl_lc_escalation.2957922388 Aug 16 04:57:55 PM PDT 24 Aug 16 04:57:56 PM PDT 24 85126064 ps
T216 /workspace/coverage/default/11.sram_ctrl_stress_all.1831708332 Aug 16 04:56:43 PM PDT 24 Aug 16 05:13:27 PM PDT 24 12361620993 ps
T217 /workspace/coverage/default/6.sram_ctrl_mem_partial_access.3049198865 Aug 16 04:56:36 PM PDT 24 Aug 16 04:56:42 PM PDT 24 678877812 ps
T218 /workspace/coverage/default/47.sram_ctrl_smoke.2408428512 Aug 16 04:59:25 PM PDT 24 Aug 16 04:59:33 PM PDT 24 393554875 ps
T219 /workspace/coverage/default/41.sram_ctrl_access_during_key_req.10980025 Aug 16 04:58:51 PM PDT 24 Aug 16 05:09:05 PM PDT 24 4291600280 ps
T220 /workspace/coverage/default/15.sram_ctrl_lc_escalation.1974866027 Aug 16 04:56:52 PM PDT 24 Aug 16 04:56:55 PM PDT 24 220278931 ps
T221 /workspace/coverage/default/19.sram_ctrl_stress_all.726471671 Aug 16 04:57:07 PM PDT 24 Aug 16 05:10:21 PM PDT 24 5686577401 ps
T222 /workspace/coverage/default/28.sram_ctrl_stress_pipeline.628456143 Aug 16 04:57:41 PM PDT 24 Aug 16 05:01:28 PM PDT 24 4518871830 ps
T223 /workspace/coverage/default/38.sram_ctrl_max_throughput.417800945 Aug 16 04:58:29 PM PDT 24 Aug 16 04:58:30 PM PDT 24 143162075 ps
T224 /workspace/coverage/default/7.sram_ctrl_multiple_keys.2265400015 Aug 16 04:56:40 PM PDT 24 Aug 16 05:16:54 PM PDT 24 61457140760 ps
T225 /workspace/coverage/default/30.sram_ctrl_alert_test.1202144055 Aug 16 04:57:54 PM PDT 24 Aug 16 04:57:55 PM PDT 24 21846252 ps
T138 /workspace/coverage/default/18.sram_ctrl_regwen.3803377624 Aug 16 04:57:10 PM PDT 24 Aug 16 05:11:24 PM PDT 24 64815080707 ps
T226 /workspace/coverage/default/16.sram_ctrl_throughput_w_partial_write.2237391667 Aug 16 04:56:51 PM PDT 24 Aug 16 04:57:32 PM PDT 24 221534332 ps
T227 /workspace/coverage/default/1.sram_ctrl_ram_cfg.4229450140 Aug 16 04:56:21 PM PDT 24 Aug 16 04:56:22 PM PDT 24 46037850 ps
T228 /workspace/coverage/default/28.sram_ctrl_bijection.1880042176 Aug 16 04:57:42 PM PDT 24 Aug 16 04:58:29 PM PDT 24 3030680561 ps
T229 /workspace/coverage/default/5.sram_ctrl_max_throughput.2215216155 Aug 16 04:56:38 PM PDT 24 Aug 16 04:57:59 PM PDT 24 978322445 ps
T230 /workspace/coverage/default/30.sram_ctrl_multiple_keys.715206003 Aug 16 04:57:54 PM PDT 24 Aug 16 05:00:15 PM PDT 24 7109014906 ps
T231 /workspace/coverage/default/37.sram_ctrl_partial_access.2325225743 Aug 16 04:58:31 PM PDT 24 Aug 16 04:58:41 PM PDT 24 1898505758 ps
T232 /workspace/coverage/default/14.sram_ctrl_mem_walk.2126065140 Aug 16 04:56:48 PM PDT 24 Aug 16 04:56:54 PM PDT 24 895009934 ps
T49 /workspace/coverage/default/43.sram_ctrl_stress_all_with_rand_reset.391511496 Aug 16 04:59:07 PM PDT 24 Aug 16 05:07:15 PM PDT 24 4678905992 ps
T233 /workspace/coverage/default/4.sram_ctrl_throughput_w_partial_write.1054371441 Aug 16 04:56:30 PM PDT 24 Aug 16 04:58:45 PM PDT 24 151898354 ps
T234 /workspace/coverage/default/3.sram_ctrl_executable.4026732710 Aug 16 04:56:34 PM PDT 24 Aug 16 05:10:41 PM PDT 24 9131899151 ps
T235 /workspace/coverage/default/18.sram_ctrl_stress_all.933612058 Aug 16 04:57:12 PM PDT 24 Aug 16 05:08:27 PM PDT 24 19457823691 ps
T236 /workspace/coverage/default/46.sram_ctrl_stress_pipeline.3345951865 Aug 16 04:59:26 PM PDT 24 Aug 16 05:03:33 PM PDT 24 2541634245 ps
T237 /workspace/coverage/default/31.sram_ctrl_alert_test.884185514 Aug 16 04:58:02 PM PDT 24 Aug 16 04:58:02 PM PDT 24 38114510 ps
T238 /workspace/coverage/default/18.sram_ctrl_executable.2982000724 Aug 16 04:57:08 PM PDT 24 Aug 16 05:08:52 PM PDT 24 1032706480 ps
T239 /workspace/coverage/default/38.sram_ctrl_mem_walk.1223699084 Aug 16 04:58:37 PM PDT 24 Aug 16 04:58:48 PM PDT 24 435659805 ps
T240 /workspace/coverage/default/25.sram_ctrl_partial_access_b2b.2584999903 Aug 16 04:57:28 PM PDT 24 Aug 16 05:02:19 PM PDT 24 8000302551 ps
T43 /workspace/coverage/default/13.sram_ctrl_mem_partial_access.3754107193 Aug 16 04:56:54 PM PDT 24 Aug 16 04:57:00 PM PDT 24 197257185 ps
T241 /workspace/coverage/default/38.sram_ctrl_bijection.1653581094 Aug 16 04:58:29 PM PDT 24 Aug 16 04:59:53 PM PDT 24 4901916189 ps
T242 /workspace/coverage/default/47.sram_ctrl_regwen.2471298256 Aug 16 04:59:34 PM PDT 24 Aug 16 05:04:44 PM PDT 24 16195032249 ps
T243 /workspace/coverage/default/2.sram_ctrl_max_throughput.2459159074 Aug 16 04:56:31 PM PDT 24 Aug 16 04:57:00 PM PDT 24 128513783 ps
T244 /workspace/coverage/default/40.sram_ctrl_throughput_w_partial_write.2877033385 Aug 16 04:58:46 PM PDT 24 Aug 16 04:59:27 PM PDT 24 521400882 ps
T245 /workspace/coverage/default/12.sram_ctrl_partial_access_b2b.797343176 Aug 16 04:56:41 PM PDT 24 Aug 16 04:59:42 PM PDT 24 2517787633 ps
T246 /workspace/coverage/default/9.sram_ctrl_regwen.1919729590 Aug 16 04:56:39 PM PDT 24 Aug 16 05:16:22 PM PDT 24 17355908746 ps
T247 /workspace/coverage/default/44.sram_ctrl_mem_walk.2409903271 Aug 16 04:59:10 PM PDT 24 Aug 16 04:59:25 PM PDT 24 4096302124 ps
T17 /workspace/coverage/default/4.sram_ctrl_sec_cm.132927190 Aug 16 04:56:36 PM PDT 24 Aug 16 04:56:38 PM PDT 24 93824503 ps
T248 /workspace/coverage/default/2.sram_ctrl_partial_access_b2b.115736628 Aug 16 04:56:29 PM PDT 24 Aug 16 05:04:02 PM PDT 24 71033050539 ps
T249 /workspace/coverage/default/4.sram_ctrl_regwen.754982346 Aug 16 04:56:30 PM PDT 24 Aug 16 05:06:14 PM PDT 24 8081233105 ps
T250 /workspace/coverage/default/39.sram_ctrl_mem_walk.1470356703 Aug 16 04:58:43 PM PDT 24 Aug 16 04:58:50 PM PDT 24 880646649 ps
T251 /workspace/coverage/default/14.sram_ctrl_regwen.2466957327 Aug 16 04:56:52 PM PDT 24 Aug 16 05:20:39 PM PDT 24 13510127945 ps
T252 /workspace/coverage/default/22.sram_ctrl_ram_cfg.862810982 Aug 16 04:57:23 PM PDT 24 Aug 16 04:57:23 PM PDT 24 33053190 ps
T115 /workspace/coverage/default/21.sram_ctrl_lc_escalation.4855830 Aug 16 04:57:21 PM PDT 24 Aug 16 04:57:27 PM PDT 24 860625254 ps
T253 /workspace/coverage/default/49.sram_ctrl_executable.3578855849 Aug 16 04:59:44 PM PDT 24 Aug 16 05:11:26 PM PDT 24 2779597233 ps
T254 /workspace/coverage/default/1.sram_ctrl_smoke.1005325339 Aug 16 04:56:33 PM PDT 24 Aug 16 04:57:06 PM PDT 24 360272102 ps
T255 /workspace/coverage/default/13.sram_ctrl_stress_all.1829471675 Aug 16 04:56:51 PM PDT 24 Aug 16 05:44:10 PM PDT 24 8509704208 ps
T116 /workspace/coverage/default/41.sram_ctrl_lc_escalation.953913327 Aug 16 04:58:53 PM PDT 24 Aug 16 04:58:57 PM PDT 24 1305082901 ps
T256 /workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.2542806931 Aug 16 04:56:38 PM PDT 24 Aug 16 04:56:47 PM PDT 24 132485713 ps
T257 /workspace/coverage/default/12.sram_ctrl_partial_access.520313179 Aug 16 04:56:40 PM PDT 24 Aug 16 04:56:47 PM PDT 24 315624326 ps
T258 /workspace/coverage/default/27.sram_ctrl_executable.523744706 Aug 16 04:57:41 PM PDT 24 Aug 16 05:16:48 PM PDT 24 9821254116 ps
T259 /workspace/coverage/default/37.sram_ctrl_access_during_key_req.1233825659 Aug 16 04:58:28 PM PDT 24 Aug 16 04:59:11 PM PDT 24 500255307 ps
T260 /workspace/coverage/default/16.sram_ctrl_partial_access_b2b.3350610704 Aug 16 04:56:55 PM PDT 24 Aug 16 05:03:40 PM PDT 24 124167577550 ps
T18 /workspace/coverage/default/0.sram_ctrl_sec_cm.1423327200 Aug 16 04:56:19 PM PDT 24 Aug 16 04:56:22 PM PDT 24 276377852 ps
T261 /workspace/coverage/default/24.sram_ctrl_mem_walk.224152903 Aug 16 04:57:28 PM PDT 24 Aug 16 04:57:39 PM PDT 24 1182749168 ps
T262 /workspace/coverage/default/18.sram_ctrl_stress_pipeline.494086426 Aug 16 04:57:01 PM PDT 24 Aug 16 05:00:56 PM PDT 24 9828950876 ps
T263 /workspace/coverage/default/45.sram_ctrl_smoke.303583757 Aug 16 04:59:09 PM PDT 24 Aug 16 04:59:11 PM PDT 24 39032986 ps
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T299 /workspace/coverage/default/33.sram_ctrl_ram_cfg.3701904604 Aug 16 04:58:09 PM PDT 24 Aug 16 04:58:10 PM PDT 24 368878465 ps
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T301 /workspace/coverage/default/10.sram_ctrl_lc_escalation.2866445800 Aug 16 04:56:43 PM PDT 24 Aug 16 04:56:51 PM PDT 24 1210843834 ps
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T306 /workspace/coverage/default/2.sram_ctrl_smoke.3317859231 Aug 16 04:56:19 PM PDT 24 Aug 16 04:56:29 PM PDT 24 188113125 ps
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