| T797 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/43.sram_ctrl_access_during_key_req.704447150 |
|
|
Aug 21 07:10:41 PM UTC 24 |
Aug 21 07:14:26 PM UTC 24 |
1785659552 ps |
| T798 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/40.sram_ctrl_multiple_keys.3203221510 |
|
|
Aug 21 07:05:46 PM UTC 24 |
Aug 21 07:14:36 PM UTC 24 |
20756606925 ps |
| T799 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/45.sram_ctrl_lc_escalation.1096255997 |
|
|
Aug 21 07:14:26 PM UTC 24 |
Aug 21 07:14:38 PM UTC 24 |
699562803 ps |
| T800 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/38.sram_ctrl_executable.264454057 |
|
|
Aug 21 07:02:43 PM UTC 24 |
Aug 21 07:14:53 PM UTC 24 |
5464024596 ps |
| T801 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/20.sram_ctrl_stress_all.3094452209 |
|
|
Aug 21 06:34:37 PM UTC 24 |
Aug 21 07:15:01 PM UTC 24 |
132093387384 ps |
| T802 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/45.sram_ctrl_ram_cfg.3821993597 |
|
|
Aug 21 07:15:02 PM UTC 24 |
Aug 21 07:15:04 PM UTC 24 |
79045804 ps |
| T803 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/45.sram_ctrl_mem_walk.3745146419 |
|
|
Aug 21 07:15:05 PM UTC 24 |
Aug 21 07:15:12 PM UTC 24 |
353878065 ps |
| T804 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/33.sram_ctrl_access_during_key_req.3295913076 |
|
|
Aug 21 06:55:23 PM UTC 24 |
Aug 21 07:15:17 PM UTC 24 |
18878556293 ps |
| T805 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/45.sram_ctrl_throughput_w_partial_write.1366305737 |
|
|
Aug 21 07:14:25 PM UTC 24 |
Aug 21 07:15:20 PM UTC 24 |
129190133 ps |
| T82 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/45.sram_ctrl_mem_partial_access.55344648 |
|
|
Aug 21 07:15:13 PM UTC 24 |
Aug 21 07:15:22 PM UTC 24 |
204878663 ps |
| T806 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/45.sram_ctrl_alert_test.3931205831 |
|
|
Aug 21 07:15:23 PM UTC 24 |
Aug 21 07:15:25 PM UTC 24 |
25466540 ps |
| T807 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/39.sram_ctrl_regwen.1539670214 |
|
|
Aug 21 07:05:06 PM UTC 24 |
Aug 21 07:15:36 PM UTC 24 |
16512680770 ps |
| T808 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/41.sram_ctrl_regwen.3461328246 |
|
|
Aug 21 07:08:37 PM UTC 24 |
Aug 21 07:15:41 PM UTC 24 |
35153854969 ps |
| T809 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/43.sram_ctrl_stress_pipeline.3614231756 |
|
|
Aug 21 07:10:15 PM UTC 24 |
Aug 21 07:15:43 PM UTC 24 |
16430032120 ps |
| T810 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/45.sram_ctrl_max_throughput.3720273106 |
|
|
Aug 21 07:14:23 PM UTC 24 |
Aug 21 07:15:44 PM UTC 24 |
128383100 ps |
| T811 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/46.sram_ctrl_partial_access.675718782 |
|
|
Aug 21 07:15:45 PM UTC 24 |
Aug 21 07:15:48 PM UTC 24 |
59772403 ps |
| T812 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/44.sram_ctrl_stress_pipeline.1649096402 |
|
|
Aug 21 07:11:47 PM UTC 24 |
Aug 21 07:16:10 PM UTC 24 |
2441932790 ps |
| T813 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/38.sram_ctrl_access_during_key_req.3862070030 |
|
|
Aug 21 07:02:39 PM UTC 24 |
Aug 21 07:16:11 PM UTC 24 |
2568320931 ps |
| T814 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/46.sram_ctrl_smoke.1392983231 |
|
|
Aug 21 07:15:26 PM UTC 24 |
Aug 21 07:16:13 PM UTC 24 |
1458808384 ps |
| T815 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/44.sram_ctrl_stress_all_with_rand_reset.259639951 |
|
|
Aug 21 07:12:52 PM UTC 24 |
Aug 21 07:16:14 PM UTC 24 |
4019603258 ps |
| T816 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/45.sram_ctrl_stress_all_with_rand_reset.3319784875 |
|
|
Aug 21 07:15:18 PM UTC 24 |
Aug 21 07:16:21 PM UTC 24 |
1849542241 ps |
| T817 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/46.sram_ctrl_lc_escalation.4067279568 |
|
|
Aug 21 07:16:14 PM UTC 24 |
Aug 21 07:16:27 PM UTC 24 |
4836080012 ps |
| T818 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/46.sram_ctrl_ram_cfg.3892175394 |
|
|
Aug 21 07:16:43 PM UTC 24 |
Aug 21 07:16:45 PM UTC 24 |
45627898 ps |
| T819 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/46.sram_ctrl_mem_walk.3285955650 |
|
|
Aug 21 07:16:46 PM UTC 24 |
Aug 21 07:16:54 PM UTC 24 |
75348828 ps |
| T820 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/46.sram_ctrl_mem_partial_access.1075621312 |
|
|
Aug 21 07:16:54 PM UTC 24 |
Aug 21 07:16:59 PM UTC 24 |
336523082 ps |
| T821 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/46.sram_ctrl_max_throughput.1333832865 |
|
|
Aug 21 07:16:11 PM UTC 24 |
Aug 21 07:17:03 PM UTC 24 |
199886131 ps |
| T822 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/46.sram_ctrl_bijection.1238887226 |
|
|
Aug 21 07:15:42 PM UTC 24 |
Aug 21 07:17:05 PM UTC 24 |
31479220481 ps |
| T823 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/46.sram_ctrl_alert_test.4254812729 |
|
|
Aug 21 07:17:06 PM UTC 24 |
Aug 21 07:17:08 PM UTC 24 |
12795239 ps |
| T824 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/46.sram_ctrl_throughput_w_partial_write.2796413858 |
|
|
Aug 21 07:16:12 PM UTC 24 |
Aug 21 07:17:16 PM UTC 24 |
146881742 ps |
| T825 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/47.sram_ctrl_smoke.1238630962 |
|
|
Aug 21 07:17:09 PM UTC 24 |
Aug 21 07:17:31 PM UTC 24 |
1308026488 ps |
| T826 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/41.sram_ctrl_partial_access_b2b.1747603051 |
|
|
Aug 21 07:07:33 PM UTC 24 |
Aug 21 07:17:34 PM UTC 24 |
21117763722 ps |
| T827 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/34.sram_ctrl_multiple_keys.1449217420 |
|
|
Aug 21 06:56:08 PM UTC 24 |
Aug 21 07:17:51 PM UTC 24 |
15947334972 ps |
| T828 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/47.sram_ctrl_partial_access.1625615712 |
|
|
Aug 21 07:17:52 PM UTC 24 |
Aug 21 07:17:56 PM UTC 24 |
279637350 ps |
| T829 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/44.sram_ctrl_access_during_key_req.2214634274 |
|
|
Aug 21 07:12:24 PM UTC 24 |
Aug 21 07:17:57 PM UTC 24 |
1745396897 ps |
| T830 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/35.sram_ctrl_regwen.2590538039 |
|
|
Aug 21 06:58:15 PM UTC 24 |
Aug 21 07:18:04 PM UTC 24 |
17385752412 ps |
| T831 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/47.sram_ctrl_max_throughput.8067978 |
|
|
Aug 21 07:17:58 PM UTC 24 |
Aug 21 07:18:05 PM UTC 24 |
270023422 ps |
| T832 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/40.sram_ctrl_regwen.3814665193 |
|
|
Aug 21 07:07:07 PM UTC 24 |
Aug 21 07:18:18 PM UTC 24 |
17817831813 ps |
| T833 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/47.sram_ctrl_lc_escalation.1668540458 |
|
|
Aug 21 07:18:06 PM UTC 24 |
Aug 21 07:18:19 PM UTC 24 |
9471911709 ps |
| T834 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/38.sram_ctrl_multiple_keys.2348551319 |
|
|
Aug 21 07:01:59 PM UTC 24 |
Aug 21 07:18:23 PM UTC 24 |
20856140379 ps |
| T835 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/30.sram_ctrl_stress_all.2901778100 |
|
|
Aug 21 06:51:33 PM UTC 24 |
Aug 21 07:18:34 PM UTC 24 |
66715564414 ps |
| T836 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/47.sram_ctrl_ram_cfg.3440923874 |
|
|
Aug 21 07:18:35 PM UTC 24 |
Aug 21 07:18:37 PM UTC 24 |
45875723 ps |
| T837 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/43.sram_ctrl_executable.3249844994 |
|
|
Aug 21 07:10:41 PM UTC 24 |
Aug 21 07:18:47 PM UTC 24 |
4799874566 ps |
| T838 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/47.sram_ctrl_mem_walk.1137845758 |
|
|
Aug 21 07:18:38 PM UTC 24 |
Aug 21 07:18:49 PM UTC 24 |
523133694 ps |
| T839 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/47.sram_ctrl_mem_partial_access.3847170119 |
|
|
Aug 21 07:18:48 PM UTC 24 |
Aug 21 07:18:54 PM UTC 24 |
161127747 ps |
| T840 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/47.sram_ctrl_bijection.2749157721 |
|
|
Aug 21 07:17:32 PM UTC 24 |
Aug 21 07:19:00 PM UTC 24 |
8235691554 ps |
| T841 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/42.sram_ctrl_partial_access_b2b.2306562070 |
|
|
Aug 21 07:09:24 PM UTC 24 |
Aug 21 07:19:03 PM UTC 24 |
73462605524 ps |
| T842 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/47.sram_ctrl_alert_test.2360442086 |
|
|
Aug 21 07:19:01 PM UTC 24 |
Aug 21 07:19:04 PM UTC 24 |
27733201 ps |
| T843 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/48.sram_ctrl_smoke.240827631 |
|
|
Aug 21 07:19:04 PM UTC 24 |
Aug 21 07:19:13 PM UTC 24 |
112661113 ps |
| T844 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/38.sram_ctrl_stress_all.3973273033 |
|
|
Aug 21 07:03:09 PM UTC 24 |
Aug 21 07:19:33 PM UTC 24 |
17091267141 ps |
| T845 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/40.sram_ctrl_stress_all.4154368484 |
|
|
Aug 21 07:07:19 PM UTC 24 |
Aug 21 07:19:39 PM UTC 24 |
8248115269 ps |
| T846 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/47.sram_ctrl_stress_all_with_rand_reset.3666909456 |
|
|
Aug 21 07:18:50 PM UTC 24 |
Aug 21 07:19:48 PM UTC 24 |
1089843385 ps |
| T847 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/47.sram_ctrl_throughput_w_partial_write.1282652050 |
|
|
Aug 21 07:18:05 PM UTC 24 |
Aug 21 07:19:51 PM UTC 24 |
626348370 ps |
| T848 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/46.sram_ctrl_multiple_keys.2276668649 |
|
|
Aug 21 07:15:36 PM UTC 24 |
Aug 21 07:19:51 PM UTC 24 |
1553805491 ps |
| T849 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/22.sram_ctrl_stress_all.3279289435 |
|
|
Aug 21 06:38:23 PM UTC 24 |
Aug 21 07:19:57 PM UTC 24 |
182330992029 ps |
| T850 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/48.sram_ctrl_throughput_w_partial_write.1012238830 |
|
|
Aug 21 07:19:52 PM UTC 24 |
Aug 21 07:20:00 PM UTC 24 |
64805394 ps |
| T851 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/48.sram_ctrl_lc_escalation.3410341423 |
|
|
Aug 21 07:19:58 PM UTC 24 |
Aug 21 07:20:07 PM UTC 24 |
688634953 ps |
| T852 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/48.sram_ctrl_partial_access.4258751089 |
|
|
Aug 21 07:19:40 PM UTC 24 |
Aug 21 07:20:07 PM UTC 24 |
4079796128 ps |
| T853 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/46.sram_ctrl_stress_pipeline.2969861863 |
|
|
Aug 21 07:15:44 PM UTC 24 |
Aug 21 07:20:09 PM UTC 24 |
9658876340 ps |
| T854 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/48.sram_ctrl_ram_cfg.4099487622 |
|
|
Aug 21 07:20:10 PM UTC 24 |
Aug 21 07:20:12 PM UTC 24 |
33542252 ps |
| T855 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/16.sram_ctrl_stress_all.325312202 |
|
|
Aug 21 06:27:41 PM UTC 24 |
Aug 21 07:20:14 PM UTC 24 |
98633449187 ps |
| T856 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/43.sram_ctrl_partial_access_b2b.2274371630 |
|
|
Aug 21 07:10:23 PM UTC 24 |
Aug 21 07:20:23 PM UTC 24 |
42100518740 ps |
| T857 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/48.sram_ctrl_bijection.187880488 |
|
|
Aug 21 07:19:14 PM UTC 24 |
Aug 21 07:20:24 PM UTC 24 |
3834551030 ps |
| T858 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/48.sram_ctrl_mem_partial_access.675612856 |
|
|
Aug 21 07:20:15 PM UTC 24 |
Aug 21 07:20:25 PM UTC 24 |
3374550575 ps |
| T859 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/48.sram_ctrl_alert_test.3908243876 |
|
|
Aug 21 07:20:27 PM UTC 24 |
Aug 21 07:20:29 PM UTC 24 |
19872642 ps |
| T860 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/48.sram_ctrl_mem_walk.3046658333 |
|
|
Aug 21 07:20:13 PM UTC 24 |
Aug 21 07:20:30 PM UTC 24 |
2724781548 ps |
| T861 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/48.sram_ctrl_stress_all_with_rand_reset.2556925820 |
|
|
Aug 21 07:20:24 PM UTC 24 |
Aug 21 07:20:31 PM UTC 24 |
120261413 ps |
| T862 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/49.sram_ctrl_smoke.1244526016 |
|
|
Aug 21 07:20:30 PM UTC 24 |
Aug 21 07:20:36 PM UTC 24 |
246352079 ps |
| T863 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/44.sram_ctrl_partial_access_b2b.3511675387 |
|
|
Aug 21 07:11:57 PM UTC 24 |
Aug 21 07:20:45 PM UTC 24 |
67000969880 ps |
| T864 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/48.sram_ctrl_max_throughput.245130601 |
|
|
Aug 21 07:19:52 PM UTC 24 |
Aug 21 07:20:49 PM UTC 24 |
441425965 ps |
| T865 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/1.sram_ctrl_stress_all.3320866711 |
|
|
Aug 21 06:09:05 PM UTC 24 |
Aug 21 07:20:55 PM UTC 24 |
351632033280 ps |
| T866 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/49.sram_ctrl_max_throughput.771566673 |
|
|
Aug 21 07:20:56 PM UTC 24 |
Aug 21 07:21:00 PM UTC 24 |
162831197 ps |
| T867 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/49.sram_ctrl_partial_access.3535645533 |
|
|
Aug 21 07:20:46 PM UTC 24 |
Aug 21 07:21:02 PM UTC 24 |
2188558818 ps |
| T868 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/39.sram_ctrl_access_during_key_req.4278210200 |
|
|
Aug 21 07:04:58 PM UTC 24 |
Aug 21 07:21:02 PM UTC 24 |
3431510104 ps |
| T869 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/49.sram_ctrl_bijection.3986916148 |
|
|
Aug 21 07:20:31 PM UTC 24 |
Aug 21 07:21:02 PM UTC 24 |
3049989593 ps |
| T870 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/49.sram_ctrl_throughput_w_partial_write.3503421317 |
|
|
Aug 21 07:21:01 PM UTC 24 |
Aug 21 07:21:05 PM UTC 24 |
195746499 ps |
| T871 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/42.sram_ctrl_multiple_keys.2131133630 |
|
|
Aug 21 07:09:00 PM UTC 24 |
Aug 21 07:21:10 PM UTC 24 |
12384339417 ps |
| T872 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/49.sram_ctrl_ram_cfg.1306674147 |
|
|
Aug 21 07:21:11 PM UTC 24 |
Aug 21 07:21:13 PM UTC 24 |
87520652 ps |
| T873 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/49.sram_ctrl_lc_escalation.3173534152 |
|
|
Aug 21 07:21:03 PM UTC 24 |
Aug 21 07:21:16 PM UTC 24 |
3847476451 ps |
| T874 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/49.sram_ctrl_mem_walk.2630771384 |
|
|
Aug 21 07:21:14 PM UTC 24 |
Aug 21 07:21:21 PM UTC 24 |
189066616 ps |
| T875 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/49.sram_ctrl_mem_partial_access.2098034808 |
|
|
Aug 21 07:21:17 PM UTC 24 |
Aug 21 07:21:26 PM UTC 24 |
180568609 ps |
| T876 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/41.sram_ctrl_multiple_keys.2826309448 |
|
|
Aug 21 07:07:22 PM UTC 24 |
Aug 21 07:21:37 PM UTC 24 |
2357345788 ps |
| T877 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/45.sram_ctrl_stress_pipeline.1104189787 |
|
|
Aug 21 07:13:59 PM UTC 24 |
Aug 21 07:21:39 PM UTC 24 |
3862279261 ps |
| T878 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/49.sram_ctrl_alert_test.964165517 |
|
|
Aug 21 07:21:38 PM UTC 24 |
Aug 21 07:21:40 PM UTC 24 |
50341482 ps |
| T879 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/44.sram_ctrl_multiple_keys.826215007 |
|
|
Aug 21 07:11:43 PM UTC 24 |
Aug 21 07:21:47 PM UTC 24 |
9862784601 ps |
| T880 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/46.sram_ctrl_partial_access_b2b.3757217957 |
|
|
Aug 21 07:15:50 PM UTC 24 |
Aug 21 07:21:52 PM UTC 24 |
6959451506 ps |
| T881 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/48.sram_ctrl_stress_pipeline.3888291858 |
|
|
Aug 21 07:19:34 PM UTC 24 |
Aug 21 07:22:04 PM UTC 24 |
17740390236 ps |
| T882 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/49.sram_ctrl_stress_all_with_rand_reset.1631961205 |
|
|
Aug 21 07:21:22 PM UTC 24 |
Aug 21 07:22:04 PM UTC 24 |
20563895625 ps |
| T883 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/49.sram_ctrl_executable.1641471682 |
|
|
Aug 21 07:21:03 PM UTC 24 |
Aug 21 07:22:21 PM UTC 24 |
9877001271 ps |
| T884 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/45.sram_ctrl_partial_access_b2b.3174744493 |
|
|
Aug 21 07:14:06 PM UTC 24 |
Aug 21 07:22:25 PM UTC 24 |
14060003212 ps |
| T885 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/47.sram_ctrl_stress_pipeline.873602793 |
|
|
Aug 21 07:17:34 PM UTC 24 |
Aug 21 07:22:54 PM UTC 24 |
5806944194 ps |
| T886 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/46.sram_ctrl_stress_all_with_rand_reset.1147211367 |
|
|
Aug 21 07:17:00 PM UTC 24 |
Aug 21 07:23:02 PM UTC 24 |
1549010992 ps |
| T887 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/40.sram_ctrl_access_during_key_req.850981279 |
|
|
Aug 21 07:06:57 PM UTC 24 |
Aug 21 07:23:15 PM UTC 24 |
8848914522 ps |
| T888 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/48.sram_ctrl_partial_access_b2b.2832376348 |
|
|
Aug 21 07:19:49 PM UTC 24 |
Aug 21 07:23:18 PM UTC 24 |
2394374782 ps |
| T889 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/29.sram_ctrl_stress_all.3267618357 |
|
|
Aug 21 06:49:25 PM UTC 24 |
Aug 21 07:23:42 PM UTC 24 |
20520535682 ps |
| T890 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/45.sram_ctrl_access_during_key_req.3959548272 |
|
|
Aug 21 07:14:36 PM UTC 24 |
Aug 21 07:23:52 PM UTC 24 |
1902987503 ps |
| T891 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/41.sram_ctrl_access_during_key_req.885811875 |
|
|
Aug 21 07:08:13 PM UTC 24 |
Aug 21 07:23:57 PM UTC 24 |
11615824442 ps |
| T892 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/15.sram_ctrl_stress_all.1670380550 |
|
|
Aug 21 06:26:30 PM UTC 24 |
Aug 21 07:24:22 PM UTC 24 |
93345470462 ps |
| T893 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/44.sram_ctrl_regwen.3993069175 |
|
|
Aug 21 07:12:34 PM UTC 24 |
Aug 21 07:24:23 PM UTC 24 |
25313838345 ps |
| T894 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/49.sram_ctrl_partial_access_b2b.2754956490 |
|
|
Aug 21 07:20:50 PM UTC 24 |
Aug 21 07:24:24 PM UTC 24 |
14091478155 ps |
| T895 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/37.sram_ctrl_access_during_key_req.2012581013 |
|
|
Aug 21 07:01:12 PM UTC 24 |
Aug 21 07:24:51 PM UTC 24 |
21869294604 ps |
| T896 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/4.sram_ctrl_stress_all.1805802802 |
|
|
Aug 21 06:10:25 PM UTC 24 |
Aug 21 07:24:57 PM UTC 24 |
121538656453 ps |
| T897 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/38.sram_ctrl_regwen.292133029 |
|
|
Aug 21 07:02:47 PM UTC 24 |
Aug 21 07:24:58 PM UTC 24 |
67031001765 ps |
| T898 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/47.sram_ctrl_partial_access_b2b.1608436211 |
|
|
Aug 21 07:17:57 PM UTC 24 |
Aug 21 07:25:11 PM UTC 24 |
33407623754 ps |
| T899 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/49.sram_ctrl_stress_pipeline.2680669582 |
|
|
Aug 21 07:20:37 PM UTC 24 |
Aug 21 07:25:31 PM UTC 24 |
14616239606 ps |
| T900 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/49.sram_ctrl_regwen.2320529572 |
|
|
Aug 21 07:21:05 PM UTC 24 |
Aug 21 07:25:38 PM UTC 24 |
2670257769 ps |
| T901 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/45.sram_ctrl_regwen.846386744 |
|
|
Aug 21 07:14:54 PM UTC 24 |
Aug 21 07:25:57 PM UTC 24 |
1712440757 ps |
| T902 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/48.sram_ctrl_executable.4236807686 |
|
|
Aug 21 07:20:08 PM UTC 24 |
Aug 21 07:26:18 PM UTC 24 |
30074212326 ps |
| T903 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/39.sram_ctrl_multiple_keys.18405112 |
|
|
Aug 21 07:03:15 PM UTC 24 |
Aug 21 07:26:26 PM UTC 24 |
30654461923 ps |
| T904 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/46.sram_ctrl_regwen.1724009272 |
|
|
Aug 21 07:16:28 PM UTC 24 |
Aug 21 07:26:30 PM UTC 24 |
16718017784 ps |
| T905 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/46.sram_ctrl_access_during_key_req.2005389939 |
|
|
Aug 21 07:16:15 PM UTC 24 |
Aug 21 07:27:14 PM UTC 24 |
8415438181 ps |
| T906 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/18.sram_ctrl_stress_all.2169229688 |
|
|
Aug 21 06:30:55 PM UTC 24 |
Aug 21 07:27:15 PM UTC 24 |
91789695714 ps |
| T907 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/43.sram_ctrl_regwen.3949777739 |
|
|
Aug 21 07:10:51 PM UTC 24 |
Aug 21 07:27:20 PM UTC 24 |
5478339148 ps |
| T908 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/17.sram_ctrl_stress_all.3398386615 |
|
|
Aug 21 06:29:27 PM UTC 24 |
Aug 21 07:27:33 PM UTC 24 |
98166624647 ps |
| T909 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/41.sram_ctrl_stress_all.4209612169 |
|
|
Aug 21 07:08:52 PM UTC 24 |
Aug 21 07:27:55 PM UTC 24 |
8505036816 ps |
| T910 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/47.sram_ctrl_executable.268014613 |
|
|
Aug 21 07:18:19 PM UTC 24 |
Aug 21 07:28:05 PM UTC 24 |
4434461697 ps |
| T911 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/48.sram_ctrl_multiple_keys.2153774880 |
|
|
Aug 21 07:19:05 PM UTC 24 |
Aug 21 07:28:32 PM UTC 24 |
2553032789 ps |
| T912 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/45.sram_ctrl_multiple_keys.814517537 |
|
|
Aug 21 07:13:28 PM UTC 24 |
Aug 21 07:28:39 PM UTC 24 |
6003793817 ps |
| T913 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/47.sram_ctrl_regwen.3732638786 |
|
|
Aug 21 07:18:24 PM UTC 24 |
Aug 21 07:28:41 PM UTC 24 |
4207801592 ps |
| T914 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/42.sram_ctrl_executable.1588933059 |
|
|
Aug 21 07:09:48 PM UTC 24 |
Aug 21 07:29:00 PM UTC 24 |
2738243000 ps |
| T915 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/42.sram_ctrl_regwen.916974396 |
|
|
Aug 21 07:09:57 PM UTC 24 |
Aug 21 07:29:44 PM UTC 24 |
14651390429 ps |
| T916 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/49.sram_ctrl_multiple_keys.966352573 |
|
|
Aug 21 07:20:31 PM UTC 24 |
Aug 21 07:29:44 PM UTC 24 |
43528506796 ps |
| T917 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/25.sram_ctrl_stress_all.1549255973 |
|
|
Aug 21 06:42:53 PM UTC 24 |
Aug 21 07:29:56 PM UTC 24 |
26550184807 ps |
| T918 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/49.sram_ctrl_access_during_key_req.299018188 |
|
|
Aug 21 07:21:03 PM UTC 24 |
Aug 21 07:30:46 PM UTC 24 |
3232681684 ps |
| T919 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/47.sram_ctrl_access_during_key_req.2066541758 |
|
|
Aug 21 07:18:19 PM UTC 24 |
Aug 21 07:31:52 PM UTC 24 |
7602331101 ps |
| T920 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/46.sram_ctrl_executable.2997036054 |
|
|
Aug 21 07:16:22 PM UTC 24 |
Aug 21 07:33:03 PM UTC 24 |
18578793220 ps |
| T921 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/45.sram_ctrl_executable.1806481404 |
|
|
Aug 21 07:14:39 PM UTC 24 |
Aug 21 07:33:04 PM UTC 24 |
14464859637 ps |
| T922 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/48.sram_ctrl_access_during_key_req.792382428 |
|
|
Aug 21 07:20:01 PM UTC 24 |
Aug 21 07:33:23 PM UTC 24 |
4125571545 ps |
| T923 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/48.sram_ctrl_regwen.3096082620 |
|
|
Aug 21 07:20:08 PM UTC 24 |
Aug 21 07:34:06 PM UTC 24 |
7102294191 ps |
| T924 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/28.sram_ctrl_stress_all.2762841815 |
|
|
Aug 21 06:47:40 PM UTC 24 |
Aug 21 07:34:56 PM UTC 24 |
9891529389 ps |
| T925 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/39.sram_ctrl_stress_all.3454133423 |
|
|
Aug 21 07:05:39 PM UTC 24 |
Aug 21 07:36:42 PM UTC 24 |
149106066766 ps |
| T926 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/46.sram_ctrl_stress_all.1062592040 |
|
|
Aug 21 07:17:05 PM UTC 24 |
Aug 21 07:36:57 PM UTC 24 |
31399579658 ps |
| T927 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/47.sram_ctrl_multiple_keys.2605572981 |
|
|
Aug 21 07:17:16 PM UTC 24 |
Aug 21 07:37:38 PM UTC 24 |
118830883243 ps |
| T928 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/24.sram_ctrl_stress_all.3334547112 |
|
|
Aug 21 06:41:31 PM UTC 24 |
Aug 21 07:37:54 PM UTC 24 |
11524329493 ps |
| T929 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/33.sram_ctrl_stress_all.4202826020 |
|
|
Aug 21 06:56:01 PM UTC 24 |
Aug 21 07:39:25 PM UTC 24 |
50488838554 ps |
| T930 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/42.sram_ctrl_stress_all.613733332 |
|
|
Aug 21 07:10:04 PM UTC 24 |
Aug 21 07:43:34 PM UTC 24 |
57982593681 ps |
| T931 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/43.sram_ctrl_stress_all.517887150 |
|
|
Aug 21 07:11:13 PM UTC 24 |
Aug 21 07:46:03 PM UTC 24 |
43497246685 ps |
| T932 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/45.sram_ctrl_stress_all.2790277242 |
|
|
Aug 21 07:15:21 PM UTC 24 |
Aug 21 07:46:07 PM UTC 24 |
24321075408 ps |
| T933 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/35.sram_ctrl_stress_all.1407682754 |
|
|
Aug 21 06:58:33 PM UTC 24 |
Aug 21 07:47:56 PM UTC 24 |
52278557249 ps |
| T934 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/44.sram_ctrl_stress_all.3527694206 |
|
|
Aug 21 07:12:52 PM UTC 24 |
Aug 21 07:51:56 PM UTC 24 |
18122712781 ps |
| T935 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/26.sram_ctrl_stress_all.4192000697 |
|
|
Aug 21 06:44:31 PM UTC 24 |
Aug 21 07:53:19 PM UTC 24 |
276702414606 ps |
| T936 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/37.sram_ctrl_stress_all.4140699401 |
|
|
Aug 21 07:01:44 PM UTC 24 |
Aug 21 07:55:53 PM UTC 24 |
14960316140 ps |
| T937 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/34.sram_ctrl_stress_all.2672535238 |
|
|
Aug 21 06:57:39 PM UTC 24 |
Aug 21 07:58:35 PM UTC 24 |
444584061340 ps |
| T938 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/47.sram_ctrl_stress_all.533865749 |
|
|
Aug 21 07:18:54 PM UTC 24 |
Aug 21 07:58:36 PM UTC 24 |
10088991524 ps |
| T939 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/49.sram_ctrl_stress_all.3627434662 |
|
|
Aug 21 07:21:27 PM UTC 24 |
Aug 21 08:07:14 PM UTC 24 |
94558304382 ps |
| T54 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/0.sram_ctrl_passthru_mem_tl_intg_err.1571778046 |
|
|
Aug 21 06:06:08 PM UTC 24 |
Aug 21 06:06:13 PM UTC 24 |
923655602 ps |
| T55 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/0.sram_ctrl_csr_aliasing.4264898715 |
|
|
Aug 21 06:06:13 PM UTC 24 |
Aug 21 06:06:16 PM UTC 24 |
23292766 ps |
| T56 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/0.sram_ctrl_same_csr_outstanding.2707512741 |
|
|
Aug 21 06:06:13 PM UTC 24 |
Aug 21 06:06:16 PM UTC 24 |
105285755 ps |
| T67 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/1.sram_ctrl_csr_rw.2374079154 |
|
|
Aug 21 06:06:13 PM UTC 24 |
Aug 21 06:06:17 PM UTC 24 |
18440527 ps |
| T98 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/1.sram_ctrl_csr_hw_reset.2407762364 |
|
|
Aug 21 06:06:13 PM UTC 24 |
Aug 21 06:06:17 PM UTC 24 |
27436664 ps |
| T99 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/1.sram_ctrl_csr_aliasing.3283448754 |
|
|
Aug 21 06:06:14 PM UTC 24 |
Aug 21 06:06:17 PM UTC 24 |
32481079 ps |
| T940 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/0.sram_ctrl_csr_mem_rw_with_rand_reset.1189010731 |
|
|
Aug 21 06:06:13 PM UTC 24 |
Aug 21 06:06:17 PM UTC 24 |
39936053 ps |
| T68 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/0.sram_ctrl_csr_rw.3239524346 |
|
|
Aug 21 06:06:11 PM UTC 24 |
Aug 21 06:06:17 PM UTC 24 |
13355795 ps |
| T69 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/1.sram_ctrl_passthru_mem_tl_intg_err.3806579116 |
|
|
Aug 21 06:06:13 PM UTC 24 |
Aug 21 06:06:17 PM UTC 24 |
1002387593 ps |
| T49 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/1.sram_ctrl_tl_intg_err.1906893316 |
|
|
Aug 21 06:06:13 PM UTC 24 |
Aug 21 06:06:18 PM UTC 24 |
263586417 ps |
| T100 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/0.sram_ctrl_csr_bit_bash.1427588929 |
|
|
Aug 21 06:06:12 PM UTC 24 |
Aug 21 06:06:18 PM UTC 24 |
226429026 ps |
| T70 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/1.sram_ctrl_same_csr_outstanding.1867422975 |
|
|
Aug 21 06:06:16 PM UTC 24 |
Aug 21 06:06:18 PM UTC 24 |
57147707 ps |
| T941 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/1.sram_ctrl_csr_bit_bash.1347020527 |
|
|
Aug 21 06:06:14 PM UTC 24 |
Aug 21 06:06:18 PM UTC 24 |
51240664 ps |
| T71 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/0.sram_ctrl_csr_hw_reset.3232549163 |
|
|
Aug 21 06:06:09 PM UTC 24 |
Aug 21 06:06:18 PM UTC 24 |
21465512 ps |
| T942 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/0.sram_ctrl_tl_errors.4087660530 |
|
|
Aug 21 06:06:09 PM UTC 24 |
Aug 21 06:06:20 PM UTC 24 |
30319490 ps |
| T943 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/1.sram_ctrl_tl_errors.1447113886 |
|
|
Aug 21 06:06:13 PM UTC 24 |
Aug 21 06:06:20 PM UTC 24 |
48879328 ps |
| T50 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/0.sram_ctrl_tl_intg_err.2343904323 |
|
|
Aug 21 06:06:09 PM UTC 24 |
Aug 21 06:06:20 PM UTC 24 |
1963989139 ps |
| T72 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/4.sram_ctrl_csr_bit_bash.3494906613 |
|
|
Aug 21 06:06:21 PM UTC 24 |
Aug 21 06:06:38 PM UTC 24 |
314683020 ps |
| T944 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/2.sram_ctrl_csr_rw.1552161243 |
|
|
Aug 21 06:06:17 PM UTC 24 |
Aug 21 06:06:20 PM UTC 24 |
18510874 ps |
| T945 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/2.sram_ctrl_csr_aliasing.4029007830 |
|
|
Aug 21 06:06:17 PM UTC 24 |
Aug 21 06:06:20 PM UTC 24 |
14418020 ps |
| T946 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/2.sram_ctrl_csr_hw_reset.3312878347 |
|
|
Aug 21 06:06:17 PM UTC 24 |
Aug 21 06:06:21 PM UTC 24 |
22818781 ps |
| T88 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/2.sram_ctrl_same_csr_outstanding.2322188281 |
|
|
Aug 21 06:06:17 PM UTC 24 |
Aug 21 06:06:21 PM UTC 24 |
19094906 ps |
| T947 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/1.sram_ctrl_csr_mem_rw_with_rand_reset.553261478 |
|
|
Aug 21 06:06:17 PM UTC 24 |
Aug 21 06:06:21 PM UTC 24 |
84215764 ps |
| T948 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/2.sram_ctrl_csr_bit_bash.571917869 |
|
|
Aug 21 06:06:17 PM UTC 24 |
Aug 21 06:06:21 PM UTC 24 |
114475192 ps |
| T51 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/2.sram_ctrl_tl_intg_err.1234086734 |
|
|
Aug 21 06:06:17 PM UTC 24 |
Aug 21 06:06:21 PM UTC 24 |
396164066 ps |
| T949 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/3.sram_ctrl_csr_hw_reset.1439580381 |
|
|
Aug 21 06:06:20 PM UTC 24 |
Aug 21 06:06:22 PM UTC 24 |
12600428 ps |
| T89 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/10.sram_ctrl_csr_rw.3880151326 |
|
|
Aug 21 06:06:30 PM UTC 24 |
Aug 21 06:06:36 PM UTC 24 |
54945118 ps |
| T73 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/3.sram_ctrl_passthru_mem_tl_intg_err.3406076082 |
|
|
Aug 21 06:06:18 PM UTC 24 |
Aug 21 06:06:22 PM UTC 24 |
662086232 ps |
| T950 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/2.sram_ctrl_tl_errors.965296243 |
|
|
Aug 21 06:06:17 PM UTC 24 |
Aug 21 06:06:22 PM UTC 24 |
128990205 ps |
| T951 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/3.sram_ctrl_tl_errors.2840577237 |
|
|
Aug 21 06:06:18 PM UTC 24 |
Aug 21 06:06:23 PM UTC 24 |
30855016 ps |
| T74 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/2.sram_ctrl_passthru_mem_tl_intg_err.1737186875 |
|
|
Aug 21 06:06:17 PM UTC 24 |
Aug 21 06:06:23 PM UTC 24 |
399085509 ps |
| T109 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/3.sram_ctrl_tl_intg_err.3594542053 |
|
|
Aug 21 06:06:20 PM UTC 24 |
Aug 21 06:06:23 PM UTC 24 |
362933539 ps |
| T952 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/5.sram_ctrl_csr_rw.1673849020 |
|
|
Aug 21 06:06:22 PM UTC 24 |
Aug 21 06:06:25 PM UTC 24 |
58808420 ps |
| T90 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/5.sram_ctrl_same_csr_outstanding.1343195143 |
|
|
Aug 21 06:06:23 PM UTC 24 |
Aug 21 06:06:25 PM UTC 24 |
91110696 ps |
| T91 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/6.sram_ctrl_csr_rw.2331560136 |
|
|
Aug 21 06:06:23 PM UTC 24 |
Aug 21 06:06:26 PM UTC 24 |
25869666 ps |
| T953 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/6.sram_ctrl_same_csr_outstanding.43959229 |
|
|
Aug 21 06:06:23 PM UTC 24 |
Aug 21 06:06:26 PM UTC 24 |
23674125 ps |
| T954 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/7.sram_ctrl_csr_rw.2474820760 |
|
|
Aug 21 06:06:23 PM UTC 24 |
Aug 21 06:06:26 PM UTC 24 |
16418356 ps |
| T955 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/6.sram_ctrl_csr_mem_rw_with_rand_reset.4055998265 |
|
|
Aug 21 06:06:23 PM UTC 24 |
Aug 21 06:06:26 PM UTC 24 |
112454607 ps |
| T956 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/5.sram_ctrl_csr_mem_rw_with_rand_reset.1452051442 |
|
|
Aug 21 06:06:23 PM UTC 24 |
Aug 21 06:06:26 PM UTC 24 |
177464064 ps |
| T113 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/7.sram_ctrl_tl_intg_err.149013088 |
|
|
Aug 21 06:06:23 PM UTC 24 |
Aug 21 06:06:26 PM UTC 24 |
336802143 ps |
| T114 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/6.sram_ctrl_tl_intg_err.4041123476 |
|
|
Aug 21 06:06:23 PM UTC 24 |
Aug 21 06:06:27 PM UTC 24 |
276257356 ps |
| T75 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/6.sram_ctrl_passthru_mem_tl_intg_err.3141883086 |
|
|
Aug 21 06:06:23 PM UTC 24 |
Aug 21 06:06:27 PM UTC 24 |
276775060 ps |
| T957 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/7.sram_ctrl_passthru_mem_tl_intg_err.2968377061 |
|
|
Aug 21 06:06:23 PM UTC 24 |
Aug 21 06:06:27 PM UTC 24 |
469988503 ps |
| T958 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/6.sram_ctrl_tl_errors.721569797 |
|
|
Aug 21 06:06:23 PM UTC 24 |
Aug 21 06:06:27 PM UTC 24 |
29176616 ps |
| T959 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/7.sram_ctrl_tl_errors.3568901109 |
|
|
Aug 21 06:06:23 PM UTC 24 |
Aug 21 06:06:28 PM UTC 24 |
235155008 ps |
| T960 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/4.sram_ctrl_same_csr_outstanding.3672367074 |
|
|
Aug 21 06:06:21 PM UTC 24 |
Aug 21 06:06:29 PM UTC 24 |
57584205 ps |
| T961 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/3.sram_ctrl_same_csr_outstanding.1311051166 |
|
|
Aug 21 06:06:21 PM UTC 24 |
Aug 21 06:06:30 PM UTC 24 |
54255125 ps |
| T962 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/3.sram_ctrl_csr_aliasing.937971246 |
|
|
Aug 21 06:06:21 PM UTC 24 |
Aug 21 06:06:30 PM UTC 24 |
38844379 ps |
| T963 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/3.sram_ctrl_csr_rw.253714769 |
|
|
Aug 21 06:06:21 PM UTC 24 |
Aug 21 06:06:30 PM UTC 24 |
17431653 ps |
| T964 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/8.sram_ctrl_same_csr_outstanding.2331731020 |
|
|
Aug 21 06:06:27 PM UTC 24 |
Aug 21 06:06:30 PM UTC 24 |
17746799 ps |
| T76 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/9.sram_ctrl_csr_rw.2649263913 |
|
|
Aug 21 06:06:27 PM UTC 24 |
Aug 21 06:06:30 PM UTC 24 |
38739461 ps |
| T77 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/4.sram_ctrl_csr_aliasing.1299682745 |
|
|
Aug 21 06:06:21 PM UTC 24 |
Aug 21 06:06:30 PM UTC 24 |
34458294 ps |
| T965 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/3.sram_ctrl_csr_mem_rw_with_rand_reset.2972740694 |
|
|
Aug 21 06:06:21 PM UTC 24 |
Aug 21 06:06:31 PM UTC 24 |
112467883 ps |
| T966 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/3.sram_ctrl_csr_bit_bash.1328093451 |
|
|
Aug 21 06:06:21 PM UTC 24 |
Aug 21 06:06:31 PM UTC 24 |
238761335 ps |
| T118 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/4.sram_ctrl_tl_intg_err.1031552507 |
|
|
Aug 21 06:06:21 PM UTC 24 |
Aug 21 06:06:31 PM UTC 24 |
668009409 ps |
| T78 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/9.sram_ctrl_passthru_mem_tl_intg_err.257940349 |
|
|
Aug 21 06:06:27 PM UTC 24 |
Aug 21 06:06:31 PM UTC 24 |
322176733 ps |
| T110 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/9.sram_ctrl_tl_intg_err.3938403475 |
|
|
Aug 21 06:06:27 PM UTC 24 |
Aug 21 06:06:32 PM UTC 24 |
215145800 ps |
| T119 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/5.sram_ctrl_tl_intg_err.1020745107 |
|
|
Aug 21 06:06:21 PM UTC 24 |
Aug 21 06:06:32 PM UTC 24 |
271016750 ps |
| T79 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/5.sram_ctrl_passthru_mem_tl_intg_err.2358732929 |
|
|
Aug 21 06:06:21 PM UTC 24 |
Aug 21 06:06:32 PM UTC 24 |
250677602 ps |
| T83 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/4.sram_ctrl_passthru_mem_tl_intg_err.2021708995 |
|
|
Aug 21 06:06:21 PM UTC 24 |
Aug 21 06:06:33 PM UTC 24 |
1655182218 ps |
| T967 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/9.sram_ctrl_tl_errors.266773947 |
|
|
Aug 21 06:06:27 PM UTC 24 |
Aug 21 06:06:33 PM UTC 24 |
256856032 ps |
| T968 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/5.sram_ctrl_tl_errors.2446208406 |
|
|
Aug 21 06:06:21 PM UTC 24 |
Aug 21 06:06:34 PM UTC 24 |
445965029 ps |
| T969 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/12.sram_ctrl_tl_errors.2383342162 |
|
|
Aug 21 06:06:33 PM UTC 24 |
Aug 21 06:06:38 PM UTC 24 |
90309282 ps |
| T970 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/11.sram_ctrl_same_csr_outstanding.1164322964 |
|
|
Aug 21 06:06:33 PM UTC 24 |
Aug 21 06:06:36 PM UTC 24 |
46127053 ps |
| T971 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/11.sram_ctrl_csr_rw.1646520298 |
|
|
Aug 21 06:06:33 PM UTC 24 |
Aug 21 06:06:36 PM UTC 24 |
13023171 ps |
| T972 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/10.sram_ctrl_same_csr_outstanding.2978410586 |
|
|
Aug 21 06:06:30 PM UTC 24 |
Aug 21 06:06:36 PM UTC 24 |
29440325 ps |
| T84 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/12.sram_ctrl_csr_rw.931533084 |
|
|
Aug 21 06:06:33 PM UTC 24 |
Aug 21 06:06:36 PM UTC 24 |
155445999 ps |
| T973 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/12.sram_ctrl_same_csr_outstanding.2403611171 |
|
|
Aug 21 06:06:33 PM UTC 24 |
Aug 21 06:06:36 PM UTC 24 |
18445627 ps |
| T974 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/4.sram_ctrl_csr_hw_reset.3132169322 |
|
|
Aug 21 06:06:21 PM UTC 24 |
Aug 21 06:06:36 PM UTC 24 |
18567599 ps |
| T975 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/10.sram_ctrl_csr_mem_rw_with_rand_reset.3494877943 |
|
|
Aug 21 06:06:30 PM UTC 24 |
Aug 21 06:06:36 PM UTC 24 |
57478132 ps |
| T115 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/11.sram_ctrl_tl_intg_err.2600630930 |
|
|
Aug 21 06:06:33 PM UTC 24 |
Aug 21 06:06:37 PM UTC 24 |
184201091 ps |
| T976 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/11.sram_ctrl_csr_mem_rw_with_rand_reset.427305223 |
|
|
Aug 21 06:06:33 PM UTC 24 |
Aug 21 06:06:37 PM UTC 24 |
68842166 ps |
| T85 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/12.sram_ctrl_passthru_mem_tl_intg_err.2034755075 |
|
|
Aug 21 06:06:33 PM UTC 24 |
Aug 21 06:06:37 PM UTC 24 |
468387199 ps |
| T86 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/11.sram_ctrl_passthru_mem_tl_intg_err.2554040714 |
|
|
Aug 21 06:06:31 PM UTC 24 |
Aug 21 06:06:37 PM UTC 24 |
277489668 ps |
| T117 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/10.sram_ctrl_tl_intg_err.3690118393 |
|
|
Aug 21 06:06:30 PM UTC 24 |
Aug 21 06:06:38 PM UTC 24 |
623819768 ps |
| T977 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/11.sram_ctrl_tl_errors.2032238711 |
|
|
Aug 21 06:06:31 PM UTC 24 |
Aug 21 06:06:39 PM UTC 24 |
47970994 ps |
| T978 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/13.sram_ctrl_csr_rw.714190966 |
|
|
Aug 21 06:06:37 PM UTC 24 |
Aug 21 06:06:40 PM UTC 24 |
47006420 ps |
| T979 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/13.sram_ctrl_same_csr_outstanding.1882220176 |
|
|
Aug 21 06:06:37 PM UTC 24 |
Aug 21 06:06:40 PM UTC 24 |
91287180 ps |
| T980 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/14.sram_ctrl_csr_rw.1663360904 |
|
|
Aug 21 06:06:37 PM UTC 24 |
Aug 21 06:06:40 PM UTC 24 |
42085735 ps |
| T981 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/14.sram_ctrl_same_csr_outstanding.3337399618 |
|
|
Aug 21 06:06:37 PM UTC 24 |
Aug 21 06:06:40 PM UTC 24 |
57798821 ps |
| T982 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/13.sram_ctrl_csr_mem_rw_with_rand_reset.1389439209 |
|
|
Aug 21 06:06:37 PM UTC 24 |
Aug 21 06:06:40 PM UTC 24 |
141593222 ps |
| T121 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/13.sram_ctrl_tl_intg_err.1371361543 |
|
|
Aug 21 06:06:37 PM UTC 24 |
Aug 21 06:06:41 PM UTC 24 |
146375245 ps |
| T983 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/14.sram_ctrl_tl_errors.3603578673 |
|
|
Aug 21 06:06:37 PM UTC 24 |
Aug 21 06:06:41 PM UTC 24 |
65291455 ps |
| T87 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/14.sram_ctrl_passthru_mem_tl_intg_err.909209174 |
|
|
Aug 21 06:06:37 PM UTC 24 |
Aug 21 06:06:41 PM UTC 24 |
211597644 ps |
| T984 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/8.sram_ctrl_passthru_mem_tl_intg_err.2431769788 |
|
|
Aug 21 06:06:25 PM UTC 24 |
Aug 21 06:06:41 PM UTC 24 |
2362733393 ps |
| T111 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/14.sram_ctrl_tl_intg_err.785077651 |
|
|
Aug 21 06:06:37 PM UTC 24 |
Aug 21 06:06:42 PM UTC 24 |
1284134553 ps |
| T985 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/15.sram_ctrl_same_csr_outstanding.1370154423 |
|
|
Aug 21 06:06:39 PM UTC 24 |
Aug 21 06:06:44 PM UTC 24 |
40013512 ps |
| T986 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/10.sram_ctrl_tl_errors.1328241895 |
|
|
Aug 21 06:06:29 PM UTC 24 |
Aug 21 06:06:45 PM UTC 24 |
752140542 ps |
| T987 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/17.sram_ctrl_same_csr_outstanding.2753210306 |
|
|
Aug 21 06:06:43 PM UTC 24 |
Aug 21 06:06:46 PM UTC 24 |
24489949 ps |
| T988 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/4.sram_ctrl_csr_rw.201786408 |
|
|
Aug 21 06:06:21 PM UTC 24 |
Aug 21 06:06:46 PM UTC 24 |
28015246 ps |
| T989 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/8.sram_ctrl_csr_rw.1408908892 |
|
|
Aug 21 06:06:27 PM UTC 24 |
Aug 21 06:06:46 PM UTC 24 |
14572652 ps |
| T990 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/16.sram_ctrl_csr_rw.748665771 |
|
|
Aug 21 06:06:42 PM UTC 24 |
Aug 21 06:06:46 PM UTC 24 |
103509548 ps |
| T991 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/17.sram_ctrl_csr_rw.2389628033 |
|
|
Aug 21 06:06:42 PM UTC 24 |
Aug 21 06:06:47 PM UTC 24 |
57921221 ps |
| T992 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/16.sram_ctrl_same_csr_outstanding.512101736 |
|
|
Aug 21 06:06:42 PM UTC 24 |
Aug 21 06:06:47 PM UTC 24 |
21791836 ps |
| T993 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/12.sram_ctrl_tl_intg_err.1302742124 |
|
|
Aug 21 06:06:33 PM UTC 24 |
Aug 21 06:06:47 PM UTC 24 |
692948693 ps |
| T994 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/8.sram_ctrl_csr_mem_rw_with_rand_reset.2448973396 |
|
|
Aug 21 06:06:27 PM UTC 24 |
Aug 21 06:06:47 PM UTC 24 |
40293078 ps |
| T995 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/7.sram_ctrl_same_csr_outstanding.2167551408 |
|
|
Aug 21 06:06:25 PM UTC 24 |
Aug 21 06:06:47 PM UTC 24 |
50401109 ps |
| T996 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/16.sram_ctrl_csr_mem_rw_with_rand_reset.76801193 |
|
|
Aug 21 06:06:42 PM UTC 24 |
Aug 21 06:06:47 PM UTC 24 |
103647756 ps |
| T997 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/17.sram_ctrl_tl_intg_err.3192475128 |
|
|
Aug 21 06:06:42 PM UTC 24 |
Aug 21 06:06:48 PM UTC 24 |
771385311 ps |
| T998 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/12.sram_ctrl_csr_mem_rw_with_rand_reset.3184979571 |
|
|
Aug 21 06:06:35 PM UTC 24 |
Aug 21 06:06:48 PM UTC 24 |
401792033 ps |
| T999 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/17.sram_ctrl_passthru_mem_tl_intg_err.2249957945 |
|
|
Aug 21 06:06:42 PM UTC 24 |
Aug 21 06:06:48 PM UTC 24 |
544351648 ps |
| T122 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/8.sram_ctrl_tl_intg_err.2538783710 |
|
|
Aug 21 06:06:27 PM UTC 24 |
Aug 21 06:06:48 PM UTC 24 |
238707289 ps |
| T1000 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/13.sram_ctrl_tl_errors.402212984 |
|
|
Aug 21 06:06:35 PM UTC 24 |
Aug 21 06:06:48 PM UTC 24 |
35275675 ps |
| T1001 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/15.sram_ctrl_csr_rw.102421771 |
|
|
Aug 21 06:06:39 PM UTC 24 |
Aug 21 06:06:48 PM UTC 24 |
16280434 ps |
| T1002 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/9.sram_ctrl_same_csr_outstanding.1308625483 |
|
|
Aug 21 06:06:29 PM UTC 24 |
Aug 21 06:06:48 PM UTC 24 |
56440814 ps |
| T1003 |
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/16.sram_ctrl_tl_errors.922073969 |
|
|
Aug 21 06:06:42 PM UTC 24 |
Aug 21 06:06:48 PM UTC 24 |
219084042 ps |