Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.95 99.16 94.27 99.72 100.00 95.95 99.12 97.44


Total tests in report: 1025
Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP  
TOTAL INCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRNAME
69.50 69.50 91.86 91.86 71.33 71.33 92.16 92.16 33.33 33.33 79.95 79.95 93.36 93.36 24.50 24.50 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/0.sram_ctrl_lc_escalation.2620508736
87.30 17.80 97.97 6.10 84.36 13.03 94.24 2.08 100.00 66.67 91.55 11.59 96.02 2.65 46.98 22.49 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.3178034435
90.56 3.25 98.14 0.17 86.02 1.66 95.21 0.97 100.00 0.00 92.51 0.97 96.02 0.00 66.00 19.01 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/7.sram_ctrl_stress_all_with_rand_reset.1969813024
93.41 2.86 98.64 0.51 87.32 1.30 95.42 0.21 100.00 0.00 93.96 1.45 97.20 1.18 81.35 15.36 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/1.sram_ctrl_mem_partial_access.1313915799
94.51 1.10 99.07 0.42 89.57 2.25 96.74 1.32 100.00 0.00 96.14 2.17 97.79 0.59 82.27 0.91 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/0.sram_ctrl_sec_cm.1305692408
95.27 0.76 99.07 0.00 89.93 0.36 96.74 0.00 100.00 0.00 96.14 0.00 97.79 0.00 87.20 4.94 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/0.sram_ctrl_tl_intg_err.2343904323
95.66 0.39 99.07 0.00 89.93 0.00 96.74 0.00 100.00 0.00 96.14 0.00 97.79 0.00 89.95 2.74 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/1.sram_ctrl_executable.60670548
95.95 0.29 99.07 0.00 89.93 0.00 96.74 0.00 100.00 0.00 96.14 0.00 97.79 0.00 91.96 2.01 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/1.sram_ctrl_partial_access_b2b.2118186701
96.21 0.27 99.07 0.00 90.05 0.12 97.75 1.01 100.00 0.00 96.14 0.00 97.79 0.00 92.69 0.73 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/2.sram_ctrl_lc_escalation.2747958542
96.44 0.23 99.07 0.00 90.28 0.24 97.82 0.07 100.00 0.00 96.14 0.00 99.12 1.33 92.69 0.00 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/0.sram_ctrl_passthru_mem_tl_intg_err.1571778046
96.65 0.21 99.07 0.00 90.40 0.12 98.23 0.42 100.00 0.00 96.14 0.00 99.12 0.00 93.60 0.91 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/4.sram_ctrl_stress_all_with_rand_reset.2301912754
96.84 0.19 99.07 0.00 90.40 0.00 98.27 0.03 100.00 0.00 96.14 0.00 99.12 0.00 94.88 1.28 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/3.sram_ctrl_regwen.58720397
96.97 0.14 99.15 0.08 90.40 0.00 99.13 0.87 100.00 0.00 96.14 0.00 99.12 0.00 94.88 0.00 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/0.sram_ctrl_ram_cfg.4271303807
97.08 0.10 99.15 0.00 90.40 0.00 99.13 0.00 100.00 0.00 96.14 0.00 99.12 0.00 95.61 0.73 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/6.sram_ctrl_executable.68780403
97.16 0.08 99.15 0.00 90.40 0.00 99.13 0.00 100.00 0.00 96.14 0.00 99.12 0.00 96.16 0.55 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/10.sram_ctrl_tl_intg_err.3690118393
97.23 0.08 99.15 0.00 90.40 0.00 99.48 0.35 100.00 0.00 96.14 0.00 99.12 0.00 96.34 0.18 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/2.sram_ctrl_partial_access.2049542925
97.29 0.06 99.15 0.00 90.76 0.36 99.55 0.07 100.00 0.00 96.14 0.00 99.12 0.00 96.34 0.00 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/0.sram_ctrl_alert_test.4066246973
97.35 0.05 99.15 0.00 90.76 0.00 99.55 0.00 100.00 0.00 96.14 0.00 99.12 0.00 96.71 0.37 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/15.sram_ctrl_tl_intg_err.3072332688
97.38 0.04 99.15 0.00 90.76 0.00 99.62 0.07 100.00 0.00 96.14 0.00 99.12 0.00 96.89 0.18 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/2.sram_ctrl_smoke.1853171460
97.42 0.03 99.15 0.00 91.00 0.24 99.62 0.00 100.00 0.00 96.14 0.00 99.12 0.00 96.89 0.00 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/17.sram_ctrl_lc_escalation.143487664
97.44 0.03 99.15 0.00 91.00 0.00 99.62 0.00 100.00 0.00 96.14 0.00 99.12 0.00 97.07 0.18 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/14.sram_ctrl_tl_intg_err.785077651
97.47 0.03 99.15 0.00 91.00 0.00 99.62 0.00 100.00 0.00 96.14 0.00 99.12 0.00 97.26 0.18 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/19.sram_ctrl_tl_intg_err.1676055115
97.49 0.03 99.15 0.00 91.00 0.00 99.62 0.00 100.00 0.00 96.14 0.00 99.12 0.00 97.44 0.18 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/4.sram_ctrl_tl_intg_err.1031552507
97.50 0.01 99.15 0.00 91.00 0.00 99.69 0.07 100.00 0.00 96.14 0.00 99.12 0.00 97.44 0.00 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/10.sram_ctrl_stress_all_with_rand_reset.247510922
97.51 0.01 99.15 0.00 91.00 0.00 99.72 0.03 100.00 0.00 96.14 0.00 99.12 0.00 97.44 0.00 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/0.sram_ctrl_bijection.373669263

Tests that do not contribute to grading

Name
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/0.sram_ctrl_csr_aliasing.4264898715
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/0.sram_ctrl_csr_bit_bash.1427588929
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/0.sram_ctrl_csr_hw_reset.3232549163
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/0.sram_ctrl_csr_mem_rw_with_rand_reset.1189010731
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/0.sram_ctrl_csr_rw.3239524346
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/0.sram_ctrl_same_csr_outstanding.2707512741
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/0.sram_ctrl_tl_errors.4087660530
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/1.sram_ctrl_csr_aliasing.3283448754
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/1.sram_ctrl_csr_bit_bash.1347020527
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/1.sram_ctrl_csr_hw_reset.2407762364
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/1.sram_ctrl_csr_mem_rw_with_rand_reset.553261478
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/1.sram_ctrl_csr_rw.2374079154
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/1.sram_ctrl_passthru_mem_tl_intg_err.3806579116
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/1.sram_ctrl_same_csr_outstanding.1867422975
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/1.sram_ctrl_tl_errors.1447113886
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/1.sram_ctrl_tl_intg_err.1906893316
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/10.sram_ctrl_csr_mem_rw_with_rand_reset.3494877943
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/10.sram_ctrl_csr_rw.3880151326
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/10.sram_ctrl_passthru_mem_tl_intg_err.2938746513
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/10.sram_ctrl_same_csr_outstanding.2978410586
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/10.sram_ctrl_tl_errors.1328241895
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/11.sram_ctrl_csr_mem_rw_with_rand_reset.427305223
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/11.sram_ctrl_csr_rw.1646520298
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/11.sram_ctrl_passthru_mem_tl_intg_err.2554040714
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/11.sram_ctrl_same_csr_outstanding.1164322964
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/11.sram_ctrl_tl_errors.2032238711
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/11.sram_ctrl_tl_intg_err.2600630930
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/12.sram_ctrl_csr_mem_rw_with_rand_reset.3184979571
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/12.sram_ctrl_csr_rw.931533084
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/12.sram_ctrl_passthru_mem_tl_intg_err.2034755075
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/12.sram_ctrl_same_csr_outstanding.2403611171
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/12.sram_ctrl_tl_errors.2383342162
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/12.sram_ctrl_tl_intg_err.1302742124
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/13.sram_ctrl_csr_mem_rw_with_rand_reset.1389439209
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/13.sram_ctrl_csr_rw.714190966
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/13.sram_ctrl_passthru_mem_tl_intg_err.1982883252
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/13.sram_ctrl_same_csr_outstanding.1882220176
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/13.sram_ctrl_tl_errors.402212984
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/13.sram_ctrl_tl_intg_err.1371361543
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/14.sram_ctrl_csr_mem_rw_with_rand_reset.2599161626
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/14.sram_ctrl_csr_rw.1663360904
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/14.sram_ctrl_passthru_mem_tl_intg_err.909209174
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/14.sram_ctrl_same_csr_outstanding.3337399618
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/14.sram_ctrl_tl_errors.3603578673
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/15.sram_ctrl_csr_mem_rw_with_rand_reset.1667841489
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/15.sram_ctrl_csr_rw.102421771
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/15.sram_ctrl_passthru_mem_tl_intg_err.3016371094
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/15.sram_ctrl_same_csr_outstanding.1370154423
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/15.sram_ctrl_tl_errors.243856675
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/16.sram_ctrl_csr_mem_rw_with_rand_reset.76801193
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/16.sram_ctrl_csr_rw.748665771
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/16.sram_ctrl_passthru_mem_tl_intg_err.3433787990
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/16.sram_ctrl_same_csr_outstanding.512101736
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/16.sram_ctrl_tl_errors.922073969
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/16.sram_ctrl_tl_intg_err.2463349678
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/17.sram_ctrl_csr_rw.2389628033
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/17.sram_ctrl_passthru_mem_tl_intg_err.2249957945
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/17.sram_ctrl_same_csr_outstanding.2753210306
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/17.sram_ctrl_tl_errors.1077377339
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/17.sram_ctrl_tl_intg_err.3192475128
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/18.sram_ctrl_csr_mem_rw_with_rand_reset.3875880439
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/cover_reg_top/18.sram_ctrl_csr_rw.71869287
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/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/8.sram_ctrl_mem_partial_access.2581016175
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/8.sram_ctrl_mem_walk.56847811
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/8.sram_ctrl_multiple_keys.1385469093
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/8.sram_ctrl_partial_access.3787376517
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/8.sram_ctrl_partial_access_b2b.1260973853
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/8.sram_ctrl_ram_cfg.2336269610
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/8.sram_ctrl_regwen.2396566107
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/8.sram_ctrl_smoke.2482817069
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/8.sram_ctrl_stress_all.404045514
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/8.sram_ctrl_stress_all_with_rand_reset.2031411853
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/8.sram_ctrl_stress_pipeline.2070214023
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/8.sram_ctrl_throughput_w_partial_write.3620155631
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/9.sram_ctrl_access_during_key_req.3935949596
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/9.sram_ctrl_alert_test.4033860612
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/9.sram_ctrl_bijection.1004718700
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/9.sram_ctrl_executable.385386166
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/9.sram_ctrl_lc_escalation.3316894221
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/9.sram_ctrl_max_throughput.3308587043
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/9.sram_ctrl_mem_partial_access.11386517
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/9.sram_ctrl_mem_walk.4067285311
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/9.sram_ctrl_multiple_keys.3135948320
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/9.sram_ctrl_partial_access.479247101
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/9.sram_ctrl_partial_access_b2b.475151972
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/9.sram_ctrl_ram_cfg.666421660
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/9.sram_ctrl_regwen.3511067211
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/9.sram_ctrl_smoke.3458479766
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/9.sram_ctrl_stress_all.870101385
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/9.sram_ctrl_stress_all_with_rand_reset.68277437
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/9.sram_ctrl_stress_pipeline.1911742578
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/9.sram_ctrl_throughput_w_partial_write.353101749



Total test records in report: 1025
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html | tests21.html
TEST NOTEST LOCATIONTEST NAMESTATUSSTARTEDFINISHEDSIMULATION TIME
T1 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/0.sram_ctrl_ram_cfg.4271303807 Aug 21 06:08:59 PM UTC 24 Aug 21 06:09:01 PM UTC 24 75169487 ps
T2 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/0.sram_ctrl_partial_access.4089993457 Aug 21 06:08:57 PM UTC 24 Aug 21 06:09:02 PM UTC 24 64121843 ps
T3 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/0.sram_ctrl_lc_escalation.2620508736 Aug 21 06:08:59 PM UTC 24 Aug 21 06:09:02 PM UTC 24 115472493 ps
T10 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/0.sram_ctrl_alert_test.4066246973 Aug 21 06:09:01 PM UTC 24 Aug 21 06:09:02 PM UTC 24 72110018 ps
T4 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/0.sram_ctrl_mem_partial_access.1094512643 Aug 21 06:08:59 PM UTC 24 Aug 21 06:09:04 PM UTC 24 58732617 ps
T9 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/1.sram_ctrl_partial_access.3615190257 Aug 21 06:09:02 PM UTC 24 Aug 21 06:09:05 PM UTC 24 68508497 ps
T5 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/0.sram_ctrl_sec_cm.1305692408 Aug 21 06:09:00 PM UTC 24 Aug 21 06:09:05 PM UTC 24 666775933 ps
T11 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/5.sram_ctrl_alert_test.1803722037 Aug 21 06:11:15 PM UTC 24 Aug 21 06:11:17 PM UTC 24 34307680 ps
T8 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/0.sram_ctrl_mem_walk.247813561 Aug 21 06:08:59 PM UTC 24 Aug 21 06:09:05 PM UTC 24 437892922 ps
T12 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/1.sram_ctrl_ram_cfg.1855015146 Aug 21 06:09:04 PM UTC 24 Aug 21 06:09:06 PM UTC 24 48309045 ps
T27 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/1.sram_ctrl_mem_partial_access.1313915799 Aug 21 06:09:04 PM UTC 24 Aug 21 06:09:08 PM UTC 24 163532490 ps
T13 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/1.sram_ctrl_alert_test.3422325797 Aug 21 06:09:06 PM UTC 24 Aug 21 06:09:08 PM UTC 24 20162754 ps
T28 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/2.sram_ctrl_smoke.1853171460 Aug 21 06:09:06 PM UTC 24 Aug 21 06:09:09 PM UTC 24 251351316 ps
T6 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/1.sram_ctrl_lc_escalation.3065362730 Aug 21 06:09:02 PM UTC 24 Aug 21 06:09:10 PM UTC 24 839145650 ps
T23 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/2.sram_ctrl_max_throughput.3022076463 Aug 21 06:09:09 PM UTC 24 Aug 21 06:09:11 PM UTC 24 116280098 ps
T14 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/1.sram_ctrl_sec_cm.1502567128 Aug 21 06:09:05 PM UTC 24 Aug 21 06:09:11 PM UTC 24 980578510 ps
T24 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/2.sram_ctrl_ram_cfg.896898864 Aug 21 06:09:12 PM UTC 24 Aug 21 06:09:14 PM UTC 24 28645339 ps
T29 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/1.sram_ctrl_smoke.2038276065 Aug 21 06:09:01 PM UTC 24 Aug 21 06:09:14 PM UTC 24 256147616 ps
T32 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/1.sram_ctrl_throughput_w_partial_write.1199062507 Aug 21 06:09:02 PM UTC 24 Aug 21 06:09:18 PM UTC 24 88002060 ps
T16 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/0.sram_ctrl_bijection.373669263 Aug 21 06:08:57 PM UTC 24 Aug 21 06:09:18 PM UTC 24 3530016440 ps
T7 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/2.sram_ctrl_lc_escalation.2747958542 Aug 21 06:09:10 PM UTC 24 Aug 21 06:09:19 PM UTC 24 1368080391 ps
T30 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/2.sram_ctrl_mem_partial_access.1849061938 Aug 21 06:09:14 PM UTC 24 Aug 21 06:09:20 PM UTC 24 645614659 ps
T144 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/2.sram_ctrl_alert_test.1407062656 Aug 21 06:09:18 PM UTC 24 Aug 21 06:09:21 PM UTC 24 62898318 ps
T39 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/2.sram_ctrl_mem_walk.3011031363 Aug 21 06:09:12 PM UTC 24 Aug 21 06:09:22 PM UTC 24 673579485 ps
T40 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/1.sram_ctrl_mem_walk.3357976948 Aug 21 06:09:04 PM UTC 24 Aug 21 06:09:22 PM UTC 24 10849085369 ps
T15 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/2.sram_ctrl_sec_cm.1645906319 Aug 21 06:09:18 PM UTC 24 Aug 21 06:09:25 PM UTC 24 370154480 ps
T31 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/3.sram_ctrl_smoke.580552464 Aug 21 06:09:20 PM UTC 24 Aug 21 06:09:34 PM UTC 24 245528800 ps
T21 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.3178034435 Aug 21 06:09:04 PM UTC 24 Aug 21 06:09:35 PM UTC 24 797251261 ps
T61 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/0.sram_ctrl_smoke.1471562617 Aug 21 06:08:57 PM UTC 24 Aug 21 06:09:37 PM UTC 24 200366167 ps
T62 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/1.sram_ctrl_max_throughput.2163790721 Aug 21 06:09:02 PM UTC 24 Aug 21 06:09:38 PM UTC 24 1423112770 ps
T53 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/3.sram_ctrl_partial_access.3342280550 Aug 21 06:09:23 PM UTC 24 Aug 21 06:09:39 PM UTC 24 606091364 ps
T20 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/3.sram_ctrl_lc_escalation.2005215988 Aug 21 06:09:29 PM UTC 24 Aug 21 06:09:40 PM UTC 24 2223356434 ps
T63 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/3.sram_ctrl_ram_cfg.3403467135 Aug 21 06:09:38 PM UTC 24 Aug 21 06:09:40 PM UTC 24 67834945 ps
T64 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/3.sram_ctrl_mem_partial_access.2560455480 Aug 21 06:09:40 PM UTC 24 Aug 21 06:09:47 PM UTC 24 270264401 ps
T65 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/3.sram_ctrl_alert_test.1197883617 Aug 21 06:09:45 PM UTC 24 Aug 21 06:09:47 PM UTC 24 14755219 ps
T25 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/3.sram_ctrl_sec_cm.946207022 Aug 21 06:09:45 PM UTC 24 Aug 21 06:09:49 PM UTC 24 205516651 ps
T66 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/2.sram_ctrl_bijection.3731164635 Aug 21 06:09:06 PM UTC 24 Aug 21 06:09:50 PM UTC 24 2225931537 ps
T155 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/3.sram_ctrl_max_throughput.2327123238 Aug 21 06:09:26 PM UTC 24 Aug 21 06:09:50 PM UTC 24 361629234 ps
T143 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/4.sram_ctrl_smoke.353717375 Aug 21 06:09:47 PM UTC 24 Aug 21 06:09:52 PM UTC 24 99993920 ps
T44 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/3.sram_ctrl_mem_walk.432801279 Aug 21 06:09:39 PM UTC 24 Aug 21 06:09:55 PM UTC 24 2621549354 ps
T134 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/0.sram_ctrl_throughput_w_partial_write.3077022030 Aug 21 06:08:59 PM UTC 24 Aug 21 06:10:04 PM UTC 24 572292363 ps
T146 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/3.sram_ctrl_bijection.2578247269 Aug 21 06:09:22 PM UTC 24 Aug 21 06:10:07 PM UTC 24 1193332969 ps
T135 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/4.sram_ctrl_throughput_w_partial_write.2764973112 Aug 21 06:10:05 PM UTC 24 Aug 21 06:10:15 PM UTC 24 274881027 ps
T57 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/4.sram_ctrl_lc_escalation.2407539042 Aug 21 06:10:07 PM UTC 24 Aug 21 06:10:15 PM UTC 24 401103932 ps
T153 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/4.sram_ctrl_partial_access.879067661 Aug 21 06:09:52 PM UTC 24 Aug 21 06:10:17 PM UTC 24 4893130643 ps
T17 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/2.sram_ctrl_stress_all_with_rand_reset.3234138774 Aug 21 06:09:15 PM UTC 24 Aug 21 06:10:19 PM UTC 24 1111141498 ps
T154 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/4.sram_ctrl_ram_cfg.3493380752 Aug 21 06:10:18 PM UTC 24 Aug 21 06:10:21 PM UTC 24 54150743 ps
T142 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/1.sram_ctrl_bijection.299500359 Aug 21 06:09:02 PM UTC 24 Aug 21 06:10:24 PM UTC 24 4992857999 ps
T140 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/3.sram_ctrl_throughput_w_partial_write.626079164 Aug 21 06:09:28 PM UTC 24 Aug 21 06:10:24 PM UTC 24 135717691 ps
T156 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/2.sram_ctrl_throughput_w_partial_write.1473971563 Aug 21 06:09:09 PM UTC 24 Aug 21 06:10:25 PM UTC 24 564980682 ps
T157 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/4.sram_ctrl_mem_walk.2348202409 Aug 21 06:10:19 PM UTC 24 Aug 21 06:10:26 PM UTC 24 79010874 ps
T150 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/4.sram_ctrl_bijection.901921218 Aug 21 06:09:50 PM UTC 24 Aug 21 06:10:28 PM UTC 24 1835430644 ps
T136 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/2.sram_ctrl_partial_access.2049542925 Aug 21 06:09:07 PM UTC 24 Aug 21 06:10:28 PM UTC 24 818339255 ps
T151 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/4.sram_ctrl_alert_test.240767462 Aug 21 06:10:27 PM UTC 24 Aug 21 06:10:29 PM UTC 24 12104146 ps
T41 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/4.sram_ctrl_mem_partial_access.4283098278 Aug 21 06:10:22 PM UTC 24 Aug 21 06:10:31 PM UTC 24 663441361 ps
T26 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/4.sram_ctrl_sec_cm.1302619753 Aug 21 06:10:26 PM UTC 24 Aug 21 06:10:31 PM UTC 24 207541521 ps
T149 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/0.sram_ctrl_max_throughput.603273640 Aug 21 06:08:59 PM UTC 24 Aug 21 06:10:32 PM UTC 24 136892305 ps
T158 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/5.sram_ctrl_partial_access.2085212542 Aug 21 06:10:32 PM UTC 24 Aug 21 06:10:52 PM UTC 24 262789612 ps
T152 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/5.sram_ctrl_lc_escalation.3315027862 Aug 21 06:10:53 PM UTC 24 Aug 21 06:10:56 PM UTC 24 199522637 ps
T159 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/5.sram_ctrl_smoke.3964031932 Aug 21 06:10:29 PM UTC 24 Aug 21 06:10:57 PM UTC 24 95462666 ps
T160 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/5.sram_ctrl_ram_cfg.1337356489 Aug 21 06:11:03 PM UTC 24 Aug 21 06:11:06 PM UTC 24 78706837 ps
T92 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/0.sram_ctrl_stress_pipeline.307244410 Aug 21 06:08:57 PM UTC 24 Aug 21 06:11:08 PM UTC 24 5107473993 ps
T161 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/5.sram_ctrl_max_throughput.4215415532 Aug 21 06:10:47 PM UTC 24 Aug 21 06:11:10 PM UTC 24 92121687 ps
T147 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/5.sram_ctrl_throughput_w_partial_write.3744709419 Aug 21 06:10:53 PM UTC 24 Aug 21 06:11:11 PM UTC 24 80778009 ps
T38 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/5.sram_ctrl_mem_partial_access.3146933970 Aug 21 06:11:09 PM UTC 24 Aug 21 06:11:14 PM UTC 24 226795109 ps
T45 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/5.sram_ctrl_mem_walk.2125756656 Aug 21 06:11:06 PM UTC 24 Aug 21 06:11:16 PM UTC 24 480726097 ps
T162 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/4.sram_ctrl_max_throughput.1928676852 Aug 21 06:09:56 PM UTC 24 Aug 21 06:11:16 PM UTC 24 1052395177 ps
T163 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/5.sram_ctrl_bijection.3228526673 Aug 21 06:10:30 PM UTC 24 Aug 21 06:11:37 PM UTC 24 2400379085 ps
T164 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/6.sram_ctrl_smoke.866965668 Aug 21 06:11:17 PM UTC 24 Aug 21 06:11:42 PM UTC 24 521116873 ps
T165 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/6.sram_ctrl_bijection.3322861994 Aug 21 06:11:18 PM UTC 24 Aug 21 06:11:44 PM UTC 24 275971861 ps
T18 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/3.sram_ctrl_stress_all_with_rand_reset.1113482803 Aug 21 06:09:41 PM UTC 24 Aug 21 06:11:50 PM UTC 24 2901205094 ps
T166 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/6.sram_ctrl_partial_access.2038835021 Aug 21 06:11:42 PM UTC 24 Aug 21 06:11:58 PM UTC 24 236152661 ps
T22 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/5.sram_ctrl_stress_all_with_rand_reset.3006509131 Aug 21 06:11:11 PM UTC 24 Aug 21 06:12:01 PM UTC 24 1021209279 ps
T19 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/4.sram_ctrl_stress_all_with_rand_reset.2301912754 Aug 21 06:10:25 PM UTC 24 Aug 21 06:12:06 PM UTC 24 415538310 ps
T141 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/6.sram_ctrl_throughput_w_partial_write.2484007146 Aug 21 06:11:59 PM UTC 24 Aug 21 06:12:06 PM UTC 24 355904453 ps
T36 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/2.sram_ctrl_executable.573929519 Aug 21 06:09:10 PM UTC 24 Aug 21 06:12:21 PM UTC 24 4571370498 ps
T106 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/6.sram_ctrl_lc_escalation.30676820 Aug 21 06:12:02 PM UTC 24 Aug 21 06:12:21 PM UTC 24 1552236066 ps
T167 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/6.sram_ctrl_ram_cfg.142608135 Aug 21 06:12:22 PM UTC 24 Aug 21 06:12:24 PM UTC 24 82184347 ps
T145 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/6.sram_ctrl_mem_walk.768154176 Aug 21 06:12:25 PM UTC 24 Aug 21 06:12:35 PM UTC 24 1384302864 ps
T46 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/6.sram_ctrl_mem_partial_access.3421494711 Aug 21 06:12:36 PM UTC 24 Aug 21 06:12:44 PM UTC 24 360324907 ps
T168 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/6.sram_ctrl_max_throughput.2950490293 Aug 21 06:11:51 PM UTC 24 Aug 21 06:12:48 PM UTC 24 101991952 ps
T93 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/1.sram_ctrl_stress_pipeline.781945164 Aug 21 06:09:02 PM UTC 24 Aug 21 06:12:54 PM UTC 24 9202246015 ps
T169 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/6.sram_ctrl_alert_test.2375990505 Aug 21 06:12:54 PM UTC 24 Aug 21 06:12:56 PM UTC 24 47973842 ps
T52 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/0.sram_ctrl_regwen.2562242744 Aug 21 06:08:59 PM UTC 24 Aug 21 06:12:59 PM UTC 24 3914722269 ps
T94 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/4.sram_ctrl_stress_pipeline.3386357136 Aug 21 06:09:51 PM UTC 24 Aug 21 06:13:40 PM UTC 24 6513114783 ps
T170 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/7.sram_ctrl_smoke.2044446298 Aug 21 06:12:57 PM UTC 24 Aug 21 06:13:44 PM UTC 24 481399700 ps
T171 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/7.sram_ctrl_partial_access.920244598 Aug 21 06:13:45 PM UTC 24 Aug 21 06:13:49 PM UTC 24 70238955 ps
T95 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/1.sram_ctrl_partial_access_b2b.2118186701 Aug 21 06:09:02 PM UTC 24 Aug 21 06:13:58 PM UTC 24 30661156287 ps
T96 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/5.sram_ctrl_stress_pipeline.4026855487 Aug 21 06:10:31 PM UTC 24 Aug 21 06:14:30 PM UTC 24 4883641384 ps
T107 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/7.sram_ctrl_lc_escalation.495808530 Aug 21 06:14:31 PM UTC 24 Aug 21 06:14:41 PM UTC 24 898149114 ps
T172 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/7.sram_ctrl_max_throughput.1264918994 Aug 21 06:13:58 PM UTC 24 Aug 21 06:14:42 PM UTC 24 406613369 ps
T173 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/7.sram_ctrl_throughput_w_partial_write.1573995491 Aug 21 06:14:29 PM UTC 24 Aug 21 06:14:46 PM UTC 24 79917474 ps
T97 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/0.sram_ctrl_partial_access_b2b.8814657 Aug 21 06:08:59 PM UTC 24 Aug 21 06:14:48 PM UTC 24 52203870274 ps
T174 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/7.sram_ctrl_ram_cfg.3454290077 Aug 21 06:14:47 PM UTC 24 Aug 21 06:14:49 PM UTC 24 210888520 ps
T47 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/7.sram_ctrl_mem_partial_access.343490594 Aug 21 06:14:50 PM UTC 24 Aug 21 06:14:56 PM UTC 24 589088235 ps
T175 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/7.sram_ctrl_mem_walk.3665103325 Aug 21 06:14:49 PM UTC 24 Aug 21 06:14:57 PM UTC 24 238354572 ps
T176 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/1.sram_ctrl_multiple_keys.3000608062 Aug 21 06:09:02 PM UTC 24 Aug 21 06:15:08 PM UTC 24 10048101108 ps
T177 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/7.sram_ctrl_alert_test.1476039668 Aug 21 06:15:08 PM UTC 24 Aug 21 06:15:10 PM UTC 24 57784481 ps
T148 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/6.sram_ctrl_stress_all.1896973977 Aug 21 06:12:48 PM UTC 24 Aug 21 06:15:18 PM UTC 24 21111035483 ps
T178 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/8.sram_ctrl_smoke.2482817069 Aug 21 06:15:11 PM UTC 24 Aug 21 06:15:19 PM UTC 24 340362587 ps
T129 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/0.sram_ctrl_executable.227651636 Aug 21 06:08:59 PM UTC 24 Aug 21 06:15:19 PM UTC 24 12487695860 ps
T33 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/1.sram_ctrl_access_during_key_req.2566055610 Aug 21 06:09:02 PM UTC 24 Aug 21 06:15:20 PM UTC 24 8910188331 ps
T58 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.2506296245 Aug 21 06:12:44 PM UTC 24 Aug 21 06:15:31 PM UTC 24 7393282331 ps
T179 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/7.sram_ctrl_bijection.78824622 Aug 21 06:13:32 PM UTC 24 Aug 21 06:15:32 PM UTC 24 33661426029 ps
T180 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/5.sram_ctrl_partial_access_b2b.92259159 Aug 21 06:10:32 PM UTC 24 Aug 21 06:15:38 PM UTC 24 3202893377 ps
T130 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/5.sram_ctrl_executable.895013609 Aug 21 06:10:58 PM UTC 24 Aug 21 06:15:52 PM UTC 24 3858147505 ps
T181 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/8.sram_ctrl_throughput_w_partial_write.3620155631 Aug 21 06:15:39 PM UTC 24 Aug 21 06:15:54 PM UTC 24 218233238 ps
T137 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/8.sram_ctrl_multiple_keys.1385469093 Aug 21 06:15:19 PM UTC 24 Aug 21 06:15:58 PM UTC 24 2450784542 ps
T182 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/8.sram_ctrl_lc_escalation.1074046822 Aug 21 06:15:53 PM UTC 24 Aug 21 06:16:02 PM UTC 24 426585656 ps
T133 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/2.sram_ctrl_partial_access_b2b.4083409465 Aug 21 06:09:07 PM UTC 24 Aug 21 06:16:08 PM UTC 24 195099102161 ps
T48 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/7.sram_ctrl_stress_all_with_rand_reset.1969813024 Aug 21 06:14:56 PM UTC 24 Aug 21 06:16:10 PM UTC 24 6349425602 ps
T183 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/3.sram_ctrl_stress_pipeline.2950864439 Aug 21 06:09:23 PM UTC 24 Aug 21 06:16:11 PM UTC 24 14990553417 ps
T184 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/8.sram_ctrl_ram_cfg.2336269610 Aug 21 06:16:09 PM UTC 24 Aug 21 06:16:12 PM UTC 24 45750079 ps
T185 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/8.sram_ctrl_bijection.3093947618 Aug 21 06:15:20 PM UTC 24 Aug 21 06:16:16 PM UTC 24 2436303637 ps
T80 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/8.sram_ctrl_mem_partial_access.2581016175 Aug 21 06:16:12 PM UTC 24 Aug 21 06:16:18 PM UTC 24 233367233 ps
T186 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/8.sram_ctrl_alert_test.1304256759 Aug 21 06:16:19 PM UTC 24 Aug 21 06:16:21 PM UTC 24 25917023 ps
T187 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/8.sram_ctrl_mem_walk.56847811 Aug 21 06:16:10 PM UTC 24 Aug 21 06:16:22 PM UTC 24 640395262 ps
T188 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/6.sram_ctrl_stress_pipeline.3513899292 Aug 21 06:11:38 PM UTC 24 Aug 21 06:16:24 PM UTC 24 12609075184 ps
T189 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/8.sram_ctrl_max_throughput.3110011767 Aug 21 06:15:33 PM UTC 24 Aug 21 06:16:34 PM UTC 24 108084451 ps
T190 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/7.sram_ctrl_stress_pipeline.304699136 Aug 21 06:13:40 PM UTC 24 Aug 21 06:16:38 PM UTC 24 1410040727 ps
T191 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/9.sram_ctrl_partial_access.479247101 Aug 21 06:16:39 PM UTC 24 Aug 21 06:16:43 PM UTC 24 71859016 ps
T192 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/9.sram_ctrl_smoke.3458479766 Aug 21 06:16:22 PM UTC 24 Aug 21 06:16:44 PM UTC 24 1067484580 ps
T193 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/2.sram_ctrl_stress_pipeline.1857206229 Aug 21 06:09:06 PM UTC 24 Aug 21 06:16:46 PM UTC 24 16314037539 ps
T194 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/8.sram_ctrl_partial_access.3787376517 Aug 21 06:15:21 PM UTC 24 Aug 21 06:16:57 PM UTC 24 793579893 ps
T108 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/9.sram_ctrl_lc_escalation.3316894221 Aug 21 06:16:58 PM UTC 24 Aug 21 06:17:08 PM UTC 24 1734161670 ps
T34 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/7.sram_ctrl_access_during_key_req.630159898 Aug 21 06:14:43 PM UTC 24 Aug 21 06:17:12 PM UTC 24 557371431 ps
T35 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/0.sram_ctrl_access_during_key_req.2262013775 Aug 21 06:08:59 PM UTC 24 Aug 21 06:17:17 PM UTC 24 9054055300 ps
T195 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/9.sram_ctrl_bijection.1004718700 Aug 21 06:16:25 PM UTC 24 Aug 21 06:17:29 PM UTC 24 2531228769 ps
T196 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/9.sram_ctrl_ram_cfg.666421660 Aug 21 06:17:29 PM UTC 24 Aug 21 06:17:31 PM UTC 24 48480968 ps
T59 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/0.sram_ctrl_stress_all_with_rand_reset.2292466093 Aug 21 06:08:59 PM UTC 24 Aug 21 06:17:32 PM UTC 24 7782435929 ps
T138 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/4.sram_ctrl_partial_access_b2b.411639062 Aug 21 06:09:53 PM UTC 24 Aug 21 06:17:34 PM UTC 24 54918903611 ps
T197 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/3.sram_ctrl_partial_access_b2b.3720662898 Aug 21 06:09:24 PM UTC 24 Aug 21 06:17:37 PM UTC 24 58630690711 ps
T198 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/9.sram_ctrl_mem_partial_access.11386517 Aug 21 06:17:33 PM UTC 24 Aug 21 06:17:41 PM UTC 24 703348402 ps
T199 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/9.sram_ctrl_mem_walk.4067285311 Aug 21 06:17:33 PM UTC 24 Aug 21 06:17:42 PM UTC 24 2521298681 ps
T200 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/9.sram_ctrl_alert_test.4033860612 Aug 21 06:17:43 PM UTC 24 Aug 21 06:17:45 PM UTC 24 15284165 ps
T201 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/10.sram_ctrl_smoke.3876748787 Aug 21 06:17:43 PM UTC 24 Aug 21 06:17:47 PM UTC 24 164388044 ps
T139 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/6.sram_ctrl_partial_access_b2b.3087028120 Aug 21 06:11:44 PM UTC 24 Aug 21 06:17:50 PM UTC 24 15127626006 ps
T37 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/8.sram_ctrl_regwen.2396566107 Aug 21 06:16:03 PM UTC 24 Aug 21 06:17:54 PM UTC 24 23271993854 ps
T202 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/9.sram_ctrl_max_throughput.3308587043 Aug 21 06:16:45 PM UTC 24 Aug 21 06:18:00 PM UTC 24 467054020 ps
T203 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/10.sram_ctrl_partial_access.2193975098 Aug 21 06:17:55 PM UTC 24 Aug 21 06:18:09 PM UTC 24 1335692996 ps
T204 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/9.sram_ctrl_throughput_w_partial_write.353101749 Aug 21 06:16:47 PM UTC 24 Aug 21 06:18:14 PM UTC 24 190987329 ps
T205 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/10.sram_ctrl_max_throughput.3303354193 Aug 21 06:18:09 PM UTC 24 Aug 21 06:18:17 PM UTC 24 199022796 ps
T206 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/10.sram_ctrl_lc_escalation.641648706 Aug 21 06:18:19 PM UTC 24 Aug 21 06:18:26 PM UTC 24 283887790 ps
T207 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/10.sram_ctrl_bijection.3519446273 Aug 21 06:17:49 PM UTC 24 Aug 21 06:18:27 PM UTC 24 9035533292 ps
T208 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/6.sram_ctrl_multiple_keys.296763830 Aug 21 06:11:17 PM UTC 24 Aug 21 06:18:37 PM UTC 24 14660534898 ps
T209 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/10.sram_ctrl_ram_cfg.4242418832 Aug 21 06:18:38 PM UTC 24 Aug 21 06:18:40 PM UTC 24 73931974 ps
T210 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/10.sram_ctrl_throughput_w_partial_write.3533030452 Aug 21 06:18:15 PM UTC 24 Aug 21 06:18:48 PM UTC 24 190636093 ps
T211 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/10.sram_ctrl_mem_walk.2176030065 Aug 21 06:18:41 PM UTC 24 Aug 21 06:18:56 PM UTC 24 1196930984 ps
T212 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/10.sram_ctrl_mem_partial_access.1870888737 Aug 21 06:18:49 PM UTC 24 Aug 21 06:18:58 PM UTC 24 2287409058 ps
T123 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/1.sram_ctrl_regwen.2621663466 Aug 21 06:09:04 PM UTC 24 Aug 21 06:19:20 PM UTC 24 4181970777 ps
T213 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/10.sram_ctrl_alert_test.868550912 Aug 21 06:19:21 PM UTC 24 Aug 21 06:19:23 PM UTC 24 16744107 ps
T214 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/8.sram_ctrl_partial_access_b2b.1260973853 Aug 21 06:15:32 PM UTC 24 Aug 21 06:19:35 PM UTC 24 7467428052 ps
T215 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/11.sram_ctrl_smoke.1497417359 Aug 21 06:19:24 PM UTC 24 Aug 21 06:19:40 PM UTC 24 88153762 ps
T216 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/11.sram_ctrl_partial_access.1251505976 Aug 21 06:19:47 PM UTC 24 Aug 21 06:19:56 PM UTC 24 981199968 ps
T42 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/10.sram_ctrl_stress_all_with_rand_reset.247510922 Aug 21 06:18:57 PM UTC 24 Aug 21 06:19:45 PM UTC 24 1937352618 ps
T60 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/9.sram_ctrl_stress_all_with_rand_reset.68277437 Aug 21 06:17:35 PM UTC 24 Aug 21 06:19:45 PM UTC 24 1723082955 ps
T217 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/11.sram_ctrl_bijection.1641150137 Aug 21 06:19:40 PM UTC 24 Aug 21 06:20:07 PM UTC 24 2836649957 ps
T124 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/7.sram_ctrl_regwen.3514121436 Aug 21 06:14:46 PM UTC 24 Aug 21 06:20:15 PM UTC 24 12246214915 ps
T218 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/9.sram_ctrl_partial_access_b2b.475151972 Aug 21 06:16:43 PM UTC 24 Aug 21 06:20:18 PM UTC 24 46483907796 ps
T219 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/7.sram_ctrl_multiple_keys.3337607582 Aug 21 06:13:01 PM UTC 24 Aug 21 06:20:19 PM UTC 24 2506174219 ps
T220 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/11.sram_ctrl_max_throughput.1937301229 Aug 21 06:20:08 PM UTC 24 Aug 21 06:20:24 PM UTC 24 700106104 ps
T221 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/11.sram_ctrl_lc_escalation.4058339505 Aug 21 06:20:19 PM UTC 24 Aug 21 06:20:28 PM UTC 24 2380222268 ps
T222 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/8.sram_ctrl_stress_pipeline.2070214023 Aug 21 06:15:21 PM UTC 24 Aug 21 06:20:34 PM UTC 24 3135508306 ps
T223 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/11.sram_ctrl_ram_cfg.3879097743 Aug 21 06:20:34 PM UTC 24 Aug 21 06:20:37 PM UTC 24 45670404 ps
T224 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/11.sram_ctrl_throughput_w_partial_write.1027692526 Aug 21 06:20:16 PM UTC 24 Aug 21 06:20:47 PM UTC 24 243203257 ps
T225 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/11.sram_ctrl_mem_walk.1529826929 Aug 21 06:20:38 PM UTC 24 Aug 21 06:20:47 PM UTC 24 1393554254 ps
T226 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/4.sram_ctrl_access_during_key_req.3856337794 Aug 21 06:10:07 PM UTC 24 Aug 21 06:20:50 PM UTC 24 2793939442 ps
T227 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/9.sram_ctrl_stress_pipeline.1911742578 Aug 21 06:16:35 PM UTC 24 Aug 21 06:20:50 PM UTC 24 8418805900 ps
T228 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/11.sram_ctrl_mem_partial_access.3240941020 Aug 21 06:20:48 PM UTC 24 Aug 21 06:20:53 PM UTC 24 202952094 ps
T229 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/11.sram_ctrl_alert_test.280857812 Aug 21 06:20:51 PM UTC 24 Aug 21 06:20:53 PM UTC 24 66681823 ps
T43 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/11.sram_ctrl_stress_all_with_rand_reset.2052050078 Aug 21 06:20:49 PM UTC 24 Aug 21 06:21:06 PM UTC 24 456935800 ps
T230 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/12.sram_ctrl_smoke.642605154 Aug 21 06:20:54 PM UTC 24 Aug 21 06:21:11 PM UTC 24 216120972 ps
T231 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/10.sram_ctrl_multiple_keys.3660102883 Aug 21 06:17:45 PM UTC 24 Aug 21 06:21:19 PM UTC 24 1195733884 ps
T232 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/11.sram_ctrl_stress_pipeline.393777920 Aug 21 06:19:46 PM UTC 24 Aug 21 06:21:25 PM UTC 24 4147158606 ps
T125 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/1.sram_ctrl_executable.60670548 Aug 21 06:09:04 PM UTC 24 Aug 21 06:21:53 PM UTC 24 44883821445 ps
T233 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/2.sram_ctrl_multiple_keys.914872020 Aug 21 06:09:06 PM UTC 24 Aug 21 06:21:54 PM UTC 24 18175497347 ps
T234 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/12.sram_ctrl_max_throughput.3436522641 Aug 21 06:21:54 PM UTC 24 Aug 21 06:22:01 PM UTC 24 176574292 ps
T235 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/12.sram_ctrl_bijection.1464704012 Aug 21 06:21:06 PM UTC 24 Aug 21 06:22:03 PM UTC 24 924578339 ps
T236 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/12.sram_ctrl_lc_escalation.2080352250 Aug 21 06:22:02 PM UTC 24 Aug 21 06:22:09 PM UTC 24 985865995 ps
T237 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/12.sram_ctrl_partial_access.3825774804 Aug 21 06:21:19 PM UTC 24 Aug 21 06:22:18 PM UTC 24 5155915204 ps
T126 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/9.sram_ctrl_executable.385386166 Aug 21 06:17:14 PM UTC 24 Aug 21 06:22:40 PM UTC 24 3593290367 ps
T238 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/8.sram_ctrl_access_during_key_req.1084432077 Aug 21 06:15:55 PM UTC 24 Aug 21 06:22:41 PM UTC 24 7180166225 ps
T239 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/12.sram_ctrl_ram_cfg.3180583815 Aug 21 06:22:40 PM UTC 24 Aug 21 06:22:42 PM UTC 24 39856158 ps
T131 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/6.sram_ctrl_regwen.4130331421 Aug 21 06:12:22 PM UTC 24 Aug 21 06:22:44 PM UTC 24 10434242045 ps
T240 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/12.sram_ctrl_mem_partial_access.453438327 Aug 21 06:22:43 PM UTC 24 Aug 21 06:22:48 PM UTC 24 115365578 ps
T241 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/12.sram_ctrl_mem_walk.1885307215 Aug 21 06:22:41 PM UTC 24 Aug 21 06:22:50 PM UTC 24 232778281 ps
T242 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/12.sram_ctrl_alert_test.2068399800 Aug 21 06:22:51 PM UTC 24 Aug 21 06:22:52 PM UTC 24 22636279 ps
T132 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/8.sram_ctrl_stress_all_with_rand_reset.2031411853 Aug 21 06:16:13 PM UTC 24 Aug 21 06:22:55 PM UTC 24 4697515197 ps
T243 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/13.sram_ctrl_smoke.3621902864 Aug 21 06:22:54 PM UTC 24 Aug 21 06:22:58 PM UTC 24 42805722 ps
T244 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/12.sram_ctrl_throughput_w_partial_write.1586684773 Aug 21 06:21:55 PM UTC 24 Aug 21 06:23:06 PM UTC 24 1138261792 ps
T245 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/11.sram_ctrl_executable.2751593658 Aug 21 06:20:24 PM UTC 24 Aug 21 06:23:08 PM UTC 24 4494731697 ps
T246 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/7.sram_ctrl_partial_access_b2b.2879749427 Aug 21 06:13:49 PM UTC 24 Aug 21 06:23:13 PM UTC 24 76912027071 ps
T247 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/3.sram_ctrl_multiple_keys.852222419 Aug 21 06:09:21 PM UTC 24 Aug 21 06:23:19 PM UTC 24 52416731658 ps
T248 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/13.sram_ctrl_partial_access.1390081026 Aug 21 06:23:06 PM UTC 24 Aug 21 06:23:20 PM UTC 24 164724513 ps
T249 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/5.sram_ctrl_multiple_keys.1020163535 Aug 21 06:10:29 PM UTC 24 Aug 21 06:23:24 PM UTC 24 58133279656 ps
T250 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/13.sram_ctrl_lc_escalation.3257610035 Aug 21 06:23:21 PM UTC 24 Aug 21 06:23:27 PM UTC 24 530011124 ps
T251 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/4.sram_ctrl_regwen.2303042009 Aug 21 06:10:16 PM UTC 24 Aug 21 06:23:35 PM UTC 24 19310514483 ps
T252 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/13.sram_ctrl_throughput_w_partial_write.2824933090 Aug 21 06:23:19 PM UTC 24 Aug 21 06:23:40 PM UTC 24 521288934 ps
T253 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/13.sram_ctrl_ram_cfg.2791445231 Aug 21 06:23:41 PM UTC 24 Aug 21 06:23:43 PM UTC 24 44608121 ps
T254 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/11.sram_ctrl_partial_access_b2b.3773088313 Aug 21 06:19:57 PM UTC 24 Aug 21 06:23:48 PM UTC 24 2483148813 ps
T255 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/13.sram_ctrl_mem_walk.2935264926 Aug 21 06:23:44 PM UTC 24 Aug 21 06:23:52 PM UTC 24 97522823 ps
T127 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/6.sram_ctrl_executable.68780403 Aug 21 06:12:08 PM UTC 24 Aug 21 06:23:52 PM UTC 24 19079347971 ps
T256 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/13.sram_ctrl_mem_partial_access.1508936262 Aug 21 06:23:49 PM UTC 24 Aug 21 06:23:55 PM UTC 24 101285977 ps
T257 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/13.sram_ctrl_max_throughput.2194912114 Aug 21 06:23:13 PM UTC 24 Aug 21 06:23:55 PM UTC 24 165985541 ps
T258 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/13.sram_ctrl_alert_test.404127707 Aug 21 06:23:56 PM UTC 24 Aug 21 06:23:58 PM UTC 24 14668031 ps
T259 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/13.sram_ctrl_bijection.3717727988 Aug 21 06:22:59 PM UTC 24 Aug 21 06:24:20 PM UTC 24 2078769730 ps
T260 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/7.sram_ctrl_stress_all.2096263375 Aug 21 06:14:57 PM UTC 24 Aug 21 06:24:35 PM UTC 24 37871370898 ps
T101 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/13.sram_ctrl_stress_all_with_rand_reset.479670470 Aug 21 06:23:52 PM UTC 24 Aug 21 06:24:42 PM UTC 24 2770318568 ps
T261 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/14.sram_ctrl_bijection.425132302 Aug 21 06:24:21 PM UTC 24 Aug 21 06:24:47 PM UTC 24 4568817335 ps
T262 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/14.sram_ctrl_smoke.1298084442 Aug 21 06:23:56 PM UTC 24 Aug 21 06:24:48 PM UTC 24 143163134 ps
T263 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/12.sram_ctrl_access_during_key_req.4130861066 Aug 21 06:22:04 PM UTC 24 Aug 21 06:25:03 PM UTC 24 5658541566 ps
T264 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/14.sram_ctrl_throughput_w_partial_write.2097279653 Aug 21 06:25:04 PM UTC 24 Aug 21 06:25:08 PM UTC 24 154427910 ps
T128 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/2.sram_ctrl_regwen.3893495945 Aug 21 06:09:11 PM UTC 24 Aug 21 06:25:09 PM UTC 24 13614821780 ps
T265 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/5.sram_ctrl_regwen.2794469359 Aug 21 06:11:00 PM UTC 24 Aug 21 06:25:15 PM UTC 24 84170616728 ps
T266 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/14.sram_ctrl_lc_escalation.1458623719 Aug 21 06:25:09 PM UTC 24 Aug 21 06:25:20 PM UTC 24 1478086315 ps
T267 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/14.sram_ctrl_partial_access.2898055926 Aug 21 06:24:43 PM UTC 24 Aug 21 06:25:24 PM UTC 24 1960260953 ps
T268 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/14.sram_ctrl_ram_cfg.2258102181 Aug 21 06:25:22 PM UTC 24 Aug 21 06:25:24 PM UTC 24 32193940 ps
T269 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/10.sram_ctrl_partial_access_b2b.592989160 Aug 21 06:18:01 PM UTC 24 Aug 21 06:25:29 PM UTC 24 40173084505 ps
T270 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/14.sram_ctrl_mem_partial_access.1782666800 Aug 21 06:25:25 PM UTC 24 Aug 21 06:25:31 PM UTC 24 62471009 ps
T271 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/14.sram_ctrl_mem_walk.2177379184 Aug 21 06:25:24 PM UTC 24 Aug 21 06:25:35 PM UTC 24 562501930 ps
T272 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/14.sram_ctrl_alert_test.1979420032 Aug 21 06:25:36 PM UTC 24 Aug 21 06:25:38 PM UTC 24 34303604 ps
T273 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/0.sram_ctrl_multiple_keys.1491934447 Aug 21 06:08:57 PM UTC 24 Aug 21 06:25:54 PM UTC 24 2832421673 ps
T274 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/14.sram_ctrl_max_throughput.153382241 Aug 21 06:24:49 PM UTC 24 Aug 21 06:25:56 PM UTC 24 117315072 ps
T275 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/10.sram_ctrl_stress_pipeline.1367765124 Aug 21 06:17:51 PM UTC 24 Aug 21 06:25:57 PM UTC 24 53937743348 ps
T276 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/15.sram_ctrl_smoke.909535635 Aug 21 06:25:39 PM UTC 24 Aug 21 06:26:07 PM UTC 24 191855212 ps
T277 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/15.sram_ctrl_partial_access.4064849672 Aug 21 06:26:08 PM UTC 24 Aug 21 06:26:12 PM UTC 24 190455144 ps
T278 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/12.sram_ctrl_regwen.3896408420 Aug 21 06:22:18 PM UTC 24 Aug 21 06:26:15 PM UTC 24 24818708444 ps
T279 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/15.sram_ctrl_max_throughput.738606121 Aug 21 06:26:13 PM UTC 24 Aug 21 06:26:16 PM UTC 24 130893439 ps
T280 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/4.sram_ctrl_executable.1874407712 Aug 21 06:10:15 PM UTC 24 Aug 21 06:26:22 PM UTC 24 7167039318 ps
T281 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/15.sram_ctrl_lc_escalation.551063145 Aug 21 06:26:16 PM UTC 24 Aug 21 06:26:24 PM UTC 24 333346429 ps
T282 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/15.sram_ctrl_bijection.2547950609 Aug 21 06:25:57 PM UTC 24 Aug 21 06:26:25 PM UTC 24 386845072 ps
T283 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/12.sram_ctrl_partial_access_b2b.1935384518 Aug 21 06:21:26 PM UTC 24 Aug 21 06:26:26 PM UTC 24 92429436235 ps
T284 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/12.sram_ctrl_stress_pipeline.1379327760 Aug 21 06:21:12 PM UTC 24 Aug 21 06:26:27 PM UTC 24 2734259176 ps
T285 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/15.sram_ctrl_ram_cfg.4083784401 Aug 21 06:26:26 PM UTC 24 Aug 21 06:26:28 PM UTC 24 83405828 ps
T286 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/11.sram_ctrl_access_during_key_req.3006934304 Aug 21 06:20:19 PM UTC 24 Aug 21 06:26:29 PM UTC 24 5962236578 ps
T287 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/12.sram_ctrl_executable.2575344680 Aug 21 06:22:10 PM UTC 24 Aug 21 06:26:31 PM UTC 24 9635429886 ps
T288 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/15.sram_ctrl_alert_test.4116374941 Aug 21 06:26:32 PM UTC 24 Aug 21 06:26:33 PM UTC 24 11275610 ps
T289 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/15.sram_ctrl_mem_partial_access.1354605733 Aug 21 06:26:27 PM UTC 24 Aug 21 06:26:35 PM UTC 24 157284052 ps
T290 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/15.sram_ctrl_mem_walk.4082793807 Aug 21 06:26:26 PM UTC 24 Aug 21 06:26:36 PM UTC 24 1209736496 ps
T291 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/15.sram_ctrl_throughput_w_partial_write.2194784414 Aug 21 06:26:14 PM UTC 24 Aug 21 06:26:50 PM UTC 24 438843405 ps
T292 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/6.sram_ctrl_access_during_key_req.3273129101 Aug 21 06:12:07 PM UTC 24 Aug 21 06:27:00 PM UTC 24 6913752659 ps
T293 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/13.sram_ctrl_partial_access_b2b.67991471 Aug 21 06:23:08 PM UTC 24 Aug 21 06:27:01 PM UTC 24 32280733916 ps
T294 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/16.sram_ctrl_smoke.3082817693 Aug 21 06:26:34 PM UTC 24 Aug 21 06:27:02 PM UTC 24 4186838111 ps
T295 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/3.sram_ctrl_access_during_key_req.1707307827 Aug 21 06:09:35 PM UTC 24 Aug 21 06:27:07 PM UTC 24 5122318687 ps
T296 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/16.sram_ctrl_bijection.3477449396 Aug 21 06:26:36 PM UTC 24 Aug 21 06:27:12 PM UTC 24 21692415115 ps
T297 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/16.sram_ctrl_lc_escalation.1119026634 Aug 21 06:27:13 PM UTC 24 Aug 21 06:27:19 PM UTC 24 317765042 ps
T298 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/12.sram_ctrl_stress_all_with_rand_reset.3306513746 Aug 21 06:22:45 PM UTC 24 Aug 21 06:27:26 PM UTC 24 6217181644 ps
T299 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/16.sram_ctrl_ram_cfg.1525620853 Aug 21 06:27:27 PM UTC 24 Aug 21 06:27:29 PM UTC 24 45598279 ps
T300 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/16.sram_ctrl_throughput_w_partial_write.3786967920 Aug 21 06:27:09 PM UTC 24 Aug 21 06:27:33 PM UTC 24 98949711 ps
T301 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/sram_ctrl_ret-sim-vcs/coverage/default/16.sram_ctrl_mem_walk.2672927504 Aug 21 06:27:30 PM UTC 24 Aug 21 06:27:39 PM UTC 24 179263429 ps
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