Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	14355773	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

61437935

1

T1

655

T2

50185

T4

46

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	37794344	1			T1	371		T2	27445		T4	25
values[0x0]	17564350	1			T1	182		T2	13331		T4	13
values[0x1]	20435014	1			T1	171		T2	14336		T4	18

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	7155282	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

68638426

1

T1

685

T2

52637

T4

52

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	357835	1			T2	199		T11	12		T5	2
valid_sources[0x01]	319047	1			T2	221		T11	17		T5	2
valid_sources[0x02]	291207	1			T2	201		T11	22		T5	7
valid_sources[0x03]	313944	1			T2	192		T11	26		T5	3
valid_sources[0x04]	283032	1			T2	229		T11	29		T5	3
valid_sources[0x05]	343502	1			T2	231		T11	29		T5	1
valid_sources[0x06]	289690	1			T2	188		T11	28		T5	5
valid_sources[0x07]	278396	1			T2	228		T11	34		T5	8
valid_sources[0x08]	291712	1			T2	228		T11	16		T5	4
valid_sources[0x09]	315865	1			T2	213		T11	29		T5	4
valid_sources[0x0a]	304766	1			T2	237		T11	25		T5	11
valid_sources[0x0b]	273894	1			T2	188		T11	28		T5	4
valid_sources[0x0c]	263083	1			T1	5		T2	223		T11	26
valid_sources[0x0d]	277457	1			T2	222		T11	16		T5	2
valid_sources[0x0e]	355392	1			T2	214		T11	25		T5	2
valid_sources[0x0f]	379632	1			T2	210		T11	19		T5	4
valid_sources[0x10]	264906	1			T2	228		T11	30		T5	3
valid_sources[0x11]	282583	1			T2	206		T11	14		T5	1
valid_sources[0x12]	264131	1			T2	187		T11	29		T5	4
valid_sources[0x13]	309247	1			T2	213		T11	32		T5	3
valid_sources[0x14]	263154	1			T2	190		T11	23		T5	2
valid_sources[0x15]	290323	1			T2	192		T11	35		T5	7
valid_sources[0x16]	269302	1			T2	236		T11	39		T5	3
valid_sources[0x17]	282211	1			T2	234		T11	17		T5	3
valid_sources[0x18]	329262	1			T2	225		T11	27		T5	6
valid_sources[0x19]	275833	1			T2	220		T11	5		T5	4
valid_sources[0x1a]	284012	1			T2	215		T11	18		T5	2
valid_sources[0x1b]	329336	1			T2	213		T11	25		T5	4
valid_sources[0x1c]	259414	1			T2	238		T11	19		T5	5
valid_sources[0x1d]	303350	1			T2	223		T11	17		T26	7
valid_sources[0x1e]	373246	1			T2	188		T11	38		T5	5
valid_sources[0x1f]	294433	1			T2	238		T11	21		T5	7
valid_sources[0x20]	269836	1			T2	225		T11	19		T5	8
valid_sources[0x21]	299038	1			T2	228		T11	17		T5	6
valid_sources[0x22]	288297	1			T2	222		T11	20		T5	2
valid_sources[0x23]	274783	1			T2	229		T11	18		T5	1
valid_sources[0x24]	286677	1			T2	211		T11	25		T5	3
valid_sources[0x25]	297604	1			T2	239		T11	32		T5	4
valid_sources[0x26]	301661	1			T2	206		T11	28		T5	2
valid_sources[0x27]	302186	1			T2	238		T11	35		T5	12
valid_sources[0x28]	312384	1			T2	212		T11	27		T5	5
valid_sources[0x29]	292006	1			T2	178		T11	18		T5	5
valid_sources[0x2a]	308354	1			T2	199		T11	17		T5	4
valid_sources[0x2b]	279978	1			T1	42		T2	193		T11	10
valid_sources[0x2c]	318705	1			T2	210		T11	17		T5	9
valid_sources[0x2d]	266821	1			T2	205		T11	29		T5	1
valid_sources[0x2e]	293242	1			T2	206		T11	24		T5	1
valid_sources[0x2f]	261711	1			T2	224		T11	20		T5	11
valid_sources[0x30]	271652	1			T2	202		T11	26		T26	7
valid_sources[0x31]	372982	1			T2	203		T11	36		T5	4
valid_sources[0x32]	311971	1			T2	186		T11	19		T5	3
valid_sources[0x33]	371913	1			T2	193		T11	25		T5	7
valid_sources[0x34]	267980	1			T2	180		T11	26		T5	2
valid_sources[0x35]	289387	1			T2	243		T11	22		T5	5
valid_sources[0x36]	309530	1			T2	230		T11	33		T5	2
valid_sources[0x37]	283949	1			T2	236		T11	19		T5	7
valid_sources[0x38]	322896	1			T2	222		T11	19		T5	6
valid_sources[0x39]	282997	1			T2	211		T11	27		T5	2
valid_sources[0x3a]	276972	1			T2	223		T11	21		T5	7
valid_sources[0x3b]	260591	1			T2	230		T11	36		T5	3
valid_sources[0x3c]	261550	1			T2	202		T11	12		T5	4
valid_sources[0x3d]	308659	1			T2	232		T11	17		T5	2
valid_sources[0x3e]	277390	1			T2	199		T11	19		T5	5
valid_sources[0x3f]	264213	1			T1	35		T2	223		T11	35
valid_sources[0x40]	323045	1			T2	216		T11	18		T5	4
valid_sources[0x41]	296266	1			T2	242		T11	24		T5	4
valid_sources[0x42]	254157	1			T2	207		T11	21		T5	3
valid_sources[0x43]	269125	1			T2	215		T11	26		T5	3
valid_sources[0x44]	301434	1			T2	208		T11	19		T5	2
valid_sources[0x45]	346334	1			T2	234		T11	19		T5	2
valid_sources[0x46]	268307	1			T2	203		T11	22		T5	5
valid_sources[0x47]	291538	1			T2	226		T11	15		T5	3
valid_sources[0x48]	269081	1			T2	237		T11	26		T5	3
valid_sources[0x49]	301607	1			T2	226		T11	21		T5	1
valid_sources[0x4a]	260971	1			T2	238		T11	34		T5	2
valid_sources[0x4b]	343821	1			T2	221		T11	44		T5	8
valid_sources[0x4c]	258870	1			T2	205		T11	21		T5	2
valid_sources[0x4d]	312205	1			T2	226		T11	34		T5	2
valid_sources[0x4e]	265162	1			T2	208		T11	22		T5	1
valid_sources[0x4f]	265156	1			T2	211		T11	26		T5	4
valid_sources[0x50]	298692	1			T2	235		T11	30		T5	1
valid_sources[0x51]	278661	1			T2	220		T11	34		T5	1
valid_sources[0x52]	285452	1			T2	214		T11	31		T5	2
valid_sources[0x53]	266539	1			T2	228		T11	29		T5	3
valid_sources[0x54]	264283	1			T2	253		T11	28		T5	5
valid_sources[0x55]	262267	1			T1	44		T2	209		T11	24
valid_sources[0x56]	278648	1			T2	215		T11	26		T5	5
valid_sources[0x57]	379911	1			T2	221		T11	26		T5	3
valid_sources[0x58]	311702	1			T2	210		T11	27		T5	3
valid_sources[0x59]	260069	1			T2	216		T11	31		T5	2
valid_sources[0x5a]	357468	1			T2	213		T11	24		T5	8
valid_sources[0x5b]	327531	1			T2	202		T11	47		T5	2
valid_sources[0x5c]	311327	1			T2	208		T11	36		T5	1
valid_sources[0x5d]	257043	1			T2	229		T11	22		T5	5
valid_sources[0x5e]	274659	1			T2	195		T11	23		T5	6
valid_sources[0x5f]	282745	1			T2	207		T11	26		T5	7
valid_sources[0x60]	271678	1			T2	239		T11	36		T5	2
valid_sources[0x61]	304503	1			T2	222		T11	19		T5	5
valid_sources[0x62]	310543	1			T2	198		T11	23		T5	1
valid_sources[0x63]	327747	1			T2	224		T11	17		T5	2
valid_sources[0x64]	352365	1			T2	208		T11	35		T5	3
valid_sources[0x65]	319973	1			T2	206		T11	16		T5	4
valid_sources[0x66]	263342	1			T1	32		T2	236		T11	31
valid_sources[0x67]	264108	1			T2	217		T11	12		T5	2
valid_sources[0x68]	304631	1			T2	227		T11	32		T5	1
valid_sources[0x69]	308907	1			T2	188		T11	21		T5	2
valid_sources[0x6a]	307383	1			T2	223		T11	27		T5	5
valid_sources[0x6b]	279732	1			T2	229		T11	24		T5	7
valid_sources[0x6c]	263199	1			T2	237		T11	18		T5	2
valid_sources[0x6d]	268377	1			T2	195		T11	19		T5	5
valid_sources[0x6e]	292278	1			T2	227		T11	27		T5	3
valid_sources[0x6f]	262765	1			T1	25		T2	232		T11	24
valid_sources[0x70]	312272	1			T2	226		T11	29		T5	3
valid_sources[0x71]	257935	1			T2	192		T11	31		T5	5
valid_sources[0x72]	368007	1			T2	214		T11	34		T5	4
valid_sources[0x73]	277288	1			T2	237		T11	35		T5	4
valid_sources[0x74]	286289	1			T2	212		T11	24		T5	1
valid_sources[0x75]	276831	1			T2	212		T11	28		T5	4
valid_sources[0x76]	292081	1			T2	218		T11	18		T5	3
valid_sources[0x77]	301545	1			T2	255		T11	52		T5	3
valid_sources[0x78]	294355	1			T1	136		T2	223		T11	27
valid_sources[0x79]	253657	1			T2	212		T11	34		T5	3
valid_sources[0x7a]	362248	1			T2	233		T11	17		T5	8
valid_sources[0x7b]	379404	1			T2	210		T11	32		T5	6
valid_sources[0x7c]	282330	1			T2	215		T11	29		T5	3
valid_sources[0x7d]	356525	1			T2	187		T11	27		T5	5
valid_sources[0x7e]	313806	1			T2	198		T11	36		T5	3
valid_sources[0x7f]	265098	1			T2	230		T11	14		T5	7
valid_sources[0x80]	280295	1			T2	196		T11	30		T5	3

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

30622080

1

T1

335

T2

24985

T4

19

values[0x0]

all_enables

biggest_size

15409276

1

T1

168

T2

12549

T4

12

values[0x1]

all_enables

biggest_size

15406579

1

T1

152

T2

12651

T4

15

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	39176	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

133084

1

T1

5

T2

2

T3

1

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	51070	1			T1	7		T5	80		T6	80
values[0x0]	58599	1			T1	5		T2	3		T3	1
values[0x1]	62591	1			T1	3		T2	3		T9	6

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	30075	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

142185

1

T1

7

T2

2

T3

1

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	838	1			T40	1		T20	4		T21	10
valid_sources[0x01]	784	1			T1	5		T16	1		T8	1
valid_sources[0x02]	617	1			T21	11		T35	11		T43	11
valid_sources[0x03]	667	1			T5	1		T21	13		T163	1
valid_sources[0x04]	615	1			T33	3		T21	16		T18	1
valid_sources[0x05]	628	1			T20	2		T21	7		T35	4
valid_sources[0x06]	742	1			T16	1		T50	1		T21	8
valid_sources[0x07]	666	1			T7	1		T21	17		T164	1
valid_sources[0x08]	615	1			T21	10		T35	8		T43	7
valid_sources[0x09]	494	1			T7	1		T27	1		T21	11
valid_sources[0x0a]	806	1			T1	2		T25	1		T21	18
valid_sources[0x0b]	774	1			T5	1		T119	21		T21	17
valid_sources[0x0c]	681	1			T5	1		T19	1		T21	16
valid_sources[0x0d]	573	1			T15	1		T21	23		T79	2
valid_sources[0x0e]	647	1			T50	1		T25	2		T21	22
valid_sources[0x0f]	430	1			T7	1		T21	19		T22	1
valid_sources[0x10]	624	1			T5	1		T12	1		T20	1
valid_sources[0x11]	1073	1			T50	1		T120	1		T21	18
valid_sources[0x12]	454	1			T21	16		T35	11		T43	8
valid_sources[0x13]	555	1			T20	4		T21	19		T35	15
valid_sources[0x14]	1085	1			T39	2		T21	7		T163	2
valid_sources[0x15]	1141	1			T21	13		T79	1		T35	1
valid_sources[0x16]	948	1			T2	1		T20	2		T21	24
valid_sources[0x17]	587	1			T16	3		T21	15		T18	1
valid_sources[0x18]	575	1			T25	3		T21	29		T18	1
valid_sources[0x19]	497	1			T5	1		T21	17		T163	1
valid_sources[0x1a]	1014	1			T20	3		T120	1		T21	15
valid_sources[0x1b]	561	1			T21	22		T35	7		T47	11
valid_sources[0x1c]	518	1			T1	3		T16	1		T21	11
valid_sources[0x1d]	853	1			T26	1		T20	137		T21	6
valid_sources[0x1e]	573	1			T5	1		T19	2		T25	1
valid_sources[0x1f]	452	1			T50	1		T21	12		T35	5
valid_sources[0x20]	561	1			T19	1		T20	2		T120	1
valid_sources[0x21]	680	1			T1	1		T20	106		T21	9
valid_sources[0x22]	583	1			T16	1		T20	3		T21	13
valid_sources[0x23]	815	1			T7	1		T20	184		T115	2
valid_sources[0x24]	714	1			T50	1		T20	3		T21	13
valid_sources[0x25]	561	1			T7	1		T16	1		T21	17
valid_sources[0x26]	497	1			T7	2		T8	2		T21	16
valid_sources[0x27]	541	1			T5	1		T40	2		T20	91
valid_sources[0x28]	750	1			T5	1		T12	1		T21	12
valid_sources[0x29]	543	1			T7	1		T27	1		T21	13
valid_sources[0x2a]	672	1			T21	17		T35	9		T47	23
valid_sources[0x2b]	640	1			T21	6		T165	1		T35	4
valid_sources[0x2c]	723	1			T150	2		T20	129		T21	13
valid_sources[0x2d]	446	1			T5	1		T21	11		T35	4
valid_sources[0x2e]	661	1			T5	1		T50	1		T20	1
valid_sources[0x2f]	550	1			T5	1		T20	3		T21	18
valid_sources[0x30]	1021	1			T159	2		T50	1		T21	18
valid_sources[0x31]	543	1			T20	2		T21	20		T163	1
valid_sources[0x32]	677	1			T5	1		T20	24		T21	9
valid_sources[0x33]	773	1			T5	1		T7	1		T21	21
valid_sources[0x34]	583	1			T19	1		T115	1		T21	10
valid_sources[0x35]	793	1			T32	2		T20	1		T114	20
valid_sources[0x36]	1045	1			T7	2		T21	11		T35	15
valid_sources[0x37]	498	1			T20	1		T21	17		T163	1
valid_sources[0x38]	757	1			T20	4		T21	14		T18	2
valid_sources[0x39]	876	1			T5	2		T20	159		T115	1
valid_sources[0x3a]	539	1			T5	1		T20	3		T21	13
valid_sources[0x3b]	686	1			T21	16		T35	9		T80	1
valid_sources[0x3c]	511	1			T4	2		T32	1		T50	1
valid_sources[0x3d]	446	1			T19	1		T21	12		T35	8
valid_sources[0x3e]	559	1			T50	1		T21	11		T79	1
valid_sources[0x3f]	745	1			T5	3		T8	4		T50	1
valid_sources[0x40]	736	1			T32	5		T21	16		T163	1
valid_sources[0x41]	543	1			T32	1		T50	1		T21	12
valid_sources[0x42]	536	1			T50	1		T20	2		T21	9
valid_sources[0x43]	882	1			T166	2		T50	1		T20	3
valid_sources[0x44]	799	1			T5	1		T12	1		T50	1
valid_sources[0x45]	616	1			T20	2		T21	9		T35	6
valid_sources[0x46]	740	1			T21	22		T35	5		T43	4
valid_sources[0x47]	598	1			T7	2		T8	2		T50	1
valid_sources[0x48]	657	1			T21	20		T35	7		T43	9
valid_sources[0x49]	664	1			T19	1		T20	5		T21	12
valid_sources[0x4a]	556	1			T5	1		T20	1		T21	11
valid_sources[0x4b]	670	1			T7	2		T21	9		T35	10
valid_sources[0x4c]	612	1			T7	3		T50	1		T20	3
valid_sources[0x4d]	748	1			T5	1		T115	1		T21	16
valid_sources[0x4e]	744	1			T5	1		T16	91		T50	1
valid_sources[0x4f]	921	1			T16	134		T50	1		T21	17
valid_sources[0x50]	658	1			T7	2		T50	2		T20	99
valid_sources[0x51]	639	1			T19	1		T20	2		T21	14
valid_sources[0x52]	625	1			T9	1		T20	113		T120	1
valid_sources[0x53]	558	1			T5	1		T7	1		T50	1
valid_sources[0x54]	875	1			T50	1		T19	1		T25	1
valid_sources[0x55]	854	1			T7	1		T50	1		T21	17
valid_sources[0x56]	880	1			T21	19		T163	1		T167	1
valid_sources[0x57]	616	1			T5	1		T115	1		T21	6
valid_sources[0x58]	601	1			T6	80		T50	1		T20	5
valid_sources[0x59]	582	1			T21	18		T35	6		T47	5
valid_sources[0x5a]	737	1			T19	1		T21	17		T35	5
valid_sources[0x5b]	521	1			T50	1		T20	2		T25	1
valid_sources[0x5c]	583	1			T50	1		T20	1		T21	17
valid_sources[0x5d]	559	1			T5	1		T21	18		T18	1
valid_sources[0x5e]	506	1			T12	1		T21	21		T22	1
valid_sources[0x5f]	763	1			T15	5		T25	1		T21	21
valid_sources[0x60]	512	1			T21	17		T35	9		T47	14
valid_sources[0x61]	487	1			T32	1		T21	6		T168	1
valid_sources[0x62]	720	1			T50	1		T21	31		T35	9
valid_sources[0x63]	781	1			T7	3		T20	1		T21	19
valid_sources[0x64]	854	1			T5	1		T116	1		T25	1
valid_sources[0x65]	599	1			T19	1		T25	1		T21	7
valid_sources[0x66]	577	1			T21	19		T167	1		T35	8
valid_sources[0x67]	818	1			T20	4		T21	22		T35	1
valid_sources[0x68]	675	1			T5	1		T20	2		T21	6
valid_sources[0x69]	561	1			T20	88		T21	10		T163	1
valid_sources[0x6a]	493	1			T16	3		T50	1		T21	14
valid_sources[0x6b]	524	1			T21	16		T168	1		T35	4
valid_sources[0x6c]	893	1			T7	1		T19	1		T21	16
valid_sources[0x6d]	495	1			T19	1		T20	1		T117	1
valid_sources[0x6e]	796	1			T7	2		T20	1		T21	11
valid_sources[0x6f]	702	1			T5	2		T20	5		T21	14
valid_sources[0x70]	406	1			T19	1		T21	11		T35	5
valid_sources[0x71]	514	1			T21	6		T169	2		T163	1
valid_sources[0x72]	529	1			T19	1		T20	1		T21	8
valid_sources[0x73]	654	1			T9	2		T26	1		T7	1
valid_sources[0x74]	513	1			T27	1		T20	1		T21	17
valid_sources[0x75]	824	1			T20	128		T25	1		T21	11
valid_sources[0x76]	586	1			T7	1		T50	1		T20	1
valid_sources[0x77]	641	1			T20	1		T21	13		T22	1
valid_sources[0x78]	783	1			T152	1		T20	2		T21	12
valid_sources[0x79]	519	1			T7	1		T21	19		T35	4
valid_sources[0x7a]	842	1			T5	1		T39	2		T50	1
valid_sources[0x7b]	1027	1			T9	3		T5	1		T19	1
valid_sources[0x7c]	526	1			T7	5		T20	22		T21	14
valid_sources[0x7d]	676	1			T19	1		T20	1		T21	9
valid_sources[0x7e]	1025	1			T20	3		T21	14		T168	1
valid_sources[0x7f]	838	1			T170	2		T21	21		T35	13
valid_sources[0x80]	803	1			T24	40		T21	17		T35	4

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

37152

1

T1

2

T7

13

T16

202

values[0x0]

all_enables

biggest_size

49226

1

T1

2

T2

1

T3

1

values[0x1]

all_enables

biggest_size

46706

1

T1

1

T2

1

T9

1