Summary for Variable cp_intr
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_intr
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
all_values[0] |
6201 |
1 |
|
|
T6 |
2 |
|
T22 |
5 |
|
T23 |
2 |
Summary for Variable cp_intr_en
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_intr_en
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
4192 |
1 |
|
|
T6 |
2 |
|
T22 |
1 |
|
T23 |
2 |
auto[1] |
2009 |
1 |
|
|
T22 |
4 |
|
T37 |
3 |
|
T38 |
8 |
Summary for Variable cp_intr_state
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_intr_state
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
3140 |
1 |
|
|
T6 |
1 |
|
T22 |
2 |
|
T253 |
1 |
auto[1] |
3061 |
1 |
|
|
T6 |
1 |
|
T22 |
3 |
|
T23 |
2 |
Summary for Cross intr_cg_cc
Samples crossed: cp_intr cp_intr_en cp_intr_state
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for intr_cg_cc
Bins
cp_intr | cp_intr_en | cp_intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
all_values[0] |
auto[0] |
auto[0] |
2113 |
1 |
|
|
T6 |
1 |
|
T253 |
1 |
|
T37 |
2 |
all_values[0] |
auto[0] |
auto[1] |
2079 |
1 |
|
|
T6 |
1 |
|
T22 |
1 |
|
T23 |
2 |
all_values[0] |
auto[1] |
auto[0] |
1027 |
1 |
|
|
T22 |
2 |
|
T37 |
2 |
|
T38 |
3 |
all_values[0] |
auto[1] |
auto[1] |
982 |
1 |
|
|
T22 |
2 |
|
T37 |
1 |
|
T38 |
5 |