| T183 |
/workspace/coverage/default/6.sysrst_ctrl_auto_blk_key_output.1234022830 |
|
|
Jan 03 01:25:23 PM PST 24 |
Jan 03 01:25:49 PM PST 24 |
3193229484 ps |
| T184 |
/workspace/coverage/default/9.sysrst_ctrl_smoke.4083939111 |
|
|
Jan 03 01:25:24 PM PST 24 |
Jan 03 01:25:48 PM PST 24 |
2128307982 ps |
| T185 |
/workspace/coverage/default/13.sysrst_ctrl_pin_access_test.2462818015 |
|
|
Jan 03 01:25:31 PM PST 24 |
Jan 03 01:25:57 PM PST 24 |
2058514524 ps |
| T186 |
/workspace/coverage/default/73.sysrst_ctrl_combo_detect_with_pre_cond.2598744777 |
|
|
Jan 03 01:28:04 PM PST 24 |
Jan 03 01:30:47 PM PST 24 |
53395898857 ps |
| T67 |
/workspace/coverage/default/18.sysrst_ctrl_combo_detect_with_pre_cond.3864778174 |
|
|
Jan 03 01:26:45 PM PST 24 |
Jan 03 01:33:59 PM PST 24 |
177650162319 ps |
| T313 |
/workspace/coverage/default/37.sysrst_ctrl_combo_detect_with_pre_cond.4153671827 |
|
|
Jan 03 01:26:52 PM PST 24 |
Jan 03 01:28:43 PM PST 24 |
64808587281 ps |
| T444 |
/workspace/coverage/default/6.sysrst_ctrl_ec_pwr_on_rst.1646808580 |
|
|
Jan 03 01:25:20 PM PST 24 |
Jan 03 01:25:45 PM PST 24 |
2639614342 ps |
| T445 |
/workspace/coverage/default/19.sysrst_ctrl_pin_access_test.845202653 |
|
|
Jan 03 01:26:44 PM PST 24 |
Jan 03 01:27:05 PM PST 24 |
2186277273 ps |
| T446 |
/workspace/coverage/default/47.sysrst_ctrl_alert_test.265243832 |
|
|
Jan 03 01:27:49 PM PST 24 |
Jan 03 01:28:07 PM PST 24 |
2010655045 ps |
| T207 |
/workspace/coverage/default/45.sysrst_ctrl_stress_all_with_rand_reset.2132426225 |
|
|
Jan 03 01:27:47 PM PST 24 |
Jan 03 01:28:43 PM PST 24 |
34765738949 ps |
| T56 |
/workspace/coverage/default/23.sysrst_ctrl_stress_all_with_rand_reset.2302324043 |
|
|
Jan 03 01:26:46 PM PST 24 |
Jan 03 01:28:19 PM PST 24 |
63669900419 ps |
| T447 |
/workspace/coverage/default/42.sysrst_ctrl_in_out_inverted.4278353537 |
|
|
Jan 03 01:27:21 PM PST 24 |
Jan 03 01:27:39 PM PST 24 |
2519892555 ps |
| T218 |
/workspace/coverage/default/64.sysrst_ctrl_combo_detect_with_pre_cond.626777278 |
|
|
Jan 03 01:28:05 PM PST 24 |
Jan 03 01:28:34 PM PST 24 |
26112568882 ps |
| T448 |
/workspace/coverage/default/7.sysrst_ctrl_stress_all_with_rand_reset.1120417343 |
|
|
Jan 03 01:25:17 PM PST 24 |
Jan 03 01:25:50 PM PST 24 |
17437206501 ps |
| T449 |
/workspace/coverage/default/5.sysrst_ctrl_in_out_inverted.3303710800 |
|
|
Jan 03 01:25:11 PM PST 24 |
Jan 03 01:25:33 PM PST 24 |
2458856078 ps |
| T241 |
/workspace/coverage/default/42.sysrst_ctrl_combo_detect.2965350250 |
|
|
Jan 03 01:27:26 PM PST 24 |
Jan 03 01:27:58 PM PST 24 |
64856627041 ps |
| T352 |
/workspace/coverage/default/41.sysrst_ctrl_combo_detect_with_pre_cond.2776556817 |
|
|
Jan 03 01:27:26 PM PST 24 |
Jan 03 01:28:51 PM PST 24 |
57951060541 ps |
| T226 |
/workspace/coverage/default/34.sysrst_ctrl_combo_detect_with_pre_cond.2291003466 |
|
|
Jan 03 01:26:52 PM PST 24 |
Jan 03 01:28:27 PM PST 24 |
27580761959 ps |
| T450 |
/workspace/coverage/default/32.sysrst_ctrl_flash_wr_prot_out.961193607 |
|
|
Jan 03 01:26:49 PM PST 24 |
Jan 03 01:27:14 PM PST 24 |
2622965999 ps |
| T451 |
/workspace/coverage/default/9.sysrst_ctrl_pin_override_test.1429384323 |
|
|
Jan 03 01:25:24 PM PST 24 |
Jan 03 01:25:54 PM PST 24 |
2509846472 ps |
| T334 |
/workspace/coverage/default/94.sysrst_ctrl_combo_detect_with_pre_cond.3029986985 |
|
|
Jan 03 01:28:09 PM PST 24 |
Jan 03 01:30:46 PM PST 24 |
60389541321 ps |
| T452 |
/workspace/coverage/default/31.sysrst_ctrl_pin_access_test.1414773646 |
|
|
Jan 03 01:26:42 PM PST 24 |
Jan 03 01:26:57 PM PST 24 |
2225909132 ps |
| T301 |
/workspace/coverage/default/18.sysrst_ctrl_stress_all_with_rand_reset.3624068667 |
|
|
Jan 03 01:26:42 PM PST 24 |
Jan 03 01:27:27 PM PST 24 |
202366191759 ps |
| T453 |
/workspace/coverage/default/1.sysrst_ctrl_ec_pwr_on_rst.2957139864 |
|
|
Jan 03 01:25:06 PM PST 24 |
Jan 03 01:25:23 PM PST 24 |
3262725191 ps |
| T454 |
/workspace/coverage/default/47.sysrst_ctrl_pin_access_test.529452935 |
|
|
Jan 03 01:27:51 PM PST 24 |
Jan 03 01:28:08 PM PST 24 |
2130817232 ps |
| T310 |
/workspace/coverage/default/95.sysrst_ctrl_combo_detect_with_pre_cond.1332927355 |
|
|
Jan 03 01:28:06 PM PST 24 |
Jan 03 01:28:55 PM PST 24 |
31249362523 ps |
| T455 |
/workspace/coverage/default/36.sysrst_ctrl_alert_test.2151946592 |
|
|
Jan 03 01:26:47 PM PST 24 |
Jan 03 01:27:13 PM PST 24 |
2016217765 ps |
| T58 |
/workspace/coverage/default/3.sysrst_ctrl_ultra_low_pwr.2881396203 |
|
|
Jan 03 01:27:12 PM PST 24 |
Jan 03 01:27:40 PM PST 24 |
4636465435 ps |
| T223 |
/workspace/coverage/default/49.sysrst_ctrl_combo_detect.4082687748 |
|
|
Jan 03 01:27:53 PM PST 24 |
Jan 03 01:29:25 PM PST 24 |
27552978896 ps |
| T233 |
/workspace/coverage/default/12.sysrst_ctrl_pin_override_test.564870312 |
|
|
Jan 03 01:25:29 PM PST 24 |
Jan 03 01:25:53 PM PST 24 |
2522027396 ps |
| T234 |
/workspace/coverage/default/37.sysrst_ctrl_in_out_inverted.4026709313 |
|
|
Jan 03 01:26:52 PM PST 24 |
Jan 03 01:27:22 PM PST 24 |
2473279682 ps |
| T235 |
/workspace/coverage/default/14.sysrst_ctrl_ec_pwr_on_rst.1428772207 |
|
|
Jan 03 01:25:31 PM PST 24 |
Jan 03 01:28:05 PM PST 24 |
93127315226 ps |
| T236 |
/workspace/coverage/default/21.sysrst_ctrl_ec_pwr_on_rst.730410481 |
|
|
Jan 03 01:26:45 PM PST 24 |
Jan 03 01:27:08 PM PST 24 |
4641950871 ps |
| T237 |
/workspace/coverage/default/8.sysrst_ctrl_smoke.1199394969 |
|
|
Jan 03 01:25:21 PM PST 24 |
Jan 03 01:25:50 PM PST 24 |
2114303887 ps |
| T238 |
/workspace/coverage/default/47.sysrst_ctrl_stress_all.2083824536 |
|
|
Jan 03 01:27:47 PM PST 24 |
Jan 03 01:28:03 PM PST 24 |
8694651883 ps |
| T239 |
/workspace/coverage/default/28.sysrst_ctrl_smoke.2702824207 |
|
|
Jan 03 01:26:41 PM PST 24 |
Jan 03 01:26:53 PM PST 24 |
2112181592 ps |
| T240 |
/workspace/coverage/default/8.sysrst_ctrl_in_out_inverted.846576756 |
|
|
Jan 03 01:25:16 PM PST 24 |
Jan 03 01:25:40 PM PST 24 |
2456381243 ps |
| T135 |
/workspace/coverage/default/8.sysrst_ctrl_stress_all.555344257 |
|
|
Jan 03 01:26:57 PM PST 24 |
Jan 03 01:27:42 PM PST 24 |
14660083435 ps |
| T456 |
/workspace/coverage/default/6.sysrst_ctrl_smoke.999978324 |
|
|
Jan 03 01:25:21 PM PST 24 |
Jan 03 01:25:48 PM PST 24 |
2111192582 ps |
| T457 |
/workspace/coverage/default/10.sysrst_ctrl_stress_all.1726184842 |
|
|
Jan 03 01:25:08 PM PST 24 |
Jan 03 01:25:29 PM PST 24 |
12385107742 ps |
| T458 |
/workspace/coverage/default/15.sysrst_ctrl_combo_detect_with_pre_cond.3531953382 |
|
|
Jan 03 01:26:14 PM PST 24 |
Jan 03 01:27:56 PM PST 24 |
39596635356 ps |
| T60 |
/workspace/coverage/default/40.sysrst_ctrl_combo_detect.2420432667 |
|
|
Jan 03 01:27:11 PM PST 24 |
Jan 03 01:29:06 PM PST 24 |
160693390852 ps |
| T316 |
/workspace/coverage/default/66.sysrst_ctrl_combo_detect_with_pre_cond.3775513027 |
|
|
Jan 03 01:28:05 PM PST 24 |
Jan 03 01:31:43 PM PST 24 |
81208430406 ps |
| T459 |
/workspace/coverage/default/1.sysrst_ctrl_combo_detect_with_pre_cond.3800268205 |
|
|
Jan 03 01:25:10 PM PST 24 |
Jan 03 01:26:45 PM PST 24 |
53720003782 ps |
| T460 |
/workspace/coverage/default/13.sysrst_ctrl_ec_pwr_on_rst.3187900854 |
|
|
Jan 03 01:25:32 PM PST 24 |
Jan 03 01:25:57 PM PST 24 |
2665721072 ps |
| T341 |
/workspace/coverage/default/3.sysrst_ctrl_combo_detect.831848838 |
|
|
Jan 03 01:25:07 PM PST 24 |
Jan 03 01:27:47 PM PST 24 |
55892871007 ps |
| T461 |
/workspace/coverage/default/36.sysrst_ctrl_pin_access_test.2933334774 |
|
|
Jan 03 01:26:49 PM PST 24 |
Jan 03 01:27:18 PM PST 24 |
2040611628 ps |
| T462 |
/workspace/coverage/default/38.sysrst_ctrl_flash_wr_prot_out.679341430 |
|
|
Jan 03 01:27:05 PM PST 24 |
Jan 03 01:27:29 PM PST 24 |
2650183590 ps |
| T463 |
/workspace/coverage/default/44.sysrst_ctrl_in_out_inverted.1365739352 |
|
|
Jan 03 01:27:28 PM PST 24 |
Jan 03 01:27:47 PM PST 24 |
2481879970 ps |
| T464 |
/workspace/coverage/default/33.sysrst_ctrl_pin_override_test.2381898074 |
|
|
Jan 03 01:26:47 PM PST 24 |
Jan 03 01:27:11 PM PST 24 |
2523442629 ps |
| T465 |
/workspace/coverage/default/78.sysrst_ctrl_combo_detect_with_pre_cond.3103011270 |
|
|
Jan 03 01:28:05 PM PST 24 |
Jan 03 01:29:17 PM PST 24 |
25585220972 ps |
| T466 |
/workspace/coverage/default/80.sysrst_ctrl_combo_detect_with_pre_cond.4227767784 |
|
|
Jan 03 01:28:08 PM PST 24 |
Jan 03 01:29:48 PM PST 24 |
126173277624 ps |
| T302 |
/workspace/coverage/default/22.sysrst_ctrl_combo_detect.489426088 |
|
|
Jan 03 01:26:38 PM PST 24 |
Jan 03 01:28:43 PM PST 24 |
46778083209 ps |
| T325 |
/workspace/coverage/default/87.sysrst_ctrl_combo_detect_with_pre_cond.706261317 |
|
|
Jan 03 01:28:10 PM PST 24 |
Jan 03 01:29:55 PM PST 24 |
135563578964 ps |
| T467 |
/workspace/coverage/default/35.sysrst_ctrl_alert_test.3007213438 |
|
|
Jan 03 01:26:46 PM PST 24 |
Jan 03 01:27:11 PM PST 24 |
2014932149 ps |
| T73 |
/workspace/coverage/default/23.sysrst_ctrl_ultra_low_pwr.530324599 |
|
|
Jan 03 01:26:45 PM PST 24 |
Jan 03 01:27:06 PM PST 24 |
7803828153 ps |
| T116 |
/workspace/coverage/default/25.sysrst_ctrl_combo_detect.877976988 |
|
|
Jan 03 01:26:42 PM PST 24 |
Jan 03 01:27:35 PM PST 24 |
64948918052 ps |
| T117 |
/workspace/coverage/default/39.sysrst_ctrl_in_out_inverted.3808012016 |
|
|
Jan 03 01:27:03 PM PST 24 |
Jan 03 01:27:29 PM PST 24 |
2470224944 ps |
| T118 |
/workspace/coverage/default/40.sysrst_ctrl_stress_all.3176443026 |
|
|
Jan 03 01:27:06 PM PST 24 |
Jan 03 01:33:30 PM PST 24 |
645045644090 ps |
| T119 |
/workspace/coverage/default/5.sysrst_ctrl_pin_access_test.3358693112 |
|
|
Jan 03 01:25:12 PM PST 24 |
Jan 03 01:25:33 PM PST 24 |
2096222760 ps |
| T93 |
/workspace/coverage/default/0.sysrst_ctrl_combo_detect.3401250381 |
|
|
Jan 03 01:25:07 PM PST 24 |
Jan 03 01:25:37 PM PST 24 |
78153182118 ps |
| T120 |
/workspace/coverage/default/45.sysrst_ctrl_alert_test.3788429883 |
|
|
Jan 03 01:27:45 PM PST 24 |
Jan 03 01:28:01 PM PST 24 |
2014363149 ps |
| T121 |
/workspace/coverage/default/1.sysrst_ctrl_flash_wr_prot_out.2688753379 |
|
|
Jan 03 01:25:07 PM PST 24 |
Jan 03 01:25:29 PM PST 24 |
2610358598 ps |
| T74 |
/workspace/coverage/default/25.sysrst_ctrl_stress_all.2315993263 |
|
|
Jan 03 01:26:43 PM PST 24 |
Jan 03 01:27:38 PM PST 24 |
15369304026 ps |
| T243 |
/workspace/coverage/default/14.sysrst_ctrl_combo_detect.407842219 |
|
|
Jan 03 01:25:41 PM PST 24 |
Jan 03 01:30:47 PM PST 24 |
105022154425 ps |
| T94 |
/workspace/coverage/default/16.sysrst_ctrl_combo_detect.45225019 |
|
|
Jan 03 01:25:55 PM PST 24 |
Jan 03 01:27:27 PM PST 24 |
124138007232 ps |
| T468 |
/workspace/coverage/default/19.sysrst_ctrl_smoke.2054472114 |
|
|
Jan 03 01:26:46 PM PST 24 |
Jan 03 01:27:07 PM PST 24 |
2127821406 ps |
| T469 |
/workspace/coverage/default/27.sysrst_ctrl_pin_access_test.3657927420 |
|
|
Jan 03 01:26:38 PM PST 24 |
Jan 03 01:26:43 PM PST 24 |
2067318456 ps |
| T470 |
/workspace/coverage/default/25.sysrst_ctrl_flash_wr_prot_out.3406583775 |
|
|
Jan 03 01:26:46 PM PST 24 |
Jan 03 01:27:08 PM PST 24 |
2624272617 ps |
| T354 |
/workspace/coverage/default/43.sysrst_ctrl_ultra_low_pwr.1233043908 |
|
|
Jan 03 01:27:44 PM PST 24 |
Jan 03 01:30:55 PM PST 24 |
1588657726674 ps |
| T471 |
/workspace/coverage/default/48.sysrst_ctrl_smoke.3341141538 |
|
|
Jan 03 01:27:50 PM PST 24 |
Jan 03 01:28:09 PM PST 24 |
2114365097 ps |
| T168 |
/workspace/coverage/default/44.sysrst_ctrl_edge_detect.1314261851 |
|
|
Jan 03 01:27:42 PM PST 24 |
Jan 03 01:27:58 PM PST 24 |
4783919744 ps |
| T472 |
/workspace/coverage/default/12.sysrst_ctrl_stress_all.117077439 |
|
|
Jan 03 01:25:32 PM PST 24 |
Jan 03 01:26:04 PM PST 24 |
17005943492 ps |
| T473 |
/workspace/coverage/default/1.sysrst_ctrl_alert_test.2918205149 |
|
|
Jan 03 01:25:19 PM PST 24 |
Jan 03 01:25:44 PM PST 24 |
2039195786 ps |
| T71 |
/workspace/coverage/default/12.sysrst_ctrl_stress_all_with_rand_reset.3199043792 |
|
|
Jan 03 01:25:32 PM PST 24 |
Jan 03 01:27:07 PM PST 24 |
110829251424 ps |
| T205 |
/workspace/coverage/default/20.sysrst_ctrl_ec_pwr_on_rst.4180861252 |
|
|
Jan 03 01:26:43 PM PST 24 |
Jan 03 01:27:02 PM PST 24 |
2744893854 ps |
| T206 |
/workspace/coverage/default/2.sysrst_ctrl_pin_override_test.3348125044 |
|
|
Jan 03 01:25:09 PM PST 24 |
Jan 03 01:25:28 PM PST 24 |
2541811838 ps |
| T76 |
/workspace/coverage/default/84.sysrst_ctrl_combo_detect_with_pre_cond.547997441 |
|
|
Jan 03 01:28:07 PM PST 24 |
Jan 03 01:28:29 PM PST 24 |
22864001892 ps |
| T327 |
/workspace/coverage/default/88.sysrst_ctrl_combo_detect_with_pre_cond.3565309069 |
|
|
Jan 03 01:28:06 PM PST 24 |
Jan 03 01:29:16 PM PST 24 |
91763075207 ps |
| T474 |
/workspace/coverage/default/45.sysrst_ctrl_in_out_inverted.1202993094 |
|
|
Jan 03 01:27:48 PM PST 24 |
Jan 03 01:28:02 PM PST 24 |
2497610378 ps |
| T475 |
/workspace/coverage/default/24.sysrst_ctrl_auto_blk_key_output.615043865 |
|
|
Jan 03 01:26:44 PM PST 24 |
Jan 03 01:27:09 PM PST 24 |
3207903331 ps |
| T476 |
/workspace/coverage/default/11.sysrst_ctrl_alert_test.2096613802 |
|
|
Jan 03 01:26:41 PM PST 24 |
Jan 03 01:26:57 PM PST 24 |
2010440391 ps |
| T61 |
/workspace/coverage/default/5.sysrst_ctrl_combo_detect.4208872818 |
|
|
Jan 03 01:25:17 PM PST 24 |
Jan 03 01:26:09 PM PST 24 |
57491411073 ps |
| T227 |
/workspace/coverage/default/5.sysrst_ctrl_stress_all.3610640370 |
|
|
Jan 03 01:25:17 PM PST 24 |
Jan 03 01:26:19 PM PST 24 |
47034066689 ps |
| T477 |
/workspace/coverage/default/11.sysrst_ctrl_ec_pwr_on_rst.2655618626 |
|
|
Jan 03 01:25:08 PM PST 24 |
Jan 03 01:25:32 PM PST 24 |
3481649811 ps |
| T478 |
/workspace/coverage/default/41.sysrst_ctrl_ec_pwr_on_rst.3519222257 |
|
|
Jan 03 01:27:05 PM PST 24 |
Jan 03 01:27:39 PM PST 24 |
3637144678 ps |
| T479 |
/workspace/coverage/default/9.sysrst_ctrl_in_out_inverted.3502387885 |
|
|
Jan 03 01:25:20 PM PST 24 |
Jan 03 01:25:44 PM PST 24 |
2491216584 ps |
| T480 |
/workspace/coverage/default/35.sysrst_ctrl_flash_wr_prot_out.1777960073 |
|
|
Jan 03 01:26:50 PM PST 24 |
Jan 03 01:27:20 PM PST 24 |
2607523494 ps |
| T353 |
/workspace/coverage/default/27.sysrst_ctrl_ultra_low_pwr.1727336347 |
|
|
Jan 03 01:26:44 PM PST 24 |
Jan 03 01:28:46 PM PST 24 |
1349097264550 ps |
| T481 |
/workspace/coverage/default/24.sysrst_ctrl_flash_wr_prot_out.3249795368 |
|
|
Jan 03 01:26:49 PM PST 24 |
Jan 03 01:27:14 PM PST 24 |
2619062280 ps |
| T110 |
/workspace/coverage/default/0.sysrst_ctrl_stress_all_with_rand_reset.3803991847 |
|
|
Jan 03 01:25:08 PM PST 24 |
Jan 03 01:27:49 PM PST 24 |
61698184225 ps |
| T482 |
/workspace/coverage/default/3.sysrst_ctrl_flash_wr_prot_out.3590249915 |
|
|
Jan 03 01:26:57 PM PST 24 |
Jan 03 01:27:25 PM PST 24 |
2679113920 ps |
| T483 |
/workspace/coverage/default/36.sysrst_ctrl_ec_pwr_on_rst.2896422453 |
|
|
Jan 03 01:26:57 PM PST 24 |
Jan 03 01:27:25 PM PST 24 |
3414281004 ps |
| T175 |
/workspace/coverage/default/17.sysrst_ctrl_edge_detect.839484190 |
|
|
Jan 03 01:26:42 PM PST 24 |
Jan 03 01:26:59 PM PST 24 |
5758096250 ps |
| T187 |
/workspace/coverage/default/8.sysrst_ctrl_auto_blk_key_output.3886465339 |
|
|
Jan 03 01:25:21 PM PST 24 |
Jan 03 01:25:45 PM PST 24 |
3972124152 ps |
| T188 |
/workspace/coverage/default/41.sysrst_ctrl_smoke.960753880 |
|
|
Jan 03 01:27:05 PM PST 24 |
Jan 03 01:27:29 PM PST 24 |
2157141453 ps |
| T189 |
/workspace/coverage/default/1.sysrst_ctrl_combo_detect_ec_rst.1787736230 |
|
|
Jan 03 01:24:53 PM PST 24 |
Jan 03 01:25:07 PM PST 24 |
2413537002 ps |
| T190 |
/workspace/coverage/default/40.sysrst_ctrl_flash_wr_prot_out.3697462339 |
|
|
Jan 03 01:27:11 PM PST 24 |
Jan 03 01:27:41 PM PST 24 |
2612602503 ps |
| T484 |
/workspace/coverage/default/2.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.4051604566 |
|
|
Jan 03 01:25:10 PM PST 24 |
Jan 03 01:25:36 PM PST 24 |
2506831696 ps |
| T485 |
/workspace/coverage/default/27.sysrst_ctrl_auto_blk_key_output.853158130 |
|
|
Jan 03 01:26:45 PM PST 24 |
Jan 03 01:27:15 PM PST 24 |
3700976642 ps |
| T95 |
/workspace/coverage/default/3.sysrst_ctrl_stress_all_with_rand_reset.1816775769 |
|
|
Jan 03 01:25:06 PM PST 24 |
Jan 03 01:25:52 PM PST 24 |
49022661047 ps |
| T486 |
/workspace/coverage/default/5.sysrst_ctrl_pin_override_test.2326872670 |
|
|
Jan 03 01:25:11 PM PST 24 |
Jan 03 01:25:36 PM PST 24 |
2508833156 ps |
| T122 |
/workspace/coverage/default/39.sysrst_ctrl_ultra_low_pwr.1519516430 |
|
|
Jan 03 01:27:03 PM PST 24 |
Jan 03 01:27:36 PM PST 24 |
8086800189 ps |
| T487 |
/workspace/coverage/default/26.sysrst_ctrl_flash_wr_prot_out.1584667139 |
|
|
Jan 03 01:26:39 PM PST 24 |
Jan 03 01:26:44 PM PST 24 |
2634684250 ps |
| T488 |
/workspace/coverage/default/38.sysrst_ctrl_pin_override_test.2439204615 |
|
|
Jan 03 01:27:02 PM PST 24 |
Jan 03 01:27:30 PM PST 24 |
2515639191 ps |
| T489 |
/workspace/coverage/default/4.sysrst_ctrl_combo_detect_ec_rst.1686034570 |
|
|
Jan 03 01:25:06 PM PST 24 |
Jan 03 01:25:21 PM PST 24 |
2227391135 ps |
| T490 |
/workspace/coverage/default/46.sysrst_ctrl_auto_blk_key_output.4104498962 |
|
|
Jan 03 01:27:49 PM PST 24 |
Jan 03 01:28:03 PM PST 24 |
3384031183 ps |
| T491 |
/workspace/coverage/default/1.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.15632953 |
|
|
Jan 03 01:25:06 PM PST 24 |
Jan 03 01:25:23 PM PST 24 |
2509020610 ps |
| T492 |
/workspace/coverage/default/10.sysrst_ctrl_pin_access_test.15736082 |
|
|
Jan 03 01:25:21 PM PST 24 |
Jan 03 01:25:45 PM PST 24 |
2245039228 ps |
| T493 |
/workspace/coverage/default/30.sysrst_ctrl_combo_detect_with_pre_cond.2733662064 |
|
|
Jan 03 01:27:35 PM PST 24 |
Jan 03 01:28:06 PM PST 24 |
25597480817 ps |
| T494 |
/workspace/coverage/default/8.sysrst_ctrl_alert_test.677577579 |
|
|
Jan 03 01:25:23 PM PST 24 |
Jan 03 01:25:47 PM PST 24 |
2037682850 ps |
| T495 |
/workspace/coverage/default/36.sysrst_ctrl_flash_wr_prot_out.2632811058 |
|
|
Jan 03 01:26:58 PM PST 24 |
Jan 03 01:27:27 PM PST 24 |
2616790180 ps |
| T77 |
/workspace/coverage/default/49.sysrst_ctrl_ultra_low_pwr.1888431532 |
|
|
Jan 03 01:27:49 PM PST 24 |
Jan 03 01:28:04 PM PST 24 |
4994716664 ps |
| T496 |
/workspace/coverage/default/23.sysrst_ctrl_edge_detect.3870959713 |
|
|
Jan 03 01:26:41 PM PST 24 |
Jan 03 01:26:53 PM PST 24 |
3269899095 ps |
| T497 |
/workspace/coverage/default/33.sysrst_ctrl_smoke.2134113412 |
|
|
Jan 03 01:26:48 PM PST 24 |
Jan 03 01:27:10 PM PST 24 |
2137896086 ps |
| T498 |
/workspace/coverage/default/49.sysrst_ctrl_smoke.1586421951 |
|
|
Jan 03 01:27:52 PM PST 24 |
Jan 03 01:28:09 PM PST 24 |
2131945279 ps |
| T144 |
/workspace/coverage/default/4.sysrst_ctrl_edge_detect.524211005 |
|
|
Jan 03 01:25:08 PM PST 24 |
Jan 03 01:29:35 PM PST 24 |
768255248182 ps |
| T499 |
/workspace/coverage/default/38.sysrst_ctrl_ec_pwr_on_rst.4140647966 |
|
|
Jan 03 01:27:07 PM PST 24 |
Jan 03 01:27:33 PM PST 24 |
2681870705 ps |
| T500 |
/workspace/coverage/default/21.sysrst_ctrl_flash_wr_prot_out.1685775592 |
|
|
Jan 03 01:26:45 PM PST 24 |
Jan 03 01:27:10 PM PST 24 |
2609584571 ps |
| T136 |
/workspace/coverage/default/29.sysrst_ctrl_edge_detect.2433587066 |
|
|
Jan 03 01:26:49 PM PST 24 |
Jan 03 01:27:18 PM PST 24 |
5854542311 ps |
| T501 |
/workspace/coverage/default/7.sysrst_ctrl_ultra_low_pwr.3541561977 |
|
|
Jan 03 01:25:17 PM PST 24 |
Jan 03 01:25:41 PM PST 24 |
6569358452 ps |
| T502 |
/workspace/coverage/default/6.sysrst_ctrl_combo_detect_with_pre_cond.849796043 |
|
|
Jan 03 01:25:22 PM PST 24 |
Jan 03 01:26:31 PM PST 24 |
35315219138 ps |
| T503 |
/workspace/coverage/default/24.sysrst_ctrl_edge_detect.1987990409 |
|
|
Jan 03 01:26:47 PM PST 24 |
Jan 03 01:27:09 PM PST 24 |
4393327843 ps |
| T504 |
/workspace/coverage/default/39.sysrst_ctrl_pin_access_test.1083863190 |
|
|
Jan 03 01:27:07 PM PST 24 |
Jan 03 01:27:36 PM PST 24 |
2177580320 ps |
| T505 |
/workspace/coverage/default/19.sysrst_ctrl_flash_wr_prot_out.1906447567 |
|
|
Jan 03 01:26:49 PM PST 24 |
Jan 03 01:27:13 PM PST 24 |
2639916870 ps |
| T506 |
/workspace/coverage/default/6.sysrst_ctrl_flash_wr_prot_out.1708251245 |
|
|
Jan 03 01:25:20 PM PST 24 |
Jan 03 01:25:47 PM PST 24 |
2620542478 ps |
| T507 |
/workspace/coverage/default/40.sysrst_ctrl_ec_pwr_on_rst.653335934 |
|
|
Jan 03 01:27:03 PM PST 24 |
Jan 03 01:27:29 PM PST 24 |
2825671447 ps |
| T508 |
/workspace/coverage/default/33.sysrst_ctrl_in_out_inverted.1168524616 |
|
|
Jan 03 01:26:47 PM PST 24 |
Jan 03 01:27:09 PM PST 24 |
2491566851 ps |
| T336 |
/workspace/coverage/default/31.sysrst_ctrl_combo_detect_with_pre_cond.743846241 |
|
|
Jan 03 01:26:46 PM PST 24 |
Jan 03 01:29:16 PM PST 24 |
51213064734 ps |
| T96 |
/workspace/coverage/default/20.sysrst_ctrl_combo_detect.2848030563 |
|
|
Jan 03 01:26:41 PM PST 24 |
Jan 03 01:29:25 PM PST 24 |
122221832416 ps |
| T215 |
/workspace/coverage/default/25.sysrst_ctrl_stress_all_with_rand_reset.2403216751 |
|
|
Jan 03 01:26:43 PM PST 24 |
Jan 03 01:31:27 PM PST 24 |
1216099173336 ps |
| T509 |
/workspace/coverage/default/27.sysrst_ctrl_flash_wr_prot_out.4026655153 |
|
|
Jan 03 01:26:39 PM PST 24 |
Jan 03 01:26:47 PM PST 24 |
2615296441 ps |
| T510 |
/workspace/coverage/default/45.sysrst_ctrl_flash_wr_prot_out.1004616017 |
|
|
Jan 03 01:27:46 PM PST 24 |
Jan 03 01:28:05 PM PST 24 |
2614417388 ps |
| T511 |
/workspace/coverage/default/9.sysrst_ctrl_flash_wr_prot_out.2256726573 |
|
|
Jan 03 01:25:08 PM PST 24 |
Jan 03 01:25:28 PM PST 24 |
2635777948 ps |
| T512 |
/workspace/coverage/default/6.sysrst_ctrl_pin_override_test.4279109860 |
|
|
Jan 03 01:25:06 PM PST 24 |
Jan 03 01:25:24 PM PST 24 |
2514524841 ps |
| T513 |
/workspace/coverage/default/41.sysrst_ctrl_stress_all.2041176872 |
|
|
Jan 03 01:27:07 PM PST 24 |
Jan 03 01:27:53 PM PST 24 |
8501710758 ps |
| T514 |
/workspace/coverage/default/4.sysrst_ctrl_stress_all.482064686 |
|
|
Jan 03 01:25:10 PM PST 24 |
Jan 03 01:26:04 PM PST 24 |
16472280842 ps |
| T515 |
/workspace/coverage/default/13.sysrst_ctrl_edge_detect.1508713212 |
|
|
Jan 03 01:25:32 PM PST 24 |
Jan 03 01:26:00 PM PST 24 |
2957122984 ps |
| T516 |
/workspace/coverage/default/30.sysrst_ctrl_in_out_inverted.1200812342 |
|
|
Jan 03 01:26:45 PM PST 24 |
Jan 03 01:27:12 PM PST 24 |
2452551851 ps |
| T517 |
/workspace/coverage/default/7.sysrst_ctrl_combo_detect_with_pre_cond.4240015409 |
|
|
Jan 03 01:25:15 PM PST 24 |
Jan 03 01:29:25 PM PST 24 |
88389780686 ps |
| T518 |
/workspace/coverage/default/23.sysrst_ctrl_smoke.258755453 |
|
|
Jan 03 01:26:43 PM PST 24 |
Jan 03 01:27:01 PM PST 24 |
2129387107 ps |
| T519 |
/workspace/coverage/default/1.sysrst_ctrl_smoke.4180288728 |
|
|
Jan 03 01:25:06 PM PST 24 |
Jan 03 01:25:23 PM PST 24 |
2113347725 ps |
| T228 |
/workspace/coverage/default/1.sysrst_ctrl_stress_all.4191479376 |
|
|
Jan 03 01:25:10 PM PST 24 |
Jan 03 01:26:34 PM PST 24 |
101503231980 ps |
| T520 |
/workspace/coverage/default/4.sysrst_ctrl_combo_detect.107808061 |
|
|
Jan 03 01:25:07 PM PST 24 |
Jan 03 01:26:30 PM PST 24 |
103044974625 ps |
| T72 |
/workspace/coverage/default/31.sysrst_ctrl_stress_all_with_rand_reset.4002478960 |
|
|
Jan 03 01:26:44 PM PST 24 |
Jan 03 01:28:44 PM PST 24 |
150792480594 ps |
| T160 |
/workspace/coverage/default/43.sysrst_ctrl_flash_wr_prot_out.4120427635 |
|
|
Jan 03 01:27:28 PM PST 24 |
Jan 03 01:27:48 PM PST 24 |
2624108315 ps |
| T161 |
/workspace/coverage/default/69.sysrst_ctrl_combo_detect_with_pre_cond.3354731716 |
|
|
Jan 03 01:28:05 PM PST 24 |
Jan 03 01:29:22 PM PST 24 |
27082804203 ps |
| T137 |
/workspace/coverage/default/6.sysrst_ctrl_edge_detect.4169649371 |
|
|
Jan 03 01:25:21 PM PST 24 |
Jan 03 01:25:45 PM PST 24 |
2759097913 ps |
| T162 |
/workspace/coverage/default/40.sysrst_ctrl_in_out_inverted.3376425998 |
|
|
Jan 03 01:27:10 PM PST 24 |
Jan 03 01:27:39 PM PST 24 |
2486802921 ps |
| T163 |
/workspace/coverage/default/11.sysrst_ctrl_ultra_low_pwr.2192332529 |
|
|
Jan 03 01:25:23 PM PST 24 |
Jan 03 01:25:53 PM PST 24 |
6180023827 ps |
| T138 |
/workspace/coverage/default/38.sysrst_ctrl_edge_detect.4032109463 |
|
|
Jan 03 01:27:05 PM PST 24 |
Jan 03 01:27:34 PM PST 24 |
4965123338 ps |
| T164 |
/workspace/coverage/default/85.sysrst_ctrl_combo_detect_with_pre_cond.2926222416 |
|
|
Jan 03 01:28:09 PM PST 24 |
Jan 03 01:28:53 PM PST 24 |
48422909811 ps |
| T165 |
/workspace/coverage/default/14.sysrst_ctrl_pin_override_test.1741830928 |
|
|
Jan 03 01:25:31 PM PST 24 |
Jan 03 01:25:56 PM PST 24 |
2523081951 ps |
| T166 |
/workspace/coverage/default/9.sysrst_ctrl_pin_access_test.932284871 |
|
|
Jan 03 01:25:21 PM PST 24 |
Jan 03 01:25:47 PM PST 24 |
2245853562 ps |
| T521 |
/workspace/coverage/default/43.sysrst_ctrl_stress_all_with_rand_reset.2345475833 |
|
|
Jan 03 01:27:27 PM PST 24 |
Jan 03 01:29:05 PM PST 24 |
169046007735 ps |
| T522 |
/workspace/coverage/default/92.sysrst_ctrl_combo_detect_with_pre_cond.411022290 |
|
|
Jan 03 01:28:10 PM PST 24 |
Jan 03 01:28:29 PM PST 24 |
27114455106 ps |
| T345 |
/workspace/coverage/default/39.sysrst_ctrl_combo_detect_with_pre_cond.3840306147 |
|
|
Jan 03 01:27:04 PM PST 24 |
Jan 03 01:27:47 PM PST 24 |
28107375101 ps |
| T523 |
/workspace/coverage/default/13.sysrst_ctrl_flash_wr_prot_out.395569348 |
|
|
Jan 03 01:25:30 PM PST 24 |
Jan 03 01:25:58 PM PST 24 |
2613265318 ps |
| T524 |
/workspace/coverage/default/24.sysrst_ctrl_smoke.1751215398 |
|
|
Jan 03 01:26:44 PM PST 24 |
Jan 03 01:27:08 PM PST 24 |
2108975649 ps |
| T525 |
/workspace/coverage/default/39.sysrst_ctrl_ec_pwr_on_rst.778589427 |
|
|
Jan 03 01:27:05 PM PST 24 |
Jan 03 01:27:29 PM PST 24 |
2970712594 ps |
| T526 |
/workspace/coverage/default/4.sysrst_ctrl_alert_test.2855045572 |
|
|
Jan 03 01:25:09 PM PST 24 |
Jan 03 01:25:30 PM PST 24 |
2023042347 ps |
| T527 |
/workspace/coverage/default/11.sysrst_ctrl_flash_wr_prot_out.1366146612 |
|
|
Jan 03 01:26:41 PM PST 24 |
Jan 03 01:26:59 PM PST 24 |
2610695290 ps |
| T528 |
/workspace/coverage/default/33.sysrst_ctrl_ultra_low_pwr.2563104653 |
|
|
Jan 03 01:26:48 PM PST 24 |
Jan 03 01:27:11 PM PST 24 |
12112910850 ps |
| T529 |
/workspace/coverage/default/3.sysrst_ctrl_edge_detect.2747674129 |
|
|
Jan 03 01:25:06 PM PST 24 |
Jan 03 01:25:23 PM PST 24 |
3035960495 ps |
| T530 |
/workspace/coverage/default/18.sysrst_ctrl_edge_detect.3207658793 |
|
|
Jan 03 01:26:45 PM PST 24 |
Jan 03 01:27:08 PM PST 24 |
2375805720 ps |
| T531 |
/workspace/coverage/default/36.sysrst_ctrl_pin_override_test.843175049 |
|
|
Jan 03 01:26:46 PM PST 24 |
Jan 03 01:27:09 PM PST 24 |
2514805477 ps |
| T355 |
/workspace/coverage/default/23.sysrst_ctrl_stress_all.1789280804 |
|
|
Jan 03 01:26:43 PM PST 24 |
Jan 03 01:28:17 PM PST 24 |
756227558562 ps |
| T532 |
/workspace/coverage/default/4.sysrst_ctrl_pin_access_test.3574033451 |
|
|
Jan 03 01:25:07 PM PST 24 |
Jan 03 01:25:23 PM PST 24 |
2183275707 ps |
| T251 |
/workspace/coverage/default/0.sysrst_ctrl_sec_cm.4149229714 |
|
|
Jan 03 01:25:09 PM PST 24 |
Jan 03 01:27:11 PM PST 24 |
42013094676 ps |
| T268 |
/workspace/coverage/default/49.sysrst_ctrl_stress_all_with_rand_reset.1970682407 |
|
|
Jan 03 01:27:52 PM PST 24 |
Jan 03 01:29:38 PM PST 24 |
41100379318 ps |
| T269 |
/workspace/coverage/default/32.sysrst_ctrl_smoke.3241396932 |
|
|
Jan 03 01:26:45 PM PST 24 |
Jan 03 01:27:05 PM PST 24 |
2121341225 ps |
| T270 |
/workspace/coverage/default/18.sysrst_ctrl_flash_wr_prot_out.32062453 |
|
|
Jan 03 01:26:41 PM PST 24 |
Jan 03 01:26:52 PM PST 24 |
2655659674 ps |
| T271 |
/workspace/coverage/default/9.sysrst_ctrl_alert_test.268867455 |
|
|
Jan 03 01:25:08 PM PST 24 |
Jan 03 01:25:26 PM PST 24 |
2051502575 ps |
| T75 |
/workspace/coverage/default/44.sysrst_ctrl_ultra_low_pwr.1418303685 |
|
|
Jan 03 01:27:28 PM PST 24 |
Jan 03 01:27:46 PM PST 24 |
3831020694 ps |
| T272 |
/workspace/coverage/default/42.sysrst_ctrl_flash_wr_prot_out.3696600931 |
|
|
Jan 03 01:27:27 PM PST 24 |
Jan 03 01:27:50 PM PST 24 |
2612576440 ps |
| T273 |
/workspace/coverage/default/3.sysrst_ctrl_pin_access_test.4065063436 |
|
|
Jan 03 01:27:13 PM PST 24 |
Jan 03 01:27:38 PM PST 24 |
2043118024 ps |
| T274 |
/workspace/coverage/default/36.sysrst_ctrl_edge_detect.4034342225 |
|
|
Jan 03 01:26:57 PM PST 24 |
Jan 03 01:27:27 PM PST 24 |
2952045840 ps |
| T275 |
/workspace/coverage/default/22.sysrst_ctrl_smoke.866350796 |
|
|
Jan 03 01:26:36 PM PST 24 |
Jan 03 01:26:40 PM PST 24 |
2131524825 ps |
| T533 |
/workspace/coverage/default/14.sysrst_ctrl_smoke.1866221626 |
|
|
Jan 03 01:25:32 PM PST 24 |
Jan 03 01:26:02 PM PST 24 |
2107446843 ps |
| T328 |
/workspace/coverage/default/29.sysrst_ctrl_combo_detect_with_pre_cond.2934406707 |
|
|
Jan 03 01:26:47 PM PST 24 |
Jan 03 01:29:27 PM PST 24 |
51735873507 ps |
| T534 |
/workspace/coverage/default/43.sysrst_ctrl_auto_blk_key_output.714881640 |
|
|
Jan 03 01:27:30 PM PST 24 |
Jan 03 01:27:50 PM PST 24 |
3349437953 ps |
| T535 |
/workspace/coverage/default/12.sysrst_ctrl_smoke.3887508569 |
|
|
Jan 03 01:25:26 PM PST 24 |
Jan 03 01:25:51 PM PST 24 |
2123526393 ps |
| T536 |
/workspace/coverage/default/40.sysrst_ctrl_pin_access_test.556271031 |
|
|
Jan 03 01:27:06 PM PST 24 |
Jan 03 01:27:31 PM PST 24 |
2038061956 ps |
| T139 |
/workspace/coverage/default/27.sysrst_ctrl_stress_all_with_rand_reset.3424847265 |
|
|
Jan 03 01:26:42 PM PST 24 |
Jan 03 01:27:21 PM PST 24 |
40992514625 ps |
| T537 |
/workspace/coverage/default/15.sysrst_ctrl_in_out_inverted.2672855380 |
|
|
Jan 03 01:25:44 PM PST 24 |
Jan 03 01:26:06 PM PST 24 |
2468625941 ps |
| T331 |
/workspace/coverage/default/49.sysrst_ctrl_combo_detect_with_pre_cond.248095505 |
|
|
Jan 03 01:27:51 PM PST 24 |
Jan 03 01:28:58 PM PST 24 |
110790122447 ps |
| T347 |
/workspace/coverage/default/22.sysrst_ctrl_combo_detect_with_pre_cond.3315246101 |
|
|
Jan 03 01:26:42 PM PST 24 |
Jan 03 01:29:24 PM PST 24 |
57664307371 ps |
| T538 |
/workspace/coverage/default/23.sysrst_ctrl_alert_test.2138401980 |
|
|
Jan 03 01:26:44 PM PST 24 |
Jan 03 01:27:04 PM PST 24 |
2039721349 ps |
| T303 |
/workspace/coverage/default/42.sysrst_ctrl_stress_all.523415590 |
|
|
Jan 03 01:27:27 PM PST 24 |
Jan 03 01:29:16 PM PST 24 |
145475592581 ps |
| T539 |
/workspace/coverage/default/33.sysrst_ctrl_stress_all.52053082 |
|
|
Jan 03 01:26:49 PM PST 24 |
Jan 03 01:27:20 PM PST 24 |
12915203673 ps |
| T346 |
/workspace/coverage/default/82.sysrst_ctrl_combo_detect_with_pre_cond.3754568308 |
|
|
Jan 03 01:28:09 PM PST 24 |
Jan 03 01:33:39 PM PST 24 |
126501251582 ps |
| T540 |
/workspace/coverage/default/28.sysrst_ctrl_ec_pwr_on_rst.2494234526 |
|
|
Jan 03 01:26:45 PM PST 24 |
Jan 03 01:27:08 PM PST 24 |
2725448745 ps |
| T541 |
/workspace/coverage/default/31.sysrst_ctrl_smoke.3979029328 |
|
|
Jan 03 01:26:42 PM PST 24 |
Jan 03 01:26:55 PM PST 24 |
2125072034 ps |
| T542 |
/workspace/coverage/default/28.sysrst_ctrl_auto_blk_key_output.1218022730 |
|
|
Jan 03 01:26:45 PM PST 24 |
Jan 03 01:27:14 PM PST 24 |
3492636674 ps |
| T543 |
/workspace/coverage/default/0.sysrst_ctrl_alert_test.2849169704 |
|
|
Jan 03 01:25:06 PM PST 24 |
Jan 03 01:25:22 PM PST 24 |
2026229965 ps |
| T544 |
/workspace/coverage/default/4.sysrst_ctrl_pin_override_test.910203749 |
|
|
Jan 03 01:25:06 PM PST 24 |
Jan 03 01:25:24 PM PST 24 |
2516094788 ps |
| T545 |
/workspace/coverage/default/30.sysrst_ctrl_smoke.4222768228 |
|
|
Jan 03 01:26:56 PM PST 24 |
Jan 03 01:27:24 PM PST 24 |
2130207914 ps |
| T546 |
/workspace/coverage/default/21.sysrst_ctrl_auto_blk_key_output.610239135 |
|
|
Jan 03 01:26:49 PM PST 24 |
Jan 03 01:27:12 PM PST 24 |
3685886630 ps |
| T547 |
/workspace/coverage/default/35.sysrst_ctrl_pin_access_test.1388483126 |
|
|
Jan 03 01:26:54 PM PST 24 |
Jan 03 01:27:26 PM PST 24 |
2037758057 ps |
| T548 |
/workspace/coverage/default/10.sysrst_ctrl_flash_wr_prot_out.1021895446 |
|
|
Jan 03 01:25:20 PM PST 24 |
Jan 03 01:25:44 PM PST 24 |
2634285657 ps |
| T549 |
/workspace/coverage/default/5.sysrst_ctrl_flash_wr_prot_out.296448389 |
|
|
Jan 03 01:25:12 PM PST 24 |
Jan 03 01:25:35 PM PST 24 |
2611002435 ps |
| T244 |
/workspace/coverage/default/40.sysrst_ctrl_stress_all_with_rand_reset.4243227356 |
|
|
Jan 03 01:27:07 PM PST 24 |
Jan 03 01:30:26 PM PST 24 |
104716664280 ps |
| T550 |
/workspace/coverage/default/44.sysrst_ctrl_ec_pwr_on_rst.2850891895 |
|
|
Jan 03 01:27:27 PM PST 24 |
Jan 03 01:27:51 PM PST 24 |
3021685363 ps |
| T551 |
/workspace/coverage/default/0.sysrst_ctrl_ultra_low_pwr.1887726840 |
|
|
Jan 03 01:25:07 PM PST 24 |
Jan 03 01:25:28 PM PST 24 |
9531966831 ps |
| T552 |
/workspace/coverage/default/22.sysrst_ctrl_auto_blk_key_output.3758720514 |
|
|
Jan 03 01:26:38 PM PST 24 |
Jan 03 01:26:46 PM PST 24 |
3644232994 ps |
| T123 |
/workspace/coverage/default/46.sysrst_ctrl_ultra_low_pwr.69132453 |
|
|
Jan 03 01:27:48 PM PST 24 |
Jan 03 01:28:07 PM PST 24 |
6547739053 ps |
| T553 |
/workspace/coverage/default/21.sysrst_ctrl_pin_access_test.1212921006 |
|
|
Jan 03 01:26:45 PM PST 24 |
Jan 03 01:27:10 PM PST 24 |
2095270486 ps |
| T554 |
/workspace/coverage/default/34.sysrst_ctrl_in_out_inverted.1521729286 |
|
|
Jan 03 01:26:47 PM PST 24 |
Jan 03 01:27:15 PM PST 24 |
2461393292 ps |
| T555 |
/workspace/coverage/default/22.sysrst_ctrl_ec_pwr_on_rst.1400896158 |
|
|
Jan 03 01:26:38 PM PST 24 |
Jan 03 01:26:49 PM PST 24 |
2549208532 ps |
| T556 |
/workspace/coverage/default/98.sysrst_ctrl_combo_detect_with_pre_cond.739741021 |
|
|
Jan 03 01:28:09 PM PST 24 |
Jan 03 01:29:36 PM PST 24 |
56125640798 ps |
| T557 |
/workspace/coverage/default/30.sysrst_ctrl_auto_blk_key_output.143529881 |
|
|
Jan 03 01:26:51 PM PST 24 |
Jan 03 01:27:19 PM PST 24 |
3368143347 ps |
| T124 |
/workspace/coverage/default/13.sysrst_ctrl_stress_all_with_rand_reset.2289157208 |
|
|
Jan 03 01:25:29 PM PST 24 |
Jan 03 01:27:44 PM PST 24 |
46654415938 ps |
| T558 |
/workspace/coverage/default/43.sysrst_ctrl_smoke.1772611660 |
|
|
Jan 03 01:27:26 PM PST 24 |
Jan 03 01:27:44 PM PST 24 |
2154351522 ps |
| T559 |
/workspace/coverage/default/11.sysrst_ctrl_pin_access_test.3630486932 |
|
|
Jan 03 01:25:09 PM PST 24 |
Jan 03 01:25:33 PM PST 24 |
2081456363 ps |
| T560 |
/workspace/coverage/default/2.sysrst_ctrl_combo_detect_ec_rst.3442760967 |
|
|
Jan 03 01:25:11 PM PST 24 |
Jan 03 01:25:31 PM PST 24 |
2497421044 ps |
| T561 |
/workspace/coverage/default/11.sysrst_ctrl_stress_all_with_rand_reset.1950911568 |
|
|
Jan 03 01:25:26 PM PST 24 |
Jan 03 01:28:05 PM PST 24 |
55126980132 ps |
| T562 |
/workspace/coverage/default/9.sysrst_ctrl_auto_blk_key_output.50923736 |
|
|
Jan 03 01:25:20 PM PST 24 |
Jan 03 01:25:46 PM PST 24 |
3727216766 ps |
| T563 |
/workspace/coverage/default/15.sysrst_ctrl_stress_all_with_rand_reset.3786984261 |
|
|
Jan 03 01:25:55 PM PST 24 |
Jan 03 01:27:43 PM PST 24 |
38379172897 ps |
| T564 |
/workspace/coverage/default/47.sysrst_ctrl_auto_blk_key_output.922682985 |
|
|
Jan 03 01:27:48 PM PST 24 |
Jan 03 01:28:19 PM PST 24 |
28983875526 ps |
| T348 |
/workspace/coverage/default/60.sysrst_ctrl_combo_detect_with_pre_cond.3901531584 |
|
|
Jan 03 01:28:05 PM PST 24 |
Jan 03 01:28:36 PM PST 24 |
47962035619 ps |
| T314 |
/workspace/coverage/default/43.sysrst_ctrl_combo_detect.1916011837 |
|
|
Jan 03 01:27:45 PM PST 24 |
Jan 03 01:28:31 PM PST 24 |
52369580167 ps |
| T565 |
/workspace/coverage/default/26.sysrst_ctrl_smoke.1887782783 |
|
|
Jan 03 01:26:41 PM PST 24 |
Jan 03 01:26:55 PM PST 24 |
2119128488 ps |
| T566 |
/workspace/coverage/default/14.sysrst_ctrl_edge_detect.277417457 |
|
|
Jan 03 01:25:31 PM PST 24 |
Jan 03 01:25:56 PM PST 24 |
2371481009 ps |
| T567 |
/workspace/coverage/default/38.sysrst_ctrl_in_out_inverted.2749898322 |
|
|
Jan 03 01:26:52 PM PST 24 |
Jan 03 01:27:21 PM PST 24 |
2478207225 ps |
| T568 |
/workspace/coverage/default/2.sysrst_ctrl_smoke.2068439975 |
|
|
Jan 03 01:25:09 PM PST 24 |
Jan 03 01:25:31 PM PST 24 |
2119680841 ps |
| T569 |
/workspace/coverage/default/79.sysrst_ctrl_combo_detect_with_pre_cond.3357318787 |
|
|
Jan 03 01:28:07 PM PST 24 |
Jan 03 01:28:42 PM PST 24 |
33651651007 ps |
| T570 |
/workspace/coverage/default/15.sysrst_ctrl_pin_access_test.1322021577 |
|
|
Jan 03 01:25:28 PM PST 24 |
Jan 03 01:25:56 PM PST 24 |
2066454424 ps |
| T571 |
/workspace/coverage/default/41.sysrst_ctrl_pin_access_test.1197109976 |
|
|
Jan 03 01:27:05 PM PST 24 |
Jan 03 01:27:31 PM PST 24 |
2090803512 ps |
| T572 |
/workspace/coverage/default/18.sysrst_ctrl_in_out_inverted.2306790611 |
|
|
Jan 03 01:26:41 PM PST 24 |
Jan 03 01:26:53 PM PST 24 |
2494992053 ps |
| T309 |
/workspace/coverage/default/70.sysrst_ctrl_combo_detect_with_pre_cond.3450725585 |
|
|
Jan 03 01:28:08 PM PST 24 |
Jan 03 01:29:02 PM PST 24 |
61841420608 ps |
| T573 |
/workspace/coverage/default/45.sysrst_ctrl_stress_all.2435448123 |
|
|
Jan 03 01:27:46 PM PST 24 |
Jan 03 01:28:04 PM PST 24 |
9579649789 ps |
| T574 |
/workspace/coverage/default/30.sysrst_ctrl_edge_detect.1788352515 |
|
|
Jan 03 01:26:43 PM PST 24 |
Jan 03 01:27:01 PM PST 24 |
3290891798 ps |
| T112 |
/workspace/coverage/default/38.sysrst_ctrl_ultra_low_pwr.2821785674 |
|
|
Jan 03 01:27:03 PM PST 24 |
Jan 03 01:30:32 PM PST 24 |
1640511658957 ps |
| T575 |
/workspace/coverage/default/2.sysrst_ctrl_combo_detect.2593386558 |
|
|
Jan 03 01:25:18 PM PST 24 |
Jan 03 01:27:39 PM PST 24 |
75642294427 ps |
| T576 |
/workspace/coverage/default/48.sysrst_ctrl_stress_all_with_rand_reset.418605002 |
|
|
Jan 03 01:27:49 PM PST 24 |
Jan 03 01:28:45 PM PST 24 |
34001456876 ps |
| T577 |
/workspace/coverage/default/34.sysrst_ctrl_edge_detect.766917168 |
|
|
Jan 03 01:26:50 PM PST 24 |
Jan 03 01:27:17 PM PST 24 |
2502569830 ps |
| T578 |
/workspace/coverage/default/90.sysrst_ctrl_combo_detect_with_pre_cond.2530345706 |
|
|
Jan 03 01:28:09 PM PST 24 |
Jan 03 01:31:05 PM PST 24 |
123695194499 ps |
| T579 |
/workspace/coverage/default/10.sysrst_ctrl_combo_detect_with_pre_cond.3722481156 |
|
|
Jan 03 01:27:06 PM PST 24 |
Jan 03 01:27:46 PM PST 24 |
24359890097 ps |
| T349 |
/workspace/coverage/default/44.sysrst_ctrl_combo_detect_with_pre_cond.367983208 |
|
|
Jan 03 01:27:27 PM PST 24 |
Jan 03 01:28:17 PM PST 24 |
48954848166 ps |
| T580 |
/workspace/coverage/default/13.sysrst_ctrl_pin_override_test.2962222860 |
|
|
Jan 03 01:25:30 PM PST 24 |
Jan 03 01:25:56 PM PST 24 |
2518558919 ps |
| T581 |
/workspace/coverage/default/25.sysrst_ctrl_combo_detect_with_pre_cond.715599767 |
|
|
Jan 03 01:26:40 PM PST 24 |
Jan 03 01:27:56 PM PST 24 |
29834057275 ps |
| T582 |
/workspace/coverage/default/40.sysrst_ctrl_auto_blk_key_output.700310567 |
|
|
Jan 03 01:27:04 PM PST 24 |
Jan 03 01:27:31 PM PST 24 |
3778157414 ps |
| T583 |
/workspace/coverage/default/15.sysrst_ctrl_ec_pwr_on_rst.1944264404 |
|
|
Jan 03 01:25:45 PM PST 24 |
Jan 03 01:26:05 PM PST 24 |
4076220985 ps |
| T584 |
/workspace/coverage/default/21.sysrst_ctrl_combo_detect.801207984 |
|
|
Jan 03 01:26:44 PM PST 24 |
Jan 03 01:29:17 PM PST 24 |
96787478802 ps |
| T585 |
/workspace/coverage/default/23.sysrst_ctrl_pin_override_test.3088825361 |
|
|
Jan 03 01:26:42 PM PST 24 |
Jan 03 01:27:02 PM PST 24 |
2511538650 ps |
| T586 |
/workspace/coverage/default/27.sysrst_ctrl_in_out_inverted.3303242158 |
|
|
Jan 03 01:26:39 PM PST 24 |
Jan 03 01:26:45 PM PST 24 |
2465100933 ps |
| T587 |
/workspace/coverage/default/10.sysrst_ctrl_alert_test.4162959241 |
|
|
Jan 03 01:27:08 PM PST 24 |
Jan 03 01:27:31 PM PST 24 |
2058797596 ps |
| T588 |
/workspace/coverage/default/5.sysrst_ctrl_ec_pwr_on_rst.2521216279 |
|
|
Jan 03 01:25:19 PM PST 24 |
Jan 03 01:25:46 PM PST 24 |
2762810192 ps |
| T326 |
/workspace/coverage/default/55.sysrst_ctrl_combo_detect_with_pre_cond.3736054591 |
|
|
Jan 03 01:28:08 PM PST 24 |
Jan 03 01:30:07 PM PST 24 |
42842944789 ps |
| T589 |
/workspace/coverage/default/37.sysrst_ctrl_flash_wr_prot_out.45717019 |
|
|
Jan 03 01:27:00 PM PST 24 |
Jan 03 01:27:28 PM PST 24 |
2634515329 ps |